Fairchild Semiconductor MM74HC4060SJX, MM74HC4060N, MM74HC4060M, MM74HC4060SJ, MM74HC4060MX Datasheet
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August 1984
Revised February 1999
MM74HC4060 14 Stage Binary Counter
© 1999 Fairchild Semiconductor Corporation DS005354.prf www.fairchildsemi.com
MM74HC4060
14 Stage Binary Counter
General Description
The MM74HC4060 is a high speed binary ripple carry
counter. These counters are implemented utilizing
advanced silicon-gate CMOS technology to achieve speed
performance similar to LS-TTL logic while retaining the low
power and high noise immunity of CMOS.
The MM74HC4060 is a 14-stage counter, which device
increments on the falling edge (n egative transition) of the
input clock, and all their outputs ar e reset to a low level by
applying a logical high on their reset input. The
MM74HC4060 also has two additional inputs to enable
easy connection of either an RC or crystal oscillator.
This device is pin equivalent to the CD4060. All inputs are
protected from dama ge due to stati c discharge by pro tection diodes to V
CC
and ground.
Features
■ Typical propagation delay: 16 ns
■ Wide operating voltage range: 2–6V
■ Low input current: 1 µA maximum
■ Low quiescent current: 80 µA maximum (74 Series)
■ Output drive capability: 10 LS-TTL loads
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Order Number Package Number Package Description
MM74HC4060M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC4060SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4060MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC4060N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
www.fairchildsemi.com 2
MM74HC4060
Logic Diagram
3 www.fairchildsemi.com
MM74HC4060
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Maximum Rating s are thos e values beyond which dam age to the
device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating: plastic “N” package:
−12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics (Note 4)
Note 4: For a power supply o f 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4 .5V. Thus the 4.5V values s hould be us ed wh en
designing with this supply. Worst case V
IH
and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst cas e leakage cur-
rent (I
IN
, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values s hould be used.
Supply Voltage (VCC) −0.5 to +7.0V
DC Input Voltage (V
IN
) −1.5 to V
CC
+1.5V
DC Output Voltage (V
OUT
) −0.5 to V
CC
+0.5V
Clamp Diode Current (I
CD
) ±20 mA
DC Output Current, per pin (I
OUT
) ±25 mA
DC V
CC
or GND Current, per pin (ICC) ±50 mA
Storage Temperature Range (T
STG
) −65°C to +150°C
Power Dissipation (P
D
)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds) 260°C
Min Max Units
Supply Voltage (V
CC
)26V
DC Input or Output Voltage
(V
IN
, V
OUT
)0V
CC
V
Operating Temperature Range (T
A
) −40 +85 °C
Input Rise or Fall Times
(t
r
, tf) V
CC
= 2.0V 1000 ns
V
CC
= 4.5V 500 ns
V
CC
= 6.0V 400 ns
Symbol Parameter Conditions
V
CC
TA = 25°CTA = −40 to 85°CTA = −55 to 125°C
Units
Typ Guaranteed Limits
V
IH
Minimum HIGH 2.0V 1.5 1.5 1.5 V
Level Voltage 4.5V 3.15 3.15 3.15 V
(Not Applicable to Pins 9 & 10) 6.0V 4.2 4.2 4.2 V
V
IL
Maximum LOW Level 2.0V 0.5 0.5 0.5 V
Input Voltage 4.5V 1.35 1.35 1.35 V
(Not Applicable to Pins 9 & 10) 6.0V 1.8 1.8 1.8 V
V
OH
Minimum HIGH Level V
IN
= V
IH
or V
IL
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
Except Pins V
IN
= VIH or V
IL
9 & 10 |I
OUT
| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V
|I
OUT
| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V
Pins V
IN
= VIH or V
IL
3.98 3.84 3.7 V
9 & 10 |I
OUT
| = 0.4 mA 5.48 5.34 5.2 V
|I
OUT
| = 0.52 mA
V
OL
Maximum LOW Level V
IN
= VIH or V
IL
Output Voltage |I
OUT
| ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
Except Pins V
IN
= VIH or V
IL
9 & 10 |I
OUT
| ≤ 4.0 mA 4.5V 0.2 0.26 0.33 0.4 V
|I
OUT
| ≤ 5.2 mA 6.0V 0.2 0.26 0.33 0.4 V
Pins V
IN
= VIH or V
IL
0.26 0.33 0.4 V
9 & 10 |I
OUT
| = 0.4 mA 0.26 0.33 0.4 V
|I
OUT
| = 0.52 mA
I
IN
Maximum Input Current V
IN
= VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA
I
CC
Maximum Quiescent V
IN
= VCCor GND
Supply Current I
OUT
= 0 µA6.0V 8.080 160µA
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