• Current-input gain modulator reduces external
components and improves noise immunity
• Programmable ramp compensation circuit
• 1A peak current totem-pole output drive
• Overvoltage comparator helps prevent output voltage
“runaway”
• Wide common mode range in current sense comparators
for better noise immunity
• Large oscillator amplitude for better noise immunity
Block Diagram
(Pin Configuration Shown is for DIP Version)
OVP
5
I
SENSE
1
GM OUT
2
EA OUT
3
EA–
4
5V
5V
5V
+
–
+
–
+
–
–
ERROR
AMP
I
EA
Description
The ML4812 is designed to optimally facilitate a peak
current control boost type power factor correction system.
Special care has been taken in the design of the ML4812 to
increase system noise immunity. The circuit includes a
precision reference, gain modulator, error amplifier, overvoltage protection, ramp compensation, as well as a high
current output. In addition, start-up is simplified by an undervoltage lockout circuit with 6V hysteresis.
In a typical application, the ML4812 functions as a current
mode regulator . The current which is necessary to terminate
the cycle is a product of the sinusoidal line voltage times the
output of the error amplifier which is regulating the output
DC voltage. Ramp compensation is programmable with an
external resistor, to provide stable operation when the duty
cycle exceeds 50%.
SHDN
V
32V
OUT
REF
V
CC
10
12
11
14
13
SRQ
V
CC
Q
PWR GND
UNDER
VOLTAGE
LOCKOUT
I
SINE
6
RAMP COMP
7
C
T
16
R
T
8
GAIN MODULATOR
OSC
5V
1kΩ
GND
15
CLOCK
9
REV. 1.0.4 5/31/01
ML4812PRODUCT SPECIFICATION
Pin Configuration
ML4812
20-Pin PLCC (Q20)
SENSE
GM OUT
I
NC
CTGND
3212019
NC
SHDN
CLOCK
18
17
16
15
14
4
5
6
7
8
910111213
T
R
RAMP COMP
Top View
V
REF
V
CC
NC
OUT
PWR GND
16-Pin PDIP (P16)
I
SENSE
GM OUT
EA OUT
EA–
OVP
I
SINE
RAMP COMP
R
T
ML4812
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
C
T
GND
V
REF
V
CC
OUT
PWR GND
SHDN
CLOCK
EA OUT
EA–
NC
OVP
I
SINE
Pin Description
NumberNameFunction
1 I
SENSE
2 GM OUTOutput of gain modulator. A resistor to ground on this pin converts the current to a
3EA OUTOutput of error amplifier.
4EA–Inverting input to error amplifier.
5OVPInput to over voltage comparator.
6 I
SINE
7RAMP
COMP
8R
T
9CLOCKDigital clock output.
10 SHDNA TTL compatible low level on this pin turns off the output.
11PWR
GND
12 OUTHigh current totem pole output.
13V
14V
CC
REF
15GNDAnalog signal ground.
16C
T
Input from the current sense transformer to the non-inverting input of the PWM
comparator.
voltage. This pin is clamped to 5V and tied to the inverting input of the PWM comparator.
Current gain modulator input.
Buffered output from the oscillator ramp (C
is internally subtracted from the product of I
). A resistor to ground sets the current which
T
SINE
and I
in the gain modulator.
EA
Oscillator timing resistor pin. A 5V source sets a current in the external resistor which is
mirrored to charge C
.
T
Return for the high current totem pole output.
Positive Supply for the IC.
Buffered output for the 5V voltage reference.
Timing capacitor for the oscillator.
2
REV. 1.0.4 5/31/01
ML4812PRODUCT SPECIFICATION
Absolute Maximum Ratings
Supply Current (I
) 30mA
CC
1
Output Current Source or Sink (OUT) DC1.0A
Output Energy (capacitive load per cycle)5µJ
Gain Modulator I
SINE
Input (I
)1.2mA
SINE
Error Amp Sink Current (EA OUT)10mA
Oscillator Charge Current 2mA
Analog Inputs (I
, EA–, OVP)–0.3V to 5.5V
SENSE
Junction Temperature 150°C
Storage Temperature Range–65°C to 150°C
Lead Temperature (soldering 10 sec.) 260°C
Thermal Resistance ( θ
20-Pin PLCC
16-Pin PDIP
Note:
1. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum
ratings are stress ratings only and functional device operation is not implied.
JA
)
60°C/W
65°C/W
Operating Conditions
Temperature Range
ML4812CX0°C to 70°C
3
REV. 1.0.4 5/31/01
PRODUCT SPECIFICATIONML4812
Electrical Characteristics
Unless otherwise specified, V
ParameterConditionsMin.Typ.Max.Units
Oscillator
Initial AccuracyT
Voltage Stability12V < V
Temperature Stability2%
Total VariationLine, temperature90108kHz
Ramp Valley to Peak3.3V
R
Voltage4.85.05.2V
T
Discharge Current (R
open)T
T
Clock Out Voltage LowRL = 16k Ω
Clock Out Voltage HighRL = 16k Ω
Reference
Output VoltageT
Line Regulation12V < V
Load Regulation1mA < IO < 20mA220mV
Temperature Stability0.4%
Total VariationLine, load, temp.4.95.1V
Output Noise Voltage10Hz to 10kHz50µV
Long Term StabilityT
Short Circuit CurrentV
Error Amplifier
Input Offset Voltage±15mV
Input Bias Current–0.1–1.0µA
Open Loop Gain1 < V
PSRR12V < V
Output Sink CurrentV
Output Source CurrentV
Output High VoltageI
Output Low VoltageI
Unity Gain Bandwidth1.0MHz
Input Offset Voltage±15mV
Input Offset Current±1µA
Input Common Mode Range–0.25.5V
Input Bias Current–2–10µA
Propagation Delay150ns
I
Trip PointV
LIMIT
GM OUT
= 5.5V4.855.2V
Output
Output Voltage LowI
Output Voltage HighI
Output Voltage Low in UVLOI
Output Rise/Fall TimeC
ShutdownV
= –20mA0.10.4V
OUT
I
= –200mA1.62.2V
OUT
= 20mA1313.5V
OUT
I
= 200mA1213.4V
OUT
= –5mA, V
OUT
= 1000pF50ns
L
IH
V
IL
I
, V
IL
IIH, V
= 0V–1.5mA
SHDN
= 5V10µA
SHDN
= 8V0.10.8 V
CC
2.0V
0.8V
Under-Voltage Lockout
Startup Threshold151617V
Shutdown Threshold91011V
V
Good Threshold4.4V
REF
Supply
Supply CurrentStart-Up, V
Operating, T
Internal Shunt Zener VoltageI
Notes:
1. Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
2. V
is raised above the Startup Threshold first to activate the IC, then returned to 15V.
CC
= 30mA253034V
CC
= 14V, T
CC
= 25°C2025mA
J
= 25°C0.81.2mA
J
5
REV. 1.0.4 5/31/01
ML4812PRODUCT SPECIFICATION
Functional Description
Oscillator
The ML4812 oscillator charges the external capacitor (CT)
with a current (I
voltage reaches the upper threshold, the comparator changes
state and the capacitor discharges to the lower threshold
through Q1. While the capacitor is discharging, Q2 provides
a high pulse.
EXTERNAL
CLOCK
C
SYNC
R
SYNC
) equal to 5/R
SET
I
SET
R
T
C
T
10
9
16
. When the capacitor
SET
SYNC
R
T
I
T
8.4mA
SET
5.6V
C
Q
2
+
-
The Oscillator period can be described by the following
relationship: