Fairchild Semiconductor KSD1691 Datasheet
KSD1691
Feature
• Low Collector-Emtter Saturation Voltage & Large Collector Current
• High Power Dissipation: P
• Complementary to KSB1151
= 1.3W (Ta=25°C)
C
KSD1691
1
TO-126
1. Emitter 2.Collector 3.Base
NPN Epitaxial Silicon Transistor
Absolute Maximum Ratings
Symbol Parameter Value Units
V
CBO
V
CEO
VEBO
IC
ICP
IB
PC
PC
TJ
TSTG
* PW≤10ms, duty Cycle≤50%
Collector-Base Voltage 60 V
Collector-Emitter Voltage 60 V
Emitter-Base Voltage 7 V
Collector Current (DC) 5 A
*Collector Current (Pulse) 8 A
Base Current (DC) 1 A
Collector Dissipation (Ta=25°C) 1.3 W
Collector Dissipation (TC=25°C) 20 W
Junction Temperature 150 °C
Storage T emperature - 55 ~ 150 °C
Electrical Characteristics
Symbol Parameter Test Condition Min. Typ. Max. Units
I
CBO
IEBO
hFE1
h
FE2
h
FE3
(sat) *Collector-Emitter Saturation Voltage IC = 2A, IB = 0.2A 0.1 0.3 V
V
CE
(sat) *Base-Emitter Saturation Voltage IC = 2A, IB = 0.2A 0.9 1.2 V
V
BE
t
ON
t
STG
t
F
* Pulse test: PW≤50µs, duty Cycle≤2% Pulsed
Collector Cut-off Current V
Emitter Cut-off Cu rr e nt V
*DC Current Gain V
Turn ON Time V
Storage Time 1.1 2.5 µs
Fall Time 0.2 1 µs
TC=25°C unless otherwise noted
TC=25°C unless otherwise noted
= 50V, IE = 0 10 µA
CB
= 7V, IC = 0 10 µA
EB
= 1V, IC = 0.1A
CE
= 1V, IC = 2A
V
CE
V
= 1V, IC = 5A
CE
= 10V, IC = 2A
CC
= - IB2 = 0.2A
I
B1
= 5Ω
R
L
60
100
50
400
0.2 1 µs
hFE Classificntion
Classification O Y G
h
FE 2
©2000 Fairchild Semiconductor International Rev. A, February 2000
100 ~ 200 160 ~ 320 200 ~ 400
Typical Characteristics
KSD1691
= 100mA
I
B
= 80mA
I
B
= 40mA
I
B
= 30mA
I
B
IB = 20mA
IB = 10mA
IB = 0
= 60mA
I
B
1000
100
10
, DC CURRENT GAIN
FE
h
1
0.01 0.1 1 10
IC[A], COLLECTOR CURRENT
10
8
6
4
2
Ic[A], COLLECTOR CURRENT
0
= 150mA
= 200mA
B
B
I
I
0.4 0.8 1.2 1.6 2.0
VCE[V], COLLECTOR-EMITTER VOLTAGE
VCE = 2V
VCE = 1V
Figure 1. Static Characteristic Figure 2. DC current Gain
10mS
Dissipation L imited
200mS
2mS
s/b Limited
(MAX)
CEO
V
VBE(sat)
Ic = 10 I
B
10
1
0.1
(sat)[V], SATURATION VOLTAGE
CE
(sat)
CE
(sat), V
BE
V
0.01
V
0.1 1 10
IC[A], COLLECTOR CURRENT
10
Ic(Pulse)MAX
Ic(DC)MAX
1
[A], COLLECTOR CURRENT
C
I
0.1
1 10 100
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Collector-Emitter Saturation Voltage
Base-Emitter Saturation Voltage
10
8
6
4
2
[A], COLLECTOR CURRENT
C
I
0
20 40 60 80 100
VCE[V], COLLEC TO R - EM ITTER VOLTA GE
Figure 5. Reverse Bias Safe Operating Area Figure 6. Derating Curve of Safe Operating Areas
©2000 Fairchild Semiconductor International
Figure 4. Forward Bias Safe Operating Area
(SUS)
CEO
V
160
140
120
100
80
60
[%], Ic DERATING
T
d
40
20
0
0 25 50 75 100 125 150 175 200
TC[oC], CASE TEMPERATURE
s/b LIMITED
DISSIPATION LIMITED
Rev. A, February 2000
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