Fairchild Semiconductor KA3524 Datasheet

KA3524
SMPS Controller
www.fairchildsemi.com
Features
• Complete PWM power control circuit
• Operation beyond 100KHz
• 2% frequency stability with temperature
• Total quiescent current less than 10mA
• Current limit amplifier provides external component
protection
• On-chip protection against excessive junction temperature and output curre nt
• 5V, 50mA linear regulator output available to user
Description
The KA3524 regul ating pulse width modulator contains all of the control circuit necessary to implement switching regulators of either polarity, transformer coupled DC to DC converters, transforme r le ss pola r it y conv e rte r s and vol t­age doublers, as well as other power control applications. This device incl udes a 5V vol tag e regu lat or cap able of sup­plying up to 50mA to external circuit , a control ampli­fier, an oscillator, a pulse width modulator, a phase splitting flip-flop, dual alternating output switch transistors, and current limiting and shut-down circuit. Both the regu­lator output transistor and each output switch are internally current limiting and, to limit junction temperature, aninter­nal thermal shutdown circuit is employed.
16-DIP
1
Internal Block Diagram
©2000 Fairchild Semiconductor International
Rev. 5.0
KA3524
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply Voltage V Reference Output Current I Output Current (Each Output) I Oscillator Charging Current (pin 6 or 7) I
CHG(OSC
Lead Temperature (Soldering, 10 sec) T Power Dissipation (T
= 25°C) P
A
Operating Temperature T Storage Temperature T
CC
REF
O
)5 mA
LEAD
D POR STG
40 V 50 mA
100 mA
300 °C
1000 mW
0 ~ +70 °C
-65 ~ + 150 °C
Electrical Characteristics
(VIN=20V, f=20KHz, TA = 0 to +70°C, unless otherwise specified)
Parameter Symbol Conditions Min. Typ. Max. Unit
REFERENCE SECTION
Reference Output Voltage V Line Regulation ∆V Load Regulation ∆V
REF
REFVCC REFIREF
= 8V to 40V - 10 30 mV
= 0 mA to 20 mA - 20 50 mV
Ripple Rejection RR f = 120Hz, T
V
Short-Circuit Output Current I Temperature Stability ST
SC
T
Long Term Stability ST T
= 0, TA = 25°C - 100 - mA
REF
= 25°C-20-mV/KHr
A
OSCILLATOR SECTION
Maximum Frequency f
(MAX)
Initial Accuracy ACCUR R Frequency Change with Voltage f/∆V Frequency Change with
Temperature Clock Amplitude (Pin 3) V Clock Width (Pin 3) t
∆f/∆T Over operating temperature range - - 2 %
(CLK)TA
W(CLK)CT
CT = 0.001uF, RT = 2K - 350 - KHz
and CT constant - 5 - %
T
CCVCC
= 8V to 40V, TA = 25°C--1%
= 25°C-3.5-V = 0.01uF, TA = 25°C-0.5-µs
ERROR AMPLIFIER SECTION
Input Offset Voltage V Input Bias Current I Open Loop Voltage Gain G Common-Mode Input Voltage V
BIAS
VO
CM
Common-Mode Rejection Ratio CMRR T Small Signal Bandwidth BW Output Voltage Swing V
O(ERR)TA
VCM = 2.5V - 2 10 mV
IO
VCM = 2.5V - 2 10 µA
TA = 25°C1.8-3.4V
= 25°C-70-dB
A
GV = 0dB, TA= 25°C-3-MHz
SS
= 25°C0.5-3.8V
-4.65.05.4V
= 25°C-66-dB
A
--0.31%
-6080-dB
2
Electrical Characteristics
(VIN=20V, f=20KHz, TA=0°C to +70°C, unless otherwise specified)
Parameter Symbol Conditions Min. Typ. Max. Unit
COMPARATOR SECTION
Maximum Duty Cycle D
(MAX)
Input Threshold (Pin 9) V Input Threshold (Pin 9) V Input Bias Current I
BIAS
CURRENT LIMITING SECTION
Sense Voltage V Temperature Coefficient of Vsense ∆V
SENSE
SENSE
Common-Mode Voltage V
OUTPUT SECTION (EACHOUTPUT)
Collector-Emitter Voltage V Collector Leakage Current I Saturation Voltage V
CE(SAT)
Emitter Output Voltage V Rise Time (10 to 90) t Fall Time (90 to 10) t
Supply Current I
TH1 TH2
CM
CEO
LKG
E R F
CC
% Each output on 45 - - % Zero duty cycle - 1 - V Maximum duty cycle - 3.5 - V
V2 - V
1
V
= 2V, TA = 25°C
9
/T- -0.2-mV/°C
VCE = 40V - 0.1 50 µA IC = 50mA - 1 2 V VC = 20V 17 18 - V RC = 2K, TA = 25°C-0.2-µs RC = 2K, TA = 25°C-0.1-µs VCC =40V, PINS 1,4,7,8,11
and 14 are grounded, V All other inputs and Outputs open
50mV
KA3524
--1-µA
180 200 220 mV
-0.7-1V
-40--V
2
=2V
-510mA
3
KA3524
Application Information
Voltage Reference
An internal series regulator provides a nominal 5 volt output which is used both to generate a reference voltage and is the regulated source for all the internal timing and controlling circuitry . This regulator may be bypassed for operation from a fixed 5 volt supply by connecting pins 15 and 16 together to the input voltage. In this configuration, the maximum input voltage is 6.0 volts.
This reference regulator may be used as a 5 volt source for other circuitry. It will provide up to 50mA of current itself and can easily be expanded to higher current with an external PNP as shown in Figure 2.
Expanded Reference Current Capability
Oscillator
The oscillator in the KA3524 uses an external resistor (RT) to establish a constant charging current into an external capacitor (C
), While this uses more current than a series connected PC, it provides a linear ramp voltage on the capacitor which is also
T
used as a reference for the comparator. The charging current is equal to 3.6V/R approximately 30uA to 2mA, i.e., 1.8K< R
<100K. The range of values for CT also has limits as the discharge time of C
T
and should be kept within the range of
T
t
determine s the pulse widt h of the oscillator outpu t pulse. This pulse is used (among other t hings) as a bla nking pulse to both outputs to insure that there is no possibility of having both outputs on simultaneously during transitions. This output dead time relationship is shown in Figures. A pulse width below approximately 0.5 microseconds may allow false triggering of one out­put by removing he blanking pulse prior to the flip-flops reaching a stable state. If small values of C
must be used, the pulse
T
width may still be expanded by adding a shunt capacitance (= 100pF) to ground at the oscillator output. (Note: Although the oscillator output is a convenient oscilloscope sync input, the cable and input capacitance may increase the blanking pulse width slightly.) Obviously, the upper limit of the pulse width is determined by the maximum duty cycle acceptable. Practical values of C onds when R
fall between 0.01 and0.1 micro farad. The oscillator period is approximately t = RTCT where t is in microsec-
T
ohms and CT = micro farads. The selection of RT and CT can be made for a wide range of operating frequen-
T
cies by using Fig. 7. Note that for sense regulator applications, the two outputs can be connected in parallel for an effective 0­90% duty cycle and the frequen cy of the os cillat or is the fr equenc y of the ou tput. Fo r push-p ull appl ications, the outp uts are separated and the flip-flop divides the frequency such that each output duty cycle is 0-45% and the overall frequency is one­half that of the oscillator.
External Synchronization
If It is desired to synchronize the KA3524 to an external clock, a pulse of +3 volts may be applied to the oscillator output terminal with R ground at this point is approximately 2K ohms. If two or more KA3524s must be synchronized together, one must be desig­nated as the master with its R 10% longer period than the master with the added requirement that C on all units together will insure that the master output pulse-which occurs first and has a wider pulse width - will reset the slave units.
set slightly greater than the clock period. The same considerations of pulse width apply . The impedance to
TCT
set for the correct period. The slaves should each have an RTCT set for an approximately
TCT
(slave) = one-half CT (master). Then connecting Pin 3
T
4
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