March 1998
FDR856P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
SuperSOTTM-8 P-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for low
voltage applications such as battery powered circuits or
portable electronics where low in-line power loss, fast
switching and resistance to transients are needed.
- 6.3 A, -30 V, R
R
SuperSOTTM-8 package:
small footprint (40% less than SO-8);low profile (1mm
thick);maximum power comperable to SO-8.
High density cell design for extremely low R
=0.025 Ω @ VGS = -10 V
DS(ON)
=0.040 Ω @ VGS = -4.5 V.
DS(ON)
DS(ON)
.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8 SOT-223
SOIC-16
S
D
D
5
4
S
856P
pin 1
SuperSOT -8
TM
Absolute Maximum Ratings T
D
G
D
D
= 25oC unless other wise noted
A
6
7
8
Symbol Parameter FDR856P Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -30 V
Gate-Source Voltage - Continuous ±20 V
Maximum Drain Current - Continuous (Note 1a) -5.1 A
- Pulsed -50
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 1.8 W
(Note 1b)
(Note 1c)
Operating and Storage Temperature Range -55 to 150 °C
STG
1
0.9
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
3
2
1
© 1998 Fairchild Semiconductor Corporation
FDR856P Rev.B
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
I
GSSF
I
GSSR
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, I D = -250 µA -30 V
Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = -250 µA, Referenced to 25 oC
VDS = -24 V, V
GS
= 0 V
-15
-1 µA
TJ = 55°C
Gate - Body Leakage, Forward VGS = -20 V, VDS = 0 V -100 nA
Gate - Body Leakage, Reverse
VGS = -20 V, V
DS
= 0 V
mV /oC
-10 µA
-100 nA
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -1 -1.5 -3 V
Gate Threshold Voltage Temp. Coefficient
/∆T
J
Static Drain-Source On-Resistance
ID = -250 µA, Referenced to 25 oC
VGS = -10 V, I D = -6.3 A
3
0.022 0.025
mV /oC
TJ =125°C 0.03 0.042
0.033 0.04
15 S
I
g
D(ON)
FS
VGS = -4.5 V, I D = -5 A
On-State Drain Current VGS = -10 V, VDS = -5 V -50 A
Forward Transconductance
VDS = -10 V, I D = -6.3 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -15 V, VGS = 0 V,
Output Capacitance 740 pF
f = 1.0 MHz
1370 pF
Reverse Transfer Capacitance 220 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time
V
= -15 V, I D= -1 A
DS
VGS = -10 V , RG = 6 Ω
Turn - Off Delay Time 80 100 ns
Turn - Off Fall Time 130 160 ns
g
gs
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge 8.7 nC
VDS = -15 V, I D = -6.3 A,
V
= -10 V
GS
7 14 ns
12 19 ns
22 31 nC
3.8 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
Notes:
1. R
SD
JA
θ
design while R
Maximum Continuous Drain-Source Diode Forward Current -1.3 A
Drain-Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
VGS = 0 V, IS = -1.3 A
(Note 2)
-0.73 -1.2 V
is guaranteed by
JC
θ
Ω
a. 50OC/W on a 0.5 in
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
2
b. 105OC/W on a 0.02 in
pad of 2oz copper.
2
c. 125OC/W on a 0.003 in2 pad
of 2oz copper.
FDR856P Rev.B
Typical Electrical Characteristics
30
V = -10V
GS
-5.5V
25
20
15
10
5
D
- I , DRAIN-SOURCE CURRENT (A)
0
0 0.5 1 1.5 2 2.5 3
-4.5V
-4.0V
-3.5V
-3.0V
-2.5V
-V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.6
I = -6.3A
D
V = -10V
1.4
GS
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
2.5
V = -3.5 V
GS
2
1.5
DS(on)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5
0 5 10 15 20 25 30
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.125
0.1
0.075
0.05
0.025
DS(ON)
R , ON-RESISTANCE (OHM)
0
2 4 6 8 10
-4.0V
-4.5V
-5.0V
-5.5V
-7.0V
- I , DRAIN CURRENT (A)
D
T = 125°C
J
T = 25°C
J
-V , GATE TO SOURCE VOLTAGE (V)
GS
-10V
I = -3A
D
Figure 3. On-Resistance Variation with
Temperature.
30
V = -5V
DS
25
20
15
10
D
- I , DRAIN CURRENT (A)
5
0
1 2 3 4 5
-V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
25°C
125°C
Figure 4 . On Resistance Variation with
Gate-to-Source Voltage.
40
V = 0V
GS
5
1
0.1
0.01
0.001
S
-I , REVERSE DRAIN CURRENT (A)
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
-V , BODY DIODE FORWARD VOLTAGE (V)
T = 125°C
J
25°C
-55°C
SD
Figure 5 . Transfer Characteristics. Figure 6 . Body Diode Forward Voltage
Variation with Source
Current and Temperature.
FDR856P Rev.B