Fairchild Semiconductor FDR4410 Datasheet
April 1998
FDR4410
N-Channel Enhancement Mode Field Effect Transistor
General Description Features
Absolute Maximum Ratings T
A
= 25oC unless otherwise noted
Symbol Parameter FDR4410 Units
V
DSS
Drain-Source Voltage 30 V
V
GSS
Gate-Source Voltage ±20 V
I
D
Draint Current - Continuous (Note 1a) 9.3 A
- Pulsed 40
P
D
Maximum Power Dissipation (Note 1a) 1.8
W
(Note 1b)
1
(Note 1c)
0.9
TJ,T
STG
Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1a) 70 °C/W
R
θJC
Thermal Resistance, Junction-to-Case (Note 1) 20 °C/W
FDR4410 Rev.C
9.3 A, 30 V. R
DS(ON)
= 0.013 Ω @ VGS = 10 V
R
DS(ON)
= 0.020 Ω @ VGS = 4.5 V.
High density cell design for extremely low R
DS(ON)
.
Proprietary SuperSOTTM-8 small outline surface mount
package with high power and current handling capability.
The FDR4410 has been designed as a smaller, low cost
alternative to the popular Si4410DY.
The SuperSOTTM-8 package is 40% smaller than the SO-8
package.
The SuperSOTTM-8 advanced package design and
optimized pinout allow the typical power dissipation to be
similar to the bigger SO-8 package.
SOT-23
SuperSOTTM-8
SOIC-16
SO-8
SOT-223
SuperSOTTM-6
D
S
D
D
S
D
D
G
SuperSOT -8
TM
pin
1
4410
1
5
6
7
8
4
3
2
© 1998 Fairchild Semiconductor Corporation
Electrical Characteristics (T
A
= 25OC unless otherwise noted )
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V
∆BV
DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
ID = 250 µA, Referenced to 25 oC
35
mV/oC
I
DSS
Zero Gate Voltage Drain Current
VDS = 24 V, V
GS
= 0 V
1 µA
TJ = 55°C
25 µA
I
GSS
Gate - Body Leakage Current VGS = 20 V, V
DS
= 0 V 100 nA
I
GSS
Gate - Body Leakage, Reverse
VGS = -20 V, V
DS
= 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.5 2 V
∆V
GS(th)
/∆T
J
Gate Threshold Voltage Temp.Coefficient
ID = 250 µA, Referenced to 25 oC
-4.4
mV/oC
R
DS(ON)
Static Drain-Source On-Resistance
VGS = 10 V, ID = 9.3 A
0.011 0.013
Ω
TJ =125°C 0.017 0.02
VGS = 4.5 V, ID = 5 A
0.016 0.02
I
D(ON)
On-State Drain Current VGS = 10 V, VDS = 5 V 20 A
g
FS
Forward Transconductance
VDS = 10 V, ID = 9.3 A
25 S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
1170 pF
C
oss
Output Capacitance 627 pF
C
rss
Reverse Transfer Capacitance 180 pF
SWITCHING CHARACTERISTICS (Note 2)
t
D(on)
Turn - On Delay Time
VDD = 25 V, ID = 1 A,
VGS = 10 V, R
GEN
= 6 Ω
12 22 ns
t
r
Turn - On Rise Time 11 20 ns
t
D(off)
Turn - Off Delay Time 41 66 ns
t
f
Turn - Off Fall Time 34 55 ns
Q
g
Total Gate Charge
VDS = 15 V, ID = 9.3 A,
VGS = 10 V
36 50 nC
Q
gs
Gate-Source Charge 4.5 nC
Q
gd
Gate-Drain Charge 10 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current 1.5 A
V
SD
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.5 A (Note 2) 0.72 1.2 V
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design. R
θ
JA
shown below for single device operation on FR-4 board in still air.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDR4410 Rev.C
b. 125OC/W on a 0.026 in2 of pad
of 2oz copper.
a. 70OC/W on a 1 in2 pad of 2oz
copper.
c. 135OC/W on a 0.005 in2 of pad
of 2oz copper.
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