Fairchild Semiconductor DM74ALS374WMX, DM74ALS374WM, DM74ALS374SJX, DM74ALS374SJ, DM74ALS374ASJX Datasheet
...
© 2000 Fairchild Semiconductor Corporation DS006113 www.fairchildsemi.com
September 1986
Revised February 2000
DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop
DM74ALS374
Octal 3-STATE D-Type Edge-Triggered Flip-Flop
General Description
This 8-bit register features totem-pole 3-STATE outputs
designed specifically fo r driving highly-capacitive or relatively low-impedance loa ds. Th e hi gh -im ped ance state and
increased high-logic-l evel drive provides this register w ith
the capability of being connected directly to and driving the
bus lines in a bu s-or ga nized sy stem w ith ou t n eed fo r interface or pull-up comp onents. It is particularly attractive for
implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The eight flip-flops of the DM74ALS374 are edg e- trigg er ed
D-type flip-flops. On t he po sitive t ran sition o f the clock, t he
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input ca n be used to place the
eight outputs in either a normal l ogic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-impedance state the outputs ne ither load nor dr ive the bus lines
significantly.
The output control does not affect the i nternal oper ation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full
temperat ure and V
CC
range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin-for-pin compatible with LS TTL
counterpart
■ Improved AC perfo rma nce ov er DM74LS374 at app roxi mately half the power
■ 3-STA T E buffer-type outputs drive bus lines directly
Ordering Code:
Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code.
Connection Diagram
Order Number Package Number Package Description
DM74ALS374WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
DM74ALS374
Function Table
L = LOW State
H = HIGH State
X = Don’t Care
↑ = Positive Edge Transition
Z = High Impedance State
Q
0
= Previous Condit ion of Q
Logic Diagram
Output
Control
Clock D
Output
Q
L ↑ HH
L ↑ LL
LLXQ
0
HXXZ
3 www.fairchildsemi.com
DM74ALS374
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings ” are those val ues beyond w hich
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommend ed O peratin g Cond itions” t able w ill defin e the condition s
for actual device operation.
Note 2: This product meet s application re quirements of 500 temperature
cycles from −65°C to +150°C.
Recommended Operating Conditions
Note 3: The (↑) arrow indicates t he positive edge of the Clo c k is us ed for reference.
DC Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Supply Voltage 7V
Input Voltage 7V
Voltage Applied to Disabled Output 5.5V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range (Note 2) −65°C to +150°C
Typical θ
JA
N Package 60.0°C/W
M Package 79.0°C/W
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.5 5 5.5 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current −2.6 mA
I
OL
LOW Level Output Current 24 mA
f
CLOCK
Clock Frequency 0 35 MHz
t
W
Width of Clock Pulse HIGH 14 ns
LOW 14 ns
t
SU
Data Setup Time (Note 3) 10↑ ns
t
H
Data Hold Time (Note 3) 0↑ ns
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
V
IK
Input Clamp Voltage VCC = 4.5V, II = −18 mA −1.5 V
V
OH
HIGH Level Output VCC = 4.5V IOH = Max 2.4 3.2 V
Voltage VCC = 4.5V to 5.5V IOH = −400 µAV
CC
− 2V
V
OL
LOW Level Output VCC = 4.5V IOL = 12 mA 0.25 0.4 V
Voltage IOL = 24 mA 0.35 0.5 V
I
I
Input Current @ Max. VCC = 5.5V, VIH = 7V
0.1 mA
Input Voltage
I
IH
HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA
I
IL
LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.2 mA
I
O
Output Drive Current VCC = 5.5V VO = 2.25V −30 −112 mA
I
OZH
OFF-State Output Current, VCC = 5.5V, VO = 2.7V
20 µA
HIGH Level Voltage Applied
I
OZL
OFF-State Output Current, VCC = 5.5V, VO = 0.4V
−20 µA
LOW Level Voltage Applied
I
CC
Supply Current VCC = 5.5V Outputs HIGH 11 19 mA
Outputs Open Outputs LOW 19 28 mA
Outputs Disabled 20 31 mA
Loading...