Fairchild Semiconductor 74LVTH2240WMX, 74LVTH2240WM, 74LVTH2240SJX, 74LVTH2240SJ, 74LVTH2240MTCX Datasheet

© 1999 Fairchild Semiconductor Corporation DS500212 www.fairchildsemi.com

July 1999
Revised August 1999

74LVT2240 • 74LVTH2240 Low Voltage Inverting Octal Buffer/Line Driver with 3-STATE Outputs

74LVT2240 • 74LVTH2240
Low Voltage Inverting Octal Buffer/Line Driver

with 3-STATE Outputs

General Description

The LVT2240 and LVTH2240 are inverting octal buffers
and line drivers designed to be employed as memory
address drivers, clock drivers and bus oriented transmitters
or receivers which provides improved PC board density.
The equivalent 25 Ω-Series resistors helps reduce output
overshoot and undershoot.

The LVTH2240 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.

These inverting octal buffers a nd line d rivers are de signed
for low-voltage (3.3V) V

CC

applications, but with the capa-

bility to provide a TTL interface to a 5V e nvironment. The
LVT2240 and LVTH2240 are fabricated with an advanced
BiCMOS technology to achi eve high sp eed op eration simi­lar to 5V ABT while maintaining low power dissipation.

Features

■ Input and output interface capability to systems at
5V V

CC

■ Equivalent 25Ω-Series resistors on outputs

■ Bushold data inputs elimina te the nee d for exte rnal pul l-

up resistors to hold unused inp uts (74LVTH2240), also
available without bushold feature (74LVT2240).

■ Live insertion/extraction per mitt ed

■ Power Up/Down high impedance provides glitch-free

bus loading

■ Outputs source/sink −12 mA/+12 mA

■ Latch-up performance exceeds 500 mA

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending su ffix let te r “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Order Number Package Number Package Description

74LVT2240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVT2240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT2240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH2240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH2240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH2240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

www.fairchildsemi.com 2

74LVT2240 • 74LVTH2240

Pin Descriptions Tr uth Tables

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance

Pin Names Description

OE

1

, OE23-STATE Output Enable Inputs

I

0–I7

Inputs

O

0–O7

Outputs

Inputs Outputs

(Pins 12, 14, 16, 18)

OE

1

I

n

LL H
LH L
H X Z

Inputs Outputs

(Pins 3, 5, 7, 9)

OE

2

I

n

LL H
LH L
H X Z