Datasheet USB10P Datasheet (Fairchild Semiconductor)

USB10P P-Channel 2.5V Specified PowerTrenchTM MOSFET
General Description Features
June 1999
This P-Channel 2.5V specified MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance.
These devices are well suited for battery power applications: load switching and power management, battery charging circuits, and DC/DC conversion.
SOT-23
SuperSOTTM-8
S
D
D
G
D
D
pin 1
SuperSOT -6
TM
-4.5 A, -20 V. R R
= 0.045 @ VGS = -4.5 V
DS(ON)
= 0.065 @ VGS = -2.5 V.
DS(ON)
Low gate charge (13nC typical). High performance trench technology for extremely low
R
.
DS(ON)
SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick).
SO-8
SOT-223SuperSOTTM-6
1
2
3
3
SOIC-16
6
5
4
Absolute Maximum Ratings T
= 25°C unless otherwise note
Symbol Parameter Ratings Units
V V I
D
Drain-Source Voltage -20 V
DSS
Gate-Source Voltage - Continuous ±8 V
GSS
Drain Current - Continuous (Note 1a) -4.5 A
- Pulsed -20
P
TJ,T
Maximum Power Dissipation (Note 1a) 1.6 W
D
Operating and Storage Temperature Range -55 to 150 °C
STG
(Note 1b)
0.8
THERMAL CHARACTERISTICS
R R
©1999 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
θJA
Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W
JC
θ
USB10P Rev.D
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
BV
I
DSS
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 oC -18 mV/oC
/∆T
J
Zero Gate Voltage Drain Current VDS = -16 V, V
= 0 V -1 µA
GS
TJ = 55 oC -10 µA I I
GSSF
GSSR
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse VGS = -8 V, V
= 0 V -100 nA
DS
ON CHARACTERISTICS (Note 2)
V
V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.9 -1.5 V Gate Threshold VoltageTemp.Coefficient ID = -250 µA, Referenced to 25 oC 3 mV/oC
/∆T
J
Static Drain-Source On-Resistance VGS = -4.5 V, ID = -4.5 A 0.039 0.045
TJ = 125 oC 0.054 0.072
VGS = -2.5 V, ID = -3.8 A 0.057 0.065
I
D(on)
g
FS
On-State Drain Current VGS = -4.5 V, VDS = -5 V -20 A Forward Transconductance VDS = -10 V, ID = -4.5 A 6.5 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, VGS = 0 V, 1240 pF Output Capacitance f = 1.0 MHz 270 pF Reverse Transfer Capacitance 100 pF
SWITCHING CHARACTERISTICS (Note 2)
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Turn - On Delay Time VDD = -5 V, ID = -1 A, 8 16 ns Turn - On Rise Time
VGS = -4.5 V, R
GEN
= 6
15 27 ns
Turn - Off Delay Time 45 65 ns Turn - Off Fall Time 30 50 ns Total Gate Charge VDS = -10 V, ID = -4.5 A, 13 19 nC Gate-Source Charge VGS = -5 V 1.8 nC Gate-Drain Charge 3 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
V
SD
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
design while R
a. 78oC/W when mounted on a 1 in b. 156oC/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Continuous Source Diode Current -1.3 A Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A (Note 2) -0.75 -1.2 V
Notes:
is determined by the user's board design.
CA
θ
2
pad of 2oz Cu on FR-4 board.
is guaranteed by
JC
θ
USB10P Rev.D
Typical Electrical Characteristics
20
V = -4.5V
GS
16
12
8
4
D
- I , DRAIN-SOURCE CURRENT (A) 0
0 1 2 3 4 5
-3.0V
- 2.5V
- 2.0V
-V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.6
I = -4.5A
D
V = -4.5V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
1.6
V = -2.5V
GS
1.4
-3.0V
1.2
-3.5V
-4.0V
DS(ON)
1
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8 0 5 10 15 20
- I , DRAIN CURRENT (A)
D
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.15
0.12
0.09
0.06
0.03
DS(ON)
R , ON-RESISTANCE (OHM)
0
1 2 3 4 5
- V , GATE TO SOURCE VOLTAGE (V)
GS
-4.5V
I = -2.0A
D
T = 125°C
A
25°C
Figure 3. On-Resistance Variation
with Temperature.
20
V = -5V
DS
16
12
8
D
4
- I , DRAIN CURRENT (A)
0
0 0.8 1.6 2.4 3.2 4
-V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5.Transfer Characteristics.
T = -55°C
J
25°C
125°C
Figure 4. On Resistance Variation with
Gate-to-Source Voltage.
20
V = 0V
GS
10
T = 125°C
1
0.1
0.01
S
- I , REVERSE DRAIN CURRENT (A)
0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4
J
25°C
-55°C
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDC638P Rev.D
Typical Electrical Characteristics
5
I = -4.5A
D
4
3
2
1
GS
-V , GATE-SOURCE VOLTAGE (V) 0
0 3 6 9 12 15
Q , GATE CHARGE (nC)
g
V = -5V
DS
-10V
-15V
Figure 7. Gate Charge Characteristics.
30
RDS(ON) LIMIT
5
1
0.3
V = -4.5V
D
- I , DRAIN CURRENT (A)
0.05
0.01
GS
SINGLE PULSE R =156 °C/W
JA
θ
T = 25°C
A
A
0.1 0.2 0.5 1 2 5 10 30
- V , DRAIN-SOURCE VOLTAGE (V)
DS
1ms
10ms
100ms
1s
DC
100us
2500
C
C
C
iss
oss
rss
1000
400
200
CAPACITANCE (pF)
f = 1 MHz
100
V = 0 V
GS
50
0.1 0.3 1 3 10 20
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 8. Capacitance Characteristics.
5
4
3
2
POWER (W)
1
0
0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC)
SINGLE PULSE
JA
R =156°C/W
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.02
r(t), NORMALIZED EFFECTIVE
0.01
TRANSIENT THERMAL RESISTANCE
0.005
0.00001 0.0001 0.001 0.01 0.1 1 10 100 300
0.05
0.02
0.01 Single Pulse
t , TIME (sec)
1
Figure 11. Transient Thermal Response Curve.
Transient thermal response will change depending on the circuit board design.
Thermal characterization performed using the conditions described in Note 1b.
Figure 10. Single Pulse Maximum Power
Dissipation.
R (t) = r(t) * R
JA
θ
R = 156°C/W
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
JA
θ
1 2
FDC638P Rev.D
g
y
y
g
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging Configuration:
Fi
ure 1.0
SSOT-6 Packaging Information
Packaging Option Packaging type
Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)
Note/Comments
Customize Label
Stan dard
(no flow c ode)
3,000 10,000 7" Dia
184x187x47 343x343x64
9,000 30,000
0.0158 0.0158
0.1440 0.4700
TNR
D87Z
TNR
13"
Antistatic Cover Tape
F63TNR Label
Packaging Description:
SSOT-6 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 uni ts p er 7 " or 17 7cm di amet er re el. The reels are dark blue in color and is made of polystyrene plastic (anti­static coated). Other option comes in 10,000 units per 13" or 330cm diam eter reel. T his a nd some othe r opti ons ar e described in the Packaging Information table.
These full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a Fairchild logo printi ng. One pizza box contain s three r eels maximu m. And these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes
Embo ssed
Carrier Tape
depending on the num ber of part s shipped.
631
SSOT-6 Unit Orientation
343mm x 342mm x 64mm
Intermediate box for D87Z Option
631
631631
631
Pin 1
F63TNR Label
184mm x 187mm x 47mm
Pizza Box for Standard Option
SSOT-6 Tape Leader and Trailer Configuration:
Carrier Tape
Cover Tape
1998 Fairchild Semiconductor Corporation
ure 2.0
Fi
Tr ailer Tap e 300mm mi nimum or 75 empt
F63TNR Label
F63TNR Label
pockets
Component s
F63TNR Label sampl e
LOT: CBVK7 41B019
FSID: FDC633N
D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:
QTY: 3000
SPEC:
N/F: F (F63TNR)3
Leader Tape 500mm mi nimum or 125 empt
pockets
August 1999, Rev. C
g
g
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape Configuration:
T
K0
Wc
Fi
B0
ure 3.0
P0
D0
E1
F
W
E2
Tc
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SSOT-6
(8mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
SSOT-6 Reel Configuration:
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
3.23
3.18
8.0
1.55
1.125
1.75
6.25
+/-0.10
+/-0.10
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
+/-0.3
+/-0.05
Fi
+/-0.125
ure 4.0
+/-0.10
B0
3.50
min
+/-0.05
20 deg maximum
A0
Sketch B (Top View)
Component Rotation
W1 Measured at Hub
4.0 +/-0.1
Typical component cavity center line
Typical component center line
Dim A
Max
4.0 +/-0.1
1.37
0.255 +/-0.150
5.2 +/-0.3
0.5mm maximum
+/-0.10
0.5mm maximum
Sketch C (Top View)
Component lateral movement
0.06 +/-0.02
Dim A
max
Dim N
Diameter Option
7"
See detail AA
B Min
Dim C
13" Diameter Option
See detail AA
W2 max Measured at Hub
W3
Dim D
min
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm 7" Dia
8mm 13" Dia
Reel
Option
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
7.00
0.059
177.8
13.00 330
1.5
0.059
1.5
512 +0.020/- 0.008 13 +0.5/-0.2
512 +0.020/- 0.008 13 +0.5/-0.2
0.795
2.165550.331 +0.059/-0.000
20.2
0.795
4.00
20.2
100
8.4 +1.5/0
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.311 – 0.429
7.9 – 10.9
July 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SuperSOT -6 (FS PKG Code 31, 33)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0158
1998 Fairchild Semiconductor Corporation
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™
2
E
CMOS
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench
QFET™ QS™
Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8
SyncFET™ TinyLogic™ UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. D
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