This P-Channel 2.5V specified MOSFET is produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize the
on-state resistance and yet maintain low gate charge for
superior switching performance.
These devices are well suited for battery power
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
SOT-23
SuperSOTTM-8
S
D
D
G
D
D
pin 1
SuperSOT -6
TM
-4.5 A, -20 V. R
R
= 0.045 Ω @ VGS = -4.5 V
DS(ON)
= 0.065 Ω @ VGS = -2.5 V.
DS(ON)
Low gate charge (13nC typical).
High performance trench technology for extremely low
R
.
DS(ON)
SuperSOTTM-6 package: small footprint (72% smaller than
standard SO-8); low profile (1mm thick).
SO-8
SOT-223SuperSOTTM-6
1
2
3
3
SOIC-16
6
5
4
Absolute Maximum RatingsT
= 25°C unless otherwise note
A
Symbol ParameterRatingsUnits
V
V
I
D
Drain-Source Voltage-20V
DSS
Gate-Source Voltage - Continuous±8V
GSS
Drain Current - Continuous (Note 1a)-4.5A
- Pulsed -20
P
TJ,T
Maximum Power Dissipation (Note 1a)1.6W
D
Operating and Storage Temperature Range-55 to 150°C
Turn - On Delay TimeVDD = -5 V, ID = -1 A,816ns
Turn - On Rise Time
VGS = -4.5 V, R
GEN
= 6 Ω
1527ns
Turn - Off Delay Time4565ns
Turn - Off Fall Time3050ns
Total Gate ChargeVDS = -10 V, ID = -4.5 A,1319nC
Gate-Source ChargeVGS = -5 V1.8nC
Gate-Drain Charge3nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
V
SD
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
design while R
a. 78oC/W when mounted on a 1 in
b. 156oC/W when mounted on a minimum pad.
Continuous Source Diode Current-1.3A
Drain-Source Diode Forward VoltageVGS = 0 V, IS = -1.3 A (Note 2)-0.75-1.2V
Notes:
is determined by the user's board design.
CA
θ
2
pad of 2oz Cu on FR-4 board.
is guaranteed by
JC
θ
USB10P Rev.D
Typical Electrical Characteristics
20
V = -4.5V
GS
16
12
8
4
D
- I , DRAIN-SOURCE CURRENT (A)
0
012345
-3.0V
- 2.5V
- 2.0V
-V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.6
I = -4.5A
D
V = -4.5V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50-250255075100125150
T , JUNCTION TEMPERATURE (°C)
J
1.6
V = -2.5V
GS
1.4
-3.0V
1.2
-3.5V
-4.0V
DS(ON)
1
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8
05101520
- I , DRAIN CURRENT (A)
D
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.15
0.12
0.09
0.06
0.03
DS(ON)
R , ON-RESISTANCE (OHM)
0
12345
- V , GATE TO SOURCE VOLTAGE (V)
GS
-4.5V
I = -2.0A
D
T = 125°C
A
25°C
Figure 3. On-Resistance Variation
with Temperature.
20
V = -5V
DS
16
12
8
D
4
- I , DRAIN CURRENT (A)
0
00.81.62.43.24
-V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5.Transfer Characteristics.
T = -55°C
J
25°C
125°C
Figure 4. On Resistance Variation with
Gate-to-Source Voltage.
20
V = 0V
GS
10
T = 125°C
1
0.1
0.01
S
- I , REVERSE DRAIN CURRENT (A)
0.001
00.20.40.60.811.21.4
J
25°C
-55°C
-V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDC638P Rev.D
Typical Electrical Characteristics
5
I = -4.5A
D
4
3
2
1
GS
-V , GATE-SOURCE VOLTAGE (V)
0
03691215
Q , GATE CHARGE (nC)
g
V = -5V
DS
-10V
-15V
Figure 7. Gate Charge Characteristics.
30
RDS(ON) LIMIT
5
1
0.3
V = -4.5V
D
- I , DRAIN CURRENT (A)
0.05
0.01
GS
SINGLE PULSE
R =156 °C/W
JA
θ
T = 25°C
A
A
0.10.20.51251030
- V , DRAIN-SOURCE VOLTAGE (V)
DS
1ms
10ms
100ms
1s
DC
100us
2500
C
C
C
iss
oss
rss
1000
400
200
CAPACITANCE (pF)
f = 1 MHz
100
V = 0 V
GS
50
0.10.3131020
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 8. Capacitance Characteristics.
5
4
3
2
POWER (W)
1
0
0.010.1110100300
SINGLE PULSE TIME (SEC)
SINGLE PULSE
JA
R=156°C/W
θ
T = 25°C
A
Figure 9. Maximum Safe Operating Area.
1
D = 0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.02
r(t), NORMALIZED EFFECTIVE
0.01
TRANSIENT THERMAL RESISTANCE
0.005
0.000010.00010.0010.010.1110100300
0.05
0.02
0.01
Single Pulse
t , TIME (sec)
1
Figure 11. Transient Thermal Response Curve.
Transient thermal response will change depending on the circuit board design.
Thermal characterization performed using the conditions described in Note 1b.
Figure 10. Single Pulse Maximum Power
Dissipation.
R (t) = r(t) * R
JA
θ
R = 156°C/W
JA
θ
P(pk)
t
1
t
2
T- T = P * R (t)
J
A
Duty Cycle, D = t / t
JA
θ
JA
θ
1 2
FDC638P Rev.D
g
y
y
g
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging
Configuration:
Fi
ure 1.0
SSOT-6 Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
Customize Label
Stan dard
(noflow c ode)
3,00010,000
7" Dia
184x187x47 343x343x64
9,00030,000
0.01580.0158
0.14400.4700
TNR
D87Z
TNR
13"
Antistatic Cover Tape
F63TNR
Label
Packaging Description:
SSOT-6 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 uni ts p er 7 " or 17 7cm di amet er re el. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13"
or 330cm diam eter reel. T his a nd some othe r opti ons ar e
described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a pizza box (illustrated in figure 1.0) made of
recyclable corrugated brown paper with a Fairchild logo
printi ng. One pizza box contain s three r eels maximu m.
And these pizza boxes are placed inside a barcode
labeled shipping box which comes in different sizes
Embo ssed
Carrier Tape
depending on the num ber of part s shipped.
631
SSOT-6 Unit Orientation
343mm x 342mm x 64mm
Intermediate box for D87Z Option
631
631631
631
Pin 1
F63TNR Label
184mm x 187mm x 47mm
Pizza Box for Standard Option
SSOT-6 Tape Leader and Trailer
Configuration:
Carrier Tape
Cover Tape
1998 Fairchild Semiconductor Corporation
ure 2.0
Fi
Tr ailer Tap e
300mm mi nimum or
75 empt
F63TNR
Label
F63TNR
Label
pockets
Component s
F63TNR Label sampl e
LOT: CBVK7 41B019
FSID: FDC633N
D/C1: D9842 QTY1: SPEC REV:
D/C2: QTY2: CPN:
QTY: 3000
SPEC:
N/F: F (F63TNR)3
Leader Tape
500mm mi nimum or
125 empt
pockets
August 1999, Rev. C
g
g
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape
Configuration:
T
K0
Wc
Fi
B0
ure 3.0
P0
D0
E1
F
W
E2
Tc
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
Pkg type
SSOT-6
(8mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
SSOT-6 Reel Configuration:
A0B0WD0D1E1E2FP1P0K0TWcTc
3.23
3.18
8.0
1.55
1.125
1.75
6.25
+/-0.10
+/-0.10
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
+/-0.3
+/-0.05
Fi
+/-0.125
ure 4.0
+/-0.10
B0
3.50
min
+/-0.05
20 deg maximum
A0
Sketch B (Top View)
Component Rotation
W1 Measured at Hub
4.0
+/-0.1
Typical
component
cavity
center line
Typical
component
center line
Dim A
Max
4.0
+/-0.1
1.37
0.255
+/-0.150
5.2
+/-0.3
0.5mm
maximum
+/-0.10
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
0.06
+/-0.02
Dim A
max
Dim N
Diameter Option
7"
See detail AA
B Min
Dim C
13" Diameter Option
See detail AA
W2 max Measured at Hub
W3
Dim D
min
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm7" Dia
8mm13" Dia
Reel
Option
Dim ADim BDim CDim DDim NDim W1Dim W2Dim W3 (LSL-USL)
7.00
0.059
177.8
13.00
330
1.5
0.059
1.5
512 +0.020/- 0.008
13 +0.5/-0.2
512 +0.020/- 0.008
13 +0.5/-0.2
0.795
2.165550.331 +0.059/-0.000
20.2
0.795
4.00
20.2
100
8.4 +1.5/0
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.311 – 0.429
7.9 – 10.9
July 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SuperSOT -6 (FS PKG Code 31, 33)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0158
1998 Fairchild Semiconductor Corporation
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
2
E
CMOS
TM
FACT™
FACT Quiet Series™
®
FAST
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet IdentificationProduct StatusDefinition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or
In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
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