Datasheet FDMC8327L Datasheet (Fairchild)

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FDMC8327L

N-Channel PowerTrench® MOSFET

40 V, 14 A, 9.7 mΩ

FDMC8327L N-Channel PowerTrench

May 2012

Features

 Max r
 Max r

 Low Profile - 0.8mm max in Power 33
 100% UIL test
 RoHS Compliant

= 9.7 mΩ at VGS = 10 V, ID = 12 A

DS(on)

= 12.5 mΩ at VGS = 4.5 V, ID = 10 A

DS(on)

General Description

This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced Power Trench
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.

®

process that has

Application

 DC-DC Conversion

®

MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

E

AS

P

D

, T

T

J

STG

Drain to Source Voltage 40 V
Gate to Source Voltage ±20 V
Drain Current - Continuous (Package limited) TC = 25 °C 14

- Continuous (Silicon limited) T

- Continuous T

- Pulsed 60
Single Pulse Avalanche Energy (Note 3) 25 mJ
Power Dissipation TC = 25 °C 30
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

A

= 25 °C 43

C

= 25 °C (Note 1a) 12

A

= 25 °C (Note 1a) 2.3

A

A

W

Thermal Characteristics

R

θJC

R

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDMC8327L FDMC8327L Power 33 13 ” 12 mm 3000 units

©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDMC8327L Rev.C1

Thermal Resistance, Junction to Case (Note 1) 4.2
Thermal Resistance, Junction to Ambient (Note 1a) 53

°C/W

FDMC8327L N-Channel PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 40 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 32 V, V
Gate to Source Leakage Current VGS = ±20 V, V

I

= 250 μA, referenced to 25 °C 22 mV/°C

D

= 0 V 1 μA

GS

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 1.7 3.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C -5 mV/°C

D

V

= 10 V, ID = 12 A 7.4 9.7

GS

= 4.5 V, ID = 10 A 9.4 12.5

GS

= 10 V, ID = 12 A, TJ = 125 °C 11 14.5

V

GS

Forward Transconductance VDD = 5 V, ID = 12 A 52 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 347 520 pF
Reverse Transfer Capacitance 21 35 pF
Gate Resistance 0.1 0.6 1.3 Ω

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q
Q

g(TOT)
g(TOT)
gs
gd

Turn-On Delay Time
Rise Time 2.2 10 ns
Turn-Off Delay Time 20 32 ns
Fall Time 2.2 10 ns
Total Gate Charge VGS = 0V to 10 V
Total Gate Charge VGS = 0V to 5 V 9.7 14 nC
Gate to Source Charge 3.3 nC
Gate to Drain “Miller” Charge 2.6 nC

= 20 V, VGS = 0 V,

V

DS

f = 1 MHZ

= 20 V, ID = 12 A,

V

DD

V

= 10 V, R

GS

GEN

= 6 Ω

VDD = 20 V,
I

= 12 A

D

1235 1850 pF

8.4 17 ns

18.5 26 nC

mΩV

®

MOSFET

Drain-Source Diode Characteristics

V

V

SD

t

rr

Q

rr

Notes:

is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

1. R

θJA

the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. Starting T

©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDMC8327L Rev.C1

Source to Drain Diode Forward
Voltage

Reverse Recovery Time
Reverse Recovery Charge 10 20 nC

a.

53 °C/W when mounted on a
1 in2 pad of 2 oz copper

SS

SF

DF

DS

G

= 25 °C; N-ch: L = 0.3 mH, IAS = 13 A, VDD = 36 V, VGS = 10 V.

J

= 0 V, IS = 1.8 A (Note 2) 0.7 1.2

GS

= 0 V, IS = 12 A (Note 2) 0.8 1.3

V

GS

= 12 A, di/dt = 100 A/s

I

F

is guaranteed by design while R

θJC

b.

125 °C/W when mounted on
a minimum pad of 2 oz copper

SF

SS

DS

DF

G

32 51 ns

is determined by

θCA

V

FDMC8327L N-Channel PowerTrench

0.0 0.3 0.6 0.9 1.2 1.5

0

10

20

30

40

50

60

VGS = 6 V

VGS = 3 V

VGS = 3.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

VGS = 4.5 V

VGS = 4 V

VGS = 10 V

I

D

, DRAIN CURRENT (A)

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

0 102030405060

0

1

2

3

4

V

GS

= 6 V

VGS = 3.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT (A)

V

GS

= 4 V

VGS = 4.5 V

VGS = 3 V

V

GS

= 10 V

-75 -50 -25 0 25 50 75 100 125 150

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

ID = 12 A
V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

T

J

, JUNCTION TEMPERATURE (

o

C)

246810

0

5

10

15

20

25

30

TJ = 125 oC

ID = 12 A

TJ = 25 oC

V

GS

, GATE TO SOURCE VOLTAGE (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

0

10

20

30

40

50

60

TJ = 150 oC

V

DS

= 5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.00.20.40.60.81.01.2

0.001

0.01

0.1

1

10

100

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On Region Characteristics Figure 2.

= 25 °C unless otherwise noted

J

Nor ma l iz ed O n-R esi sta nc e

vs Drain Current and Gate Voltage

®

MOSFET

Fi gu re 3. Norma li ze d O n R esistance

vs Junction Temperature

©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com
FDMC8327L Rev.C1

Figure 5. Transfer Characteristics

Figure 4.

On-Res istance vs Gate to

Source Voltage

Figure 6.

Sou rce to Drain Diode

Forward Voltage vs Source Current

FDMC8327L N-Channel PowerTrench

0 4 8 121620

0

2

4

6

8

10

ID = 12 A

VDD = 24 V

V

DD

= 16 V

V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 20 V

0.1 1 10 40

1

10

100

1000

10000

f = 1 MHz
V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.01 0.1 1 10 30

1

10

20

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

I

AS

, AVALANCHE CURRENT (A)

25 50 75 100 125 150

0

10

20

30

40

50

Limited by package

V

GS

= 4.5 V

R

θJC

= 4.2 oC/W

V

GS

= 10 V

I

D

, DRAIN CURRENT (A)

T

C

, CASE TEMPERATURE (

o

C)

0.01 0.1 1 10 100200

0.01

0.1

1

10

100

10 s

1 s

DC

100 ms

10 ms

1 ms

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS ARE A IS

LIMITED BY r

DS(on)

SINGLE PULSE
T

J

= MAX RATED

R

θJA

= 125

o

C/W

T

A

= 25

o

C

10

-3

10-210

-1

110

100 1000

0.5

1

10

100

300

SINGLE PULSE
R

θJA

= 125

o

C/W

T

A

= 25

o

C

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Typical Characteristics T

Figure 7.

Gate Charge Characteristics Figure 8.

= 25 °C unless otherwise noted

J

Cap aci t an c e vs Dra i n

to Source Voltage

®

MOSFET

Figure 9.

Unc l amp e d In d uct i v e

Switching Capability

©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com
FDMC8327L Rev.C1

Figure 11. Forward Bias Safe

Op

erating Area

Figure 10.

Ma ximum Continu ous Drai n

Current vs Case Temperature

Figure 12.

Single Pu lse Ma xim um

Power Dissipation

FDMC8327L N-Channel PowerTrench

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

SINGLE PULSE
R

θJA

= 125 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

2

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t1/t

2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics T

Figure 13. Junction-to-Ambient Transient Thermal Response Curve

= 25 °C unless otherwise noted

J

®

MOSFET

©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com
FDMC8327L Rev.C1

Dimensional Outline and Pad Layout

FDMC8327L N-Channel PowerTrench

®

MOSFET

©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com
FDMC8327L Rev.C1

®

™

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FDMC8327L N-Channel PowerTrench

®

MOSFET

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support
Counterfeiting of semiconductor parts is a growing problem in the industry. All manu factures of semiconductor products are experie ncing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience man y pro blems such as lo ss of bran d reput ation, sub standard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the

proliferation of counterfeit parts. Fairchild st rongly enco urages customers t o purchase Fairchild parts either dir ectly from Fairchild or fr om Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
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PRODUCT STATUS DEFINITIONS
Definition of Terms

.

2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is disco ntinued by Fairchild
Semiconductor. The datasheet is for reference information only.

Rev. I61

©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com
FDMC8327L Rev.C1