Fairchild FAN7393A service manual

FAN7393A

14-SOP

Half-Bridge Gate Drive IC

FAN7393A — Half-Bridge Gate Drive IC

July 2012

Features

 Floating Channel for Bootstrap Operation to +600V  Typically 2.5A/2.5A Sourcing/Sinking Current Driving

Capability

 Extended Allowable Negative V

Signal Propagation at VBS=15V

 High-Side Output in Phase of IN Input Signal  3.3V and 5V Input Logic Compatible  Matched Propagation Delay for Both Channels  Built-in Shutdown Function  Built-in UVLO Functions for Both Channels  Built-in Common-Mode dv/dt Noise Cancelling Circuit  Internal 400ns Minimum Dead Time at R  Programmable Turn-On Delay Control 

(Dead-Time)

Swing to -9.8V for

S

=0

DT

Applications

 High-Speed Power MOSFET and IGBT Gate Driver  Induction Heating  High-Power DC-DC Converter  Synchronous Step-Down Converter  Motor Drive Inverter

Description

The FAN7393A is a half-bridge gate-drive IC with shutdown and programmable dead-time control functions that can drive high-speed MOSFETs and Isolated Gate Bridge Transistors (IGBTs) operating up to +600V. It has a buffered output stage with all NMOS transistors designed for high-pulse-current driving capability and minimum cross-conduction.

Fairchild’s high-voltage process and common-mode noise canceling techniques provide stable operation of the high-side driver under high dv/dt noise circum stances. An advanced level-shift circuit offers high-side gate driver operation up to V V

=15V.

BS

The UVLO circuit prevents malfunction when V

are lower than the specified threshold voltage.

V

BS

The high-current and low-output voltage drop feature makes this device suitable for diverse half- and fullbridge inverters; motor drive inverters, switching mode power supplies, induction heating, and high-power DCDC converter applications.

=-9.8V (typical) for

S

DD

-

and

Ordering Information

Part Number Package Operating Temperature Packing Method

FAN7393AMX 14-SOIC -40°C to +125°C Tape & Reel

Typical Application Diagrams

+15V

Up to 600V

PWM

Shutdown

PWM IC

Control

R

DT

D

BOOT

C

BOOT

R1

R

BOOT

LO

COM

V

B

V

S

V

DD

SD

IN

DT

NC

13

NC

HO

V

SS

NC1214

11 10

9

8

2

3

1

4

7

5

6

Load

R2

FAN7393A

UVLO

DRIVER

PULSE

GENERATOR

7

5

13

11

IN

V

DD

COM

V

B

V

S

R

R S

Q

DRIVER

HS(ON/OFF)

LS(ON/OFF)

DT

HO

LO

NOISE

CANCELLER

6

12

V

SS

SD

5V

2

1

4

3

Pin 8, 9, 10 and 14 are no connection

R

DTINT

250K

DELAY

UVLO

SCHMITT

TRIGGER INPUT

SHOOT-THROUGH

PREVENTION

DEAD-TIME

{ DTMIN=400ns }

VSS/COM

LEVEL

SHIFT

250K

FAN7393A — Half-Bridge Gate Drive IC

Internal Block Diagram

Figure 1. Typical Application Circuit

Figure 2. Functional Block Diagram

Pin Configuration

LO

NC

FAN7393A

IN

HO

DT

NC

V

DD

COM

V

B

V

S

V

SS

1

2

3

4

5

6

7

14

13

12

11

10

9

8

SD

NC

FAN7393A — Half-Bridge Gate Drive IC

Figure 3. Pin Configurations (Top View)

Pin Definitions

Pin # Name Description

1 IN Logic Input for High-Side and Low-Side Gate Driver Output, In-Phase with HO 2 SD Logic Input for Shutdown 3 V

SS

4 DT Dead-Time Control with External Resistor (Referenced to VSS) 5 COM Ground 6 LO Low-Side Driver Return 7 V

DD

8 NC No Connection

9 NC No Connection 10 NC No Connection 11 V

S

12 HO High-Side Driver Output 13 V

B

14 NC No Connection

Logic Ground

Supply Voltage

High-Voltage Floating Supply Return

High-Side Floating Supply

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating cond itions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.

Symbol Characteristics Min. Max. Unit

V

B

V

S

V

HO

V

LO

V

DD

V

IN

V

SD

DT Programmable Dead-Time Pin Voltage -0.3 VDD+0.3 V

V

SS

dVS/dt Allowable Offset Voltage Slew Rate ± 50 V/ns

P

D



JA

T

J

T

STG

Notes:

1. This IC contains a shunt regulator on VBS. This supply pin should not be driven by a low-impeda nce voltage source greater than V

2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).

3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection, and JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages.

4. Do not exceed maximum PD under any circumstances.

High-Side Floating Supply Voltage -0.3 625.0 V High-Side Floating Offset Voltage

(1)

VB-V

SHUNT

VB+0.3 V High-Side Floating Output Voltage VS-0.3 VB+0.3 V Low-Side Output Voltage -0.3 VDD+0.3 V Low-Side and Logic Fixed Supply Voltage -0.3 25.0 V Logic Input Voltage (IN) -0.3 VDD+0.3 V Logic Input Voltage (SD) V

SS

5.5 V

Logic Ground VDD-25 VDD+0.3 V

Power Dissipation

(2, 3, 4)

1 W Thermal Resistance 110 C/W Junction Temperature +150 C Storage Temperature -55 +150 C

specified in the Electrical Characteristics section.

SHUNT

FAN7393A — Half-Bridge Gate Drive IC

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal perfor mance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Min. Max. Unit

V

B

V

S

V

HO

V

DD

V

LO

V

IN

V

SD

DT Programmable Dead-Time Pin Voltage V

V

SS

T

A

High-Side Floating Supply Voltage VS+10 VS+20 V High-Side Floating Supply Offset Voltage 6-V High-Side Output Voltage V

DD

S

600 V

V

B

V Low-Side and Logic Fixed Supply Voltage 10 20 V Low-Side Output Voltage COM V Logic Input Voltage (IN) V Logic Input Voltage (SD) V

SS SS SS

DD

V

DD

5 V

V

DD

V

V Logic Ground -5 +5 V Operating Ambient Temperature -40 +125 C

Electrical Characteristics

V

BIAS(VDD

parameters are referenced to VSS/COM and are applicable to the respective input leads: IN a nd SD. The VO and I parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol Characteristics Test Condition Min. Typ. Max. Unit

POWER SUPPLY SECTION

BOOTSTRAPPED SUPPLY SECTION

V V

V

DDUVH-

V

SHUNT REGULATOR SECTION

V

INPUT LOGIC SECTION

V

SDCLAMP

R

GATE DRIVER OUTPUT SECTION

VSS/COM VSS-COM/COM-VSS Voltage Endurability

Note:

5 These parameters are guaranteed by design.

, VBS)=15.0V, VSS=COM=0V, DT=VSS, and TA=25°C unless otherwise specified. The VIN and I

I

QDD

I

QBS

I

PDD

I

PBS

I

SD

I

LK

DDUV+ BSUV+

DDUVBSUV-

BSUVH

SHUNT

V

IH

V

IL

I

IN+

I

IN-

R

IN

Quiescent VDD Supply Current Quiescent VBS Supply Current Operating VDD Supply Current Operating VBS Supply Current Shutdown Mode Supply Current SD=V Offset Supply Leakage Current

VDD and VBS Supply Under-Voltage  Positive-Going Threshold Voltage

VDD and VBS Supply Under-Voltage  Negative-Going Threshold Voltage

VDD and VBS Supply Under-Voltage Lockout Hysteresis Voltage

Shunt Regulator Clamping Voltage for V

BS

Logic “1” Input Voltage for HO & Logic “0” for LO 2.5 V Logic “0” Input Voltage for HO & Logic “1” for LO 0.8 V Logic Input High Bias Current

Logic Input Low Bias Current Logic Input Pull-Down Resistance 100 250 K Shutdown (SD) Input Clamping Voltage

(5)

VIN=0V or 5V VIN=0V or 5V fIN=20KHz, No Load CL=1nF, fIN=20KHz, RMS

SS

VB=VS=600V

VIN=0V, VDD=VBS=Sweep

VBS=Sweep, I

SHUNT

=5mA

VIN=5V, SD=0V VIN=0V, SD=5V

600 1000 A

55 100 A

1.0 1.6 mA 450 800 A 650 1000 A

10 A

7.8 8.8 9.8 V

7.3 8.3 9.3 V

0.5 V

21 23 25 V

20 50 A

3 A

5.0 5.5 V

SD+ Shutdown (SD) Input Positive-Going Threshold 2.5 V

SD- Shutdown (SD) Input Negative-Going Threshold 0.8 V

Shutdown (SD) Input Pull-Up Resistance 100 250 K

High-Level Output Voltage (V

OH

Low-Level Output Voltage

OL

BIAS

Output High, Short-Circuit Pulsed Current

Output Low, Short-Circuit Pulsed Current

O-

Allowable Negative VS Pin Voltage for IN Signal

S

Propagation to HO

- VO)

(5)

No Load (IO=0A) No Load (IO=0A) VHO=0V, VIN=5V, 

PW 10µs VHO=15V, VIN=0V,

PW 10µs

2.0 2.5 A

-5.0 5.0 V

-9.8 -7.0 V

1.5 V

100 mV

V V

I

V

PSD

O+

FAN7393A — Half-Bridge Gate Drive IC

IN

O