The FAN73892 is a monolithic three-phase half-bridge
gate-drive IC designed for high-voltage, high-speed,
driving MOSFETs and IGBTs operating up to +600V.
Fairchild’s high-voltage process and common-mode
noise-canceling technique provide stable operation of
high-side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to V
The protection functions include under-voltage lockout
and inverter over-current trip with an automatic faultclear function. Over-current protection that terminates all
six outputs can be derived from an external currentsense resistor. An open-drain fault signal is provided to
indicate that an over-current or under-voltage shutdown
has occurred. The UVLO circuits prevent malfunction
when VDD and VBS are lower than the threshold voltage.
Output drivers typically source and sink 350mA and
650mA, respectively; which is suitable for three-phase
half-bridge applications in motor drive systems.
= -9.8V (typical) for VBS =15V.
S
28-SOIC
Ordering Information
Part Number Package Operating Temperature Packing Method
FAN73892MX
Note:
1. These devices passed wave-soldering test by JESD22A-111.
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. T
Symbol Parameter Min. Max. Unit
VS High-Side Floating Offset Voltage V
VB High-Side Floating Supply Voltage -0.3 625.0 V
VDD Low-Side and Logic-Fixed supply voltage -0.3 25.0 V
VHO High-Side Floating Output Voltage V
VLO Low-Side Floating Output Voltage V
VIN Input Voltage ( , , CS, and EN) -0.3 5.5 V
VFO Fault Output Voltage ( ) -0.3 VDD+0.3 V
PW
High-Side Input Pulse Width 500 ns
HIN
dVS/dt Allowable Offset Voltage Slew Rate ±50 V/ns
PD Power Dissipation
θJA Thermal Resistance 70 °C/W
TJ Junction Temperature 150 °C
T
Storage Temperature -55 150 °C
STG
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). Refe r to the following standards:
JESD51-2: Integral circuit’s thermal test method environmental conditions, natural convection;
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
3. Do not exceed maximum power dissipation (P
HINx
LINx
FO
(2,2)
1.4 W
=25°C, unless otherwise specified.
A
V
HO1,2,3
-0.3 VDD+0.3 V
LO1,2,3
) under any circumstances.
D
B1,2,3
S1,2,3
-25 V
-0.3 V
+0.3 V
B1,2,3
+0.3 V
B1,2,3
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Max. Unit
V
High-Side Floating Supply Voltage V
B1,2,3
V
High-Side Floating Supply Offset Voltage 6-VDD 600 V
S1,2,3
VDD Low-Side and Logic Fixed Supply Voltage 10 20 V