Fairchild FAN7318M, FAN7318M Schematics

FAN7318

LCD Backlight Inverter Drive IC

FAN7318 — LCD Backlight Inverter Drive IC

June 2011

Features

High-Efficiency Single-Stage Power Conversion




Wide Input Voltage Range: 6V to 30V



Backlight Lamp Ballast and Soft Dimming



Minimal External Components Required



Precision Voltage Reference Trimmed to 2%



Half-Bridge Topology



Soft-Start



PWM Control at Fixed Frequency



Analog Dimming Function



Burst Dimming Function



Programmable Striking Frequency



Open-Lamp Protection



Open-Lamp Regulation



Short-Lamp Protection



CMP-High Protection



FB-High Protection



Thermal Shutdown



20-Pin SOIC

Applications

LCD TV




LCD Monitor

Description

The FAN7318 is a LCD backlight inverter drive IC that
controls P-N half-bridge topology.

The FAN7318 provides a low-cost solution and reduces
external components by integrating proprietary wave
rectifiers for open-lamp protection and regulation. The
operating voltage range of the FAN7318 is wide, so an
external regulator isn’t necessary to supply the voltage to
the IC.

The FAN7318 provides various protections, such as
open-lamp regulation, open-lamp protection, short-Lamp
protection, CMP-high protection, and FB-high protection,
to increase the system reliability. The FAN7318 provides
burst dimming and analog dimming.

The FAN7318 is available in a 20-SOIC package.

Ordering Information

Part Number

FAN7318M

FAN7318MX Tape & Reel

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2

Operating

Temperature

-25 to +85°C 20-Lead, Small Outline Integrated Circuit (SOIC)

Package Packing Method

Rail

Block Diagram

FAN7318 — LCD Backlight Inverter Drive IC

OLR1

OLR2

OLR3

OLR4

CT

CMP

ADIM

OLP1

OLP2

OLP3

OLP4

Min. &

Max.

Detector

/Fu ll Wave

Recifier

Open Lamp Regulation

max. 2V

min. 0.5V

Soft start by first

BCT waveform

Negative

Analog

Dimm ing

OLP max .

Min. & Max.

Detector

/Full or Half

Rectifier

Min.

0.3V

Max.

1.34V

2V

1.34V

2.2V

Gm = 350, Max. current 70µA

On @ stri king

Source current

1.3uA @ CMP>2.5V

Error. Amp. source
current change

V

Error Amp.

ref

+

-

52µA burst
sink current on

3.5V

Disable @ striking
High_FB 8 pulses
count @ normal
Reset by BCT edge
detect

Wave

OLP min .

0.7V/0.5V

Striking/normal

Short Lamp Protection

-

+

Over- Voltage Protection

Protection

+

-

High_FB

+

-

+

-

-

0µA

3.2µA

Error. Amp. source
current change

Gm Amp.

+

Oscillator

-

+

0µA sink current @ striking

High CMP Protection

disable @ striking

+

3.5V

High FB Protection

disable @ striking

+

-

-

High_FB delay

-

+

High_CMP

Striking off

4 Output

Pulses

Counter

OLP

150µs
Delay

High_FB

52µA burst
sink current on

If ENA>2.5V, OLP & SLP disable.
If ENA<2.1V, OLP & SLP enable.

Figure 1. Internal Block Diagram

Hys. 0.45V

50µA

On @ OVP, SLP

TSD 150oC

-

+

UVLO 5.5V

Voltage Reference

& Internal Bias

Soft start by first

BCT waveform

On @
High_CMP, OLP

+

-

3V/1V

@ striking /normal

Output Driver

Control

Logic

-

+

5V, max. 3mA

max. 2V

min. 0.5V

-

disable @ striking

+

2µA

TIMER

OUTA

OUTB

GND

VIN

1.35V

ENA

200k

REF

BCT

BDIM

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 2

Pin Configuration

FAN7318 — LCD Backlight Inverter Drive IC

OLP1

20 19 18 17 16 15 14 13

OLR1

OLP2

OLR2

OLP3

OLR3

OLP4

OLR4

VIN

OUTA

12 11

1 2 3 4 5 6 7 8

TIMER

CMP

ADIM

CT

Figure 2. Package Diagram

REF

BCT

BDIM

ENA

9 10

GND

OUTB

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 3

Pin Definitions

Pin # Name Description

1 TIMER This pin is for protection delay time setting.

2 CMP

3 ADIM This pin is the input for negative analog dimming.

4 CT

5 REF

6 BCT

7 BDIM

8 ENA This pin is for turning on/off the IC.

9 GND This pin is the ground.

10 OUTB This pin is NMOS gate-drive output.

11 OUTA This pin is PMOS gate-drive output.

12 VIN This pin is the supply voltage of the IC.

13 OLR4 This pin is for open-lamp regulation. Its functions are the same as the OLR1 pin.

14 OLP4

15 OLR3 This pin is for open-lamp regulation. Its functions are the same as the OLR1 pin.

16 OLP3

17 OLR2 This pin is for open-lamp regulation. Its functions are the same as the OLR1 pin.

18 OLP2

19 OLR1

20 OLP1

Error amplifier output. Typically, a compensation capacitor is connected to this pin from the
ground.

This pin is for programming the switching frequency. Typically, a capacitor is connected to
this pin from ground and a resistor is connected to this pin from the REF pin.

This pin is 5V reference output. Typically, resistors are connected to this pin from the CT pin
and the BCT pin.

This pin is for programming the frequency of the burst dimming. Typically, a capacitor is
connected to this pin from ground and a resistor is connected to this pin from the REF pin.

This pin is the input for negative burst dimming. The voltage range of 0.5 to 2V at this pin
controls burst mode duty cycle from 0% to 100%.

This pin is for open-lamp protection and feedback control of lamp currents. Its functions are
the same as the OLP1 pin.

This pin is for open-lamp protection and feedback control of lamp currents. Its functions are
the same as the OLP1 pin.

This pin is for open-lamp protection and feedback control of lamp currents. Its functions are
the same as the OLP1 pin.

This pin is for open-lamp regulation and short-lamp protection. It has the same functions as
other OLR pins and is connected to the full-wave rectifier internally. When the maximum of
rectified OLR inputs is between 1.34V and 2V, the error amplifier output current is limited to

3.2µA; and when the maximum of rectified OLR inputs reaches 2V, the error amplifier output
current is 0A and its output voltage maintains constant. The maximum of rectified OLR
inputs is inputted to the negative of another error amplifier for feedback control of lamp
voltage. When the maximum of rectified OLR inputs is more than 2.2V, another error
amplifier for OLR is operating and lamp voltage is regulated. In normal mode, if the
maximum of rectified OLR inputs is higher than 1.35V or if the minimum of rectified OLR
inputs is lower than 0.3V for a predetermined time by the TIMER pin capacitor and a internal
current source 50µA, the IC shuts down to protect the system in over-voltage condition,
short-lamp condition, respectively.

This pin is for open-lamp protection and feedback control of lamp currents. It has the same
functions as other OLP pins and is connected to the half-wave rectifier and the full-wave
rectifier internally. In striking mode, if the minimum of rectified OLP inputs is less than 0.7V
for a predetermined time by the TIMER pin capacitor and an internal current source or, in
normal mode, if the minimum of rectified OLP inputs is less than 0.5V for another
predetermined time by the TIMER pin capacitor and another internal current source; the IC
shuts down to protect the system in open-lamp condition. The maximum of rectified OLP
inputs is inputted to the negative of the error amplifier for feedback control of lamp current.

FAN7318 — LCD Backlight Inverter Drive IC

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 4

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.

Symbol Parameter Min. Max. Unit

VIN IC Supply Voltage 6 30 V

TA Operating Temperature Range -25 +85

TJ Operating Junction Temperature +150

T

Storage Temperature Range -65 +150

STG

θJA Thermal Resistance Junction-Air

PD Power Dissipation 1.4 W

Notes:

1. Thermal resistance test board; size: 76.2mm x 114.3mm x 1.6mm (1S0P); JEDEC standard: JESD51-2, JESD51-3.

2. Assume no ambient airflow.

(1,2)

90

°C
°C
°C

°C/W

FAN7318 — LCD Backlight Inverter Drive IC

Pin Breakdown Voltage

Pin # Name Value Unit

1 TIMER 7

2 CMP 7

3 ADIM 7

4 CT 7

5 REF 7

6 BCT 7

7 BDIM 7

8 ENA 7

9 GND

10 OUTB 10

11 OUTA 30

12 VIN 30

13 OLR4 ±7

14 OLP4 ±7

15 OLR3 ±7

16 OLP3 ±7

17 OLR2 ±7

18 OLP2 ±7

19 OLR1 ±7

20 OLP1 ±7

V

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 5

Electrical Characteristics

For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Under-Voltage Lockout Section (UVLO)

Vth Start Threshold Voltage Increase VIN 4.9 5.2 5.5 V

V

Start Threshold Voltage Hysteresis Decrease VIN 0.20 0.45 0.60 V

thhys

Ist Startup Current VIN=4.5V 10 70 100 µA

Iop Operating Supply Current VIN=15V, Not Switching 0.5 2.0 3.5 mA

ON/OFF Section

Von On-State Input Voltage 1.4 5.0 V

V

Off-State Input Voltage 0.7 V

off

Isb Standby Current ENA=0V 50 120 190 µA

R

Pull-Down Resistor ENA=2V 120 200 280 kΩ

ENA

Reference Section (Recommend 1µF X7R Capacitor)

V5 5V Regulation Voltage 4.9 5.0 5.1 V

FAN7318 — LCD Backlight Inverter Drive IC

V

5V Line Regulation

5line

V

5V Load Regulation

5load

Oscillator Section (Main)

f

Oscillation Frequency

osc

f

Oscillator Frequency in Striking Mode

str

I

ctdcs

I

ctdc

I

ctcs

V

V

cth

ctl

CT Discharge Current

Normal 770 870 970 µA

CT Charge Current Striking -15 -12 -9 µA

CT High Voltage 2 V

CT Low Voltage 0.45 V

Oscillator Section (Burst)

f

Burst Oscillation Frequency

oscb

I

BCT Discharge current 20 26 32 µA

bctdc

V

BCT High Voltage 2 V

bcth

V

BCT Low Voltage 0.5 V

bctl

6 ≤ VIN ≤ 30V

10µA ≤ I

T

A

≤ 3mA

5

=25°C, CT=220pF,

RT=100kΩ

4 50 mV

4 50 mV

101.3 105.0 108.3
kHz

CT=220pF, RT=100kΩ 101 105 109

=25°C, CT=220pF,

T

A

RT=100kΩ

127.5 132.0 136.5
kHz

CT=20pF, RT=100kΩ 127 132 137

Striking 1.03 1.18 1.33 mA

=25°C, BCT=4.7nF,

T

A

BRT=1.4MΩ

BCT=4.7nF,
BRT=1.4MΩ

324 333 345

Hz

320 333 346

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 6

FAN7318 — LCD Backlight Inverter Drive IC

Electrical Characteristics

(Continued)

For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Analog Dimming Section

ADIM=0V, T

ADIM=0V 1.212 1.310 1.408

AV

Reference Voltage

rexx

ADIM=0.5V 1.16

ADIM=1.0V 0.99

Error Amplifier Section

l

Output Sink Current OLP=2.5V, ADIM=2.5V 63 76 94 µA

sin

l

Output Source Current 1 OLP=0V, ADIM=0V -65 -50 -35 µA

sur1

l

Output Source Current 2 CMP=3V -1.7 -1.3 -0.9 µA

sur2

I

Burst CMP Sink Current BDIM=5V, BCT=0V 41 52 63 µA

bsin

I

OLP Input Current

olpi

I

OLP Output Current OLP=-2V -30 -20 -10 µA

olpo

OLP=2V 0 µA

OLP=0.3V 0.31 V

V

Rectifiers Output of OLP

lpfx

V

OLP Input Voltage Range

olpr

(3)

-4 4 V

OLP=1.5V 1.5 V

Open-Lamp Regulation Section

I

G

olr1

I

olr2

V

olr1

V

olr2

V

olr3

mOLR

I

ors

I

olri

I

olro

V

olrr

Error Amplifier Source Current for
Open-Lamp Regulation

OLR Sweep 0 µA

Open-Lamp Regulation Voltage 1 OLR Sweep 1.24 1.34 1.44 V

Open-Lamp Regulation Voltage 2 Striking, OLR Sweep 1.88 1.98 2.08 V

Open-Lamp Regulation Voltage 3 2.1 2.2 2.3 V

OLR Error Amplifier
Trans-conductance

OLR Error Amplifier Sink Current Normal, OLR=2.5V 50 70 90 µA

OLR Input Current OLR=2.5V 0 µA

OLR Output Current OLR=-2.5V -35 -25 -15 µA

OLR Input Voltage Range

(3)

-4 4 V

Striking, OLR=1.6V -4.0 -3.4 -2.9 µA

180 310 440 µmho

Note:

3. These parameters, although guaranteed, are not 100% tested in production.

=25°C 1.225 1.310 1.402

A

V

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 7

FAN7318 — LCD Backlight Inverter Drive IC

Electrical Characteristics

(Continued)

For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Protection Section

V

Open-Lamp Protection Voltage 0

olp0

V

Open-Lamp Protection Voltage 1 Sweep OLP 0.42 0.49 0.56 V

olp1

V

CMP-High Protection Voltage Sweep CMP 3.4 3.5 3.6 V

cmpr

V

High-FB Protection Voltage

hfbp

V

Short-Lamp Protection Voltage Sweep TIMER 0.22 0.30 0.38 V

slp

V

Timer Threshold Voltage 1 Striking, Sweep TIMER 2.87 3.02 3.17 V

tmr1

V

Timer Threshold Voltage 2 Sweep TIMER 1.0 1.1 1.2 V

tmr2

I

Timer Current 1 OLP=0V 1.7 2.1 2.5 µA

tmr1

I

Timer Current 2 OLR=1.8V 40 50 60 µA

tmr2

TSD Thermal Shutdown

V

Over-Voltage Protection Voltage Sweep OLR 1.24 1.34 1.44 V

ovp

dcr

ENA2.3V OLP Disable/Enable Change
Voltage

(4)

150 °C

Output Section

V

PMOS Gate High Voltage

pdhv

V

PMOS Gate Low Voltage VIN=15V VIN-9.5 VIN-8.5 VIN-7.0 V

phlv

V

NMOS Gate High Voltage VIN=15V 8.0 9.0 10.5 V

ndhv

V

NMOS Gate Low Voltage

ndlv

V

V

I

pdsur

I

pdsin

I

ndsur

I

ndsin

puv

nuv

PMOS Gate Voltage with UVLO
Activated
NMOS Gate Voltage with UVLO
Activated

PMOS Gate Drive Source Current

PMOS Gate Drive Sink Current

NMOS Gate Drive Source Current

NMOS Gate Drive Sink Current

(4)

Maximum / Minimum Duty Cycle

DC

Minimum Duty Cycle

MIN

DC

Maximum Duty Cycle

MAX

(4)

f

(4)

f

Note:

4. These Parameters, although guaranteed, are not 100% tested in production.

(4)

Striking 0.65 0.70 0.75 V

(4)

3.4 3.5 3.6 V

2.1 2.3 2.5 V

(4)

VIN=15V VIN V

VIN=15V 0 V

=4.5V VIN-0.3 V

V

IN

V

=4.5V 0.3 V

IN

(4)

VIN=15V -300 mA

(4)

VIN=15V 400 mA

(4)

VIN=15V 300 mA

(4)

VIN=15V -400 mA

=100kHz 0 %

osc

=100kHz 45 49 %

osc

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 8

Typical Performance Characteristics

Figure 3. Start Threshold Voltage vs. Temperature

Figure 4. Start Threshold Voltage Hysteresis

vs. Temperature

FAN7318 — LCD Backlight Inverter Drive IC

Figure 5. Startup Current vs. Temperature Figure 6. Operating Current vs. Temperature

Figure 7. Standby Current vs. Temperature Figure 8. 5V Regulation Voltage vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 9

FAN7318 — LCD Backlight Inverter Drive IC

Typical Performance Characteristics

Figure 9. Oscillation Frequency vs. Temperature Figure 10. Oscillation Frequency in Striking

(Continued)

vs. Temperature

Figure 11. CT High Voltage vs. Temperature Figure 12. CT Low Voltage vs. Temperature

Figure 13. Burst Dimming Frequency vs. Temperature Figure 14. BCT Discharge Current vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 10

FAN7318 — LCD Backlight Inverter Drive IC

Typical Performance Characteristics

Figure 15. BCT High Voltage vs. Temperature

(Continued)

Figure 16. BCT Low Voltage vs. Temperature

Figure 17. Analog Dimming Reference Voltage 00

vs. Temperature

Figure 19. Error Amplifier Source Current 1

vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 11

Figure 18. Analog Dimming Reference Voltage 05

vs. Temperature

Figure 20. Error Amplifier Source Current 2

vs. Temperature

FAN7318 — LCD Backlight Inverter Drive IC

Typical Performance Characteristics

Figure 21. Error Amplifier Source Current for OLR

vs. Temperature

(Continued)

Figure 22. Error Amplifier Sink Current

vs. Temperature

Figure 23. Burst CMP Sink Current vs. Temperature Figure 24. OLR Error Amplifier Sink Current

vs. Temperature

Figure 25. Open-Lamp Protection Voltage 1

vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 12

Figure 26. High-FB Protection Voltage

vs. Temperature

FAN7318 — LCD Backlight Inverter Drive IC

Typical Performance Characteristics

Figure 27. High-CMP Protection Voltage

vs. Temperature

(Continued)

Figure 28. Short-Lamp Protection Voltage

vs. Temperature

Figure 29. Open Lamp Regulation Voltage 1

vs. Temperature

Figure 31. Open Lamp Regulation Voltage 3

vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 13

Figure 30. Open Lamp Regulation Voltage 2

vs. Temperature

Figure 32. TIMER Threshold Voltage 1

vs. Temperature

FAN7318 — LCD Backlight Inverter Drive IC

Typical Performance Characteristics

Figure 33. TIMER Threshold Voltage 2

vs. Temperature

(Continued)

Figure 34. TIMER Current 1 vs. Temperature

Figure 35. TIMER Current 2 vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 14

f Hz

f Hz

Q

.

Functional Description

UVLO: The under-voltage lockout (UVLO) circuit

guarantees the stable operation of the IC’s control circuit
by stopping and starting it as a function of the V
The UVLO circuit turns on the control circuit when V
exceeds 5.2V. When V

is lower than 4.75V, the IC

IN

startup current is less than 100µA.

ENA: Applying voltage higher than 1.3V to the ENA pin
enables the IC. Applying voltage lower than 0.7V to the
ENA pin disables the IC. In terms of the protections,
applying voltage higher than 2.5V to the ENA pin
disables OLP and SLP. Applying voltage lower than

2.1V to the ENA pin enables the OLP and the SLP.

Main Oscillator: In normal mode, the external timing
capacitor (CT) is charged by the current flowing from the
reference voltage source, which is formed by the timing
resistor (RT) and the timing capacitor (CT). The
sawtooth waveform charges up to 2V. Once CT voltage
reaches 2V, the CT begins discharging down to 0.45V.
Next, the CT starts charging again and a new switching
cycle begins, as shown in Figure 36. The main
frequency is programmed by adjusting the RT and CT
value. The main frequency is calculated as:

value.

IN

IN

=

str

RT CT ln

⋅ ⋅

I 12 10 A, I 1.128 10 A

= × = ×

1 2

-6 -3

1

 

13.65 3I 4.55I RT

+ −

( )

 

I I RT

− ⋅ ⋅

 

1 2

 

13.65 4.55I 3I RT

 
 

I I RT

− ⋅ ⋅

1 2

 

1 2

2

+ −

( )

1 2

2

[ ]

Burst Dimming Oscillator: The burst dimming timing
capacitor (BCT) is charged by the current flowing from
the reference voltage source, which is formed by the
burst dimming timing resistor (BRT) and the burst
dimming timing capacitor (BCT). The sawtooth
waveform charges up to 2V. Once the BCT voltage
reaches 2V, the capacitor begins discharging down to

0.5V. Next, the BCT starts charging again and a new
burst dimming cycle begins, as shown in Figure 37. The
burst dimming frequency is programmed by adjusting
the BCT and BRT values. The burst dimming frequency
is calculated as:

f

OSCB

=

1

−⋅



⋅⋅

lnBCTBRT




4500BRT0.039

−⋅

4500BRT0.026

To avoid visible flicker, the burst dimming frequency
should be greater than 120Hz.






[ ]

Hz

FAN7318 — LCD Backlight Inverter Drive IC

(2)

(3)

OSC

=

RT CT ln

⋅ ⋅

1

3.9585 RT 13650

 
 

 

⋅ −

2.61 RT 13650

⋅ −

[ ]

(1)

Figure 36. Main Oscillator Circuit

In striking mode, the external timing capacitor (CT) is
charged by the current flowing from the reference
voltage source and 12µA current source, which
increases the frequency. If the product of RT and CT
value is constant, the striking frequency is depending on
CT and is calculated as:

Figure 37. Burst Dimming Oscillator Circuit

Analog Dimming: For analog dimming, the lamp

intensity is controlled with the external dimming signal
(V

) and resistors. Figure 38 shows how to implement

ADIM

an analog dimming circuit.

CMP

Error Amp

V

V

ADIM

ADIM

Negative

Analog

Dimm ing

REF

+

-

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 15

OLP max.

Figure 38. Analog Implementation Circuit

i V A

V V V A

In full brightness, the maximum rms value of the lamp
current is calculated as:

FAN7318 — LCD Backlight Inverter Drive IC

_max

2 2

π

(4)

[ ]

R

1

S

ADIM

. As

max

=

rms ref

The lamp intensity is inversely proportional to V
V

increases, the lamp intensity decreases and the

ADIM

rms value of the lamp current is calculated as:

2.0

1.5

1.0

0.5

0

5mA

0

π

[ ]

2 2

R

s

0.30

_max

V

REF

Lamp Current

(5)

[ ]

ADIM

0.5 1.0 1.5 2.0 2.5

ADIM

0.5 1.0 1.5 2.0 2.5

in

max

i V A

=

rms ref

= −

ref ref ADIM

Figure 39 shows the lamp current waveform vs. V
an analog dimming mode.

15mA

10mA

-5mA

-10mA

-15mA

Figure 39. Analog Dimming Waveforms

Burst Dimming:

Lamp intensity is controlled with the
BDIM signal over a wide range. When BDIM voltage is
lower than BCT voltage, the lamp current is turned on;
0V on BDIM commands full brightness. The duty cycle of
the PWM pulse determines the lamp brightness. The
lamp intensity is inversely proportional to BDIM voltage.
As BDIM voltage increases, the lamp intensity
decreases. Figure 40 shows the lamp current waveform
vs. DIM in negative burst dimming mode.

Figure 40. Burst Dimming Waveforms

Burst dimming can be implemented, not only DC
voltage, but also using PW M pulse as the BDIM signal.
Figure 41 shows how to implement burst dimming using
PWM pulse as BDIM signal.

Figure 41. Burst Dimming Implementation Circuit

Using an External Pulse

Figure 42 shows the lamp current waveform vs. an
external pulse in negative burst dimming mode.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 16

Figure 42. Burst Dimming Waveform Using an

External Pulse

During striking mode, burst dimming operation is
disabled to guarantee continuous striking time. Figure
43 shows burst dimming disabled during striking mode.

2.5

2

1.5

1

0.5

0

2 3 4 5 6 7 8 9 10 11 12

2

1.5

1

0.5

0

2 3 4 5 6 7 8 9 10 11 12

Striking

mode

0.01

0.005

0

-0.005

-0.01

-0.015
2 3 4 5 6 7 8 9 10 11 12

BCT

CMP

normal mode

i

Lamp

BDIM

-3

x 10

-3

x 10

-3

x 10

Figure 43. Burst Dimming During Striking Mode

Soft-Start:

A soft-start circuit ensures a gradual
increase in the input and output power. FAN7318 has no
soft-start pin, but provides soft-start function using the
second BCT waveform. The second BCT waveform
limits CMP voltage at initial operation, so lamp current
increases gradually.

Figure 44. Soft-Start in Normal Mode

Output Drives:

FAN7318 is designed to drive P-N half­bridge MOSFETs with symmetric duty cycle. FAN7318
can drive P-MOSFET directly without a level-shift
capacitor and a Zener diode. A fixed dead time of 500ns
is introduced between two outputs at maximum duty
cycle, as shown in Figure 46.

Dead time

500ns at max. duty

CT

CMP

SYNC

T

OUTA

OUTB

Figure 46. MOSFETs Gate Drive Signal

Lamp Current Feedback Circuit:

FAN7318 has four
OLP pins for lamp current feedback and protections.
The inputs of four OLP pins are connected to the
internal half-wave and full-wave rectifier circuits. The
half-wave rectified signals of four OLP inputs are
connected the maximum detector circuit. The full-wave
rectified signals of four OLP inputs are connected to the
minimum detector circuit.

The two inputs among the inputs of four OLP pins
should be inverse phase with the other two inputs. If not,
FB-High protection may be triggered.

Lamp Voltage Feedback Circuit:

FAN7318 has four
OLR pins for lamp voltage feedback and protections.
The inputs of four OLR pins are connected to the
internal full-wave rectifier circuit. The full-wave rectified
signals of four OLR inputs are connected to the
maximum detector circuit for lamp voltage feedback and
protections. Furthermore, they are connected to the
minimum detector circuit for protections.

Protections:

The FAN7318 provides the following latch­mode protections: Open-Lamp Regulation (OLR), Open­Lamp Protection (OLP), Short-Lamp Protection (SLP),
CMP-High Protection, FB-High Protection, and Thermal
Shutdown (TSD). The latch is reset when V

IN

UVLO voltage or ENA is pulled down to GND.

The protection delay time can be adjusted by a capacitor
between the TIMER pin and GND.

FAN7318 — LCD Backlight Inverter Drive IC

falls to the

Figure 45. Soft-Start in Burst Dimming Mode

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 17

1.5

t s

t ms

t ms

max

OLR

max

OLR

max

OLR

max

OLR

max

OLR

max

OLR

FAN7318 — LCD Backlight Inverter Drive IC

Figure 47. Protection Timing Delay

Assume that the TIMER pin capacitor is 1µF.

The striking time is calculated as:

C V

strike

I A

sur

∆

= = =

str

1

1 3

F V

µ

•

2

µ

(6)

The OVP and SLP delay time are calculated as:

OVP SLP

_

∆

= = =

I A

sur

nor

2

1 1

F V

µ

•

µ

50

(7)

20

C V

The CMP high protection and OLP delay time are
calculated as:

_

OLP CMPH

∆

= = =

I A

sur

nor

1

1 1

F V

µ

•

µ

2

500

(8)

C V

Open-Lamp Regulation:

rectified OLR input voltages (

When the maximum of the

V ) is more than 2V, the

IC enters regulation mode and controls CMP voltage.
The IC limits the lamp voltage by decreasing CMP

source current. If

source current decreases to 3.2µA. Then, if

V is between 1.34V and 2V, CMP

V

reaches 2V, CMP source current decreases to 0µA, so
the CMP voltage remains constant and the lamp voltage
also remains constant, as shown in Figure 48.

CMP

0

2.2V

2V

0

OLR

-2V

i

CMP

-2.2V

0

2V OLR

2.2V OLR

Figure 49. 2.2V Open-Lamp Regulation

Over-Voltage Protection:

In normal mode, while

is higher than 1.34V, the TIMER pin capacitor is
charged by an internal current source of 50µA. Once
the TIMER reaches 1V, the IC enters shutdown, as
shown in Figure 50. This protection is disabled in
striking mode to ignite lamps reliably.

Figure 50. Over-Voltage Protection in Normal Mode

In burst dimming mode, while

V is higher than 1.34V,

burst dimming is disabled, so that the TIMER pin
capacitor is charged continuously by an internal current
source of 50µA. Once the TIMER reaches 1V, the IC
enters shutdown, as shown in Figure 51.

V

Figure 48. Open-Lamp Regulation in Striking Mode

Finally, if

V is more than 2.2V, the error amplifier for

OLR is operating and CMP sink current increases, so
CMP voltage decreases and the lamp voltage maintains
the determined value, as shown in Figure 49.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 18

Figure 51. Over-Voltage Protection in Burst

Dimming Mode

min

OLP

V

min

OLP

V

min

OLP

V

min

OLP

V

Open-Lamp Protection:

OLP voltages (

If the minimum of the rectified

) is less than 0.7V during initial

operation, the IC operates in striking mode for a time
predetermined by the TIMER pin capacitor and an
internal current source, 2µA, as shown in Figure 52.

Figure 52. Open-Lamp Protection in Striking Mode

The IC starts operating in striking mode and remains in
striking mode until four pulses of

higher than 0.7V

occur. If more than four pulses, the IC changes from
striking mode into normal mode, as shown in Figure 53.

FAN7318 — LCD Backlight Inverter Drive IC

OLP1

OLP

OLP2

OLP3

OLP4

Min. & Max.

Detector

/Full or Half

Wave

Rectifier

OLP min.

0.5V

-

+

150µs

Delay

Figure 54. Open-Lamp Protection in Normal Mode

In burst dimming mode, if

is less than 0.5V for

another time predetermined by the TIMER pin capacitor
and an internal current source, 2µA, the IC is shut down,
as shown in Figure 55. The open-lamp protection delay
in burst dimming mode is shorter than in full-brightness
because short-lamp condition is detected at rising
interval of lamp voltage in burst dimming, then another
internal current source is turned on during the interval.

Figure 53. Mode Change from Striking to Normal

After ignition, if

is less than 0.5V for a time

predetermined by the TIMER pin capacitor and an
internal current source, 2µA in normal mode, the IC is
shut down, as shown in Figure 54.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 19

min

OLR

V

min

OLR

V

FAN7318 — LCD Backlight Inverter Drive IC

Figure 55. Open-Lamp Protection in Burst Dimming

Mode

Applying voltage lower than 2.1V to the ENA pin enables
OLP. Applying voltage higher than 2.5V to the ENA pin
disables OLP and is called as DCR mode. Regardless of
DCR mode, OLP is enabled in striking mode.

Figure 57. Short-Lamp Protection in Normal Mode

In burst dimming mode, if

is less than 0.3V for a

time predetermined by the TIMER pin capacitor and a
internal current source of 50µA turned on only burst
dimming on time, the IC is shut down, as shown in
Figure 58. SLP protection delay changes, depending on
burst dimming on duty ratio.

Figure 58. Short-Lamp Protection in Burst Dimming

Mode

Applying voltage higher than 2.5V to the ENA pin
disables SLP. Applying voltage lower than 2.1V to the
ENA pin enables SLP.

Figure 56. Open-Lamp Protection Disable in DCR

Mode

Short-Lamp Protection:

OLR voltages (

predetermined by the TIMER pin capacitor and a internal
current source of 50µA in normal mode, the IC is shut
down, as shown in Figure 57. This protection is disabled
in striking mode to ignite lamps reliably.

If the minimum of the rectified

) is less than 0.3V for a time

Figure 59. Short-Lamp Protection Disable in DCR

Mode

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 20

max

OLP

CMP-High Protection:

If CMP is more than 3.5V for a
time predetermined by the TIMER pin capacitor and a
internal current source of 50µA in normal mode, the IC
is shut down, as shown in Figure 60.

Figure 60. CMP-High Protection

This protection is disabled by a pull-down resistor (a few

Ω)

between CMP and GND. If CMP voltage reaches

M

2.5V, CMP source current decreases to 2µA. Determine
a pull down resistor value such that the whole of this
current can flow through the resistor. If so, CMP-High
protection can be disabled, as shown Figure 61. This
protection is disabled in striking mode to ignite the
lamps reliably.

Figure 62. FB-High Protection

Thermal Shutdown:

detect the abnormal over-temperature. If the IC
temperature exceeds approximately 150

The IC provides the function to

°

C, the thermal

shutdown triggers.

FAN7318 — LCD Backlight Inverter Drive IC

Figure 61. CMP-High Protection Disable by a Pull-

Down Resistor

High-FB Protection:

voltages(

V ) is more than 3.5V, the counter starts

If the minimum of the rectified OLP

counting eight rectified OLP pulses in normal mode,
then the IC enters shutdown, as shown in Figure 62.
This counter is reset by detecting the positive edge of
BCT. This protection is disabled in striking mode to
ignite the lamps reliably.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 21

Typical Application Circuit (LCD Backlight Inverter)

Application Device Input Voltage Range Number of Lamps

22-Inch LCD Monitor FAN7318 15V±10% 4

1. Features



High-Efficiency Single-Stage Power Conversion



P-N Half-Bridge Topology



Reduces Required External Components



Enhanced System Reliability through Protection Functions

FAN7318 — LCD Backlight Inverter Drive IC

201918171615141312

OLP1

OLP2

OLP3

OLR1

BDIM

IC1

CMP

1 TIMER

2345678

OLP3

ADIM

CT OLR2

REF

BCT

11

VIN

OLP4

OLR4

OUTA

BDIM

ENA

GND

OUTB

9

10

Figure 63. Typical Application Circuit

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 22

FAN7318 — LCD Backlight Inverter Drive IC

Physical Dimensions

20 11

B

7.60

10.65

7.40

10.00

PIN ONE

INDICATOR

1 10

2.65 MAX

13.00

0.51

0.35

12.60

11.43

0.25

1.27

M

BC A

A

9.50

2.25

1.27

LAND PATTERN RECOMMENDATION

SEE DETAIL A

0.65

0.33

0.20

(R0.10)

(R0.10)

8°
0°

0.75

0.25

X 45°

GAGE PLANE

0.25

C

0.30

0.10

0.10 C

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-013, VARIATION AC, ISSUE E
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD

SEATING PLANE

FLASH OR BURRS.

1.27

0.40

(1.40)

SEATING PLANE

DETAIL A

SCALE: 2:1

D) CONFORMS TO ASME Y14.5M-1994

E) LANDPATTERN STANDARD: SOIC127P1030X265-20L

F) DRAWING FILENAME: MKT-M20BREV3

Figure 64. 20-Lead, Small Outline Integrated Circuit (SOIC) Package

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 23

FAN7318 — LCD Backlight Inverter Drive IC

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7318 • 1.0.2 24