The FAN7085_GF085 is a high-side gate drive IC with reset
input and built-in recharge FET. It is designed for high voltage
and high speed driving of MOSFET or IGBT, which operates up
to 300V. Fairchild's high-voltage process and common-mode
noise cancellation technique provide stable operation in the
high side driver under high-dV/dt noise circumstances. Logic
input is compatible with standard CMOS outputs. The UVLO circuits prevent from malfunction when VCC and VBS are lower
than the specified threshold voltage. It is available with space
saving SOIC-8 Package. Minimum source and sink current
capability of output driver is 250mA and 250mA. Built-in
recharge FET to refresh bootstrap circuit is very useful for circuit
topology requiring switches on low and high side of load.
SOIC-8
Ordering Information
DevicePackage
FAN7085MSOIC-8-40 °C ~ 125 °C
FAN7085MXSOIC-8-40 °C ~ 125 °C
FAN7085_GF085 High Side Gate Driver with Recharge FET
VB
HO
VS
RESET-
IN-
GND
Pin Assignments
Pin Definitions
Level Shifter
Logic
Pulse
Filter
1
VCC
2
IN-
3
GND
4
RESET-
VB
HO
NC
VS
ON
Level Shifter
OFF
8
7
6
5
Delay
Recharge Path
Pine NumberPin NameI/OPin Function Description
1VCCPDriver supply voltage, typically 5V
2IN-IDriver control signal input (Negative Logic)
3GNDPGround
4RESET-IDriver enable input signal (Negative Logic)
5VSPHigh side floating offset for MOSFET Source connection
6NC-No connection (No Bond wire)
7HOAHigh side drive output for MOSFET Gate connection
8VBPDriver output stage supply
FAN7085_GF085 Rev. 1.0.0
2www.fairchildsemi.com
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND.
ParameterSymbolMin.Max.Unit
High side floating supply voltageVBS-0.325V
High side driver output stage voltage
Neg. transient: 0.5 ms, external MOSFET off
High side floating supply offset voltage
Neg. transient 0.2 us
High side floating output voltageV
Supply voltage V
Input voltage for IN-V
Input voltage for RESET-V
Power Dissipation
Thermal resistance, junction to ambient
1)
1)
Electrostatic discharge voltage
(Human Body Model)
Note: 1) The thermal resistance and power dissipation rating are measu red bellow conditions;
JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural condition(StillAir)
JESD51-3: Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package
VB-5325V
Vs-25300V
HOVS-0.3VB+0.3V
CC-0.325V
IN-0.3Vcc+0.3V
RES-0.3Vcc+0.3V
Pd0.625W
Rthja200°C/W
V
ESD
CDM
S
1.5KV
500V
-55150°C
FAN7085_GF085 High Side Gate Driver with Recharge FET
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.-40°C <= Ta <= 125°C
ParameterSymbolMin.Max.Unit
High side floating supply voltage(DC)
Transient:-10V@ 0.2 us
High side floating supply offset voltage(DC)
@VBS=7V
High side floating supply offset voltage(Transient)
0.2us @VBS<25V
High side floating output voltageV
Allowable offset voltage Slew Rate
1)
Supply voltage for logic partV
Input voltage for IN-V
Input voltage for RESET-V
Switching frequency
Minimum low input width
Minimum high input width
2)
3)
3)
Minimum operating voltage of VB related to GNDV
Ambient temperatureT
Note: 1) Guaranteed by design.
2) Duty = 0.5, VBS >=7V
3) Guaranteed by design. Pulse widths below the specified values, may be ignored. Output will either follow the input signal or will ignore it.
No false output state is guaranteed when minimum input width is smaller than tin
High logic level input voltage for IN-V
Low logic level input voltage for IN-V
Low logic level input bias current for IN-I
High logic level input bias current for IN-I
Full up resistance at INR
High logic level input voltage for RESET-V
Low logic level input voltage for RESET-V
High logic level input current for RESET-I
Low logic level input bias current for RESET-I
Full down resistance at RESET-R