Epson SED 1520 User Manual
Technical Manual
SED1520 Series
LCD driver with RAM
NOTICE
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approval from another government agency.
© Seiko Epson corporation 1998 All right reserved.
i8088 and i8086 are registered trademarks of Intel Corporation.
Z80 is registered trademark of Zilog Corporation.
V20 and V30 are registered trademarks of Nippon Electric Corporation.
CONTENTS
Selection Guide
1. SED1510 Series
2. SED1520 Series
3. SED152A Series
4. SED1526 Series
5. SED1530 Series
6. SED1540 Series
7. SED1560 Series
8. SED1565 Series
9. SED1570 Series
SED1500 Series
Selection Guide
■
LCD drivers with RAM for smalland medium-sized displays
SED1500 series
Ultra-low power consumption and on-chip RAM make this series ideal for compact
LCD-based equipment.
Part number Duty
Supply voltage
range (V)
LCD voltage
range (V)
Segment Common
Display
RAM (bits)
Microprocessor
interface
SED1510D0C
SED1510D0B
SED1510F0C 0.9–6.0 1.8–6.0 1/4 32 4 128 Serial
SED1510F
0E
SED1511D0A
SED1520D0A
SED1520D0B
SED1520F0A
SED1520F0C
SED1520T0A
SED1520D
AA
1/16,1/32 61 16
SED1520DAB
SED1520FAA
SED1520FAC
SED1520TAA
#
SED1521D0A
SED1521D0B
SED1521F0A
SED1521F0C
SED1521T0A
#
SED1521DAA 3.5–13 1/8–1/32 80 –
SED1521D
SED1521F
AB
2.4–7.0
AA
2,560 8-bit parallel
SED1521FAC
SED1521TAA
#
SED152AD0A
SED1522D0A
SED1522D0B
SED1522F0A
SED1522F0C
SED1522T0A
SED1522D
#
AA
1/8,1/16 69 8
SED1522DAB
SED1522FAA
SED1522FAC
SED1522TAA
#
SED1540D0A
SED1540D0B 3.5–11 1/3,1/4 73 3, 4
SED1540F
0A
Frequency
(KHz)
18 (internal)
18
(internal,
external)
2
(external)
18
(external)
2
(external)
18
(internal,
external)
2
(external)
18 (internal)
4 (external)
Package
Application/additional
features
AI pad chip
Au bump chip
QFP12-48pin
Small segment-type LCD
display. Command and data
interface
QFP6-60pin
AI pad chip
Small segment-type LCD dislays. Data only
interface
AI pad chip
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
AI pad chip
Dot-matrix LCD displays
Extension driver is the
SED1521.
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
AI pad chip
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
AI pad chip
Extension driver for the
SED1520 and SED1522
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
Al pad chip
P-substrate version of SED1521
AI pad chip
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
AI pad chip
Dot-matrix LCD displays
Extension driver is the
SED1521.
Au bump chip
QFP5-100pin
QFP15-100pin
TCP
AI pad chip
Au bump chip
Segment-type displays
QFP5-100pin
# : Planning TCP : Tape Carrier Package
Part number Duty
Supply voltage
range (V)
LCD voltage
range (V)
Segment
Common
Display
RAM (bits)
SED1560D0A
SED1560DAA
SED1560D0B 1/48, 1/49
SED1560D
AB 1/64, 1/65
SED1560T
0B
102 65
SED1560TQA
SED1561D0A
SED1561DAA 166×65
SED1561D
0B 2.4–6.0 6.0–16.0
SED1561D
AB
0B
SED1561T
1/24, 1/25
1/32, 1/33
134 33
bits
SED1561TAB
SED1561TQA
SED1562D0A
SED1562D0B 1/16, 1/17
SED1562T
0B (1/5bias)
SED1562T
QA 8-bit parallel
SED1565D
0B or Serial
SED1565D
1B*
SED1565D
2B 1/65
SED1565T
0A (1/7, 1/9 bias)
SED1565T
0B
150 17
65
SED1565T0C
SED1566D0B
SED1566D1B* 1/49
SED1566D
2B 1.8–5.5 4.5–16.0 (1/6, 1/8 bias)
SED1566T
0A
49 132×65
132 bits
SED1567D0B
SED1567D1B*
SED1567D
2B
0B
SED1567T
1/33
(1/5, 1/6 bias)
33
SED1567T0C
SED1568D0B
0B 1/53
SED1569D
SED1569T
** (1/6, 1/8 bias)
SED1570D
0A
2.7–5.5 8.0–20.0 1/64–1/200 –
0B bits
SED1570D
SED1526D
*A
*B 1/8, 1/9
SED1526D
SED1526F
*A
*A
SED1526T
SED1528D
SED1528D
SED1528F
2.4–6.0 Supply
*A ×3 bits or Serial
*B
*A
voltage
1/55 (1/6, 1/8 bias)
3.5–
80
1/16, 1/17
1/32, 1/33 64 33
55
53
200×80
17
80×33 8-bit parallel
SED1528T*A
Microprocessor
interface
Frequency
4-bit parallel
(KHz)
18
33
–
20
Package
Al pad chip
Al pad chip
Au bump chip
Au bump chip
TCP
QTCP
Al pad chip
Al pad chip
Au bump chip
Au bump chip
TCP
TCP
QTCP
Al pad chip
Au bump chip
TCP
QTCP
Au bump chip
Au bump chip
Au bump chip
TCP
TCP
TCP
Au bump chip
Au bump chip
Au bump chip
TCP
Au bump chip
Au bump chip
Au bump chip
TCP
TCP
Au bump chip
Au bump chip
TCP
Al pad chip
Au bump chip
Al pad chip
Au bump chip
QFP5-128pin
TCP
Al pad chip
Au bump chip
QFP5-128pin
TCP
Application/additional
features
Built-in power circuit for LCD
(voltage tripler)
SED1560✽
0B (1/9 bias)
SED1560✽
AB (1/7 bias)
SED1561✽
0B (1/7 bias)
SED1561✽
AB (1/5 bias)
Built-in power circuit for LCD
(DC/DC×4)
Built-in self-refreshing function
Built-in power circuit for LCD
(voltage tripler)
SED1526✽
0✽
(VREG)
SED1526✽
E✽
(no VREG)
A✽
SED1526✽
(redistribution of COMS)
0✽
SED1528✽
(VREG)
E✽
SED1528✽
(no VREG)
Part number Duty
SED1530D
Supply voltage
range (V)
0A
LCD voltage
range (V)
Segment
Common
SED1530DAA
SED1530D0B 1/32, 1/33 100 33
SED1530D
AB
SED1530TAA
SED1531D0A
SED1531D0B 132 –
SED1531T
0A 2.4–6.0 4.5–16.0
SED1532D
0A
SED1532DBA 1/64, 1/65
SED1532D
SED1532D
0B
BA
100 33
SED1532T0A
SED1532TBA
SED1535D0B* 1/35 98 35
Display
RAM (bits)
Microprocessor
interface
132×65 8-bit parallel
bits or Serial
Frequency
(KHz)
–
Package
Al pad chip
Al pad chip
Au bump chip
Au bump chip
TCP
Al pad chip
Au bump chip
TCP
Al pad chip
Al pad chip
Au bump chip
Au bump chip
TCP
TCP
Au bump chip
Application/additional
features
Built-in power circuit for LCD
(voltage quadrupler)
SED153✽✽
0✽
(Common: Right side)
SED153✽✽
A✽
(Common: Both side)
SED153✽✽
B✽
(Common: Left side)
SED153✽✽
F✽
(no VREG)
TCP : Tape Carrier Package
2. SED1520 Series
SED1520 Series
Contents
OVERVIEW ..........................................................................................................................................................2-1
FEATURES...........................................................................................................................................................2-1
BLOCK DIAGRAM ................................................................................................................................................2-2
PACKAGE OUTLINE ............................................................................................................................................2-3
PAD ......................................................................................................................................................................2-4
Pad Arrangement.........................................................................................................................................2-4
PAD ARRANGEMENT .........................................................................................................................................2-5
PIN DESCRIPTION ..............................................................................................................................................2-6
(1) Power Pins .............................................................................................................................................2-6
(2) System Bus Connection Pins .................................................................................................................2-6
(3) LCD Drive Circuit Signals .......................................................................................................................2-7
BLOCK DESCRIPTION ........................................................................................................................................2-8
System Bus..................................................................................................................................................2-8
Display Start Line and Line Count Registers ...............................................................................................2-9
Column Address Counter.............................................................................................................................2-9
Page Register ..............................................................................................................................................2-9
Display Data RAM........................................................................................................................................2-9
Common Timing Generator Circuit ............................................................................................................2-10
Display Data Latch Circuit..........................................................................................................................2-10
LCD Driver Circuit ......................................................................................................................................2-10
Display Timing Generator ..........................................................................................................................2-10
Oscillator Circuit (SED1520*0A Only) ........................................................................................................2-11
Reset Circuit ..............................................................................................................................................2-11
COMMANDS ......................................................................................................................................................2-14
Summary....................................................................................................................................................2-14
Command Description ...............................................................................................................................2-15
SPECIFICATIONS ..............................................................................................................................................2-20
Absolute Maximum Ratings .......................................................................................................................2-20
Electrical Specifications .............................................................................................................................2-20
APPLICATION NOTES.......................................................................................................................................2-26
MPU Interface Configuration......................................................................................................................2-26
LCD Drive Interface Configuration .............................................................................................................2-27
LCD Panel Wiring Example .......................................................................................................................2-29
Package Dimensions .................................................................................................................................2-30
Series
SED1520
– i –
SED1520 Series
OVERVIEW
The SED1520 family of dot matrix LCD drivers are
designed for the display of characters and graphics. The
drivers generate LCD drive signals derived from bit
mapped data stored in an internal RAM.
The drivers are available in two configurations
The SED1520 family drivers incorporate innovative
circuit design strategies to achieve very low power
dissipation at a wide range of operating voltages.
These features give the designer a flexible means of
implementing small to medium size LCD displays for
compact, low power systems.
• The SED1520 which is able to drive two lines of
twelve characters each.
• The SED1521 which is able to drive 80 segments for
extention.
• The SED1522 which is able to drive one line of
thirteen characters each.
Line-up
Product
Name
SED1520
SED1521
SED1522
SED1520
SED1521
SED1522
Clock Frequency
On-Chip External
0
18 kHz 18 kHz SED1520
*
*
0
*
0
*
A
*
A
*
A
*
— 18 kHz SED1520
*
18 kHz 18 kHz SED1522
*
— 2 kHz SED1520
*
— 2 kHz SED1520
*
— 2 kHz SED1522
*
Applicable Driver of SEG of CMOS Duty
FEATURES
• Fast 8-bit MPU interface compatible with 80- and 68family microcomputers
• Many command set
• Total 80 (segment + common) drive sets
• Low power — 30 µW at 2 kHz external clock
• Wide range of supply voltages
DD – VSS: –2.4 to –7.0 V
V
DD – V5: –3.5 to –13.0 V
V
• Low-power CMOS
Number Number
Drivers Drivers
0
, SED1521
*
*
0
, SED1522
*
*
0
, SED1521
*
*
A
, SED1521
*
*
A
, SED1522
*
*
A
, SED1521
*
*
0
*
*
0
*
*
0
*
*
A
*
*
A
*
*
A
*
*
61 16 1/16, 1/32
80 0 1/8 to 1/32
69 8 1/8, 1/16
61 16 1/16, 1/32
80 0 1/8 to 1/32
69 8 1/8, 1/16
Series
SED1520
• Package code (For example SED1520)
SED1520T
SED1520F
SED1520D
: PKG SED1520F
**
: Chip SED1520D
**
SED1520F
SED1520D
A (QFP5-100pin)
*
C (QFP15-100pin)
*
A (Al-pad)
*
B (Au-bump)
*
EPSON 2–1
SED1520 Series
BLOCK DIAGRAM
An example of SED1520*AA:
5
,V
4
,V
3
,V
2
,V
1
V
15
to COM
0
COM
60
to SEG
0
SEG
SS
DD
V
V
LCD drive circuit
Common counter
Display data latch circuit
Display data RAM
(2560-bit)
Line counter
Display start line register
Line address decoder
I/O buffer
Column address decoder
CL
FR
Display
timing
generator
Column address counter
circuit
Column address register
register
Low-address
Command
decoder
MPU interface
7
~D
,CS
0
0
A
D
2–2 EPSON
RD,WR
(E,R/W)
Status
M/S
RES
Bus
holder
PACKAGE OUTLINE
QFP5
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0A0CS(OSC1)
CL(OSC2)
E(RD)
R/W(WR)
VSSCS0
SED1520 Series
CS1
QFP15
CS2
CS3
CS4
CS5
CS6
CS7
V
RES
M/S
COM0
COM1
COM2
COM3
COM4
55
60
65
70
75
85
DD
F2
V5
V1
V2
V4
V1
90
Index
95
100
5
10
15
20
COM5
COM6
COM7
COM8
COM9
COM10
R/W(WR)
75
SS
V
DD
46
80
46
85
90
95
1
COM11
COM12
COM13
70
Index
5
SEG60
COM14
COM15
SEG59
SEG58
65
10
SEG57
SEG56
SEG55
15
SEG54
SEG53
SEG52
60
SEG51
SEG50
55
20
SEG49
25
SEG48
SEG47
SEG46
50
45
40
35
30
25
45
40
35
SEG45
SEG44
SEG43
SEG42
SEG20V
SEG21D30
SEG22D31
SEG23D32
SEG24D33
SEG25D34
SEG26D35
SEG27D36
SEG28D37
SEG29
SEG30RES
SEG31F R
SEG32V5
SEG33V3
SEG34V2
SEG35M/S
SEG36V4
SEG37V1
SEG38COM 0
SEG39COM 1
SEG40COM 2
SEG41COM 3
SEG42COM 4
SEG43COM 5
SEG44COM 6
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
Series
SED1520
SEG46 SEG18
COM 7
COM 8 E (RD)
COM 9 CL (OSC2)
COM10 CS (OSC1)
COM11 AQ
COM12 SEG0
COM13 SEG1
COM14 SEG2
SEG60 SEG4
COM15 SEG3
SEG59 SEG5
SEG58 SEG6
SEG57 SEG7
SEG56 SEG8
SEG55 SEG9
SEG54 SEG10
SEG53 SEG11
SEG52 SEG12
SEG51 SEG13
SEG50 SEG14
SEG49 SEG15
SEG48 SEG16
SEG47 SEG17
SEG45 SEG19
Note: This is an example of SED1520F pin assignment. The modified pin names are given below.
Product Pin/Pad Number
Name 74 75 96 to 100, 1 to 11 93 94 95
SED1520F
SED1521F
SED1522F
SED1520F
SED1521F
SED1522F
0A OSC1 OSC2 COM0 to COM15* M/S V4 V1
0A CS CL SEG76 to SEG61 SEG79 SEG78 SEG77
0A OSC1 OSC2 COM0 to 7, SEG68 to 61 M/S V4 V1
AA CS CL COM0 to COM15* M/S V4 V1
AA CS CL SEG76 to SEG61 SEG79 SEG78 SEG77
AA CS CL COM0 to 7, SEG68 to 61 M/S V4 V1
SED1520: Common outputs COM0 to COM15 of the master LSI correspond to COM31 to COM16 of the
slave LSI.
SED1522: Common outputs COM0 to COM15 of the master LSI correspond to COM15 to COM8 of the
slave LSI.
EPSON 2–3
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