DESCRIPTION OF PINS ................................................................................................................................... 2–11
CHARACTER GENERATOR.............................................................................................................................2–24
ABSOLUTE MAXIMUM RATINGS ....................................................................................................................2–31
DC CHARACTERISTICS...................................................................................................................................2–32
SED1220 is a dot matrix LCD controller/driver for
character display. Using 4bits data, 8bits data or serial
data being provided from the micro computer, it displays
up to 36 characters, 4 user defined characters and up to
120 symbols.
Up to 256 types of built-in character generator ROMs are
prepared. Each character font is consisted of 5 × 8 dots.
It also contains the RAM for displaying 4 user defined
characters each font consisting of 5 × 8 dots. It is symbol
register allows character display with high degree of
freedom. This handy equipment can be operated with
minimum power consumption with its low power
consumption design, standby and sleeping mode.
FEATURES
• Built-in data display RAM – 36 characters + 4 user
defined characters + 120 symbols.
• CG ROM (For up to 256 characters), CG RAM (for 4
characters) and symbol register (for 120 symbols).
• No. of display digit and lines
< In normal mode >
2, V3The voltage determined in the liquid crystal cell is resistance-
V
4, V5divided or impedance-converted by operational amplifier, and the
VS1OPower supply voltage output pin for oscillating circuit, and DC/DC1
Power supply
Power supply
Power supply
Connected to logic supply. Common with MPU power terminal VCC.1
0V power terminal connected to system ground.1
Multi-level power supply for liquid crystal drive.6
resultant voltage is applied.
The potential is determined on the basis of V
DD and the following
equation must be respected.
V
DD = V0≥ V1≥ V2≥ V3≥ V4≥ V5
VDD≥ VSS≥ V5≥ VOUT
When the built-in power supply is ON, the following voltages are
given to pins V1 to V4 by built-in power circuit:
V
1 = 1/5 V5(1/4 V5)
V
2 = 2/5 V5(2/4 V5)
V
3 = 3/5 V5(3/4 V5)
V
4 = 4/5 V5(4/4 V5)
voltage ratings in ( ) are for optinal choices.
source. Don’t connect this pin to an external load.
SED1220
LCD Power Circuit Pins
Pin nameI/ODescriptionQ’ty
CAP1+OCapacitor positive side connecting pin for boosting.1
This pin connects the capacitor with pin CAP1–.
CAP1–OCapacitor negative side connecting pin for boosting.1
This pin connects a capacitor with pin CAP+.
CAP2+OCapacitor positive side connecting pin for boosting.1
This pin connects a capacitor with pin CAP2–.
CAP2–OCapacitor negative side connecting pin for boosting.1
This pin connects a capacitor with pin CAP2+.
V
OUTOOutput pin for boosting. This pin connects a smoothing capacitor1
with V
DD pin.
V
RIVoltage regulating pin. This pin gives a voltage between VDD and1
V
5 by resistance-division of voltage.
EPSON2–11
SED1220
Pins for System Bus Connection
Pin nameI/ODescriptionQ’ty
D7 (SI)I8-bit input data bus. These pins are connected to a 8-bit or 16-bit8
D6 (SCL)standard MPU data bus.
D5 ~ D0When P/S = “Low”, the D7 and D6 pins are operated as a serial data
RES: Indicates the active potential.
OPEN:Though “OPEN” is available, fixing the potential is
recommended for noise-withstnading characteristical reason.
—:Indicates that it can be set at either “H” or “L”, but fixing the
potential is required.
A0IUsually, this pin connects the least significant bit of the MPU address1
bus and identifies a data command.
0 : Indicates that D0 to D7 are a command.
1 : Indicates that D0 to D7 are display data.
RESIIn case of a 68 series MPU, initialization can be performed by1
changing RES
initialization can be performed by changing
A reset operation is performed by edge sensing of the RES signal.
An interface type for the 68/80 series MPU is selected by input level
after initialization.
“L” : 68 series MPU interface
“H” : 80 series MPU interface
CSIChip select signal. Usually, this pin inputs the signal obtained by1
decoding an address bus signal. At the “Low” level, this pin is
enabled.
WRI<When connecting an 80 series MPU>
Active “Low”. This pin connects the WR signal of the 80 series1
(E)MPU. The signal on the data bus is fetched at the rise of the WR
signal.
<When connecting a 68 series MPU>
Active “High”. This pin becomes an enable clock input of the 68
series MPU.
P/SIThis pin switches between serial data input and parallel data input.1
. In case of an 80 series MPU,
.
P/S
“High”CSA0D0~D7–
“Low”CSA0SISCL
IFIInterface data length select pin for parallel data input.1
CMOS2CMOS1, CMOS2: Common output for symbol display
SEG1~
SEG60
SEGS1, 2
4, 5SEGS1, SEGS2: Segment output for signal output
Dynamic drive terminal (SED1222D**)
Pin nameI/ODescriptionQ’ty
COM1~
COM16
COMS1,
CMOS2CMOS1, CMOS2: Common output for symbol display
SEG1~
SEG60
OCommon signal output pin (for characters)24
O
OSegment signal output pin (for characters)60
O
OCommon signal output pin (for characters)16
O
OSegment signal output pin (for characters)60
Common signal output pin (except for characters)
Segment signal output pin (except for characters)
Common signal output pin (except for characters)
2
SED1220
4
2
Static drive terminal
Pin nameI/ODescriptionQ’ty
COMSAOCommon signal output pin (for icon)1
SEGSA, B
C, D, EO
F, G, H, I, J
Note: For the electrode of liquid crystal display panel to be connected to the static drive terminal, we recommend
you to use a pattern in which it is separated from the electrode connected to the dynamic drive terminal.
When this pattern is too close to the other electrode, both the liquid crystal display and electrode will be
deteriorated.
Segment signal output pin (for icon)5 to
SEGSF, G, H, I, J (only SED122A)10
EPSON2–13
SED1220
FUNCTIONAL DESCRIPTION
MPU Interface
Selection of interface type
In the SED1220 Series, data transfer is performed through a 8-bit or 4-bit data bus or a serial data input (SI). By selecting
“High” or “Low” as P/S pin polarity, a parallel data input or a serial data input can be selected as shown in Table 1.
Table 1
P/STypeCSA0WRSISCLD0~D7
“High”Parallel InputCSA0WR——D0~D7
“Low”Serial InputCSA0H, LSISCL—
Parallel Input
In the SED1220 Series, when parallel input is selected (P/S = “High”), it can be directly connected to the 80 series MPU
bus or 68 series MPU bus, as shown in Table 2, if either “High” or “Low” is selected as RES pin polarity after a reset input,
because the RES pin has an MPU select function.
Selection between 8 bits and 4 bits is performed by command.
Table 2
RES input polarityTypeA0WRCSD0~D7
↓ active68 seriesA0ECSD0~D7
↓
active80 seriesA0WRCSD0~D7
Interface with 4-bit MPU interface
When data transfer is performed by 4-bit interface (IF = 0), an 8-bit command, data and address are divided into two parts.
CS
WR
D7 to D4Upper (D7 to D4)Lower (D3 to D0)
Note: When performing writing in succession, reverse a time exceeding the system cycle time (t
perform writing.
Serial interface (P/S = “Low”)
The serial interface consists of a 8-bit shift register and a 3-bit counter and acceptance of an SI input or SCL input is enabled
in the ship selected status (CS = “Low”).
When no chip is selected, the shift register and counter are reset to the initial status.
Serial data is input in the order of D7, D6 .... D0 from the serial data input pin (SI) at the rise of Serial Clock (SCL).
At the rising edge of the 8th serial clock, the serial data is converted into 8-bit parallel data and this data is processed.
The A0 input is used to identify whether the serial data input (SI) is display data or a command. That is, when A0 = “High”,
it is regarded as display data. When A0 = “Low”, it is regarded as a command.
The A0 input is read in and identified at the rise of the 8 x n-th clock of Serial Clock (SCL) after chip selection.
Fig. 1 shows a timing chart of the serial interface.
Regarding the SCL signal, special care must be exercised about terminal reflection and external noise due to a wire length.
We recommend the user to perform an operation check with a real machine.
We also recommend the user to periodically refresh the write status of each command to prevent a malfunction due to noise.
cyc) and then
2–14EPSON
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