Epson S5U13719P00C100 User Manual

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S1D13719 Mobile Graphics Engine
S5U13719P00C100
Evaluation Board User
Manual
SEIKO EPSON CORPORATION
Rev. 1.1
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Evaluation Board/Kit and Development Tool Important Notice
1. This evalua tion board /kit o r dev elop ment to ol is desig ned fo r use for en ginee ring e valu ation, demo nstr ation, or dev elop ­ment purposes only. Do not use it for other purposes. It is not intended to meet the requirements of design for finished products.
2. This evaluation board/kit or development tool is intended for use by an electronics engineer and is not a consumer product. The user should use it properly and in a safe manner. Seiko Epson do es not assume any responsibility or liability of any kind of damage and/or fire caused by the use of it. The user should cease to use it when any abnormal issue occurs even during proper and safe use.
3. The part used for this evaluation board/kit or development tool may be changed without any notice.
NOTICE
All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
©SEIKO EPSON CORPORATION 2007 - 2012, All rights reserved.
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Table of Contents

Chapter 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Chapter 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Chapter 3 Installation and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Configuration DIP Switch . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.2 Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Chapter 4 Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1.1 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1.2 Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1.3 S1D13719 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4 Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4.1 Direct Host Bus Interface Support . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4.2 Connecting to the Epson S5U13U00P00C100 USB Adapter Board . . . . . . . . . 14
4.5 LCD Panel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6 Camera Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.7 SD Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.8 GPIO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chapter 5 Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Chapter 6 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Chapter 7 S5U13719P00C100 Board Layout . . . . . . . . . . . . . . . . . . . . . . . 27
Chapter 8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.1 Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.2 Document Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Chapter 9 Change Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 3
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4 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 1 Introduction

Chapter 1 Introduction
This manual describes the setup and operation of the S5U13719P00C100 Evaluation Board. The evaluation board is designed as an evaluation platform for the S1D13719 Mobile Graphics Engine.
The S5U13719P00C100 evaluation boar d can connect to the S5U13U00P00C100 USB Adapter board so th at it can be used with a laptop or deskt op computer, via USB 2.0. The S5U13719P00C100 eva luation boar d can also be used with many other native platforms via the host connect ors which provide the appropriat e signals to su pport a variety of CPUs.
This user manual is updated as appropriate. Please check the Epson Research and Development Website at www.erd.epson.com for the latest revision of this document before beginning any development.
We appreciate your comments on our docu mentation. Please conta ct us via email at documentation@erd. epson.com.
S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 5
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Chapter 2 Features

Chapter 2 Features
The S5U13719P00C100 Evaluati on Board includes the following features:
• 180-pin PFBGA S1D13719 Mobile Graphics Engine
• Headers for connection to the S5U13U00P00C100 USB Adapter board
• Headers for connecting to various Host Bus Interfaces
• Headers for connecting to LCD panels
• Headers for connecting to cameras
• On-board 32.768kHz oscillator
• 14-pin DIP socket (if an oscillator other than 32.768kHz must be used)
• SD Card interface (optional)
• 3.3V input power
• On-board voltage regulators for 1.8V and for 2.7V
• On-board voltage regulator with adjustable 12~25V output, 60~100mA max., to provide power for LED back-
light of LCD panels.
6 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 3 Installation and Configuration

SW1
Chapter 3 Installation and Configuration
The S5U13719P00C100 evaluatio n board incor porates a DIP switch, jumper s, and 0 ohm resi stors which all ow it to be used with a variety of different configurations.

3.1 Configuration DIP Switch

The S1D13719 has configuration inputs (CNF[7:0]) which are read on the rising edge of RESET#. An 8-position DIP switch (SW1) is used to confi gure the S1 D13719 for multiple Host Bus Inter faces. The followin g figure shows the location of DIP switch SW1 on the S5U13719P00C100.

Figure 3-1: Configuration DIP Switch (SW1) Location

S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 7
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Chapter 3 Installation and Configuration
All S1D13719 configuration inputs (CNF[7:0]) are fully configurable using DIP switch SW1 as described below.
S5U13719P00C100
SW1-[8:1] Config
SW1-[8] CNF7 Camera2 power supply OFF Camera2 power supply ON
SW1-[7] CNF6 Parallel 2 CS# mode Parallel 1 CS# mode
SW1-[6] CNF5 Big endian Little Endian
SW1-[5:3] CNF[4:2]
SW1-[2] CNF5 GPIO[21:0] configured as inputs GPIO[21:0] configured as outputs
SW1-[1] CNF6 Camera1 power supply ON Camera1 power supply ON
S1D13719
CNF[7:0] Config
= Required settings when using S5U13U00P00C100 USB Adapter board (SW1-[8:1] = 000000x0b)

3.2 Configuration Jumpers

Power-On/Reset State
1 (ON) 0 (OFF)
000b Direct 80 Type 2 host interface
001b Direct 80 Type 3 host interface
010b Indirect 80 Type 2 host interface
011b Indirect 80 Type 3 host interface
100b Direct 80 Type 1 host interface
101b Direct 68 host interface
110b Indirect 80 Type 1 host interface
111b Indirect 68 host interface
The S5U13719P00C100 has 9 jumpers which configur e various board settings. The jumper positions for each function are shown below.
Jumper Function Position 1-2 Position 2-3 No Jumper
JP1 COREVDD Normal
JP2 PLLVDD Normal
JP3 HIOVDD Normal
JP4 PIOVDD Normal
JP5 HIOVDD Source H1 connector, pin 32 3.3VDD — JP6 PIOVDD Source H4 connector, pin 8 3.3VDD
JP7 CIO1VDD Normal
JP8 CIO2VDD Normal
JP9 SIOVDD Normal
= Required settings when using S5U13U00P00C100 USB Adapter board
COREVDD current
measurement
PLLVDD current
measurement
HIOVDD current
measurement
PIOVDD current
measurement
CIO1VDD current
measurement
CIO2VDD current
measurement
SIOVDD current
measurement
8 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 3 Installation and Configuration
JP1
JP2
JP3
JP4
JP7
JP9
JP8

JP1-JP4 and JP7-JP9 - Power Supplies for S1D13719

JP1-JP4 and JP7-JP9 can be used to measure current consumption of each S1D13719 power supply. When the jumper is at position 1-2, normal operation is selected. When no jumper is inst alled, the current consumption for each power supply can be measured by connecting an ammeter to pin 1 and 2 of the jumper.
The jumper associated to each power supply is as follows:
JP1 for COREVDD JP2 for PLLVDD JP3 for HIOVDD JP4 for PIOVDD JP7 for CIO1VDD JP8 for CIO2VDD JP9 for SIOVDD
Figure 3-2: Configuration Jumper Locations (JP1-JP4 and JP7-JP9)
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Chapter 3 Installation and Configuration
JP5

JP5 - HIOVDD Source

JP5 is used to select the source for the HIOVDD supply voltage. When the jumper is at positi o n 1-2, the HIOVDD voltage must be provided to the H1 connector, pin 32. When the jumper is at position 2-3, the HIOVDD voltage is provided by the 3.3V power supply of the board.
Figure 3-3: Configuration Jumper Location (JP5)
10 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 3 Installation and Configuration
JP6

JP6 - PIOVDD Source

JP6 is used to select the source for the PIOVDD supply voltage. When the jumper is at position 1-2, the PIOVDD voltage must be provided to the H6 connector, pin 1. When the jumper is at position 2-3, the PIOVDD voltage is provided by the 3.3V power supply of the board.
Figure 3-4: Configuration Jumper Location (JP6)
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Chapter 4 Technical Description

Chapter 4 Technical Description

4.1 Power

4.1.1 Power Requirements

The S5U13719P00C100 evaluation board requires an external regulated power supply (3.3V at 1A). The power is supplied to the evaluation board through pin 5 of the P2 header, or pin 29 of the H1 header.
The green LED ‘3.3V Power’ is turned on when 3.3V power is applied to the board.

4.1.2 Voltage Regulators

The S5U13719P00C100 ev aluation board ha s on-board lin ear regulator s to provide t he different vol tage require d by the S1D13719 Mobile Graphics Engine. It also has a step-up switching voltage regulator to generate adjustable 12~25V, which can be used to power the LED backlight on some LCD panels.

4.1.3 S1D13719 Power

The S1D13719 Mobile Graphics Engine requires 1.8V and 2.5V or 3.0V power supplies.
COREVDD and PLLVDD use 1.8V power, which is provided by an on-board linear voltage regulator.
HIOVDD power can be selected with jumper JP5. When JP5 is set to the 2-3 position, HIOVDD is connected to
3.3V. If a different voltage is required for HIOVDD, set JP5 to the 1-2 position and connect the external power
supply to pin 32 of connector H1.
PIOVDD power can be selected with jumper JP6. When JP6 is s et to the 2-3 positio n, PIOVDD is connected to 3.3V. If a different volt age is neede d for PIOVDD becau se of the LCD panel r equirements, set JP6 to t he 1-2 pos ition and connect the external power supply to pin 1 of connector H6.
CIO1VDD is connected to 2 .7V, which is provided by an on-b oard lin ear regulat or, through a 0 ohm res istor, R 9. If it is desired to hav e a differen t voltage for CIO1VDD, R9 must be r emoved and the desired supp ly connect ed to pin 15 of connector H3.
CIO2VDD is connected to 2.7 V, whi ch is pr ovi ded by an on-board linear regulator, thro ugh a 0 ohm resistor, R10. If it is desir ed t o have a di ffer ent v oltage for CI O1VDD, R10 must b e remov ed and the desir ed su pply c onnect ed to pin 15 of connector H7.
SIOVDD is connected to PIOVDD through a 0 ohm resistor, R11. If it is desired to have a different voltage for SIOVDD, R11 must be removed and the desired supply connected to pin 4 of connector J1.
12 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 4 Technical Description

4.2 Clocks

The clock for the S1D13719 Mobile Graphics Engine is provided by a 32.768kHz osci llator.
The S5U13719P00C100 evaluati on board has a DIP14 footprint for an optional second oscillator, Y2. This is provided for cases requi ring a dif fere nt clock frequen cy for the S1D13719 Mobi le Graphics Engine. To use Y2, an oscillator must be populated in the Y2 footprint and the following board modifications must be made.
1. Remove R20 (33 ohm resistor, si ze 0402) to cut the output of Y1.
2. Populate R23 with a 33 ohm resistor, size 0402, to connect the output of Y2 to the CLKI input of the
S1D13719 Mobile Graphics Engine.

4.3 Reset

The S5U13719P00C100 evaluati on board can be reset using a push-button, or via an active low reset signal from the host development platform, on pin 30 of connector H1.
The reset signal will re set the S1D13719 Mobile Graph ics Engine and is also av ailable on the H3 and H7 conne ctors, so that camera modules connected to the board can be reset.

4.4 Host Interface

4.4.1 Direct Host Bus Interface Support

All S1D13719 host i nterface pins a re available on connector H1 a nd H2 which allows the S5U13719P00C100 e valu­ation board to be connected t o a variety of dev elopment platforms . For detailed S1D13 719 pin mapping, ref er to the S1D13719 Hardware Functional Specification, document number X59A-A-001-xx.
The following figure shows the loca tion of host bus con nector H1 and H2. H1 and H2 are 0.1x0. 1”, 34- pin head ers (17x2).
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Chapter 4 Technical Description
H2
H1
Figure 4-1: Host Bus Connector Location (H1 and H2)
For the pinout of connectors H1 and H2, see Section Chapter 6, “Schematic Diagrams” on page 23.

4.4.2 Connecting to the Epson S5U13U00P00C100 USB Adapter Board

The S5U13719P00C100 evaluation board is designed to connect to the S5U13U00P00C100 USB Adapter Board. The USB adapter board provides a simple connection to any computer via a USB 2.0 connection. The S5U13719P00C100 directly connects to the USB adapter board through connectors P1 and P2.
The USB adapter board also supplies the 3.3V power required by the S5U13719P00C100. HIOVDD should be selected for 3.3V and JP5 should be set to the 2-3 position.
When the S5U13719P00C100 is connected to the S5U13U00P00C100 USB Adapter board, there are 2 LEDs on S5U13719P00C100 which pro vid e a qu ick visual status of the USB adapter. LED1 blinks t o ind ic at e tha t t he USB adapter board is active. LED2 turns on to indicate that the USB has been enumerated by the PC.
The following diagram shows the location of connectors P1 and P2. P1 and P2 are 2mm x 2mm, 40-pin headers (20x2).
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Chapter 4 Technical Description
P1P2
Figure 4-2: USB Adapter Connector Locations (P1 and P2 - Board Bottom)
For the pinout of connectors P1 and P2, see Section Chapter 6, “Schematic Diagrams” on page 23.
A windows driver must be installed on the PC when the S5U13719P00C100 is used with the S5U13U00P00C100 USB Adapter Board. The S1D13xxxUSB driv er is available at www.erd.epson.com.
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Chapter 4 Technical Description

4.5 LCD Panel Interface

The LCD interface si gnals are avai lable on con nectors H4 an d H5. For S1D13719 LCD interface pi n mapping, ref er to the S1D13719 Hardware Functional Specification, document number X59A-A-001-xx.
On the evaluation board there is an adjustable 12~25V power supply. At 12V, the maximum current available is 100mA. At 25V, the maximum current available is 60mA. This power supply is intended to use to power the LED backlight on some LCD panels. The voltage is adjusted by the R36 pot.
For LCD panels that use CCFL backlight, an external power supply must be used to provide power to the inverter for CCFL backlight. Usually, the inverter current consumption is higher than the maximum 100mA current avail able from the on-board voltage regulator.
The following diagram shows the location of the LCD panel connectors H4 and H5. H4 and H5 are both 0.1x0.1”, 40-pin headers (20x2).
-
16 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 4 Technical Description
H4
H5

Figure 4-3: LCD Panel Connectors Locations (H4, H5)

For the pinout of connectors H4 and H5, see Section Chapter 6, “Schematic Diagrams” on page 23.
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Chapter 4 Technical Description
H7
H3
H6

4.6 Camera Interface

All the signals for the Camera1 interface are available on connector H3. All the signals for the Camera2 interface are available on connector H7.
Camera modules are programmed usin g an I2C ty pe bus . The S1D13719 does not have an I2C interface, but it has GPIOs that can be used to emulate the I2C bus. By default, the board uses GPIO17 as SCL signal of I2C bus and GPIO18 as SDA signal of I2C bus. If GPIO17 an d GPIO18 must be us ed f or so me othe r f unct io n, fo r exa mple SD Card interface, than GPIO1 can be selected for SCL by removing R38 and populating R37 with a 0Ω resistor, size
0402. GPIO2 can be selected for SDA by removing R44 and populating R43 with a 0Ω resistor, size 0402.
The I2C bus lines must be pulled hig h. The default configu ration of the eva luation board has th e I2C lines, SCL and SDA, pulled high to CIO1VDD. If the I2C lines must be pulled high to CIO2VDD, R34 and R41 must be removed and 2.2kΩ resistors, size 0402, must be mounted for R35 and R42.
The reset signal provided on H3 and H7 is active low and is pulled to HIOVDD when inactive.
The S1D13719 camera interface has a strobe output, CMSTROUT, that is available on H6 connector. Note that connector H6 is not populated on the S5U13719P00C100 evaluation board.
The following diagram shows the location of the camera connectors H3, H6 and H7. H3 and H7 are 0.1x0.1”, 20­pin headers (10x2). H6 is 0.1”, 6-pin header (6x1).

Figure 4-4: Camera Expansion Connector Locations (H3, H6 and H7)

For the pinout of connectors H3, H6 and H7, see Section Chapter 6, “Schematic Diagrams” on page 23.
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Chapter 4 Technical Description
J1
D1

4.7 SD Card Interface

The S1D13719 Mobile Graphics Engine has a SD Card interface. The S5U13719P00C100 evaluation board is designed with a SD Card socket, J1. Note that J1 socket and related components, R13-R19 and C37-39, are not populated on the S5U13719P00C100 evaluation board.
The SD Card interface has a gene ral purpose output pin GPIO19/ SDGPO, which is used to turn on a LED (D1) . Note that D1 LED and related components, U2, C42 and R21, are not populated on the S5U13719P00C100 evaluation board.
The following figure shows the location of the SD Card connector (J1) and the SD Card LED (D1).

Figure 4-5: SD Card J1 Connector Location

4.8 GPIO Connections

The S1D13719 Mobile Graphics Engine has 22 GPIO pins. Some GPIOs have multiple functions. The GPIO pins are routed to the connect ors o n the S5U13719P 00C100 evalua tion board. If a ny pin is c onfigu red a s a GPI O, it will be available on the connectors as listed below:
• GPIO[10:0] pins are routed to connector H5.
• GPIO[18:11] pins are rout ed to c onnector J1. Note that connector J1 is not po pul at ed on th e S5U13719P00C100
evaluation board.
• GPIO[19] pin is not routed to any conne cto r on th e boar d . It is r out ed onl y to pi n 2 of U2 footpr int on the boar d.
Note that U2 is not populated on the S5U13719P00C100 evaluation board.
• GPIO[21:20] pins are routed to connector H6. Note that connector H6 is not populated on the
S5U13719P00C100 evaluation board.
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Chapter 5 Parts List

Chapter 5 Parts List

Table 5-1: Parts List

Item Qty Reference Part Description Manufacturer Part No
C1,C2,C3,C4,C5,C6,
C13,C16,C17,C18,
1 24
2 18
3 1 C14 1nF C0402
4 1 C15 10uF C0805
5 0 C37 NP_10uF C0805
6 0 C38,C42 NP_0.1uF C0402
7 0 C39 NP_0.01uF C0402
8 2 C46,C48 4.7uF 10V T
9 2 C49,C51 1uF C0402
10 1 C53 2.2uF 10V
11 1 C54 10uF 35V
12 1 C55 150pF C0402
13 0 D1 NP_SD Card
14 3 D2,D3,D4
15 1 D5 MBR0540 SOD-123
16 1 F1 ACH32C-333-T
17 1 F2 ACF451832-222
18 2 H1,H2 HEADER_17X2
19 2 H3,H7 HEADER_10X2
C19,C20,C21,C22, C30,C31,C32,C36, C40,C43,C45,C47,
C50,C52
C7,C8,C9,C10,C11,
C12,C23,C24,C25, C26,C27,C28,C29, C33,C34,C35,C41,
C44
0.1uF C0402
0.01uF
CAP 10000PF 16V CERAMIC
X7R 0402 C0402
CAPACITOR TANT 4.7UF
10V 10% SMD C3528
CAP CER 2.2UF 10V X7R
0805 C0805
CAP CER 10UF 35V X5R
1210 C1206
LED GREEN SS TYPE LOW
CUR SMD LED0603
LED GREEN SS TYPE LOW
CUR SMD LED0603
FILTR 3TERM 10MHZ TO
300MHZ SMD
FILTER 3-TERM 60MHZ
300MA SMD
Yageo America
04022F104Z7B20D
Kemet
C0402C103K4RACTU
Yageo America
04022R102K9B20D
Panasonic - ECG ECJ-CV50J106M
Panasonic - ECG ECJ-2FB1A106K
Yageo America
04022F104Z7B20D
Kemet
C0402C103K4RACTU
Kemet
T494B475K010AT
Panasonic - ECG ECJ-0EB0J105M
Taiyo Yuden
LMK212BJ225KG-T
Taiyo Yuden
GMK325BJ106KN-T
Panasonic - ECG ECJ-0EC1H151J
Panasonic - SSG
LNJ308G8LRA
Panasonic - SSG
LNJ308G8LRA
Micro Commercial Co.
MBR0540-TP
TDK
ACH32C-333-T
TDK
ACF451832-222
Samtec
TSW-117-07-G-D
Samtec
TSW-110-07-G-D
20 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
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Chapter 5 Parts List
Table 5-1: Parts List
Item Qty Reference Part Description Manufacturer Part No
20 1 H4
21 1 H5
22 0 H6 AUX
23 7
JP1,JP2,JP3,JP4,
JP7,JP8,JP9
24 2 JP5,JP6
25 0 J1
26 2 L1,L2 Ferrite
27 1 L3 10uH
HEADER_20X2
Shrouded
HEADER_20X2
Shrouded
NP_DMM1AA-SF-
PEJ
LCD Connector
Extended LCD Connector
CONN HEADER VERT 6POS
.100 TIN or GENERIC
CONN HEADER VERT 2POS
.100 TIN or GENERIC SIP2
CONN HEADER VERT 3POS
.100 TIN or GENERIC SIP3
FERRITE 200MA 938 OHMS
0603 SMD R0603
COIL 10UH 1300MA CHOKE
SMD IND_ELL6
28 2 P1,P2 HEADER_20X2 HDR2X20/2MM
29 9
30 6
R1,R2,R3,R4,R5,R6,
R7,R8,R33
R9,R10,R11,R26,R2
7,R31
10k R0402
0 R0603
31 1 R12 150k 1% R0402
32 0
R13,R14,R15,R16,
R17,R18,R19
NP_47k R0402
33 1 R20 33 1% R0402
34 0 R21 NP_180 R0402
35 0
R22,R23,R35,R37,
R42,R43
NP R0402
36 4 R24,R25,R38,R44 0 R0402
37 3 R28,R29,R30 270 1% R0402
38 1 R32 120k R0402
39 1 R39 56k R0402
40 2 R34,R41 2.2k R0402
41 1 R36 200k
POT 200K OHM 3MM
CARBON TRIM SMD
42 1 R40 13.3k 1% R0402
43 9
SH1,SH2,SH3,SH4, SH5,SH6,SH7,SH8,
SH9
.100 in. Jumper
Shunt
JUMPER SHORTING TIN
44 1 SW1 SW8_DIPSW8 DIPSW8
45 1 SW2 SW TACT-SPST
46 2
TPGND1,
TP3.3VDD1
TP_SMT
SWITCH TACT SILVER PLT
GULLWING SW_EVQQW
PC TEST POINT MINIATURE
SMT TP_1206
Sullins Electronics Corp.
Samtec
TST-120-01-G-D
Samtec
TST-120-01-G-D
Hirose
DM1AA-SF-PEJ
Steward
HZ0603B751R-10
Panasonic - ECG
ELL-6SH100M
3M
151240-8422-RB
Panasonic - ECG
EVN-5ESX50B25
STC02SYAN
ITT Industries
KSC241GLFS
Keystone
5015
S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 21
Page 22
Chapter 5 Parts List
Table 5-1: Parts List
Item Qty Reference Part Description Manufacturer Part No
47 1 U1 S1D13719PFBGA
48 0 U2 NP_74LVC1G126
49 1 U3 TPS76918DBVR
50 1 U4 TPS76927DBVT
51 1 U5 LM2733Y
52 1 Y1 32.768kHz OSC
53 0 Y2 14-Pin DIP
IC BUS BUFFER GATE 3-ST
SOT-23-5
IC 1.8V 100MA LDO REG
SOT-23-5
IC 2.7V 100MA LDO REG
SOT-23-5
IC CONV BOOST 40V FET
SW SOT23-5
OSC 32.768KHZ 523PPM
SMD
Texas Instruments
SN74LVC1G126DBVR
Texas Instruments
TPS76918DBVR
Texas Instruments
TPS76927DBVT
National Semiconductor
LM2733YMF/NOPB
Epson
SG-3030JC 32.7680KB3:ROHS
AMP
2-641609-1
22 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
Page 23

Chapter 6 Schematic Diagrams

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FPDAT12
FPDAT0
DB12
FPDAT13
DB10
FPDAT15
FPDAT4
DB13
AB16
AB17
FPDAT7
DB8
DB2
AB5
FPDAT16
DB14
AB15
AB8
AB6
FPDAT9
FPDAT5
DB15
DB9
FPDAT8
DB11
AB12
AB11
AB4
FPDAT11
FPDAT2
DB3
FPDAT17
AB7
FPDAT3
AB1
FPDAT10
FPDAT6
DB6
DB5
DB1
AB13
AB3
AB18
FPDAT14
FPDAT1
AB14
DB7
DB0
AB2
AB10
DB4
AB9
1.8VDD
CORE
HIOVDD
HIO
PIOVDD
PIO
SIOVDD
SIO
CIO2VDD
CIO2
CIO1VDD
CIO1
1.8VDD
PLL
PIOVDD
HIOVDD_IN
3.3VDD
HIOVDD
PIOVDD_IN
3.3VDD
PIOVDD
2.7VDD 2.7VDD PIOVDD
SIOCIO1PLL
CORE CIO2HIO PIO
FPDAT[17:0]
4
FPFRAME
4
FPLINE4FPSHIFT4DRDY
4
AB[18:1]3
DB[15:0]
3
BE1#
3
BE0#
3
GPIO21
4
CLKI
2
INT
3
RESET#
2,3,4
WAIT#3
CS#3M/R#3RD#
3
FPCS1#
4
FPCS2#4FPSCK4FPA04FPSO
4
FPVIN14FPVIN2
4
GPIO20
4
GPIO104GPIO94GPIO84GPIO74GPIO64GPIO54GPIO44GPIO34GPIO24GPIO14GPIO0
4
GPIO11/SDDAT02GPIO12/SDDAT12GPIO13/SDDAT22GPIO14/SDDAT32GPIO15/SDCMD2GPIO16/SDCLK2GPIO17/SDCD#
2,4
GPIO18/SDWP 2,4
GPIO19/SDGPO 2
SCS#3SCK3SA03SI
3
WE#
3
CM1DAT0
4
CM1VREF4CM1HREF4CM1CLKIN
4
CM1CLKOUT
4
CM1DAT14CM1DAT24CM1DAT34CM1DAT44CM1DAT54CM1DAT64CM1DAT7
4
CM2DAT14CM2DAT24CM2DAT34CM2DAT44CM2DAT54CM2DAT64CM2DAT7
4
CM2DAT0
4
CM2VREF4CM2HREF4CM2CLKIN
4
CM2CLKOUT4CMSTROUT
4
Title
Size Document Number Rev
Date:
Sheet of
<Doc> 1.0
S1D13719 PFBGA-180
C
14Wednesday, October 17, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
S1D13719 PFBGA-180
C
14Wednesday, October 17, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
S1D13719 PFBGA-180
C
14Wednesday, October 17, 2007
Place a 0.01uF and a 0.1uF cap on each COREVDD
and OSCVDD power pin of the S1D13719
Place a 0.01uF and a 0.1uF cap on each
HIOVDD power pin of the S1D13719
Place a 0.01uF and a 0.1uF cap on each
PIOVDD power pin of the S1D13719
Place a 0.01uF and a 0.1uF cap on each
SIOVDD power pin of the S1D13719
Place a 0.01uF and a 0.1uF cap on each
CIO2VDD power pin of the S1D13719
Place a 0.01uF and a 0.1uF cap on each
CIO1VDD power pin of the S1D13719
SH5
.100 in. Jumper Shunt
SH5
.100 in. Jumper Shunt
C9
0.01uFC90.01uF
C22
0.1uF
C22
0.1uF
R4
10kR410k
C28
0.01uF
C28
0.01uF
L1
FerriteL1Ferrite
C6
0.1uFC60.1uF
C8
0.01uFC80.01uF
R5
10kR510k
R10
0
R10
0
C21
0.1uF
C21
0.1uF
C27
0.01uF
C27
0.01uF
R6
10kR610k
C5
0.1uFC50.1uF
C7
0.01uFC70.01uF
JP6
PIOVDD SOUR CE
JP6
PIOVDD SOUR CE
123
R7
10kR710k
C12
0.01uF
C12
0.01uF
C26
0.01uF
C26
0.01uF
C20
0.1uF
C20
0.1uF
JP7
CIO1VDD
JP7
CIO1VDD
1
2
C32
0.1uF
C32
0.1uF
R8
10kR810k
JP4
PIOVDD
JP4
PIOVDD
1
2
JP2
PLLVDD
JP2
PLLVDD
1
2
C4
0.1uFC40.1uF
SH6
.100 in. Jumper Shunt
SH6
.100 in. Jumper Shunt
SH7
.100 in. Jumper Shunt
SH7
.100 in. Jumper Shunt
SH4
.100 in. Jumper Shunt
SH4
.100 in. Jumper Shunt
SH2
.100 in. Jumper Shunt
SH2
.100 in. Jumper Shunt
C35
0.01uF
C35
0.01uF
C11
0.01uF
C11
0.01uF
R1
10kR110k
C19
0.1uF
C19
0.1uF
C25
0.01uF
C25
0.01uF
C14
1nF
C14
1nF
L2
FerriteL2Ferrite
C3
0.1uFC30.1uF
R2
10kR210k
R11
0
R11
0
C24
0.01uF
C24
0.01uF
JP3
HIOVDD
JP3
HIOVDD
1
2
R3
10kR310k
C18
0.1uF
C18
0.1uF
C31
0.1uF
C31
0.1uF
C30
0.1uF
C30
0.1uF
SH3
.100 in. Jumper Shunt
SH3
.100 in. Jumper Shunt
C2
0.1uFC20.1uF
C13
0.1uF
C13
0.1uF
JP1
COREVDD
JP1
COREVDD
1
2
JP8
CIO2VDD
JP8
CIO2VDD
1
2
JP9
SIOVDD
JP9
SIOVDD
1
2
C34
0.01uF
C34
0.01uF
SH1
.100 in. Jumper Shunt
SH1
.100 in. Jumper Shunt
C17
0.1uF
C17
0.1uF
C23
0.01uF
C23
0.01uF
C15
10uF
C15
10uF
SH8
.100 in. Jumper Shunt
SH8
.100 in. Jumper Shunt
SH9
.100 in. Jumper Shunt
SH9
.100 in. Jumper Shunt
C1
0.1uFC10.1uF
C33
0.01uF
C33
0.01uF
C10
0.01uF
C10
0.01uF
JP5
HIOVDD SOURCE
JP5
HIOVDD SOURCE
123
SW1
SW8_DIPSW8
SW1
SW8_DIPSW8
1234567
8
16151413121110
9
U1
S1D13719PFBGAU1S1D13719PFBGA
AB1
A4
AB2B5AB3
C5
AB4
E6
AB5A5AB6B6AB7
C6
AB8
B7
AB9
D7
AB10
E7
AB11A7AB12B8AB13
C7
AB14D8AB15C2AB16C3DB0
E4
DB1
D2
DB2
E3
DB3A8DB4
C8
DB5
B9
DB6A9DB7B2DB8
D4
DB9
A2
DB10E5DB11B4DB12
C4
DB13
A3
DB14F5DB15
D5
CLKI
A12
CS#
B13
M/R#
B12
INT
D1
RD#
B10
WE#
C10
BE0#
B11
BE1#
A11
RESET#
E1
WAIT#
C9
CNF0
K6
CNF1K9CNF2
L9
FPDAT0
L3
FPDAT1N1FPDAT2K4FPDAT3P2FPDAT4N2FPDAT5N3FPDAT6M3FPDAT7L6FPDAT8L2FPDAT9
M6
FPDAT10M8FPDAT11L8FPDAT12P8FPDAT13N8FPDAT14M7FPDAT15M4FPDAT16L7FPDAT17
N6
FPFRAME
P3
FPLINE
P4
FPSHIFT
P5
DRDY
M1
GPIO18/SDWP
F2
GPIO19/SDGPOF1GPIO20
P11
GPIO21
N11
TESTEN
K1
PLLVSS
C1
2
VSS
P
9
VSS
M
5
VSS
L1
1
VSS
K
2
VSS
J
2
VSS
H1
0
HIOVDD
F
4
PIOVDD
H
4
COREVDD
E
9
VCP
D12
AB17
C1
SCS#
A10
SCLK
D10
SA0
E2SIF3
FPCS1#
N5
FPCS2#
M2
FPSCLK
K7
FPA0
P7
FPSO
M9
FPVIN1J4FPVIN2
K3
SCANEN
L4
CM1DAT0
K11
CM1DAT1
K12
CM1DAT2
K13
CM1DAT3
L14
CM1DAT4
K10
CM1DAT5
L12
CM1DAT6
M14
CM1DAT7
L13
CM1VREF
J12
CM1HREF
H11
CM1CLKOUT
J13
CM1CLKIN
K14
CMSTROUT
N14
PLLVDD
E1
1
COREVDD
K
8
COREVDD
H
1
3
COREVDD
E
8
C
IO1VDD
J1
1
VSS
B
1
VSS
B1
4
HIO
VDD
A
6
HIOVDD
D
9
PIOVDD
J
3
SIOVDD
G
5
COREVDD
D1
1
COREVDD
D
6
PIOVDD
M1
0
CNF3
J5
CNF4
L5
CNF5
K5
CNF6
H5
PIOVDD
P
6
NC
A1NCA13NCA14NCB3NCC11
NCP1NC
P14NCN9NCN7NCN4NCJ14NCJ1NCG10NCF12
CNF7
J10
CM2DAT0
E13
CM2DAT1
E12
CM2DAT2
F10
CM2DAT3
E14
CM2DAT4
F11
CM2DAT5
G12
CM2DAT6
F13
CM2DAT7
F14
CM2VREF
G13
CM2HREF
H12
CM2CLKOUT
G14
CM2CLKIN
H14
GPIO17/SDCD#
G3
GPIO16/SDCLKG2GPIO15/SDCMDG1GPIO14/SDDAT3
H3
GPIO13/SDDAT2H2GPIO12/SDDAT1H1GPIO11/SDDAT0
G4
GPIO10
N10
GPIO9
P10
GPIO8
N12
GPIO7
P12
GPIO6
M11
GPIO5
M12
GPIO4
M13
GPIO3
P13
GPIO2
N13
GPIO1
L10
GPIO0
L1
CIO2VDD
G1
1
VSS
E1
0
AB18
D3
OSCKMI
D13
OSCMO
D14
OSCKO
C14
OSCKI
C13
R9
0R90
C16
0.1uF
C16
0.1uF
C29
0.01uF
C29
0.01uF
Chapter 6 Schematic Diagrams
S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 23

Figure 6-1: S5U13719P00C100 Schematics (1 of 4)

Page 24
Chapter 6 Schematic Diagrams
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HIOVDD
HIOVDD
HIOVDD
SIOVDD
SIOVDD
SIOVDD
SIOVDD
3.3VDD
1.8VDD
3.3VDD
2.7VDD
RESET# 1,3,4
CLKI
1
GPIO14/SDDAT3 1
GPIO13/SDDAT21GPIO12/SDDAT11GPIO11/SDDAT01GPIO16/SDCLK1GPIO15/SDCMD
1
GPIO19/SDGPO 1
GPIO18/SDWP 1,4
GPIO17/SDCD#1,4
Title
Size Document Number Rev
Date:
Sheet of
<Doc> 1.0
SD Card / Clocks / Reset / 1.8V Supply
B
24Wednesday, October 17, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
SD Card / Clocks / Reset / 1.8V Supply
B
24Wednesday, October 17, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
SD Card / Clocks / Reset / 1.8V Supply
B
24Wednesday, October 17, 2007
TTL/CMOS
Oscillator
C44
0.01uF
C44
0.01uF
C45
0.1uF
C45
0.1uF
R18
NP_47k
R18
NP_47k
C37
NP_10uF
C37
NP_10uF
U2
NP_74LVC1G126U2NP_74LVC1G126
2
1
4
5
3
U4
TPS76927DBVTU4TPS76927DBVT
Vin
1
GND2/EN
3
Vout
5
NC/FB
4
C38
NP_0.1uF
C38
NP_0.1uF
U3
TPS76918DBVRU3TPS76918DBVR
Vin
1
GND2/EN
3
Vout
5
NC/FB
4
R25 0R25 0
C39
NP_0.01uF
C39
NP_0.01uF
C43
0.1uF
C43
0.1uF
TP2TP2
R17
NP_47k
R17
NP_47k
R15
NP_47k
R15
NP_47k
+
C48
4.7uF 10V T
+
C48
4.7uF 10V T
12
TP1TP1
R21
NP_180R21 NP_180
SW2
SW TACT-SPST
SW2
SW TACT-SPST
2
4 3
1
R24 0R24 0
R22
NPR22 NP
Y1
32.768kHz OSCY132.768kHz OSC
VIO
1
OUT
3
GND
2
VDD
4
R12
150k 1%
R12
150k 1%
+
C46
4.7uF 10V T
+
C46
4.7uF 10V T
12
D1
NP_SD CardD1NP_SD Card
R23
NPR23 NP
R20
33 1%R20 33 1%
R19
NP_47k
R19
NP_47k
C41
0.01uF
C41
0.01uF
TP4TP4
TP3TP3
C40
0.1uF
C40
0.1uF
J1
NP_DMM1AA-SF-PEJJ1NP_DMM1AA-SF-PEJ
SDDAT3
1
SDCMD2GND3VDD4SDCLK5GND6SDDAT07SDDAT18SDDAT29SDWP
10
CDIN11GND
12
C36
0.1uF
C36
0.1uF
R16
NP_47k
R16
NP_47k
R14
NP_47k
R14
NP_47k
R13
NP_47k
R13
NP_47k
C42
NP_0.1uF
C42
NP_0.1uF
Y2
14-Pin DIPY214-Pin DIP
OE
1
OUT
8
GND
7
VDD
14
C47
0.1uF
C47
0.1uF

Figure 6-2: S5U13719P00C100 Schematics (2 of 4)

24 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
Page 25
Chapter 6 Schematic Diagrams
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AB17
WE#
DB12
ENUMERATED
DB12
DB14
BE1#
DB14
DB4
DB6
WAIT#
RD#
DB15
DB9
DB11
DB5
DB7
AB18
DB13
AB1
DB13
DB15
AB16
DB11
DB0
AB2
DB9
AB14
DB2
AB12
DB4
CS#
RD#
AB2
AB10
DB6
DB0
DB2
DB1
DB3
AB4
M/R#
INT
INT
AB8
CS#
DB1
AB6
AB7
AB17
AB9
AB15
AB13
AB11
AB8
AB10
AB12
AB14
AB4
AB6
AB18
AB16
M/R#
AB3
AB7
AB5
DB3
AB9
AB5
DB5
AB11
HEARTBEAT
ENUMERATED
AB3
DB7
BE1#
WAIT#
AB13
BE0#
DB8
AB1
AB15
DB10
DB8
DB10
WE#
BE0#
HEARTBEAT
WAIT#
3.3VDD
3.3VDD
HIOVDD_IN
3.3VDD
HIOVDD
HIOVDD
SI
1
SA01
DB[15:0]
1
RD#
1
CS#
1
M/R#
1
INT
1
SCS#
1
SCK
1
BE1#1RESET#
1,2,4
WAIT#
1
WE#
1
BE0#
1
AB[18:1]
1
Title
Size Document Number Rev
Date:
Sheet of
<Doc> 1.0
Host connectors
B
34Wednesday, May 06, 2009
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
Host connectors
B
34Wednesday, May 06, 2009
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
Host connectors
B
34Wednesday, May 06, 2009
This resist or does not ha ve a
footprint on the PCB rev1.0.
It was added on PCB rev1.1.
D4
3.3V PowerD43.3V Power
AK
R107 0R107 0
R45
120k
R45
120k
P1
HEADER_20X2P1HEADER_20X2
2468101214161820222426283032343638
40
13579
111315171921232527293133353739
R108 0R108 0
R29
270 1%
R29
270 1%
H1
HEADER_17X2H1HEADER_17X2
246810121416182022242628303234
13579
1113151719212325272931
33
TP5TP5
D3
LED2D3LED2
AK
TP3.3VDD1
TP_SMT
TP3.3VDD1
TP_SMT
1
D2
LED1D2LED1
AK
P2
HEADER_20X2P2HEADER_20X2
2468101214161820222426283032343638
40
13579
111315171921232527293133353739
H2
HEADER_17X2H2HEADER_17X2
246810121416182022242628303234
13579
1113151719212325272931
33
R28
270 1%
R28
270 1%
TPGND1
TP_SMT
TPGND1
TP_SMT
1
R197
270 1%
R197
270 1%

Figure 6-3: S5U13719P00C100 Schematics (3 of 4)

S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 25
Page 26
Chapter 6 Schematic Diagrams
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
I2C_SDA
RESET#
RESET#I2C_SCL
I2C_SDA
I2C_SCL
I2C_SCL
I2C_SDA
FPDAT4
FPDAT2
FPDAT3
FPDAT1
FPDAT0
FPDAT6
FPDAT9
FPDAT5
FPDAT8
FPDAT7
FPDAT11
FPDAT10
FPDAT14
FPDAT13
FPDAT12
FPDAT15
FPDAT16
FPDAT17
CIO2VDD
CIO1VDD
CIO1VDD
CIO1VDD CIO2 V DD
CIO2VDD
CIO1VDD
CIO2VDD
VBACKLIGHT
PIOVDD
VBACKLIGHT
PIOVDD_IN
PIOVDD
3.3VDD
CM2CLKOUT
1
RESET# 1,2,3
CM1CLKOUT
1
GPIO9
1
FPSO
1
GPIO81
GPIO71GPIO61GPIO51GPIO4
1
FPVIN1
1
FPLINE
1
FPFRAME1FPSHIFT1DRDY
1
FPDAT[17:0]
1
GPIO0
1
GPIO11GPIO2
1
FPCS1#
1
GPIO3
1
FPCS2#1FPSCK1FPA0
1
FPVIN2
1
GPIO10
1
CMSTROUT
1
GPIO1 1
GPIO17/SDCD# 1,2
GPIO18/SDWP 1,2
GPIO2 1
CM2DAT0
1
CM2DAT21CM2DAT41CM2DAT61CM2CLKIN
1
CM1DAT21CM1DAT41CM1DAT61CM1CLKIN1CM1DAT0
1CM1DAT11
CM1DAT31CM1DAT51CM1DAT71CM1VREF1CM1HREF
1
CM2DAT7 1
CM2VREF1CM2HREF
1
CM2DAT11CM2DAT31CM2DAT5
1
GPIO21
1
GPIO20
1
Title
Size Document Number Rev
Date:
Sheet of
<Doc> 1.0
LCD and Camera/GPIO connectors
B
44Wednesday, August 20, 2008
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
LCD and Camera/GPIO connectors
B
44Wednesday, August 20, 2008
Title
Size Document Number Rev
Date: Sheet of
<Doc> 1.0
LCD and Camera/GPIO connectors
B
44Wednesday, August 20, 2008
Place these capacitors close
to pin 15 of the header.
Place these capacitors close
to pin 15 of the header.
Adjustable Step Up Power Supply
12V@100mA to 25V@60mA
Vout=1.23x[1+(R17+R20)/R19] (V)
R39
56k
R39
56k
R43
NPR43 NP
F1
ACH32C-333-TF1ACH32C-333-T
1
2
3
C51
1uF
C51
1uF
H4
LCD ConnectorH4LCD Connector
2468101214161820222426283032343638
40
13579
111315171921232527293133353739
R41
2.2k
R41
2.2k
C52
0.1uF
C52
0.1uF
L3
10uHL310uH
R35
NP
R35
NP
R36
200k
R36
200k
13
2
H7
CAM2H7CAM2
13579
1113151719
24681012141618
20
R34
2.2k
R34
2.2k
R32
120k
R32
120k
D5
MBR0540D5MBR0540
A K
F2
ACF451832-222F2ACF451832-222
1
2
3
H6
AUXH6AUX
12345
6
R37 NPR37 NP
C53
2.2uF 10V
C53
2.2uF 10V
R42NPR42
NP
U5
LM2733YU5LM2733Y
VIN
5
/SHDN
4
GND
2SW1FB3
C49
1uF
C49
1uF
C54
10uF 35V
C54
10uF 35V
H3
CAM1H3CAM1
13579
1113151719
24681012141618
20
R33
10k
R33
10k
C50
0.1uF
C50
0.1uF
R31
0R31 0
H5
Extended LCD ConnectorH5Extended LCD Connector
2468101214161820222426283032343638
40
13579
111315171921232527293133353739
TP6TP6
R38
0R38 0
C55
150pF
C55
150pF
R40
13.3k 1%
R40
13.3k 1%
R44
0R44 0

Figure 6-4: S5U13719P00C100 Schematics (4 of 4)

26 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
Page 27

Chapter 7 S5U13719P00C100 Board Layout

Chapter 7 S5U13719P00C100 Board Layout

Figure 7-1: S5U13719P00C100 Board Layout - Top View

S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 27
Page 28
Chapter 7 S5U13719P00C100 Board Layout

Figure 7-2: S5U13719P00C100 Board Layout - Bottom View

28 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
Page 29

Chapter 8 References

Chapter 8 References

8.1 Documents

• Epson Research and Development, Inc., S1D13719 Hardware Functional Specification, document number
X59A-A-001-xx.

8.2 Document Sources

• Epson Research and Development Website: http://www.erd.epson.co m.
S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1) EPSON 29
Page 30

Chapter 9 Change Record

Chapter 9 Change Record
X59A-G-003-01 Revision 1.1
- Issued: May 6, 2009
• chapter 6 Schematic Diagrams - update all schematic diagrams wit new diagrams
X59A-G-003-01 Revision 1.0
- Issued: January 14, 2008
• Initial release of this manual
X59A-G-003-00 Revision 0.01
- Issued: October 19, 2007
• Initial dr aft of this manual
30 EPSON S5U13719P00C100 Evaluation Board User Manual (Rev. 1.1)
Page 31
International Sales Operations
AMERICA
EPSON ELECTRO NICS AMERICA, INC.
2580 Orchard Parkway San Jose, CA 95131,USA Phone: +1-800-228-3964 FAX: +1-408-922-0238
EUROPE
EPSON EUROPE ELECT RONICS GmbH
Riesstrasse 15, 80992 Munich, GERMANY Phone: +49-89-14005-0 FAX: +49-89-14005-110
ASIA
EPSON (CHINA) CO., LTD.
7F, Jinbao Bldg., No.89 Jinbao St.,
Dongcheng District,
Beijing 100005, CHINA Phone: +86-10-6410-6655 FAX: +86-10-6410-7320
SHANGHAI BRANCH
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SHENZHEN BRANCH
12F, Dawning Mansion, Keji South 12th Road, Hi-Tech Park, Shenzhen 518057, CHINA Phone: +86-755-2699-3828 FAX: +86-755-2699-3838
EPSON HONG KONG LTD.
20/F, Harbour Centre, 25 Harbour Road Wanchai, Hong Kong Phone: +852-2585-4600 FAX: +852-2827-4346 Telex: 65542 EPSCO HX
EPSON TAIWAN TECHNOLOGY & TRADING LTD.
14F, No. 7, Song Ren Road, Taipei 110, TAIWAN Phone: +886-2-8786-6688 FAX: +886-2-8786-6660
EPSON SINGAPORE PTE., LTD.
1 HarbourFront Place, #03-02 HarbourFront Tower One, Singapore 098633 Phone: +65-6586-5500 FAX: +65-6271-3182
SEIKO EPSON CORP. KOREA OFFICE
50F, KLI 63 Bldg., 60 Yoido-dong Youngdeungpo-Ku, Seoul, 150-763, KOREA Phone: +82-2-784-6027 FAX: +82-2-767-3677
SEIKO EPSON CORP. SEMICONDUCTOR OPERATIONS DIVISION
IC Sales Dept. IC International Sales Group
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone: +81-42-587-5814 FAX: +81-42-587-5117
Document Code: X59A-G-001-01
First Issue January 14, 2008
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