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4EPSONS5U13517P00C100 Evaluation Board User Manual (Rev. 1.0)
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S1D13517 Display Controller
Chapter 1 Introduction
This manual describes the setup and operation of the S5U13517P00C100 Evaluation Board. The evaluation board
is designed as an evaluation platform for the S1D13517
Display Controller.
The S5U13517P00C100 evaluation board can be used with many native platforms via the host connector which
provides the appropriate signals to support a variety of CPUs. The S5U13517P00C100 evaluation board can also
connect to the S5U13U00P00C1 00 USB Adapter bo ard so that i t can be use d with a laptop or desktop comput er, via
USB 2.0.
This user manual is updated as appropriate. Please check the Epson Research and Development Website at
www.erd.epson.com for the latest revision of this document before beginning any development.
We appreciate your comments on our docu mentation. Please conta ct us via email at documentation@e rd.epson.com.
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Chapter 2 Features
The S5U13517P00C100 Evaluation Board includes the following features:
• S1D13517 Display Controller (128-pin QFP)
• Integrated Silicon Solution, Inc. IS42S16800E-7TLI 128M-bit SDRAM (54-pin TSOP)
• Header with all S1D13517 Host Bus Interface signals
• Headers for connection to the S5U13U00P00C100 USB Adapter board
• Headers for connecting to LCD panels
• Header for S1D13517 GPO pins and PWM pin
• On-board 24MHz oscillator
• 14-pin DIP socket (if a clock other than 24MHz must be used)
• 3.3V input power
• On-board voltage regulator with 2.5V output
• On-board voltage r egu lator with adjust abl e 6~24V output, 40mA max., t o provide power for LED backlight of
LCD panels.
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S1D13517 Display Controller
DIP Switch
SW1
Chapter 3 Installation and Configuration
The S5U13517P00C100 evaluatio n board incor porates a DIP switch, jumper s, and 0 ohm resi stors which all ow it to
be used with a variety of different configurations.
3.1 Configuration DIP Switch
The S1D13517 has 2 configuration inputs (CNF[1:0]). A DIP switch (SW1) is used to configure CNF[1:0] as
described below.
Table 3-1: Summary of Power-On/Reset Options
SDU13517P00C100
SW1-[2:1] Config
SW1-[1]CNF0Host data bus is 8-bitHost data bus is 16-bit
SW1-[2]CNF1Host interface is ALE busHost interface is i80 bus
S1D13517
CNF[1:0] Config
= Required settings when using S5U13U00P00C100 USB Adapter board
1 (ON)0 (OFF)
Power-On/Reset State
The following figure shows the location of DIP switch SW1 on the S5U13517P00C100 board.
J1, J2, J3 can be used to measure the current consumption of each S1D13517 power supply.
When the jumper is at position 1-2, normal operation is selected.
When no jumper is installed, the current consumption for each power supply can be measured by connecting an
ammeter between pins 1 and 2 of the jumper.
The jumper associated with each power supply is as follows:
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S1D13517 Display Controller
J4
J5
J6
J4 - IOVDD Source
J4 is used to select the source for the IOVDD supply voltage.
When the jumper is at position 1-2, the IOVDD voltage is provided by the 3.3V power supply of the board.
When the jumper is at position 2-3, the IOVDD voltage must be provided to the CN1 connector, pin 32.
J5 - 24MHz Control
J5 is used to control the 24MHz oscillator.
When no jumper is installed, the 24MHz oscillator is running.
When the jumper is at position 1-2, the 24MHz oscillator is stopped.
J6 - Clock Source
J6 is used to select the source for the clock input.
When the jumper is at position 1-2, the on board 24MHz oscillator is selected.
When the jumper is at position 3-4, the second oscillator is selected.
When the jumper is at position 5-6, the CLKI pin is forced to GND.
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Chapter 4 Technical Description
4.1 Power
4.1.1 Power Requirements
The S5U13517P00C100 eval ua ti on boar d requires an exter nal regulated power sup ply ( 3.3V / 0.5A). The power is
supplied to the evaluation board through pin 34 of the CN1 header, or pin 5 of the P2 header.
The green LED ‘3.3V Power’ is turned on when 3.3V power is applied to the board.
4.1.2 Voltage Regulators
The S5U13517P00C100 evaluation board has an on-board linear regulator to provide the 2.5V power required by
the S1D13517 Display Controller. It also has a step-up switching voltage regulator to generate adjustable 6~24V,
which can be used to power the LED backlight on some LCD p anels.
4.1.3 S1D13517 Power
The S1D13517 Display Controller requires 2.5V and 3.0~3.6V power supplies.
2.5V power for COREVDD and PLLVDD is provided by an on-board linear voltage regulator.
IOVDD can be in the range of 3.0~3.6V. When J4 is set to the 1-2 position, IOVDD is connected to 3.3V. If a
different voltage i s required f or IOVDD, set JP4 to t he 2-3 pos ition and co nnect the externa l power sup ply to pin 3 2
of connector CN1.
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Y2
SW2
4.2 Clocks
The clock for the S1D13517 Display Controller is provided by a 24MHz oscillator.
The S5U13517P00C100 evaluation board has a DIP14 footprint for an optional second oscillator, Y2. This is
provided for cases re qui ri ng a diffe ren t cl oc k fr equency for the S1D13517 Display Controller. To use Y2, an oscil
lator must be populated in the Y2 footprint and the J6 jumper placed at position 3-4.
4.3 Reset
The S1D13517 Display Controller on the S5U13517P00C100 evaluation board can be reset using a push-button
(SW2), or via an active low reset signal from the host development platform (pin 33 on the CN1 connector).
-
Figure 4-1: Second oscillator and Reset switch Location (Y2, SW2)
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CN1
4.4 Host Interface
4.4.1 Direct Host Bus Interface Support
All S1D13517 host inte rface pins are a vaila ble o n connec tor CN1 which a llows th e S5 U13517P00C100 ev aluat ion
board to be connected to a variety of development platforms.
The following figure shows the location of host bus connector CN1. CN1 is a 0.1x0.1 inch 34-pin header (17x2).
Figure 4-2: Host Bus Connector Location (CN1)
For the pinout of connector CN1, see Chapter 6, “Schematic Diagrams” on page 18.
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S1D13517 Display Controller
P1
P2
4.4.2 Connecting to the Epson S5U13U00P00C100 USB Adapter Board
The S5U13517P00C100 evaluat ion board is desi gned to connect to a S 5U13U00P00C100 USB Adapter Board. The
USB adapter board provides a simple connection to any computer via a USB 2.0 connection. The
S5U13517P00C100 directly connects to the USB adapter board through connectors P1 and P2.
The USB adapter board also supplies the 3.3V power required by the S5U13517P00C100. IOVDD should be
selected for 3.3V and J4 should be set to the 1-2 position.
When the S5U13517P00C100 is connected to the S5U13U00P00C100 USB Adapter board, there are 2 LEDs on
S5U13517P00C100 which provide a qui ck vi sua l stat us of t he USB ada pt er. LED1 bli nks to i ndi cat e t hat th e USB
adapter board is active. LED2 turns on to indicate that the USB has been enumerated by the PC.
The following diagram shows the location of connectors P1 and P2. P1 and P2 are 40-pin headers (20x2).
Figure 4-3: USB Adapter Connector Locations (P1 and P2)
For the pinout of connectors P1 and P2, see Chapter 6, “Schematic Diagrams” on page 18.
A windows driver must be installed on the PC when the S5U13517P00C100 is used with the S5U13U00P00C100
USB Adapter Board. The S1D13xxxUSB driver is available at www.erd.epson.com.
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CN5
CN3
4.5 LCD Panel Interface
The LCD interface signals are available on connectors CN3 and CN5.
Connector CN3 is 0.1x0.1 inch 40-pin header (20x2) and connector CN5 is 0.1x0.1 inch 10-pin header (5x2). For
the pinout of connectors CN3 and CN5, see
On the evaluation board there is an adjust abl e 6~2 4V, 40mA max. power suppl y. This vol ta ge is pr ovi ded onl y on
connector CN3 (it is not used elsewhere on the board). It is intended for use to power the LED backlight on some
LCD panels. The voltage is adjusted by the VR1 pot.
For LCD panels that use a CCFL backlight, an ex ternal power supp ly must be used to pro vide power to the inverter
for the CCFL backlight. Usually, the inverter current consumption is higher than the maximum 40mA current
available from the on-board voltage regulator.
The following diagram shows the location of the LCD panel connectors CN3 and CN5.
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CN4
4.6 GPO and PWM Connections
The S1D13517 Display Controller has 4 GPO pins and PWM pin. All the GPO pins and PWM pin ar e routed to th e
CN4 connector. Connector CN4 is 0.1x0.1 inch 10-pin header (5x2).
The following figure shows the location of the GPO and PWM connector, CN4.
Figure 4-5: GPIO and PWM Connector Location (CN4)
For the pinout of connector CN4, see Chapter 6, “Schematic Diagrams” on page 18.
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