Epson RTC-72423, RTC-72421 B, RTC-72421 A, RTC-72423 A User Manual

MQ162-03

Application Manua

Real Time Clock Module

RTC-72421/72423

Model Product Number RTC-72421 A Q4272421x000100

RTC-72421 B Q4272421x000200 RTC-72423 A Q4272423x000600

l

RTC-72423 Q4272423x000700

s

I

E

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RTC - 72421 / 72423

CONTENTS

 Overview............................................................................................. 1

 Block diagram..................................................................................... 1

 Terminal connections.......................................................................... 2

 Terminal functions............................................................................... 3

 Characteristics.................................................................................... 4

1. Absolute maximum ratings........................................................................................4

2. Recommended operating conditions......................................................................... 4

3. Frequency characteristics and current consumption characteristics..........................4

4. Electrical characteristics ( DC characteristics ) .........................................................4

 Switching characteristics

1. When ALE is used....................................................................................................5

2. When ALE is fixed at VDD.........................................................................................6

(AC characteristics)

........................................... 5

 Registers............................................................................................. 7

1. Register table............................................................................................................7

2. Notes........................................................................................................................7

3. Functions of register bits (overview)..........................................................................7

4. Setting the fixed-period pulse output mode and fixed-period interrupt mode.............8

5. Resetting the fixed-period pulse output mode and fixed-period interrupt mode......... 8

 Register description............................................................................ 9

1. Timing registers........................................................................................................9

2. CD register (control register D)............................................................................... 10

3. CE register (control register E)................................................................................11

4. CF register (control register F)................................................................................13

 Using the RTC-72421/RTC-72423.....................................................14

1. Power-on procedure (initialization)..........................................................................14

2. Read/write of S1 to W registers.............................................................................. 16

3. Write to 30-second ADJ bit..................................................................................... 16

4. Using the CS1 pin................................................................................................... 17

 Power supply circuit example.............................................................17

 Examples of connection to general-purpose microprocessor.............18

 External dimensions...........................................................................19

 Marking layout....................................................................................19

 Reference data ..................................................................................20

 Application notes................................................................................21

1. Notes on handling...................................................................................................21

2. Notes on packaging................................................................................................21

RTC - 72421 / 72423 4-BIT PARALLEL INTERFACE REAL TIME CLOCK MODULE

RTC - 72421 / 72423

•

Built-in crystal unit removes need for adjustment and reduces installation costs

•

Microprocessor bus compatible ( tWW, t

•

Use of C-MOS IC enables low current consumption ( 5 µA Max., at V

•

Compatibility with Intel CPU bus

•

Address latch enable (ALE) pin compatible with multiplex bus CPUs

•

Time (hours, minutes, seconds) and calendar (year, month, day) counter

•

24-hour/12-hour switchover and automatic leap-year correction functions

•

Fixed-period interrupt function

•

30-seconds correction (adjustment) function

•

Stop, start, and reset functions

•

Battery back-up function

•

Same mounting conditions as general-purpose SMD ICs possible (RTC-72423)

∗ Pins and functions compatible with the SMC-5242 series

 Overview

The RTC-72421/RTC-72423 module is a real time clock that c an be c onnect ed direct ly to a microprocessor's bus. Its built -in crys tal unit enables highly accurate time-keeping with no physical acces s required for adjustment and, since there is no need to connec t external components, m ount i ng and other costs can be reduced. In addition to its tim e and calendar functions, the RTC-72421/RTC-72423 enables the use of 30-seconds correction and fixedperiod interrupt functions. The RTC-72421/RTC-72423 module is ideally sui ted for applications requiri ng timing managem ent, such as personal comput ers, dedicated word-processors, fax machines, multi-function telephones , and sequencers.

 Block diagram

RD

= 120 ns )

DD

= 2.0 V )

WR RD

CS0

ALE

CS1

OSC

D3 D2 D1 D0

A3 A2 A1 A0

Gate

Latch

Decoder

RESET

bit

30sec ADJ

bit

S1 to CF

Counter

STOP

bit

S1 S10 MI1 MI10 H1 H10 W

D1 D10 MO1 MO10 Y1 Y10

CD CE CF

HOLD

bit

BUSY

bit

24/12

64 Hz

1 Second carry

1 Minute carry

1 Hour carry

bit

Output Selector

STD.P

RTC-72421/72 423

Page - 1 MQ - 162 - 03

RTC - 72421 / 72423

 Terminal connections

RTC-72421

STD.P

CS

0

ALE

A

0

1

A

2

A

3

RD

GND

V

1

2 3

4

5

6

7

8

9

18

17

16

15

14

13

12

11

10

DD

()

V

DD

(

)

V

DD

CS

1

D

0

D

1

D

2

D

3

WR

STD.P CS N.C. ALE A N.C. A N.C. A A RD GND

1

0

2 3 4

0

5 6

1

7 8

2

9

3

10 11 12

The (VDD) pins are at the same elec trical level as VDD. Do not connect these pins externally. The N.C. pins are not connected internally. Ground them in order to prevent noise.

RTC-72423

24 23 22 21 20 19 18 17 16 15 14 13

DD

V

()

DD

V

()

DD

V N.C.

1

CS

0

D N.C. N.C.

1

D

2

D

3

D WR

Page - 2 MQ - 162 - 03

RTC - 72421 / 72423

 Terminal functions

Signal

D0-D3

(Data bus)

A0-A3

(Address bus)

ALE

(Address Latch Enable)

WR

(WRite)

RD

(ReaD)

CS1,

CS

0

(Chip Select)

STD.P

(STanDard Pulse)

RTC-72421 RTC-72423

11−14 14−16, 19

4−7

3 4 Input

10 13 Input

8 11 Input

15,2 20,2 Input

1 1 Output

Pin No.

5, 7, 9, 10 Input

Input/ou

tput

Bi-

direction

Function

Connect these pines to a bi-directional data bus or CPU data bus. Use this bus to read to and write from the internal counter and registers.

CS

H L L H Output mode (read mode) H L H L Input mode (write mode) H L L L Do not use

L H or L High impedance (back-up mode)

H H H or L High impedance (RTC not selected)

Address input pins used for connection to CPU address, etc. Used to select the RTC’s internal counter and registers (address selection). When the RTC is connected to a multiplexed-bus type of CPU, these pines can also be used in combination with the ALE described below

Reads in address data and When the ALE is high, the address data and When the (through-mode) ALE falls, the address data and point are held. The held address data and

the ALE is low.

ALE

If the RTC is connected to a CPU that does not have an ALE pin and thus there is no need to use this ALE pin, fix it to V Writes the data on D0 to D3 into the register of the address specified by A

A

at the leading edge of

3,

Make sure that Output data to D0 to D3 from the register at the address specified by A

while RD is low. Make sure that When CS1 is high and

read and write are enabled. When the RTC is connected to a multiplexed-bus type of CPU,

the operation of the ALE (see the description of the ALE). Use CS

1

RTC is enabled; when it is low, the RTC is on standby. When CS cleared to 0. This is an N-channel open drain output pin. Depending on the setting of the C pulse signal are output.

The output from this pin cannot be inhibited by the CS Use a load voltage that is less than or equal to V

open-circuit. An example of STD.P connection is shown below.

RD WR Mode of D

1CS0

state for internal latching.

CS0

Address data and CS0 status

Read into the RTC to set address data

H

Held in the RTC (latched at the trailing edge of the ALE)

L

.

DD

WR .

and WR are never low at the same time.

RD

and WR are never low at the same time.

RD

is low, the RTC’s chip-select function is valid and

0

CS

connected to a power voltage detection circuit. When CS1 is high, the

goes low, the HOLD and RESET bits in the RTC registers are

1

register, a fixed-period interrupt signal and a

E

+5 V or V

RTC

At least 2.2 k

STD.P

0 to D3

state is read into the RTC.

0

CS

state at that

0

CS

status are maintained while

0

CS

and

1

. If not using this pin, keep it

DD

signals.

0

CS

Ω

0 to A3,

requires

0

0 to

If the STD.P output is not be used during standby operation, connecting the pullup resister to +5 V provides a reduction in current consumption. If the STD.P output is to be used even during standby, connect the pull-up resistor to the RTC’s V

DD

amount of current flowing through the pull-up resistor.

VDD 18 24

GND 9 12

(VDD) 16, 17 22,23

N.C.

−

3, 6, 8,

17, 18, 21

Connect this pin to power source. Supply to 5 V ± 10 % to this pin during normal operation; at least 2 V during battery back-up operation.

Connect this pin to ground. These pins are connected internally to VDD. Leave them open circuit.

These pins are not connected internally. Ground them.

. In this case, the current consumption w ill be increased by the

Page - 3 MQ - 162 - 03

RTC - 72421 / 72423

 Characteristics

1. Absolute maximum ratings Item Symbol Condition Specification Unit

Supply voltage VDD Input voltage VI Output voltage VO

Storage temperature T

2. Recommended operating conditions Item Symbol Condition Specification Unit

Supply voltage VDD 4.5 to 5.5 V Operating temperature T Data hold voltage VDH 2.0 to 5.5 V

CS1 data hold time t Operation recovery time tr

3. Frequency characteristics and current consumption characteristics Item Symbol Condition Specification Unit

Frequency tolerance

Operation temperature

Frequency voltage characteristics

Aging fa

Shock resistance S.R.

Current consumption

4. Electrical characteristics ( DC character ist ics ) Item Symbol Condition Applicable pins Min. Typ. Max. Unit

High input voltage 1 VIH1 2.2 V Low input voltage 1 VIL1 High input voltage 2 VIH2 Low input voltage 2 VIL2

Input leakage current 1 ILK1 Input leakage current 2 ILK2

Low output voltage 1 VOL1 IOL=2.5 mA 0.4 High output voltage VOH Low output voltage 2 VOL2 IOL=2.5 mA 0.4 Off-state leakage current I

Input capacitance CI

Input-output capacitanc e CI/O

Ta=+25 °C Ta=+25 °C GND−0.3 to V Ta=+25 °C GND−0.3 to V

STG

No condensation

OPR

CDR

RTC-72421 RTC-72423

See the section on data

hold timing

RTC-72421A

∆

f/f0

Ta=+25 °C

=5.0 V

V

DD

RTC-72421B RTC-72423A

RTC-72423

RTC-72421 : −10 °C to +70 °C

(+25 °C reference)

RTC-72423 : −40 °C to +85 °C

(+25 °C reference)

Ta=+25 °C =2.0 V to 5.5 V

V

DD

=5.0 V, Ta=+25 °C

V

DD

Drop test 3 times on a hard board from

0.75 m height, or 29400 m/ s2 × 0.2 ms ×

1/2 sin wave × 3 directions IDD1 VDD=5.0 V 1.0 Typ. 10 Max. I

DD

Ta=+25 °C, CS

I/O currents excluded

2

=0 V

1

V

=2.0 V 0.9 Typ. 5 Max.

DD

−

0.3 to 7.0 +0.3

DD

+0.3

DD

−55 to +85

−55 to +125

RTC-72421 ; −10 to +70 RTC-72423 ; −40 to +85

2.0 Min.

±

10

±

50

±

20

±

50

+10 / −120

+10 / −220

±

5

Max.

±

5 Max. × 10-6 / year

±

10 Max. × 10

All input pins except for

CS

OFFLK

V

DD

V

I=VDD

I

OH

VI = V

frequency

1 MHz

=2.0 V to

5.5 V

/0 V

=-400 µA

/ 0 V

DD

Input

Input pins except for

D

Input pins except for

D

D0 to D3 and STD.P

1

CS

1

to D3

0

to D3

0

STD.P

to D3

0

0.8

4/5VDD

1/5VDD

1/-1 10/-10

2.4

10/-10 10

20

× 10

×

10

° °

µ

V V V

°

C

°

C

C C

s

-6

A

V

µ

V

µ

pF

A

-6

/ V

-6

Page - 4 MQ - 162 - 03

RTC - 72421 / 72423

 Switching characteristics (AC characteristics)

1. When ALE is used

Write mode ( V

Item Symbol Condition Min. Max. Unit CS1 set-up time tSU(CS1) 1000 Address set-up time before ALE tSU(A-ALE) 50 Address hold time af ter ALE th(ALE-A) 50 ALE pulse width tw(ALE) 80 ALE set-up time bef ore write tSU(ALE-W) 0 Write pulse width tw(W) 120 ns ALE set-up time af ter write tSU(W-ALE) 50 Data input set-up tim e before write tSU(D-W) 80 Data input hold time after write th(W-D) 10 CS1 hold time th(CS1) 1000 Write recovery t i me trec(W) 200

Read mode ( V

Item Symbol Condition Min. Max. Unit CS1 set-up time tSU(CS1) 1000 Address set-up time before ALE tSU(A-ALE) 50 Address hold time af ter ALE th(ALE-A) 50 ALE pulse width tw(ALE) 80 ALE set-up time bef ore read tSU(ALE-R) 0 ns ALE set-up time af ter read tSU(R-ALE) 50 Data output transfer time after read t Data output floating transfer time after read t CS1 hold time th(CS1) 1000 Read recovery time trec(W) 200

(1) Write mode

CS1

A0 to A3

CS0

ALE

WR

D0 to D3

(Input)

tsu(CS1)

VIH1

(2) Read mode

CS1

A0 to A3

CS0

ALE

RD

D0 to D3

(Input)

tsu(CS1)

VIH1

VIH2

tsu(A-ALE)

VIH1

VIL1

tw(ALE)

VIH2

tsu(A-ALE)

VIH1

VIL1

tw(ALE)

DD

=5 V ± 0.5 V, RTC-72421;Ta=−10 °C to +70 °C, RTC-72423;Ta=−40 °C to +85 °C )

DD

=5 V ± 0.5 V, RTC-72421;Ta=−10 °C to +70 °C, RTC-72423;Ta=−40 °C to +85 °C )

(R-Q) CL=150 pF 120

PZV

(R-Q) 0 70

PVZ

th(ALE-A)

VIH1

VIL1

VIH1

VIL1

tsu(ALE-W) tw(W)

VIH1

VIL1 VIL1

VIH1

VIL1

th(ALE-A)

VIH1

VIL1

VIH1

VIL1

tsu(ALE-R)

VIH1

VIL1 VIL1

tsu(D-W)

tpzv(R-Q)

VIH1

VIL1

th(CS1)

VIH1

th(W-D)

th(CS1)

VIH1

tpvz(R-Q)

VIH1

VIL1

tsu(W-ALE)

VIH1

VIL1

tsu(R-ALE)

VIH2

VIL1

VIH2

VIL1

Page - 5 MQ - 162 - 03