Epson RTC-4543SB, RTC-4543SA User Manual

MQ252-03
Application Manua
Real Time Clock Module
RTC-4543SA/SB
Model Product Number RTC-4543SA Q4145435x000200
RTC-4543SB Q4145436x000200
s
I
E
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RTC - 4543 SA/SB
CONTENTS
1. OVERVIEW
2. BLOCK DIAGRAM
3. PIN CONNECTIONS
4. PIN FUNCTIONS
........................................................................................................1
...........................................................................................1
.......................................................................................2
..............................................................................................2
5. ELECTRICAL CHARACTERISTICS
5-1. A
BSOLUTE MAXIMUM RATINGS ..........................................................................................3
5-2. O 5-3. F 5-4. DC C 5-5. AC C 5-6. T
6. TIMER DATA ORGANIZATION
7. DESCRIPTION OF OPERATION
7-1.D 7-2. D 7-3. D 7-4. FOUT
PERATING CONDITION.......................................................................................................3
REQUENCY CHARACTERISTICS........................................................................................3
HARACTERISTICS........................................................................................................3
HARACTERISTICS.........................................................................................................4
IMING CHARTS.....................................................................................................................5
..................................................................6
...............................................................7
ATA READS............................................................................................................................7
ATA WRITES.........................................................................................................................7
ATA WRITES (DIVIDER RESET).........................................................................................8
OUTPUT AND
1 H
Z CARRIES...................................................................................8
.........................................................3
8. EXAMPLES OF EXTERNAL CIRCUITS
9. EXTERNAL DIMENSIONS
.........................................................................10
10. LAYOUT OF PACKAGE MARKINGS
11. REFERENCE DATA
12. APPLICATION NOTES
12-1. N 12-2. N
OTES ON HANDLING.......................................................................................................12
OTES ON PACKAGING....................................................................................................12
...................................................................................11
..............................................................................12
.................................................9
..................................................10
RTC - 4543 SA/SB
32-kHz Output Serial RTC Module
RTC - 4543 SA/SB
Built-in crystal permits operation without requiring adjustment
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Built-in time counters (seconds, minutes, hours) and calendar counters (days, days of the week
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months, years)
Operating voltage range: 2.5 V to 5.5 V
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Supply voltage detection voltage: 1.7 ±0.3 V
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Low current consumption: 1.0 µA/2.0 V (Max.)
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Automatic processing for leap years
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Output selectable between 32.768 kHz/1 Hz
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1. Overview
This module is a real-time clock with a serial interface and a built-in crys t al oscillator. This module is also equipped with clock and calendar circuits, an automatic leap year compensation function, and a supply voltage detection function. In addition, this module has a 32.768 kHz/1 Hz selectable output function for hardware control t hat is independent of the RTC circuit. This module is available in a compact SOP 14-pin package (RTC-4543SA) and a thin SOP 18-pin package (RTC-4543SB).
2. Block diagram
32.768 kHz
OSC
FOUT FSEL
FOE
DATA
CLK
WR CE
OUTPUT
CONTROLLER
I / O
CONTROLLER
DIVIDER
CLOCK AND CALENDAR
SHIFT REGISTER
VOLTAGE DETECT
CONTROL
CIRCUIT
Page - 1 MQ - 252 - 03
RTC - 4543 SA/SB
3. Pin Connections
RTC - 4543SB
N.C
1
910
18
18
17
N.C N.C
16 15
N.C
14
DD
V N.C
13 12
CLK
11
DATA FOUT
10
SOP - 18pin
1 2
3 4 5 6 7
GND N.C
CE FSEL
WR FOE N.C
RTC - 4543SA
14
FOUT
1
78
14
13
N.C
N.C
12 11
DATA
CLK
10
9
V
DD
8
N.C
SOP - 14pin
2 3 4
8 9
1
5 6 7
N.C N.C N.C N.C FOE WR FSEL CE GND
4. Pin Functions
Pin No.
Signal
GND
CE
FSEL
WR
FOE
VDD
CLK
DATA
FOUT
SOP-14pin
(SOP-18pin)
1
( 9 )
3
( 8 )
4
( 7 )
5
( 6 )
6
( 5 )
9
( 14 )
10
( 12 )
11
( 11 )
14
( 10 )
2,7,8,12,13
N.C.
( 1,2,3,4,13,
15,16,17,18 )
* Always connect a passthrough capacitor of at least 0.1 µF as close as possible between VDD and GND.
I/O Function
Connects to negative (-) side (ground) of the power supply.
Chip enable input pin.
Input
When high,the chip is enabled. When low,the DATA pin goes to high impedance and the CLK,DATA,and WR pins are not able to accept input.In addition, when low,the TM bit is cleared. Serect the frequency that is output from the FOUT pin.
Input
High : 1 Hz Low : 32.768 kHz DATA pin input/output switching pin.
Input
High : DATA input (when writing the RTC) Low : DATA output (when reading the RTC) When high, the frequency selected by the FSEL pin is output from
Input
the FOUT pin. When low, the FOUT pin goes to high impedance.
Connects to positive (+) side of the power supply.
Serial clock input pin.
Input
Data is gotten at the rising edge during a write, and data is output at the rising edge during a read.
Bi-directional Input/outout pin that is used for writing and reading data.
Outputs the frequency selected by the FSEL pin. 1 Hz output is
Output
synchronized with the internal one-second signal. This output is not affected by the CE pin. Although these pins are not connected internally,they should always be left open in order to obtain the most stable oscillation possible.
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RTC - 4543 SA/SB
5. Electrical Characteristics
5-1. Absolute Maximum Ratings
Item Symbol Conditions Min. Max. Unit
Supply voltage VDD -0.3 7.0 V
Input voltage VI
Ta=+25 °C
Output voltage VO GND-0.3 VDD+0.3 V
Storage temperature T
- -55 +125
STG
5-2. Operating Condition
Item Symbol Conditions Min. Max. Unit
Operating supply
voltage
Data holding voltage V
Operating temperature T
- 2.5 5.5 V
V
DD
- 1.4 5.5 V
CLK
No condensation
OPR
5-3. Frequency Characteristics
Item Symbol Conditions Max. Unit
Frequency tolerance
Frequency temperature
characteristics
Frequency voltage
characteristics
Oscillation start time t
Aging fa
* Monthly deviation: Approx. 1 min.
f/f
Ta=+25
O
T
op
f/V
STA
-10to+70 °C +25 °C ref
Ta=+25 °C , V
Ta=+25 °C , V
Ta=+25 °C , V
5-4. DC Characteristics
Unless specified otherwise: VDD = 5 V ± 10 %, Ta = - 40 to +85 °C
Item Symbol Conditions Min. Typ. Max. Unit
Current consumption(1) IDD1 VDD=5.0 V Current consumption(2) IDD2 VDD=3.0 V Current consumption(3) IDD3 VDD=2.0 V Current consumption(4) IDD4 VDD=5.0 V Current consumption(5) IDD5 VDD=3.0 V
Current consumption(6) IDD6 VDD=2.0 V
Input voltage VIH
V
Input off/leak current
V
Output voltage V
V V
Output load condition
( fanout )
Output leak current I
I
Supply voltage detection
voltage
IL
I
OFF
VDD=5.0 V IOH=-1.0 mA 4.5 V
OH(1)
VDD=3.0 V
OH(2)
VDD=5.0 V IOL= 1.0 mA 0.5 V
OL(1)
VDD=3.0 V
OL(2)
N / CL
V
OZH
V
OZL
- 1.4 1.7 2.0 V
V
DT
WR,DATA,CE,CLK,
FOE,FSEL pins
WR,CE,CLK,FOE,FSEL pins
V
= VDD or GND
IN
DATA , FOUT pins
DATA , FOUT pins
FOUT pin
OUT
OUT
=5.5 V
=0 V
DATA , FOUT pins DATA , FOUT pins
GND-0.3 VDD+0.3 V
C , VDD=5.0 V 5 ± 23 *
°
-40 +85
+ 10 / - 120
=2.0 to 5.5 V
DD
=2.5 V
DD
=5 V , first year
DD
CE=L , FOE=L
FSEL=H
CE=L , FOE=H
FSEL=L
No load on the
FOUT pin
1.5 3.0
1.0 2.0
0.5 1.0
4.0 10.0
2.5 6.5
1.5 4.0
2
±
×
3 s
5
±
0.8 VDD V
0.2 VDD V
0.5
2.0 V
0.8 V
2 LSTTL / 30 pF Max.
-1.0 1.0
-1.0 1.0
C
°
C
°
10-6
×
-6
10
×
10-6/V
10-6
×
A
µ
A
µ
A
µ
A
µ
A
µ
A
µ
A
µ
A
µ
A
µ
Page - 3 MQ - 252 - 03
RTC - 4543 SA/SB
5-5. AC Characteristics
Unless specified otherwise: Ta = - 40 to +85 °C, CL = 50 pF
Item Symbol
=5 V ± 10 % VDD=3 V ± 10 %
V
DD
Min. Max. Min. Max.
Unit
CLK clock cycle t
CLK low pulse width t
CLK high pulse width t
CLK setup time t
CE setup time t
CE hold time t
0.75 7800 1.5 7800
CLK
0.375 3900 0.75 3900
CLKL
0.375 3900 0.75 3900
CLKH
25 50 ns
CLKS
0.375 3900 0.75 3900
CES
0.375 0.75
CEH
µ µ
µ
µ µ
s s
s
s s
CE enable time tCE 0.9 0.9 s
Write data setup time tSD 0.1 0.2
Write data hold time tHD 0.1 0.1
WR setup time t
WR hold time t
DATA output delay time t
100 100 ns
WRS
100 100 ns
WRH
0.2 0.4
DATD
DATA output floating time tDZ 0.1 0.2
s
µ
s
µ
s
µ
s
µ
Clock input rise time tr1 50 100 ns
Clock input fall time tf1 50 100 ns
FOUT rise time (CL=30 pF) tr2 100 200 ns
FOUT fall time (CL=30 pF) tf2 100 200 ns Disable time (CL=30 pF) tXZ 100 200 ns
Enable time (CL=30 pF) tZX 100 200 ns FOUT duty ratio (CL=30 pF) Duty 40 60 40 60 %
Wait time t
0.95 1.9
RCV
s
µ
Page - 4 MQ - 252 - 03
RTC - 4543 SA/SB
5-6. Timing Charts
( 1 ) Data read
WR
CE
CLK
t
CLKS
DATA
( 2 ) Data write
CES
t
t
t
WRS
CLKH
t
CLK
t
CLKL
t
DATD
t
CE
t
WRH
t
CEH
t
RCV
t
tt
f1r1
DZ
t
CE
WR
CE
CLK
t
CLKS
DATA
( 3 ) FOUT output
FOUT
( 4 ) Disable/enable
FOE
t
WRS
t
CEStCLK
t
CLKH
t
HD
t
SD
t
10%
VIL
t
CLKL
f2
tt
f1r1
Disable
t
90%
t
r2
Duty
t
WRH
t
t
CEH
RCV
t
H
50%
t
H
=
×
100 %
VIH
[]
Enable
t
t
XZ
High impedance
t
ZX
FOUT
Page - 5 MQ - 252 - 03
RTC - 4543 SA/SB
D
6. Timer Data Organization
• This bit is set to “1” when voltage of 1.7 ±0.3 V or less is detected between VDD and GND.
• The FDT bit is cleared if all of the digits up to the year digits are read.
• Although this bit can be both read and written, normally set this bit to “0”.
The counter data is BCD code.
The timer automatically adjusts for different month lengths and for leap year.
The time is indicated in 24-hour format.
Writes and reads are both performed on an LSB-first basis.
MSB LSB
Second
( 0 to 59 )
Minutes
( 0 to 59 )
Hour ( 0 to 23 )
Day of the week
( 1 to 7 )
Day ( 1 to 31 )
Month ( 1 to 12 )
Year ( 0 to 99 )
* bits: Any data may be written to these bits.
FDT bit: Supply voltage detection bit
V
DD
V
FDT
*
*
s40
s20
s10
mi40 mi20 mi10 mi8
*
h20
h10
*
*
TM
y80
*
*
y40
d20
*
y20
d10
mo10 mo8 mo4 mo2 mo1
y10
DET
s8
h8
d8
y8
s4
mi4
h4
w4
d4
y4
s2
mi2
h2
w2
d2
y2
s1
mi1
h1
w1
d1
y1
etection
pulse
Mode
FDT bit
0.5 s
0.5 s
Read
if the supply voltage is lower than the detection voltage value, the FDT bit is set to “1”.
The supply voltage detection circuit monitors the supply voltage once every 0.5 seconds;
TM bit: This is a test bit for SEIKO-EPSON’s use. Always set this bit to “0”.
Page - 6 MQ - 252 - 03
RTC - 4543 SA/SB
7. Description of Operation
7-1.Data reads
CLK
WR
1 52
2 53 54 54+ n
DATA
Sec
FDTs40s20s10s8s4s2s1 y8 y10 y20 y40CEy80
Year
Output data does not change
1) When the WR pin is low and the CE pin is high, the RTC enters data output mode.
2) At the first rising edge of the CLK signal, the clock and calendar data are loaded into the shift register and the LSB of the seconds digits is output from the DATA pin.
3) The remaining seconds, minutes, hour, day of the week, day, month, and year data is shifted out, in sequence and in synchronization with the rising edge of the CLK signal, so that the data is output from the DATA pin. The output data is valid until the rising edge of the 52nd clock pulse; even if more than 52 clock pulses are input,
the output data does not change.
4) If data is required in less than 52 clock pulses, that part of the data can be gotten by setting the CE pin low after the necessary number of clock pulses have been output. Example: If only the data from “seconds” to “day of the week” is needed: After 28 clock pulses, set the CE pin low in order to get the data from “seconds” to “day of the week.”
5) When performing successive data read operations, a wait (tRCV) is necessary after the CE pin is set low.
6) Note that if an update operation (a one-second carry) occurs during a data read operation, the data that is read will have an error of -1 second.
7) Complete data read operations within tCE (Max.) = 0.9 seconds, as described earlier.
7-2. Data writes
1 52
2 53 54 54+n
CLK
WR DATA
s40s20s10s8s4s2s1
( FDT )
Seconds Year
y8 y10 y20 y40CEy80
0
1) When the WR pin is high and the CE pin is high, the RTC enters data input mode.
2) In this mode, data is input, in succession and in synchronization with the rising edge of the CLK signal, to the shift register from the DATA pin, starting from the LSB of the seconds digits.
3) The sub-seconds counter is reset between the falling edge of the first clock pulse and the rising edge of the second clock pulse. In addition, carries to the seconds counter are prohibited at the falling edge of the first clock pulse.
4) After the last data is input to the shift register at the rising edge of the 52nd clock pulse, the contents of the shift register are transferred to the timer counter.
5) Note that during a data write operation, 52 bits of data must be input. Correct write-access isn't completed when CE terminal turned into low on a state of less
than 52 bits.
If more than 52 bits of data are input, the 53rd and subsequent bits are ignored.
(The first 52 bits of data are valid.)
6) Once the CE pin is set low, the prohibition on carries to the seconds counter is lifted.
Complete data write operations within t
(Max.) = 0.9 seconds, as described earlier.
CE
7) If a data read operation is to be performed immediately after a data write operation, a wait (tRCV)
is necessary after the CE pin is set low. * Malfunction will result if illegal data is written. Therefore, be certain to write legal data.
Page - 7 MQ - 252 - 03
RTC - 4543 SA/SB
7-3. Data writes (Divider Reset)
WR
1 522
CLK
N Seconds
DATA
Timer,counter
Divider reset Pulse
Carry stop Pulse
s1
N seconds
s2
s40s20s10s8s4 y8 y10 y20 y40CEy80
N seconds0 seconds
After the counter is reset, carries to the seconds digit are halted.After the data write operation, the prohibition on carries to the seconds counter is lifted by setting the CE pin low. Complete data write operations within tCE (Max.) = 0.9 seconds, as described earlier.
7-4. FOUT output and 1 Hz carries
CE
WR
t
CES
CLK
0
1.0 s
-7.8 ms
t
CLK
1Hz
FOUT
15.6 ms 15.6 ms
During a data write operation, because a reset is applied to the Devider counter (from the 128 Hz level to the 1 Hz level) after the CE pin goes high during the time between the falling edge of the first clock cycle and the rising edge of the second clock cycle, the length of the first 1 Hz cycle after the data write operation is 1.0 s
The 1-Hz signal that is output on FOUT is the internal 1-Hz signal with a 15.6-ms shift applied.
+0 / −7.8ms
+
t
CES
+
t
CLK.
Subsequent cycles are output at 1.0-second intervals.
Page - 8 MQ - 252 - 03
RTC - 4543 SA/SB
8. Examples of External Circuits
Example 1. When used as an RTC + clock source
VDD
VDD
Power supply Switching circuit
Power supply Det ection circuit
RTC 4543
VDD
CE WR DATA
CLK FOUT
*2
*1
FSEL FOE
GND
0.1 µF
*1: FOUT output frequency setting (High: 1 Hz; low: 32.768 kHz) *2: Prohibits FOUT output during back up, reducing current consumption.
Example 2. When used as a clock source (oscillator)
RTC-4543
VDD
VDD
1
CE WR DATA
CLK FOUT
FSEL FOE
GND
VDD
VDD
0.1 µF
Page - 9 MQ - 252 - 03
RTC - 4543 SA/SB
9. External Dimensions
RTC - 4543 SA
( SOP-14pin )
10.1
0.2
±
RTC - 4543 SB
3.2
5.4
0.2
±
0.1
±
± 0.2
7.8
5.0 7.4
0.05 Min.
0.35
but it has no affect on the performance of the device.
( SOP-18pin )
1.27 1.2
The cylinder of the crystal oscillator can be seen in this area ( front ),
± 0.2
11.4
0 - 10°
0.15
0.6
0.6
± 0.2
0.15
1.8 2.0 Max.
1.27 0.4
0.12
0.1
0 Min.
0 - 10
10. Layout of Package Markings
Model
RTC - 4543 SA
( SOP-14pin )
RTC - 4543 SB
Note : The markings and their posi t i ons as pictured above are only approximations. These illustrations do not define the details of the style, size, and position of the characters marked on the packages .
( SOP-18pin )
Model
R4543
E 1234A
R4543
1234A
E
B
B
Frequency torerance
Manufacturing Lot
Frequency tolerance
Manufacturing Lot
Page - 10 MQ - 252 - 03
RTC - 4543 SA/SB
11. Reference Data
(1) Example of Frequency-Temperature Characteristics
= +25 °C Typ.
T
θ
α
= -0.035 × 10-6/ °C 2 Typ.
-6
10
×
+10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
Frequency fT
-110
-120
-130
-140
-150
-50 -40 -30 -20 -10 0 +10 +20 +30 +40 +50 +60 +70 +80 +90+100
Temperature [°C]
Determining the frequency stability (clock accuracy)
1.The frequency-temperature characteristics can be
2. In order to determine the clock accuracy, add in the
3. Determining the daily error
approximated by the following equation: ∆fT = α(
f
∆ α( /°
T
θ
X
θ
T
(°C) (°C)
-
)2
T
X
θ
θ
: Frequency deviation at any given temperature
2
C
)
: Second-order temperature ((-0.035±0.005)×10 : Highest temperature(+25 °C±5 °C) : Any given temperature
-6
/°C2)
frequency tolerance and the voltage characteristics.
f/f = ∆f/f
f
/f
f/f
0
f
T
f
v
+ ∆fT + ∆fv
0
: Clock accuracy at any given temperature and voltage (frequency stability)
: Frequency accuracy : Frequency deviation at any given temperature : Frequency deviation at any given voltage
(2)Example of Frequency-Voltage Characteristics
Frequency [ ×10
+1.0
0.0
-1.0
-2.0 Supply voltage (VDD)[V]
Note :
This data shows values obtained from a sample lot.
-6
]
Conditions 5 V reference Voltage,
Ta=+25 °C
2345
Daily error =∆f/f × 86400 (seconds)
-
With error of 11.574 × 10 about one second per day.
(3)Example of Current Consumption-Voltage Characteristics
6
, the error of the clock is
Current consumpiton[ µA ]
Conditions
No load, Ta=+25 °C
2.0
1.0
0.0
2.0 3.0 4.0 5.0 Supply voltage (VDD) [V]
Page - 11 MQ - 252 - 03
RTC - 4543 SA/SB
12. Application notes
12-1. Notes on handling
This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity
While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity. Containers used for packing and transport should be constructed of conductive materials. In addition, only soldering irons, measurement circuits, and other such devices which do not leak high voltage should be used with this module, which should also be grounded when such devices are being used.
(2) Noise
If a signal with excessive external noise is applied to the power supply or input pins, the device may malfunction or "latch up." In order to ensure stable operation, connect a filter capacitor (preferably ceramic) of greater that 0.1F as close as possible to the power supply pins (between V Also, avoid placing any device that generates high level of electronic noise near this module. * Do not connect signal lines to the shaded area in the figure shown in Fig. 1 and, if possible, embed this area in a GND land.
(3) Voltage levels of input pins
When the input pins are at the mid-level, this will cause increased current consumption and a reduced noise margin, and can impair the functioning of the device. Therefore, try as much as possible to apply the voltage level close to V
(4) Handling of unused pins
Since the input impedance of the input pins is extremely high, operating the device with these pins in the open circuit state can lead to unstable voltage level and malfunctions due to noise. Therefore, pull­up or pull-down resistors should be provided for all unused input pins.
12-2. Notes on packaging
(1) Soldering heat resistance.
If the temperature within the package exceeds 260, the characteristics of the crystal oscillator will be degraded and it may be damaged. The reflow conditions within our reflow profile is recommended. Therefore, always check the mounting temperature and time before mounting this device. Also, check again if the mounting conditions are later changed. * See Fig.2 profile for our evaluation of Soldering heat resistance for reference.
(2) Mounting equipment
While this module can be used with general-purpose mounting equipment, the internal crystal oscillator may be damaged in some circumstances, depending on the equipment and conditions. Therefore, be sure to check this. In addition, if the mounting conditions are later changed, the same check should be performed again.
(3) Ultrasonic cleaning
Depending on the usage conditions, there is a possibility that the crystal oscillator will be damaged by resonance during ultrasonic cleaning. Since the conditions under which ultrasonic cleaning is carried out (the type of cleaner, power level, time, state of the inside of the cleaning vessel, etc.) vary widely, this device is not warranted against damage during ultrasonic cleaning.
(4) Mounting orientation
This device can be damaged if it is mounted in the wrong orientation. Always confirm the orientation of the device before mounting.
(5) Leakage between pins
Leakage between pins may occur if the power is turned on while the device has condensation or dirt on it. Make sure the device is dry and clean before supplying power to it.
DD
or GND.
DD
and GNDs).
Fig. 1: Example GND Pattern Fig. 2: Reference profile for our evaluation of Soldering heat resistance.
RTC - 4543 SA
RTC - 4543 SB
( SOP-14pin )
( SOP-18pin )
Temperature [ °C ]
+1 ∼ +5 °C / s
+260 °C Max.
−1 ∼ −5 °
+1 ∼ +5 °C / s
35 s
C
°
+170 °C +220
100 s
Pre-heating area
Stable M elting area
Page - 12 MQ - 252 - 03
C / s
time [ s ]
Application Manual
Distributor
AMERICA EPSON ELECTRONICS AMERICA, INC.
HEADQUARTER 150 River Oaks Parkway, San Jose, CA 95134, U.S.A. Phone: (1)800-228-3964 (Toll free) : (1)408-922-0200 (Main) Fax: (1)408-922-0238 http://www.eea.epson.com
Atlanta Office 3010 Royal Blvd. South, Ste. 170, Alpharetta, GA 30005, U.S.A. Phone: (1)877-332-0020 (Toll free) : (1)770-777-2078 (Main) Fax: (1)770-777-2637
Boston Office 301Edgewater Place, Ste. 120, Wakefield, MA 01880, U.S.A. Phone: (1)800-922-7667 (Toll free) : (1)781-246-3600 (Main) Fax: (1)781-246-5443
Chicago Office 101 Virginia St., Ste. 290, Crystal Lake, IL 60014, U.S.A. Phone: (1)800-853-3588 (Toll free) : (1)815-455-7630 (Main) Fax: (1)815-455-7633
El Segundo Office 1960 E. Grand Ave., 2nd Floor, El Segundo, CA 90245, U.S.A. Phone: (1)800-249-7730 (Toll free) : (1)310-955-5300 (Main) Fax: (1)310-955-5400
EUROPE EPSON EUROPE ELECTRONICS GmbH
HEADQUARTER Riesstrasse 15, 80992 Munich, Germany Phone: (49)-(0)89-14005-0 Fax: (49)-(0)89-14005-110 http://www.epson-electronics.de
Düsseldorf Branch Office Altstadtstrasse 176, 51379 Leverkusen, Germany Phone: (49)-(0)2171-5045-0 Fax: (49)-(0)2171-5045-10
UK & Ireland Branch Office Unit 2.4, Doncastle House, Doncastle Road, Bracknel l, Berkshire RG12 8PE, England Phone: (44)-(0)1344-381700 Fax: (44)-(0)1344-381701
French Branch Office LP 915 Les Conquérants, 1 Avenue de l' Atlantique, Z.A. de Courtaboeuf 2 91976 Les Ulis Cedex, France Phone: (33)-(0)1-64862350 Fax: (33)-(0)1-64862355
ASIA EPSON (CHINA) CO., LTD.
23F, Beijing Silver Tower 2# North RD DongSangHuan ChaoYang District, Beijing, China Phone: (86) 10-6410-6655 Fax: (86) 10-6410-7319 http://www.epson.com.cn
4F, Bldg.,27, No.69, Gui Qing Road, Cao hejing, Shanghai, China Phone: (86) 21-6485-0835 Fax: (86) 21-6485-0775
EPSON HONG KONG LTD.
20/F., Harbour Centre, 25 Harbour Road, Wanchai, Hong kong Phone: (852) 2585-4600 Fax: (852) 2827-2152 http://www.epson.com.hk
EPSON ELECTRONIC TECHNOLOGY DEVELOPMENT (SHENZHEN )CO., LTD.
Flat 16A, 16/F, New Times Plaza, No.1 Taizi Road, Shenzhen, China Phone
EPSON TAIWAN TECHNOLOGY & TRADING LTD.
14F, No.7, Song Ren Road, Taipei 110 Phone: (886) 2-8786-6688 Fax: (886)2-8786-6660 http://www.epson.com.tw
EPSON SINGAPORE PTE. LTD.
No.1, Temasek Avenue #36-00, Millenia Tower, Singapore 039192 Phone: (65) 337-7911 Fax: (65) 334-2716 http://www.epson.com.sg
SEIKO EPSON CORPORATION KOREA Office
50F, KLI 63 Building,60 Yoido-dong, Youngdeungpo-Ku, Seoul, 150-763, Korea Phone: (82) 2-784-6027 Fax: (82) 2-767-3677 http://www.epson-device.co.kr Gumi Branch Office 6F, Good Morning Securities Bldg., 56, Songjeong-dong Gumi-City, Gyongsangbuk-Do, 730-090, Korea Phone: (82) 54-454-6027 Fax: (82) 54-454-6093
: (86) 755-6811118 Fax: (86) 755-6677786
ELECTRONIC DEVICE MARKETING DEPARTMENT
Electronic devices information on WWW server
http://www.epsondevice.com
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