17 STNC I/O
18 AGND P
19 ROSC I/O
20 AVDD P
21 AVCC P
22 BST_A I/O
23 PGND_A P
PAM8615
Document number: DSxxxxx Rev. 1 - 1
Pin
Name
A Product Line o
Diodes Incorporated
PAM8615
I/O/P Function
H-bridge A output.
Power supply for H-bridge A not connected to PVCC_B or AVCC.
Shutdown signal for IC (low = shutdown, high = operat ional). TTL logic levels with compliance to AVCC.
Alogic high on this pin disables the outputs. A low on this pin enables the outputs. TTL logic levels with
compliance to AVCC.
Audio input for channel A.
Digital GND
Audio input for channel B.
Reference for analog cells.
DC voltage setting the gain of the amplifier.
Master/Slave select for determining direction of SYNC terminal. High = Master mode, SYNC terminal is an
output; Low = Slave mode, SYNC terminal accept s a clock input.
Power supply for H-bridge B, not connected to PVCC_A or AVCC
H-bridge B output
Power ground for H-bridge B
Bootstrap I /O for H-bridge B high-side FET
Internally generated voltage supply for bootst rap. Not to be used as a supply or connected to any component
other than the decoupling capacitor.
Clock i nput/output for synchroni zing multiple class-D devices. Direction determined by MS_SV terminal.
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability. All voltages are with respect to ground.
Low - ESR capacitors are recommended throughout this application section. A real (with respect to ideal) capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the real capacitor behaves as an ideal capacitor.
Short-Circuit Protection
The PAM8615 has short circuit protection circuitry on the outputs to prevent damage to the device when output-to-output shorts (BTL mode),
output-to- GND shorts, or output-to-VCC shorts occur. Once a short-circuit is detected on the outputs, the output drive is immediately disabled.
This is a latched fault and must be reset by cycling the voltage on the SD pin to a logic low and back to the logic high state for normal operation.
This will clear the short-circuit flag and allow for normal operation if the short was removed. If the short was not removed, the protection circuitry
will again activate.
Thermal Protection
Thermal protection on the PAM8615 prevents damage to the device when the internal die temperature exceeds +160°C. There is a ±15 degree
tolerance on this trip point from device to device. Once the die temperature exceeds the set thermal point, the device enters into the shutdown
state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by +40°C.
The device begins normal operation at this point without external system intervention.
Master-Slave and SYNC Operation
The MS/SL and SYNC terminals can be used to synchronize the frequency of the class-D output switching. When the MS/SL is high or left
floating due to the internal pull up resistor, the switching frequency is determined by the ROSC. The SYNC becomes an output whose
source/sink current is about 0.5mA, and the frequency of this output is also determined by the ROSC. And this output can be connected to
another PAM8615 who is configured in the slave mode. The output switching is synchronized to avoid any beat frequencies that occur in the
audio band when two Class-D amplifiers in the same system are switching at the slight different frequencies. When the MS/SL is low, the
switching frequency is determined by the incoming square wave on the SYNC input. The SNYC becomes an input in this mode and accept a
square wave from another PAM8615 configured in the master mode or from an external GPIO.
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