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PAM8124
Description
The PAM8124 is a 15W efficient, Class-D audio power amplifier for
driving stereo speakers in a single-ended configuration; or a mono
speaker in a bridge-tied-load configuration. The PAM8124 can drive
stereo speakers (SE) as low as 4Ω. Due to the low power dissipation
and high efficiency, up to 95%, the device can be used without any
external heat sink when playing music.
The gain of the amplifier is controlled by 2 gain selectable pins,
offering 20dB, 26dB, 32dB, and 36dB gain selections.
The PAM8124 is available in a TSSOP-24-EP package.
NEW PRODUCT
Features
• 30W/Ch into 8Ω BTL Load from 22V Supply
• 15W/Ch into 4Ω SE Load from 22V Supply
• 10W/Ch into 8Ω SE Load from 24V Supply
• Operate from 10V to 26V
• Single-Ended Analog Inputs
• Supports Multiple Output Configurations:
2-Ch Single-Ended (SE, Half-Bridge)
1-Ch Bridge-Tied Load (BTL, Full-Bridge)
• Four Selectable Fixed-gain Settings
• No Pop Noise for Start-up and Shut-down Sequences
• Internal Oscillator (No External Components Required)
• High Efficient Class-D Operation Eliminates Need for Heat Sinks
• Thermal and Short-Circuit Protection with Auto Recovery
• Space-Saving Surface-Mount TSSOP-24EP Package
• Pb-Free Package
Pin Assignments
PVCCL
SDN
PVCCL
MUTE
LIN
RIN
VCM
AGND
AGND
PVCC R
VCLAMP
PVCCR PGNDR
Applications
• Televisions
• Home Sound Systems
• Active Speakers
HIGH POWER AUDIO
TSSOP-24-EP
1
2
3
4
XXXYWWLL
PAM8124
5
6
7
8
9
10
11
12 13
24
23
22
21
20
19
18
17
16
15
14
PGNDL
PGNDL
LOUT
BSL
AVCC
SE_BTL
GAIN 0
GAIN1
BSR
ROUT
PGNDR
Typical Applications Circuit
U1
10V_to_26V
SD
Mute
L_in
R_i n
10V_to_26V
1
PVCCL
2
SDN
3
PVCCL
4
MUTE
5
LIN
6
RIN
7
C1
1uF
C3
1uF
VCM
8
AGND
9
AGND
10
PVCCR
11
VCL A M P
12
PVCCR
PAM8124
PGNDL
PGNDL
LOUT
BSL
AVCC
SE_BT L
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
24
23
22
21
C2 1uF
20
19
18
17
16
C4 1uF
15
14
13
L1
33uH
10V_to_26V
SE_BT L
G0
G1
L2
33uH
C5
220nF
C6
220nF
R1
4.7K
R2
4.7K
C7
470uF
C8
470uF
L_out1
8ohm
8ohm
R_out1
PAM8124
Document number: DS36627 Rev. 1 - 2
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Pin Descriptions
Pin Name I/O/P Function
1, 3 PVCCL P Power supply for left channel H-bridge, not connected to PVCCR or AVCC
2 SDN I Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to AVCC
4 MUTE I
5 LIN I Audio input for left channel
6 RIN I Audio input for right channel
7 VCM O Reference for analog cells
8, 9 AGND P Analog ground for digital/analog cells in core
10, 12 PVCCR P Power supply for right channel H-bridge, not connected to PVCCL or AVCC
NEW PRODUCT
11 VCLAMP P
13, 14 PGNDR P Power ground for right channel H-bridge
15 ROUT O Class-D H-bridge output for right channel
16 BSR I/O Bootstrap I /O for right channel H-bridge
17 GAIN1 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
18 GAIN0 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
19 SE_BTL I
20 AVCC P High-voltage analog power supply
21 BSL I/O Bootstrap I /O for left channel H-bridge
22 LOUT O Class-D H-bridge output for left channel
23, 24 PGNDL P Power ground for left channel H-bridge
Functional Block Diagram
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PAM8124
A logic high on this pin disables the outputs. A low on this pin enables the outputs. TTL logic levels with
compliance to AVCC
Internally generated voltage supply for bootstrap. Not to be used as a supply or connected to any
component other than the decoupling capacitor.
A logic low on this pin enables one single-ended input in BTL configuration. A logic high on this pin
enables two inputs in SE/BTL configuration. TTL logic levels with compliance to AVCC
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Absolute Maximum Ratings (@T
Parameter Rating Unit
Supply Voltage (VCC) 28 V
Logic Input Voltage (SDN, MUTE, GAIN0, GAIN1, SE_BTL)
Analog Input Voltage (LIN, RIN) -0.3 to +5.5 V
Storage Temperature -65 to +150 °C
Maximum Junction Temperature 150 °C
Junction to ambient thermal resistance 40 °C/W
Recommended Operating Conditions (@T
NEW PRODUCT
Symbol Parameter Min Max Unit
VCC
TA
TJ
Operating Ambient Temperature Range
Electrical Characteristics (@T
Symbol Parameter Test Conditions Min Typ Max Units
|VOS|
I
CC(q)
I
CC(MUTE)
I
CC(SDN)
R
DS(ON)
G Gain
Mute Attenuation Vi = 1Vrms -60 dB
PSRR Power Supply Rejection Ratio
PO
THD+N Total harmonic distortion + noise
Vn Output integrated noise floor
Cs Crosstalk
SNR Signal-to-noise ratio THD+N<1%, f = 1kHz, Gain = 20dB 92 dB
OTP Thermal trip point 160 °C
OTH Thermal hysteresis 60 °C
fosc Oscillator frequency
PAM8124
Document number: DS36627 Rev. 1 - 2
Class-D output offset voltage(measured
differently)
Quiescent supply current SDN = 2.5V, MUTE = 0V, No Load 25 40 mA
Quiescent supply current in mute mode MUTE = 2.5V, No load 25 40 mA
Quiescent current in shutdown mode SDN = 0.8V, No load 30 60 µA
Drain-source on-state resistance
Output Power at 1% THD+N
Output Power at 10% THD+N
= +25°C, unless otherwise specified.)
A
-0.3 to V
= +25°C, unless otherwise specified.)
A
Supply Voltage 10 26 V
Junction Temperature Range
= +25°C, VCC = 24V, Gain = 20dB, RL = 8Ω unless otherwise specified.)
A
= 0V, AV = 36dB
V
i
IO = 0.5A
GAIN1 = 0.8V, GAIN0 = 0.8V 18 20 22
GAIN1 = 0.8V, GAIN0 = 2.5V 24 26 28
GAIN1 = 2.5V, GAIN0 = 0.8V 30 32 34
GAIN1 = 2.5V, GAIN0 = 2.5V 34 36 38
V
= 200mVpp,
RIPPLE
f = 1kHz,gain = 20dB
= 4Ω, f = 1kHz
R
L
RL = 8Ω, f = 1kHz
= 4Ω, f = 1kHz
R
L
RL = 8Ω, f = 1kHz
=4Ω, f = 1kHz, Po = 10W
R
L
RL = 8Ω, f = 1kHz, Po = 5W
20Hz to 22kHz, A-weighted,
Gain = 20dB
P
= 1W, f = 1kHz, Gain = 20dB
O
SE_BTL = 2.5V 250 300 350
SE_BTL = 0.8V 360
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+0.3
CC
-40 +85 °C
-40 +125 °C
20 100 mV
150 mΩ
-52 dB
14
8
18
10
0.15
0.08
200 µV
-70 dB
V
dB
W
%
kHz
October 2013
© Diodes Incorporated
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PAM8124
Performance Characteristics (@T
20
10
5
2
1
%
0.5
0.2
NEW PRODUCT
0.1
0.06
1m 302m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10 20
20
10
5
2
1
%
0.5
0.2
0.1
0.05
0.03
20 20k50 100 200 500 1 k 2k 5k 10k
20
10
5
2
1
%
0.5
0.2
0.1
0.05
0.03
1m 502m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10 20
PAM8124
Document number: DS36627 Rev. 1 - 2
THD+N vs. Output Power (RL = 4Ω, SE)
W
THD+N vs. Frequency (R
L
PO = 2W/ 5W/ 8W
(Red / Blue/ Pink)
Hz
THD+N vs. Output Power (R
W
= +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
A
THD+N vs. Output Power (R
20
10
5
2
1
%
0.5
0.2
0.1
0.05
0.03
1m 202m 5m 10m 20m 50m 100m 200m 500m 1 2 5 10
= 4Ω, SE)
%
0.5
0.2
0.1
0.05
0.02
THD+N vs. Frequency (R
20
10
PO = 1W/ 2W/ 6W
(Red / Blue/ Pink)
5
2
1
20 20k50 100 200 500 1k 2k 5k 10k
= 8Ω, BTL)
L
20
10
0.5
%
0.2
0.1
0.05
0.02
0.01
THD+N vs. Frequency (R
PO = 5W/ 10W/ 15W
5
(Red / Blue/ Pink)
2
1
20 20k50 100 200 500 1k 2k 5k 10k
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W
Hz
L
= 8Ω, SE)
L
Hz
= 8Ω, BTL)
L
= 8Ω, SE)
October 2013
© Diodes Incorporated
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(
Performance Characteristics (@T
Crosstalk vs. Frequency (RL = 4Ω, SE)
PO = 1W
L to R/ R to L
Red /Blue)
20 20k50 100 200 500 1k 2k 5k 10k
PSRR vs. Frequency (R
TT
PSRR vs. Frequency (R
NEW PRODUCT
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
d
-50
B
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
+0
-5
-10
-15
-20
-25
-30
-35
d
-40
B
-45
-50
-55
-60
-65
-70
-75
-80
20 20k50 100 200 500 1k 2k 5k 10k
+0
TTT TT T
-5
-10
-15
-20
-25
-30
-35
d
-40
B
-45
-50
-55
-60
-65
-70
-75
-80
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Hz
L
Hz
= +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
A
= 4Ω, SE)
L
= 8Ω, BTL)
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Diodes Incorporated
+0
-5
-10
-15
-20
-25
-30
-35
-40
-45
d
-50
B
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
20 20k50 100 200 500 1k 2k 5k 10k
TT
PO = 1W
L to R/ R to L
(Red / Blue)
PSRR vs. Frequency (R
Crosstalk vs. Frequency (R
+0
TTT
-5
-10
-15
-20
-25
-30
-35
d
-40
B
-45
-50
-55
-60
-65
-70
-75
-80
20 20k50 100 200 500 1k 2k 5k 10k
Noise Floor (RL = 8Ω, SE)
+0
-10
-20
-30
-40
-50
d
-60
B
r
-70
A
-80
-90
-100
-110
-120
-130
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Hz
Hz
= 8Ω, SE)
L
= 8Ω, SE)
L
PAM8124
PAM8124
Document number: DS36627 Rev. 1 - 2
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Performance Characteristics (@T
NEW PRODUCT
Frequency Response (RL = 8Ω, SE)
+24
+23
L
= 33µH
FILT
+22
+21
+20
+19
d
+18
B
+17
g
+16
A
+15
+14
+13
+12
+11
+10
20 20k50 100 200 500 1k 2k 5k 10k
C
FILT
C
DC
= 0.22µF
= 470µF
Efficiency vs. Output Power (R
Product Line o
Diodes Incorporated
PAM8124
= +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
A
Frequency Response (R
+24
+23
+22
+21
+20
+19
d
+18
B
+17
g
+16
A
+15
+14
+13
+12
+11
+10
Hz
20 20k50 100 200 500 1k 2k 5k 10k
= 4Ω)
L
Efficiency vs. Output Power (R
Hz
= 8Ω, BTL)
L
= 8Ω)
L
Quiescent Current vs. Supply Voltage
OSC Frequency vs. Supply Voltage
PAM8124
Document number: DS36627 Rev. 1 - 2
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Performance Characteristics (@T
Case Temperature vs. Output Power (RL = 4Ω) Case Temperature vs. Output Power (RL = 8Ω)
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= +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
A
PAM8124
NEW PRODUCT
Two Channels Driving
Two Channels Driving
Application Information
Input Capacitors (Ci)
In the typical application, an input capacitor Ci, is required to allow the amplifier to bias the input signal to the proper DC level for optimum
operation. In this case, Ci and the minimum input impedance Ri form is a high-pass filter with the corner frequency determined in the follow
equation:
1
f
C
=
2RiCi
π
()
It is important to consider the value of Ci as it directly affects the low frequency performance of the circuit. For example, when Ri is 40kΩ and the
specification calls for a flat bass response are down to 20Hz. Equation is reconfigured as followed:
Ci
=
When input resistance variation is considered Ci is 200nF, so one would likely choose a value of 220nF. A further consideration for this capacitor
is the leakage path from the input source through the input network (Ci, Ri + Rf) to the load. This leakage current creates a DC offset voltage at
the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic
capacitor is the best choice.
Gain Setting Control
The gain of the PAM8124 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in following table are realized by changing the taps on the input resistors inside the amplifier. This causes the input impedance to
be dependent on the gain setting. The actual gain settings are controlled by ratios of resistors, so the gain variation from part-to-part is small.
However, the input impedance from part-to-part at the same gain may shift by ±20% due to shifts in the actual resistance of the input resistors.
Table 1: Gain Setting
PAM8124
Document number: DS36627 Rev. 1 - 2
1
2Rf
ic
π
()
Gain1 Gain0
0 0 20 40
0 1 26 20
1 0 30 10
1 1 36 6.67
Amplifier Gain (dB),
Typical
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Input Impedance (kΩ),
Typical (Ri)
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PAM8124
Application Information (cont.)
Input Resistance
Changing the gain setting can vary the input resistance of the amplifier from its smallest value (6.67kΩ ±20%) to the largest value (40kΩ ±20%).
As a result, if a single capacitor is used in the input high-pass filter, the –3dB cutoff frequency may change when changing gain steps.
The –3dB frequency can be calculated using the following Equation. Use the Ri values given in Table 1.
1
f
C
=
2RiCi
π
()
NEW PRODUCT
Single-Ended Output Capacitor
In single-ended (SE) applications, the dc blocking capacitor forms a high-pass filter with the speaker impedance. The frequency response rolls off
with decreasing frequency at a rate of 20dB/decade. The cutoff frequency is determined by:
1
=
f
coh
π
2
Table 2 shows some common component values and the associated cutoff frequencies:
Table 2: Common Filter Responses
-Speaker Impedance (Ω)
R
L
4 680 1000 2200
6 470 680 1500
8 330 470 1000
fc = 60Hz (-3dB) fc = 40Hz (-3dB) fc = 20Hz (-3dB)
CSE-DC Blocking Capacitor (µF)
CR
SEL
Output Filter and Frequency Response
For the best frequency response, a flat pass band output filter (second-order Butterworth) may be used. The output filter components consist of
the series inductor and capacitor to ground at the LOUT and ROUT pins. There are several possible configurations, depending on the speaker
impedance and whether the output configuration is single-ended (SE) or bridge-tied load (BTL). Table 3 lists the recommended values for the filter
components. It is important to use a high-quality capacitor in this application. A rating of at least X7R is required.
Table 3: Recommended Filter Output Components
Output Configuration Speaker Impedance(Ω) Filter Inductor(µH) Filter Capacitor(nF)
Single Ended (SE)
Bridge Tied Load (BTL) 8 22 680
4 22 680
8 33 220
PAM8124
Document number: DS36627 Rev. 1 - 2
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Application Information (cont.)
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PAM8124
NEW PRODUCT
BTL Filter Configuration SE Filter Configuration
Power and Heat Dissipation
Choose speakers that are able to stand large output power from the PAM8124. Otherwise, speaker may suffer damage.
Heat dissipation is very important when the device works in full power operation. Two factors affect the heat dissipation, the efficiency of the
device that determines the dissipation power, and the thermal resistance of the package that determines the heat dissipation capability.
Generally, class-D amplifiers are high efficiency and need no heat sink. Operating at higher powers a heat sink still may not be necessary if the
PCB is carefully designed to achieve good thermal dissipation.
How to Reduce EMI
Most applications require a ferrite bead filter for EMI elimination shown at Figure 1. The ferrite filter reduces EMI around 1MHz and higher. When
selecting a ferrite bead, choose one with high impedance at high frequencies, but low impedance at low frequencies.
OUT+
OUT-
Ferrite Bead
200pF
Ferrite Bead
200pF
Figure 1. Ferrite Bead Filter to Reduce EMI
Dual-Side PCB
To achieve good heat dissipation, the PCB's copper plate should be thicker than 35um and the copper plate on both sides of the PCB should be
utilized for heat sink. The thermal pad on the bottom of the device should be soldered to the plate of the PCB, and via holes, usually 9 to 16,
should be drilled in the PCB area under the device and deposited copper on the vias should be thick enough so that the heat can be dissipated to
the other side of the plate. There should be no insulation mask on the other side of the copper plate. It is better to drill more vias on the PCB
around the device if possible.
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Application Information (cont.)
MUTE Operation
The MUTE pin is an input for controlling the output state of the PAM8124. A logic high on this pin causes the outputs to run at a constant 50%
duty cycle. A logic low on this pin enables the outputs. This pin may be used as a quick disable or enable of the outputs.
Shutdown Operation
The PAM8124 employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SDN input terminal should be pulling high during normal operation when the amplifier is in use. Pulling SDN low causes the outputs to
mute and the amplifier to enter a low-current state. SDN should never be left unconnected to prevent the amplifier from unpredictable operation.
For the best power-off pop performance, the amplifier should be set in shutdown mode prior to removing the power supply voltage.
For the best start-up pop performance, the amplifier should be set in mute mode prior to restarting the amplifier.
NEW PRODUCT
Internal Bias Generator Capacitor Selection
The internal bias generator (VCM) provides the internal bias for the preamplifier stage. The external input capacitors and this internal reference
allow the inputs to be biased within the optimal common-mode range of the input preamplifiers.
The selection of the capacitor value on the VCM terminal is critical for achieving the best device performance. During startup or recovery from
shutdown state the VCM capacitor determines the rate at which the amplifier starts up. The startup time is not critical for the best de-pop
performance since any heard pop sound is the result of the class-D output switching-on other than that of the startup time. However, at least a
0.47µF capacitor is recommended for the VCM capacitor.
Another function of the VCM capacitor is to bypass high frequency noise on the internal bias generator.
Power Supply Decoupling, CS
The PAM8124 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic
distortion (THD) as low as possible. Power supply decoupling also prevents oscillations caused by long lead between the amplifier and the
speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply
leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor of
0.1µF is typically recommended, placed as close as possible to the device's PVCC lead. To filter lower-frequency noises a large aluminium
electrolytic capacitor of 470µF or greater is recommended, placed near the audio power amplifier. The 10µF capacitor also serves as a local
storage capacitor for supplying current during large signal transients on the amplifier outputs.
BSL and BSR Capacitors
The half H-bridge output stages use NMOS transistors therefore requiring bootstrap capacitors for the high side of each output to turn on correctly.
A ceramic capacitor 220nF or more rated for over 25V must be connected from each output to its corresponding bootstrap input. Specifically, one
220nF capacitor must be connected from LOUT to BSL and another 220nF capacitor from ROUT to BSR. It is recommended to use 1μF BST
capacitor to replace 220nF for lower than 100Hz applications.
VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal regulator is used to clamp the
gate voltage. A 1µF capacitor must be connected from VCLAMP to ground and must be rated for at least 25V. The voltages at the VCLAMP
terminals vary with VCC and may not be used to power any other circuitry.
Using Low-ESR Capacitors
Low-ESR capacitors are recommended throughout this application section. A real (with respect to ideal) capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the real capacitor behaves as an ideal capacitor.
Short-Circuit Protection
The PAM8124 has short circuit protection circuitry on the outputs to prevent damage to the device when output-to-output shorts (BTL mode),
output-to-GND shorts, or output-to-VCC shorts occur. Once a short-circuit is detected on the outputs, the output drive is immediately disabled.
This is not a latched fault. If the short was removed, the normal operation is restored.
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Application Information (cont.)
Thermal Protection
Thermal protection on the PAM8124 prevents damage to the device when the internal die temperature exceeds 160°C. There is a ±15 degree
tolerance on this trip point from device to device. Once the die temperature exceeds the set thermal point, the device enters into the shutdown
state and the outputs are disabled. This is not a latched fault, the thermal fault is cleared once the temperature of the die is reduced by 60°C. The
device begins normal operation at this point without external system intervention.
Over Voltage Protection and Under Voltage Lock-out (OVP and UVLO)
An over voltage protection (OVP) circuit is integrated in PAM8124, when the supply voltage is over 28V the OVP is active and then the output
stage is disabled. The PAM8124 will auto recovery when the supply voltage is lower than the OVP threshold.
The PAM8124 incorporates circuitry designed to detect low supply voltage. When the supply voltage drops to 9V or below, the PAM8124 goes
into a state of shutdown. When the supply voltage is higher than UVLO threshold normal operation is resumed.
NEW PRODUCT
Typical Applications Circuits
C10
L_in
R_i n
C1 1 uF
C2 1 uF
Mute
C7
10uF
0.1uF
U1
1
C9
0.1uF
2
3
4
5
6
7
8
9
10
11
12
C12
10uF
SD
R1
R2
C4
1uF
C3
1uF
PVCCL
SDN
PVCCL
MUTE
LIN
RIN
VCM
AGND
AGND
PVCCR
VCL A MP
PVCCR
C13
470uF
C14
470uF
PAM8124
VCC
PGNDL
PGNDL
LOUT
BSL
AVCC
SE_ BTL
GAIN0
GAIN1
BSR
ROU T
PGNDR
PGNDR
VCC
24
23
22
21
C5 1 uF
20
19
18
17
16
C6 1 uF
15
14
13
L1
33uH
G0
G1
L2
33uH
C8
0.1uF
VCC
C11
10uF
C15
220nF
C16
220nF
R3
4.7K
R4
4.7K
C17
470uF
C18
470uF
L_ou t
8ohm
8ohm
R_ou t
Schematic for Single-Ended (SE) Configuration (8Ω Speaker)
PAM8124
Document number: DS36627 Rev. 1 - 2
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Application Information (cont.)
Typical Applications Circuits (cont.)
NEW PRODUCT
IN+
IN-
C1 1uF
C2 1uF
Mute
C3
1uF
Product Line o
Diodes Incorporated
PAM8124
C10
C7
10uF
0.1uF
U1
1
PVCCL
2
SD
R1
R2
C4
1uF
SDN
3
PVCCL
4
MUTE
5
LIN
6
RIN
7
VCM
8
AGND
9
AGND
10
PVCCR
11
VCL A M P
12
PVCCR
C13
470uF
VCC
LOUT
BSL
AVCC
GAIN0
GAIN1
BSR
ROUT
24
23
22
21
C5 1 uF
20
19
18
17
16
C6 1 uF
15
14
13
L1
22uH
C8
0.1uF
G0
G1
L2
22uH
VCC
C11
10uF
C15
680 nF
C16
680 nF
R3
4.7K
R4
4.7K
8ohm
PGNDL
PGNDL
SE_BT L
PAM8124
PGNDR
PGNDR
C9
0.1uF
C12
10uF
C14
470uF
VCC
Schematic for Bridge-Tied-Load (BTL) Configuration with Differential Input (8Ω Speaker)
C10
C7
10uF
0.1uF
U1
1
SD
Mute
C3
1uF
R1
C4
1uF
IN
C1 1uF
2
3
4
5
6
7
8
9
10
11
12
PVCCL
SDN
PVCCL
MUTE
LIN
RIN
VCM
AGND
AGND
PVCCR
VCL A M P
PVCCR
C13
470uF
VCC
LOUT
BSL
AVCC
GAIN0
GAIN1
BSR
ROUT
24
23
22
21
C5 1uF
20
19
18
17
16
C6 1uF
15
14
13
L1
22u H
C8
0.1uF
G0
G1
L2
22u H
VCC
C11
10uF
C15
680nF
C16
680nF
R3
4.7K
R4
4.7K
8ohm
PGNDL
PGNDL
SE_BT L
PAM8124
PGNDR
PGNDR
C9
0.1uF
C12
10uF
C14
470uF
VCC
Schematic for Bridge-Tied-Load (BTL) Configuration with Single-Ended Input (8Ω Speaker)
PAM8124
Document number: DS36627 Rev. 1 - 2
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Ordering Information
Part Number Package Standard Package
PAM8124RHR TSSOP-24-EP 3000 Units/Tape&Reel
NEW PRODUCT
Marking Information
PVCCL
SDN
PVCCL
MUTE
LIN
RIN
VCM
AGND
AGND
PVCCR
VCLAMP
PVCCR PGNDR
Product Line o
Diodes Incorporated
PAM8124
PAM8124 X X X
Package Type
R: TSSOP H: 24 Pin R: Tape & Real
1
2
3
4
5
6
7
8
9
10
11
12 13
XXXYWWLL
PAM8124
Package Configuration
PGNDL
24
PGNDL
23
LOUT
22
BSL
21
20
AVCC
19
SE_BTL
18
GAIN0
17
GAIN1
16
BSR
ROUT
15
PGNDR
14
Shipping Package
PAM8124: Product Code
X: Internal Code
Y: Year
W: Week
LL: Internal Code
PAM8124
Document number: DS36627 Rev. 1 - 2
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© Diodes Incorporated
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Package Outline Dimensions (All dimensions in mm.)
Package: TSSOP-24-EP
NEW PRODUCT
Product Line o
Diodes Incorporated
PAM8124
PAM8124
Document number: DS36627 Rev. 1 - 2
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© Diodes Incorporated
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Product Line o
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PAM8124
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
NEW PRODUCT
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2013, Diodes Incorporated
www.diodes.com
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
IMPORTANT NOTICE
LIFE SUPPORT
PAM8124
Document number: DS36627 Rev. 1 - 2
15 of 15
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October 2013
© Diodes Incorporated
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