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15W STEREO CLASS-D AUDIO POWER AMPLIFIER WITH POWER LIMIT
Description
The PAM8006A is a 15W (per channel) stereo Class-D audio
amplifier which offers low THD+N (0.2%), low EMI and good PSRR
thus high quality sound reproduction.
The PAM8006A runs off of an 8V to 18V supply at much higher
efficiency than competitors’ Ics.
The PAM8006A only requires very few external components,
significantly saving cost and board space.
The PAM8006A is available in a QFN5x5-32L package.
Features
Pin Assignments
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PAM8006A
15W x2 into a 8 speaker
Low Noise: -90dB
Over 90% Efficiency
With Shutdown/Mute Function
Over Current ,OVP,UVLO,Thermal and Short-Circuit Protection
Low THD+N
Power Limit with Non-Clip
Low Quiescent Current
Pop Noise Suppression
Small Package Outlines: QFN5x5-32L
Pb-Free Package (RoHS Compliant)
Typical Applications Circuit
Applications
Flat Monitor /LCD TVs
Multi-Media Speaker System
DVD Players, Game Machines
Boom Box
Music Instruments
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
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PAM8006A
Pin Descriptions
Pin Number Package Name Function
1, 8, 17, 24 NC Not Connected
2 RINN Negative differential audio input for right channel.
3 RINP Positive differential audio input for right channel.
4 MUTE A logic high on this pin disables the outputs and a logic low enables the outputs.
5 AVDD 5V Analog Supply
6 LINP Positive differential audio input for left channel.
7 LINN Negative differential audio input for left channel.
9, 16 PGNDL Power ground for left channel H-bridge.
10, 15 PVCCL Power supply for left channel H-bridge, not connected to PVCCR or AVCC.
11 LOUTN Class-D 1/2-H-bridge negative output for left channel.
12 BSLN Bootstrap I/O for left channel, negative high-side FET.
13 BSLP Bootstrap I/O for left channel, positive high-side FET.
14 LOUTP Class-D 1/2-H-bridge positive output for left channel.
18 PL Reference voltage for power limit function.
19 V2P5 2.5V Reference for analog cells.
20 AGND Analog Ground
21 VCLAMP Internally generated voltage supply for bootstrap capacitors.
22 AVCC High-voltage analog power supply (8V to 26V)
23
25, 32 PGNDR Power ground for right channel H-bridge.
26, 31 PVCCR Power supply for right channel H-bridge, not connected to PVCCL or AVCC.
27 ROUTP Class-D 1/2-H-bridge positive output for right channel.
28 BSRP Bootstrap I/O for right channel, positive high-side FET.
29 BSRN Bootstrap I/O for right channel, negative high-side FET.
30 ROUTN Class-D 1/2-H-bridge negative output for right channel.
33 Thermal Pad
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
SD
Shutdown signal for IC (low= shutdown, high = operational). TTL logic levels
with compliance to V
Connect to ground. Thermal pad should be soldered down on all
applications to secure the device properly to the printed wiring board.
.
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Functional Block Diagram
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PAM8006A
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V
Notes: Maximum Gain: RI = 12.5k, RF = 100k;
Power Limit Function: R
Absolute Maximum Ratings (@T
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All
voltages are with respect to ground.
Parameter Rating Unit
Supply Voltage VCC
Input Voltage Range VI:
MUTE, PL 0 to 6.0 V
SD
RINN, RINP, LINN, LINP -0.3 to +6.0 V
Junction Temperature Range, TJ
Storage Temperature -65 to +150 °C
Lead Temperature 1,
6mm (1/16inch)
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
and RF are adjustable.
I
= +25°C, unless otherwise specified.)
A
-0.3 to +28.0 V
-0.3 to V
-40 to +125 °C
260 (5sec) °C
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PAM8006A
Recommended Operating Conditions (@T
Parameter Rating Unit
Supply Voltage VCC
Input Pin Voltage 0 to 5.5 V
High Level Input Voltage: SD
MUTE 2.0 to 5.5 V
Low Level Input Voltage: SD 0 to 0.3 V
MUTE 0 to 0.3 V
Ambient Operating Temperature -20 to +85 °C
8 to 18 V
2.0 to V
CC
= +25°C, unless otherwise specified.)
A
V
Thermal Information
Parameter Package Symbol Maximum Unit
Thermal Resisitance
(Junction to Case)
Thermal Resistance
(Junction to Ambient)
The exposed PAD must be soldered to a thermal land on the PCB.
Electrical Characteristics (@T
Symbol Parameter Conditions Min Typ Max Units
PO
IDD
ISD
R
DS(ON)
PSRR Power Supply Ripple Rejection Ratio
f
OSC
Vn Output Integrated Noise Floor 20Hz to 22kHz, A-Weighting -100 dB
CS Crosstalk
SNR Signal to Noise Ratio
Gain 32 dB
|VOS|
V2P5 2.5V Bias Voltage No Load 2.5 V
AVDD Internal Analog Supply Voltage
OTS Over Temperature Shutdown 160 °C
OTH Thermal Hysteresis 50 °C
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
Continuous Output Power
Quiescent Current (No Load) 16.5 25 mA
Supply Quiescent Current in Shutdown
Mode
Drain-Source On-State Resisitance
Oscillator frequency 300 kHz
Output Offset Voltage
(measured differentially)
QFN5x5-32L
QFN5x5-32L
= +25°C, VCC = 12V, RL =8, unless otherwise specified.)
A
JC
JA
THD+N = 0.12%, f = 1kHz, R
THD+N = 1%, f = 1kHz, RL = 8
THD+N = 10%, f = 1kHz, RL = 8
Shutdown = 0V 4 10 µA
I
= 0.5A
O
= +25°C
T
J
1V
Ripple, f = 1kHz,
PP
Inputs AC-Coupled to Ground
P
= 3W, RL = 8, f = 1kHz
O
Maximum Output at THD+N < 0.5%,
f = 1kHz
INN and INP Connected Together 30 mV
V
= 8V to 26V
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High Side 210
Low Side 210
Total 420
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= 8
L
5.0
°C/W
16.1
6
8.5
10
-65 dB
-95 dB
90 dB
5 5.5 V
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PAM8006A
Electrical Characteristics (@T
Symbol Parameter Conditions Min Typ Max Units
PO
THD+N Total Harmonic Distortion plus Noise
IDD
ISD
R
DS(ON)
PSRR Power Supply Ripple Rejection Ratio
f
OSC
Vn Output Integrated Noise Floor 20Hz to 22kHz, A-Weighting -100 dB
CS Crosstalk
SNR Signal to Noise Ratio
Gain 32 dB
|VOS|
V2P5 2.5V Bias Voltage No Load 2.5 V
AVDD Internal Analog Supply Voltage
OTS Over Temperature Shutdown 160 °C
OTH Thermal Hysteresis 50 °C
Continuous Output Power
Quiescent Current (No Load) 18 25 mA
Supply Quiescent Current in Shutdown
Mode
Drain-Source On-State Resisitance
Oscillator Frequency 300 kHz
Output Offset Voltage
(measured differentially)
= +25°C, VCC = 18V, RL =8, unless otherwise specified.)
A
THD+N = 0.12%, f = 1kHz, R
THD+N = 0.18%, f = 1kHz, RL = 8
P
= 10W, f = 1kHz, RL = 8
O
Shutdown = 0V 50 µA
I
= 0.5A
O
= +25°C
T
J
1V
Ripple, f = 1kHz,
PP
Inputs AC-Coupled to Ground
P
= 3W, RL = 8, f = 1kHz
O
Maximum Output at THD+N < 0.5%,
f = 1kHz
INN and INP Connected Together 30 mV
V
= 8V to 26V
CC
High Side 210
Low Side 210
Total 420
= 8
L
2.2
15
0.28 %
-65 dB
-95 dB
90 dB
5 5.5 V
W
m
PAM8006A
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Typical Performance Characteristics
(VCC = 18, RL = 8, GV = 32dB, TA = +25°C, VCC = 12V, RL =8, unless otherwise specified.)
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PAM8006A
PAM8006A
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Typical Performance Characteristics (cont.)
(VCC = 18, RL = 8, GV = 32dB, TA = +25°C, VCC = 12V, RL =8, unless otherwise specified.)
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PAM8006A
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Application Information
Test Setup for Performance Testing
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PAM8006A
Notes: 1. The AP AUX-0025 low pass filter is necessary for class-D amplifier measurement with AP analyzer.
2. Two 22H inductors are used in series with load resistor to emulate the small speaker for efficiency measurement.
MUTE Operation
The MUTE pin is an input for controlling the output state of the PAM8006A. A logic high on this pin disables the outputs and low enables the
outputs. This pin may be used as a quick disable or enable of the outputs without a volume fade.
Shutdown Operation
The PAM8006A employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SD input terminal should be held high during normal operation when the amplifier is in use. Pulling SD low causes the outputs to
mute and the amplifier to enter a low-current state. SD should never be left unconnected to prevent the amplifier from unpredictable operation.
For the best power-off pop performance, the amplifier should be set in shutdown mode prior to removing the power supply voltage.
Internal 2.5V Bias Generator Capacitor Selection
The internal 2.5V bias generator (V2P5) provides the internal bias for the preamplifier stage. The external input capacitors and this internal
reference allow the inputs to be biased within the optimal common-mode range of the input preamplifiers.
The selection of the capacitor value on the V2P5 terminal is critical for achieving the best device performance. During startup or recovery from
shutdown state, the V2P5 capacitor determines the rate at which the amplifier starts up. When the voltage on the V2P5 capacitor equals 0.75 x
V2P5, or 75% of its final value, the device turns on and the Class-D outputs start switching. The startup time is not critical for the best de-pop
performance since any heard pop sound is the result of the Class-D output switching-on other than that of the startup time. However, at least a
0.47F capacitor is recommended for the V2P5 capacitor.
Another function of the V2P5 capacitor is to filter high frequency noise on the internal 2.5V bias generator.
Power Supply Decoupling, CS
The PAM8006A is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total
harmonic distortion (THD) as low as possible. Power supply decoupling also prevents oscillations caused by long lead between the amplifier and
the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power
supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series resistance (ESR) ceramic
capacitor, typically 1F, is recommended, placing as close as possible to the device’s VCC lead. To filter lower frequency noises, a large
aluminum electrolytic capacitor of 10F or greater is recommended, placing near the audio power amplifier. The 10F capacitor also serves as a
local storage capacitor for supplying current during large signal transients on the amplifier outputs.
BSN and BSP Capacitors
The full H-bridge output stages use NMOS transistors only. They therefore require bootstrap capacitors for the high side of each output to turn
on correctly. An at least 220nF ceramic capacitor, rated for at least 25V, must be connected from each output to its corresponding bootstrap
input. Specifically, one 220nF capacitor must be connected from xOUTP to xBSP, and another 220nF capacitor from xOUTN to xBSN. It is
recommended to use 1F BST capacitor to replace 220nF or lower than 100Hz applications.
PAM8006A
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Application Information (cont.)
VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors not exceeded, an internal regulators are used to clamp the
gate voltage. A 1F capacitors must be connected from VCLAMP to ground and must be rated for at least 25V. The voltages at the VCLAMP
terminals vary with V
Internal Regulated 5-V Supply (AVDD)
The AVDD terminal is the output of an internally generated 5V supply, used for the oscillator, amplifier, power limit circuitry and logic control
circuitry. It requires a 0.1F to 1F capacitor, placed very close to the pin to ground to keep the regulator stable. The regulator may not be used
to power any external circuitry.
Differential Input Power Limit
The differential input stage of the amplifier eliminates noises that appear on the two input lines of the channel. To use the PAM8006A with a
differential source, connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input.
To use the PAM8006A with a single-ended source, AC ground the INP input through a capacitor equal in value to the input capacitor on INN and
apply the audio source to the INN input. In a single-ended input application, the INP input should be AC grounded at the audio source other than
at the device input for best noise performance.
Using Low-ESR Capacitors
Low-ESR capacitors are recommended throughout this application section. A real (with respect to ideal) capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the real capacitor behaves as an ideal capacitor.
Short-Circuit Protection
The PAM8006A has short circuit protection circuitry on the outputs to prevent damage to the device when output-to-output shorts, output-to-GND
shorts, or output-to-VCC shorts occur. Once a short-circuit is detected on the outputs, the output drive is immediately disabled. This is a latched
fault and must be reset by cycling the voltage on the SD pin to a logic low and back to the logic high state for normal operation. This will clear the
short-circuit flag and allow for normal operation if the short was removed. If the short was not removed, the protection circuitry will again activate.
Thermal Protection
Thermal protection on the PAM8006A prevents damage to the device when the internal die temperature exceeds 160°C. There is a ±15 degree
tolerance on this trip point from device to device. Once the die temperature exceeds the set thermal point, the device enters into the shutdown
state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 50°C.
The device begins normal operation at this point without external system intervention.
Power Limit
The voltage at PL pin can used to limit the power to levels below that which is possible based on the supply rail. Add a resistor from PL to ground
to set the voltage at the PLIMIT pin. An external reference may also be used if tighter tolerance is required. Also add a 1µF capacitor from PL pin
to ground. The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The gain of Class-D amplifier will automatic reduced if the output
power higher than setting value to make output power less than limited value and also provide good sound quality.
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
and may not be used to power any other circuitry.
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Application Information (cont.)
Power Limit (cont.)
The output power vs PL pin resistor value as below.
= 12V, R
V
CC
R(Ω) PL(V) PL(W) R(Ω) PL(V) PL(W)
56K 0.61 3.1 100K 0.99 8.1
62K 0.67 3.7 110K 1.07 9.0
68K 0.73 4.3 120K 1.15 9.6
75K 0.79 5.1 130K 1.22 10.0
82K 0.85 6.0 140K 1.36 10.7
91K 0.92 7.0 — — —
LOAD
= 8Ω
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Power Up/Down Sequence
The PAM8006A employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SD input terminal should be held high during normal operation when the amplifier is in use. Pulling SD low causes the outputs to
mute and the amplifier to enter a low-current state. SD should never be left unconnected to prevent the amplifier from unpredictable operation.
Suggest PL starting voltage is greater than 5V.
Start-up /power down sequencer recommended.
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
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Ordering Information
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PAM8006A
Part Number Part Marking Package Type Standard Package
PAM8006ATR
Marking Information
PAM8006A
XXXYWWLL
QFN5x5-32L 3000 Units/Tape&Reel
PAM8006A
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Package Outline Dimensions (All dimensions in mm.)
QFN5x5-32L
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PAM8006A
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
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IMPORTANT NOTICE
LIFE SUPPORT
PAM8006A
Document number: DSxxxxx Rev. 1 - 0
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