Diodes PAM3102 User Manual

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DUAL 150mA HIGH PSRR LOW-DROPOUT CMOS REGULATOR
Description
The dual LDO PAM3102 series of positive voltage linear regulators feature high output voltage accuracy, low quiescent current and low dropout voltage, making them ideal for battery powered applications. The line transient response and load transient response are excellent. Their high PSRR make them useful in applications where AC noise on the input power supply must be suppressed. Space-saving TSOT26 package for 2-ch LDOs is attractive for portable and handheld applications. They have both thermal shutdown and a current limit feature to prevent device failure under extreme operating conditions. They are stable with an output capacitance of 2.2μF or greater.
Features
Output Accuracy: ±2%  Low Dropout Voltage: 180mV@150mA  High PSRR: 70dB@100Hz  Low Noise Output  Current Limiting  Short Circuit Protection  Thermal Shutdown  Space Saving Package TSOT26
Pb-Free Package
Typical Applications Circuit
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Pin Assignments
Applications
 Cellular Phone  Portable Electronics, PDA  Wireless Devices, Wireless LAN  Computer Peripherals  Camera Module  GPS Receiver
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TSOT26
PAM3102
PAM3102
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Pin Descriptions
Pin
Number
1 CE1 2 VIN 3 CE2 4 VOUT2 5 GND 6 VOUT1
Pin
Name
Output 1 Enable Input Output 2 Enable Output 2 Ground Output 1
Functional Block Diagram
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PAM3102
Function
Absolute Maximum Ratings (@T
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All voltages are with respect to ground.
Parameter Rating Unit
Input Voltage 6.0 V Output Current 150/150 mA Output Pin Voltage Storage Temperature -40 to +125 °C ESD Rating (HBM) 2 kV Lead Soldering Temperature 300, (5sec) °C
PAM3102
Document number: DSxxxxx Rev. 1 - 2
= +25°C, unless otherwise specified.)
A
GND -0.3 to V
+0.3V
IN
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V
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PAM3102
Recommended Operating Conditions (@T
= +25°C, unless otherwise specified.)
A
Parameter Rating Unit
Supply Voltage Range 5.5 V Enable Input Resistance
0 to V
IN
Junction Temperature -40 to +125
Operation Temperature -40 to +85
V
°C
Thermal Information
Parameter Symbol Package Max Unit
Thermal Resistance Junction to Case) Thermal Resistance (Junction to Ambient) Internal Power Dissipation
θ
JC
θ
JA
P
D
Electrical Characteristics (@T
= +25°C, V
A
CE1
= V
Parameter Symbol Test Conditions Min Typ Max Units
Input Voltage Output Voltage
Dropout Voltage
V
V V
DROP
IN
IO = 1mA
O
= 1.8V, IO = 150mA
V
O
VO = 2.5V, IO = 150mA
VO = 2.8V, IO = 150mA
Output Current Current Limit Quiescent Current Ground Pin Current Shutdown Current Short Circuit Current
I
I
GND
I I
I
LIM
I
SD SC
Line Regulation LNR
150 Note 2 mA
O
VO 1.2V
IO = 0mA
Q
IO = 1mA to 150mA
V
CE1
= V
CE2
= 0V
VO = 0V
I
= 50mA, VIN = 3V to 4V VO = 1.8V
O
IO = 50mA, VIN = 3.5V to 4.5V VO = 2.5V
IO = 50mA, VIN = 3.8V to 4.8V VO = 2.8V Load Regulation LDR
Power Supply Ripple Rejection PSRR
Output Noise CE Input High Threshold CE Input Low Threshold
CE Pull-Up Resistance
V V V R
V
= 3.3V, IO = 1mA to 150mA
IN
I
= 50mA, VO = 1.8V
O
f = 10Hz to 100kHz 35
N
1.5 V
TH
0.3 V
TL
1.7 5 15 M
CE
Temperature Coefficient TC 40 ppm/°C Over Temperature Shutdown OTS Over Temperature Hysteresis OTH
Notes: 1. The minimym inout voltage (V V
2. Output current is limited by P
IN(MIN)
= VO +V
DROP
IN(MIN
D
, maximum IO = PD/(V
I
= 1mA
O
I
= 1mA
O
) of the PAM3102 is determined by output voltage and dropout voltage. The minimum input voltage is defined as:
– VO).
IN(MAX)
TSOT26 130 TSOT26 250
°C/W
TSOT26 400 mW
= VIN = VO +1V, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.)
CE2
Note 1 5.5 V
-2.0 +2.0 % 950 350 180
200 mA 175 250 µA 200 250 µA
0.1 1 µA 150 mA
-0.15 0.1 0.15 %/V
-2 1.0 2 %
f = 100Hz 70 dB f = 1kHz 63 dB f = 10kHz 45 dB
155 °C 40 °C
mV
µV
RMS
PAM3102
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Typical Performance Characteristics (@T
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= +25°C, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.)
A
PAM3102
PAM3102
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Typical Performance Characteristics (cont.)
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PAM3102
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Typical Performance Characteristics (cont.)
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Typical Performance Characteristics (cont.)
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Typical Performance Characteristics (cont.)
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Application Information
Capacitor Selection and Regulator Stability
Similar to any low dropout regulator, the external capacitors used with the PAM3102 must be carefully selected for regulator stability and performance.
A capacitor C distance between C Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response.
The PAM3102 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is >2.2µF with ESR>5m ensures stablilty.
Shutdown Input Operation
The PAM3102 is shutdown by pulling the CE input low, and turned on by tying the CE input to VIN or leaving the CE input floating.
Input-Output (Dropout) Voltage
A regulator's minimum input-output voltage differential (or dropout voltage) determines the lowest usable supply voltage. The PAM3102 has a typical 180mV dropout voltage. In batterypowered systems, this will determine the useful end-of-life battery voltage.
Current Limit and Short Circuit Protection
The PAM3102 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to 300mA by regulating the gate voltage. The PAM3102 also has a built-in short circuit current limit.
Thermal Considerations
Thermal protection limits power dissipation in the PAM3102. When the junction temperature exceeds 150°C, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below 120°C.
For continuous operation, the junction temperature should be maintained below 125°C. The power dissipation is defined as:
of more than 1μF can be employed in the input pin, while there is no upper limit for the capacitance of CIN. Please note that the
IN
and the input pin of the PAM3102 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3102.
IN

*
VVP
*
I
VI
GNDINOOIND
The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula:
/
Where T junction to the ambient.
For example, as is 250°C/W for the SOT-23 package based on the standard JEDEC 51-3 for a single-layer thermal test board, the maximum power dissipation at T
It is also useful to calculate the junction temperature of the PAM3102 under a set of specific conditions. Suppose the input voltage V the output current I defined as:
And the junction temperature T T T =40°C + 75°C =115°C<T
For this application, T configuration.
is the maximum allowable junction temperature +125°C , TA is the ambient temperature and θJA is the thermal resistance from the
J(MAX)
=25°C can be calculated by following formula:
A
P
)MAX(D
= 300mA and the case temperature TA = +40°C measured by a thermal couple during operation, the power dissipation is
O
P
D
= TA + PD*θJA
J
= 40°C +0.3W*250°C/W
J
J(MAX)
is lower than the absolute maximum operating junction temperature,+125°C, so it is safe to use the PAM3102 in this
J
TTP
can be calculated as follows:
J
= +125°C
PAM3102
Document number: DSxxxxx Rev. 1 - 2
A)MAX(J)MAX(D
JA
W4.0250/C25C125
SOT-23
= 3.3V,
IN
)V8.1V3.3(mA150*V8.2V3.3
mW300A200*V3.3mA150*
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Ordering Information
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PAM3102
Part Number Output Voltage Part Marking Package Type Standard Package
PAM3102-AST26R1
PAM3102-BST26R1
VOUT1 1.8V VOUT2 2.8V
VOUT1 1.8V VOUT2 2.5V
ABAYW TSOT26 3000Units/Tape&Reel
ABBYW TSOT26 3000Units/Tape&Reel
Marking Information
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TSOT26
PAM3102
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Package Outline Dimensions (All dimensions in mm.)
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PAM3102
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IMPORTANT NOTICE
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