These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability. All voltages are with respect to ground.
Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout:
1) Minimize the area of the high current switching loop of the rectifier diode and output capacitor to avoid excessive switching noise.
2) Connect high-current input and output components with short and wide connections. The high-current input loop goes from the positive
terminal of the input capacitor to the inductor, to the SW pin. The high-current output loop is from the positive terminal of the input capacitor
through the inductor, rectifier diode, and positive terminal of the output capacitors, reconnecting between the output capacitor and input
capacitor ground terminals. Avoid using vias in the high-current paths. If vias are unavoidable, use multiple vias in parallel to reduce resistance
and inductance.
3) Create a ground island (PGND) consisting of the input and output capacitor ground and PGND pin. Connect all these together with short, wide
traces or a small ground plane. Maximizing the width of the power ground traces improves efficiency and reduces output-voltage ripple and
noise spikes. Create an analog ground island (GND) consisting of the output voltage detection-divider ground connection, the I resistor
connections, VCC-5V and VCC-driver capacitor connections, and the device's exposed backside pad. Connect the GND and PGND islands by
connecting the GND pins directly to the exposed backside pad. Make sure no other connections between these separate ground planes.
4) Place the output voltage setting-divider resistors as close to the OVP pin as possible. The divider's center trace should be kept short. Avoid
running the sensing traces near SW Pin.
5) Place the VIN pin bypass capacitor as close to the device as possible. The ground connection of the VIN bypass capacitor should be
connected directly to GND pins with a wide trace.
6) Minimize the size of the SW node while keeping it wide and short. Keep the SW node away from the feedback node and ground. If possible,
avoid running the SW node from one side of the PCB to the other.
7) Refer to the PAM2845 Evaluation board for an example of proper board layout.
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