Symbol Parameter Test Conditions Min Typ. Max Unit
IQ Quiescent Current IO = 0mA - 40 60 μA
V
OUT
V
DROPOUT
I
OUT
I
LIMIT
I
SHORT
ΔV
ΔV
PSRR
= 1µF, C
IN
Output Volt age
Accuracy
V
OUT
Coefficient
Dropout Voltage I
Maximum Output
Current
= 1µF, VIN=5V, unless otherwise noted)
OUT
= 30mA 1.1761.2 1.224V
I
O
Temperature
-40°C to 85°C, I
= 600mA, V
OUT
600 - - mA
±100
= 30mA
OUT
= 1.2V - 850 1300 mV
OUT
-
- ppm /
Current Limit - 850 - mA
Short Circuit Current - 200 - mA
LINE
LOAD
Line Regulation 2.5V ≤ V
Load Regulation
(Note 4)
Power Supply
Rejection
Thermal Shutdown
Temperature
≤ 5.5V; I
IN
1mA ≤ I
1mA ≤ I
V
= 4.3V+0.5Vp-pAC,
IN
I
OUT
≤ 300mA 15 35 mV
OUT
≤ 600mA 30 55 mV
OUT
= 50mA
- 150 - ºC
= 30mA - 0.2 - %/V
OUT
F = 1KHz - 55 - dB
o
C
θ
JA
θ
JC
Notes: 4. Regulation is measured at constant junction temperature by low duty cycle pulse testing.
5. Test condition for SOT89-3L: Devices mounted on FR-4 substrate, single sided PC board, 2oz copper, with minimum recommended pad layout,
no air flow.
A 1μF ceramic capacitor is recommended to connect between IN
and GND pins to de couple input po wer supply glitc h and noise.
The amount of the capacitance may be increased without limit.
A lower ESR (Equivalent Series Resistance) capacitor allows the
use of less capac itance, while higher ESR type r equires more
capacitance. This input capacitor must be located as close as
possible to the device to assure input stability and less noise. For
PCB layout, a wide copper trace is required fo r both IN and GND.
Output Capacitor
The output capacitor is required to stabilize and help the transien t
response of the LDO. The AP7217D is designed to have
excellent transient response for most applications with a small
amount of output capacitance. The AP7217D is stable with any
small ceramic output capacitors of 1.0μF or higher value, and the
temperature coefficients of X7R or X5R type. Additional
capacitance helps to reduce undershoot and overshoot during
transient. For PCB layout, the output capacitor must be placed as
close as possible to OUT and GND pins, and keep the leads as
short as possible.
Thermal Considerations
Thermal Shutdown Protection limits power dissipation in
AP7217D. When the operation junction temperature exceeds
150°C, the Over Temperature Protection circuit sta rts the thermal
shutdown function and turns the pass element off. The pass
element turn on again after the junction temperature cools by
30°C. For continuous operation, do not exceed recommend
maximum operation junction temperature 125°C. The power
dissipation definition in device is:
PD = (VIN − V
OUT
) x I
+ VIN x IQ
OUT
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of surroundings
airflow and temperature difference between junctions to ambient.
The maximum power dissipation can be calculated by following
formula:
P
= ( T
D(MAX)
Where T
125°C, T
to ambient thermal resistance.
J(MAX)
is the ambient temperature and the θJA is the junction
A
V
IN
- TA ) / θJA
J(MAX)
is the maximum operation junction temperature
I
IN
IN
OUT
I
OUT
V
OUT
AP7217D
C
IN
GND
Iq
Current Limit Protection
When output current at OUT pin is higher than current limit
threshold, the current limit protection will be triggered and clamp
the output current to approximately 850mA to prevent
over-current and to protect the regulator from damage due to
overheating.
Short circuit protection
When V
200mV, short circuit protection will be triggered and clamp the
output current to approximately 200mA.
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notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither
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President of Diodes Incorporated.