Diodes AP7175 User Manual
A
3A ULTRA LOW DROPOUT LINEAR REGULATOR WITH ENABLE
Description
The AP7175 is a 3.0A ultra low-dropout (LDO) linear regulator that
features an enable input and a power-good output.
The enable input and power-good output allow users to configure
power management solutions that can meet the sequencing
requirements of FPGAs, DSPs, and other applications with different
start-up and power-down requirements.
The AP7175 features two supply inputs, for power conversion supply
and control. With the separation of the control and the power input
very low dropout voltages can be reached and power dissipation is
reduced.
A precision reference and feedback control deliver 1.5% accuracy
over load, line, and operating temperature ranges.
The AP7175 is available in SO-8EP and MSOP-8EP package with an
NEW PRODUCT
exposed PAD to reduce the junction to case resistance and extend
the temperature range it can be used in.
Features
• VIN Range: 1.2V to 3.65V V
• Adjustable output voltage
• Continuous Output Current I
• Fast transient response
• Power on reset monitoring on V
• Internal Softstart
• Stable with Low ESR MLCC capacitors
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
3.0V to 5.5V
CNTL
= 3A
OUT
CNTL
and VIN
Pin Assignments
Applications
• Notebook
• PC
• Netbook
• Wireless Communication
• Server
• Motherboard
• Dongle
• Front Side Bus VTT (1.2V/3.3A)
P7175
Typical Applications Circuit
R3
5.1K
C
CNTL
1uF
C
IN
10uF
ON
OFF
AP7175
Document number: DS35606 Rev. 3 - 2
PG
VCNTL
VIN
EN
AP7175
VOUT
FB
GND
R1
12K
R2
24K
Figure 1. Typical Application Circuit
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C1
*Optional
C
OUT
10uF
December 2012
© Diodes Incorporated
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Pin Descriptions
Pin Number
SO-8EP MSOP-8EP
3/4 3/4
5 5
6 6
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Pin
Name
GND 1 1 Ground
FB 2 2
V
OUT
VIN
V
CNTL
PG 7 7
EN 8 8
PAD EP EP
Functional Block Diagram
P7175
Function
Feedback to set the output voltage via an external resistor divider between V
Power Output Pin. Connect at least 10µF capacitor to this pin to improve transient response and
required for stability. When the part is disabled the output is discharged via an internal pull-low
MOSFET.
Power Input Pin for current supply. Connect a decoupling capacitor (10µF) as close as possible to
the pin for noise filtering.
BIAS supply for the controller, recommended 5V. Connect a decoupling capacitor (1µF) as close
as possible to the pin for noise filtering.
Power Good output open drain to indicate the status of V
pulled low when the voltage is outside the limits, during thermal shutdown and if either V
go below their thresholds.
Enable pin. Driving this pin low will disable the part. When left floating an internal current source will
pull this pin high and enable it.
Exposed pad connect this to V
for good thermal conductivity.
IN
via monitoring the FB pin. This pin is
OUT
and GND.
OUT
CNTL
or VIN
AP7175
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© Diodes Incorporated
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Absolute Maximum Ratings (Note 4) (@T
= +25°C, unless otherwise specified.)
A
Symbol Parameter Rating Unit
VIN V
V
V
CNTL
V
V
OUT
Supply Voltage (VIN to GND)
IN
CNTL
OUT
Supply Voltage (V
CNTL
to GND)
to GND Voltage -0.3 to VIN +0.3
-0.3 to +4.0 V
-0.3 to +7.0 V
V
PG to GND Voltage -0.3 to +7.0 V
EN, FB to GND Voltage
PD
TJ
T
STG
T
SDR
Note: 4. Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only;
functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may
be affected by exposure to absolute maximum rating conditions for extended periods of time.
Power Dissipation (SO-8EP) 1.7 W
Power Dissipation (MSOP-8EP) 1.5
Maximum Junction Temperature 150 °C
Storage Temperature -65 to +150 °C
Maximum Lead Soldering Temperature, 10 Seconds 260 °C
-0.3 to V
CNTL
+0.3
V
NEW PRODUCT
Recommended Operating Conditions (@T
= +25°C, unless otherwise specified.)
A
Symbol Parameter Min Max Unit
V
V
CNTL
VIN V
V
V
OUT
I
V
OUT
C
V
OUT
E
ESR of V
SRCOUT
TA
TJ
CNTL
IN
OUT
OUT
OUT
Ambient Temperature -40 +85 °C
Junction Temperature -40 +125
Supply Voltage
Supply Voltage
Output Voltage (when V
Output Current
Output Capacitance
Output Capacitor
OUT
CNTL-VOUT
>1.9V)
Continuous Current 0 3
Peak Current 0 4
I
= 3A at 25% nominal V
OUT
I
= 2A at 25% nominal V
OUT
I
= 1A at 25% nominal V
OUT
OUT
OUT
OUT
3.0 5.5 V
1.2 3.65 V
0.8
8 1100
8 1700
8 2400
VIN - V
DROP
0 200 m
AP7175
Document number: DS35606 Rev. 3 - 2
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P7175
V
A
µF
°C
December 2012
© Diodes Incorporated
A
Electrical Characteristics
(V
= 5V, VIN = 1.8V, V
CNTL
= 1.2V and TA = -40 to +85°C, @TA = +25°C, unless otherwise specified.)
OUT
Symbol Parameter Test Conditions
Min Typ Max
SUPPLY CURRENT
IV
CNTL
ISD
V
Supply Current EN = V
CNTL
V
Supply Current at
CNTL
Shutdown
, I
CNTL
EN = GND — 15 30 µA
VIN Supply Current at Shutdown EN = GND, VIN=3.65V
OUT
=0A
— 1.0 1.5 mA
— — 1 µA
POWER-ON-RESET (POR)
2.5 2.7 2.95 V
— 0.4 — V
0.8 0.9 1.0 V
— 0.5 — V
— 0.8 — V
-1.5 — +1.5 %
— 0.06 0.25 %
-0.15 — +0.15 %/V
— 10 —
-100 — 100 nA
NEW PRODUCT
Rising V
V
POR Hysteresis
CNTL
Rising V
VIN POR Hysteresis
OUTPUT VOLTAGE
Reference Voltage
Output Voltage Accuracy
REF
Load Regulation
V
Line Regulation
V
Pull-low Resistance V
OUT
FB Input Current
POR Threshold
CNTL
POR Threshold
IN
FB = V
V
CNTL
T
J
I
OUT
I
OUT
CNTL
V
FB
OUT
=3.0 ~ 5.5V, I
= -40 to +125°C
=0A to 3A
=10mA, V
= 3.3V, VEN = 0V, V
= 0.8V
OUT
= 3.0 to 5.5V
CNTL
= 0 to 3A,
< 0.8V
OUT
DROPOUT VOLTAGE
= +25°C
T
J
TJ = -40 to +125°C
= +25°C
T
J
TJ = -40 to +125°C
= +25°C
T
J
TJ = -40 to +125°C
NOMiNAL
4.5 5.7 6.7 A
4.2 A
V
DROP
I
LIM
-to-V
V
IN
(Note 5)
Current-Limit Level
Dropout Voltage
OUT
V
OUT
= 5.0V,
V
CNTL
= 3A
I
OUT
= +25°C, V
T
J
OUT
V
OUT
V
OUT
TJ = -40 to +125°C
= 2.5V
= 1.8V
= 1.2V
= 80% V
PROTECTIONS
I
SHORT
TSD
Short Current-Limit Level
Thermal Shutdown Temperature
V
< 0.2V
FB
TJ rising
— 1.1 — A
— 170 °C
Thermal Shutdown Hysteresis — 50 — °C
ENABLE AND SOFT-START
EN Logic High Threshold Voltage
V
EN
rising
0.5 0.8 1.1 V
EN Hysteresis 0.1 — V
EN Pull-High Current EN = GND — 5 — uA
TSS
Soft-Start Interval 0.3 0.6 1.2 ms
Turn On Delay
From being enabled to V
rising 10%
OUT
200 350 500 us
POWER-GOOD AND DELAY
V
THPG
Rising PG Threshold Voltage
VFB rising
90 92 95 %
PG Threshold Hysteresis — 8 — %
PG Pull-low Voltage PG sinks 5mA — 0.25 0.4 V
V
< falling PG voltage
PG Debounce Interval
PG Delay Time
Note: 5. Dropout voltage is the voltage difference betw een the inut and the output at which the output voltage drops 2% below its nominal value.
FB
threshold
From V
= V
FB
edge of the V
to rising
THPG
PG
— 10 — µs
1 2 4 ms
AP7175
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AP7175
0.26 0.31
0.42
0.24 0.29
0.40
0.23 0.28
0.38
December 2012
© Diodes Incorporated
P7175
Unit
V
A
P7175
Electrical Characteristics (cont.)
(V
= 5V, VIN = 1.8V, V
CNTL
Symbol Parameter Test Conditions
THERMAL CHARACTERISTIC
Notes: 6. Device mounted on 2"*2" FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground
plane.
7. Device mounted on 2"*2" FR-4 substrate PC board, 2oz copper,with minimum recommended pad layout.
Thermal Resistance Junction-to-Ambient
JA
Thermal Resistance Junction-to-Ambient
JC
= 1.2V and TA = -40 to +85°C, @TA = +25°C, unless otherwise specified.)
OUT
SO-8EP (Note 6) 70
MSOP-8EP (Note 7) 80
SO-8EP (Note 6) 30
MSOP-8EP (Note 7) 30
AP7175
Min Typ Max
Unit
°C/W
°C/W
°C/W
°C/W
Typical Characteristics
NEW PRODUCT
AP7175
Document number: DS35606 Rev. 3 - 2
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December 2012
© Diodes Incorporated
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