Diodes AP7173 User Manual

1.5A LOW DROPOUT LINEAR REGULATOR WITH

Description

The AP7173 is a 1.5A low-dropout (LDO) linear regulator that features a user-programmable soft-start, an enable input and a power-good output.

The soft-start reduces inrush current of the load capacitors and minimizes stress on the input power source during startup. The enable input and power-good output allow users to configure power management solutions that can meet the sequencing requirements of FPGAs, DSPs, and other applications with different start-up and power-down requirements.

The AP7173 is stable with any type of output capacitor of

2.2µF or more. A precision reference and feedback control deliver 2% accuracy over load, line, and operating temperature ranges. The AP7173 is available in both DFN3030-10 and SO-8EP packages.

PROGRAMMABLE SOFT-START

Pin Assignments

1

IN IN

2 3

PG

VCC

4 5

EN

1

IN

PG

2

3

EN

4

( T op View )

DFN3030-10

(T op View)

SO-8EP

AP7173

10

OUT

9

OUT FB

8 7

SS

6

GND

OUT

8

7

FB

SSVCC

6

GND

5

Features

● Low V

● Bias voltage (V

● Low V

● Low dropout: 165mV typical at 1.5A, V

● 2% accuracy over line, load and temperature range

● Power-Good (PG) output for supply monitoring and for

sequencing of other supplies

and wide VIN range: 1.0V to 5.5V

IN

) range: 2.7V to 5.5V

VCC

range: 0.8V to 3.3V

OUT

VCC

= 5V

Applications

• PCs, Servers, Modems, and Set-Top-Boxes

• FPGA Applications

• DSP Core and I/O Voltages

• Post-Regulation Applications

• Applications With Sequencing Requirements

● Programmable soft-start provides linear voltage startup

● Bias supply permits low V

operation with good transient

IN

response

● Stable with any output capacitor ≥ 2.2µF

● DFN3030-10 and SO-8EP: available in “Green” molding

compound (No Br, Sb)

● Lead-free finish/ RoHS Compliant (Note 1)

Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at http://www.diodes.com/products/lead_free.html.

Typical Application Circuit

V

R3

V

IN

C1

V

VCC

PG

VCC

AP7173

OUT

FB SS

R1

R2

OUT

C2

C3

AP7173

Document number: DS31369 Rev. 9 - 2

EN

GND

C

SS

Figure 1. Typical Application Circuit (Adjustable Output)

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Typical Application Circuit (Continued)

Table 1. Resistor Values for Programming the Output Voltage (Note 2)

R1 (kΩ) R2 (kΩ) V

Short Open 0.8

0.619 4.99 0.9

1.13 4.53 1

1.37 4.42 1.05

1.87 4.99 1.1

2.49 4.99 1.2

4.12 4.75 1.5

3.57 2.87 1.8

3.57 1.69 2.5

3.57 1.15 3.3

Note: 2 VOUT = 0.8 x (1 + R1 / R2)

Table 2. Capacitor Values for Programming the Soft-Start Time(Note 3)

CSS SOFT-START TIME

Open 0.1ms 270pF 0.5ms 560pF 1ms

2.7nF 5ms

5.6nF 10ms

0.01μF 18ms

Note: 3. tSS(s) = 0.8 x CSS(F) / (4.4 x 10–7)

AP7173

1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START

(V)

OUT

AP7173

Document number: DS31369 Rev. 9 - 2

Figure 2. Turn-On Response

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Pin Descriptions

Pin Name

IN 1 1, 2 Power Input pin.

PG 2 3

VCC 3 4

EN 4 5

GND 5 6 Ground.

SS 6 7

FB 7 8

OUT 8 9, 10 Regulated Output pin.

Thermal Pad — —

SO-8EP DFN3030-10

Functional Block Diagram

PIN #

AP7173

1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START

Description

Power-Good pin, open-drain output. When the V PG threshold the PG pin is driven low; when the V threshold, the PG pin goes into a high-impedance state. To use the PG pin, use a 10kΩ to 1MΩ pull-up resistor to pull it up to a supply of up to

5.5V, which can be higher than the input voltage. Bias Input pin, provides input voltage for internal control circuitry. This voltage should be higher than the V Enable pin. This pin should be driven either high or low and must not be floating. Driving this pin high enables the regulator, while pulling it low puts the regulator into shutdown mode.

Soft-Start pin. Connect a capacitor between this pin and the ground to set the soft-start ramp time of the output voltage. If no capacitor is connected, the soft-start time is typically 100µS. Feedback pin. Connect this pin to an external voltage divider to set the output voltage.

Solder this pad to large ground plane for increased thermal performance.

.

IN

is below the

OUT

exceeds the

OUT

IN

EN

VCC

PG

AP7173

Document number: DS31369 Rev. 9 - 2

Gate

Driver

Current Limit and

Thermal Shutdown

+

-

+

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0.8V

0.72V

OUT

SS

FB

GND

April 2011

AP7173

r

Absolute Maximum Ratings (Note 4)

Symbol Paramete

ESD HBM Human Body Model ESD Protection 4000 V

ESD MM Machine Model ESD Protection 350 V

VIN, V

Notes: 4. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

5. Ratings apply to ambient temperature at 25°C . The JEDEC High-K board design used to derive this data was a 2 inch x 2 inch multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on the top and bottom of the board.

Recommended Operating Conditions

Symbol Parameter Min Max Unit

Note: 6. At VIN =1V, the maximum load currents may be lower than 1.5A.

Input Voltage Range -0.3 to +6 V

VCC

VEN Enable Voltage Range -0.3 to +6 V

VPG Power-Good Voltage Range -0.3 to +6 V

VSS Soft-Start Voltage Range -0.3 to +6 V VFB Feedback Voltage Range -0.3 to +6 V

V

Output Voltage Range -0.3 to VIN +0.3 V

OUT

I

Maximum Output Current Internally Limited

OUT

PD

TJ Junction Temperature Range -40 to +150 ºC

TST Storage Junction Temperature Range -65 to +150 ºC

V

IN

V

VCC

I

OUT

T

A

Continuous Total Power Dissipation (Note 5)

Input Voltage (Note 6) 1.0 5.5 V Bias Voltage 2.7 5.5 V Output Current 0 1.5 A Operating Ambient Temperature -40 85 ºC

DFN3030-10 3690 SO-8EP 5650

1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START

Ratings Unit

mW

AP7173

Document number: DS31369 Rev. 9 - 2

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AP7173

)

Electrical Characteristics

At VEN = 1.1V, VIN = V unless otherwise noted. Typical values are at T

Symbol Parameter Test Conditions Min Typ. Max Unit

VIN Input Voltage Range V

V

VCC

V

REF

V

OUT

ΔV

/ΔVIN /

OUT

V

OUT

ΔV

/V

OUT

/ΔI

VDO

ICL Current Limit V

I

Short-Circuit Current V

SHORT

I

Bias Pin Current 1 2 mA

VCC

I

SHDN

IFB Feedback Pin Current –1 0.1 1 µA

PSRR

TST Startup Time R

ISS

V

Enable Input High Level 1.1 5.5 V

EN, HI

V

Enable Input Low Level 0 0.4 V

EN, LO

V

Enable Pin Hysteresis 50 mV

EN, HYS

IEN Enable Pin Current VEN= 5V 0.1 1 µA

V

PG Trip Threshold V

PG, TH

V

PG Trip Hysteresis 3 %V

PG, HYS

V

PG Output Low Voltage IPG= 1mA (sinking), V

PG, LO

I

PG Leakage Current VPG= 5.25V, V

PG, LKG

TSD

θ

JA

θ

JC

Notes: 7. V

8. Tested at 0.8V; resistor tolerance is not taken into account.

9. Dropout is defined as the voltage from V

10. Test condition for DFN3030-10: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.

11. Test condition for SOP-8L-EP: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.

should be higher or equal to VIN in this chip.

VCC

+ 0.5V, C

OUT

Bias Pin Voltage Range (Note 7) Internal Reference (Adj.) Output Voltage Range V

Accuracy (Note 8)

Line Regulation V

= 0.1uF, CIN = C

VCC

2.7 5.5 V TA = +25 ºC 0.792 0.8 0.808 V

= 5V, I

IN

2.97V≤V 50mA≤I

OUT (NOM)

A

Load Regulation 50mA≤I

= 1.5A,V

Dropout Voltage (Note 9)

Shutdown Supply Current (I

GND

)

I

OUT

I

= 1.5A, VIN = V

OUT

= 80% x V

OUT

< 0.2V 0.6 1 A

OUT

≤0.4V 1 50 µA

V

EN

1KHz, I

= 1.8V, V

Power-Supply Rejection (V

IN

to V

OUT

)

V

IN

300KHz, I V

= 1.8V, V

IN

1KHz, I

= 1.8V, V

Power-SupplyRejection (V

VCC

to V

OUT

)

Soft-Start Charging Current

Thermal Shutdown Temperature

Thermal Resistance Junction-to-Ambient

Thermal Resistance Junction-to-Case

VI

N

300KHz, I V

= 1.8V, V

IN

LOAD

VSS= 0.4V 440 nA

decreasing 85 90 94 %V

OUT

Shutdown, temperature increasing +150 Reset, temperature decreasing +130 DFN3030-10 (Note 10)

SO-8EP (Note 11) 23 DFN3030-10 (Note 10) 4.9 SO-8EP (Note 11) 1.8

to V

IN

OUT

1.5A LOW DROPOUT LINEAR REGULATOR WITH PROGRAMMABLE SOFT-START

= 10uF, I

OUT

= +25°C.

= 1.5A 0.8 3.3 V

OUT

≤5.5V,

VCC

≤1.5A

OUT

+ 0.5≤VIN, 5.5V 0.03 %/V

≤1.5A 0.09 %/A

OUT

VCC–VOUT(NOM)

VCC

OUT (NOM

= 1A,

OUT

for I

when V

= 1.5V

OUT

=1A,

OUT

=1.5V

OUT

= 1A,

=1.5V

OUT

= 1A,

OUT

=1.5V

OUT

= 1.0A, CSS = open 100 µS

OUT

OUT>VPG, TH

is 3% below nominal.

OUT

= 50mA, V

OUT

= 5.0V, and TA = –40°C to +85°C,

VCC

+ VDO 5.5 V

OUT

–2 ±0.5 2 %

≥3.25V 165 270 mV

1.5 1.7 V 2 3 4 A

60

dB

30 50

dB

30

OUT<VPG, TH

0.3 V

0.1 1 µA ºC

35

o

C/W

o

C/W

OUT OUT

AP7173

Document number: DS31369 Rev. 9 - 2

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