The AP7168 is a 1.2A, adjustable output voltage, ultra-low
dropout linear regulator. The device includes pass e lement,
error amplifier, band-gap reference, current limit and thermal
shutdown circuitry. The device is turned on when EN pin is
IN
1
set to logic high level. A Power-OK (POK) output is available
for power sequence control.
The characteristics of the low dropout voltage and low
quiescent current make it suitable for low to medium power
POK
NC
2
3
applications, for example, laptop computers, audio and video
applications, and battery powered devices. The typical
EN
4
quiescent current is approximately 125µA.
Built-in current-limit and thermal-shutdown functions prevent
IC from damage in fault conditions. The AP7168 is available
in SO-8EP package.
Features
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• Wide input voltage range: 2.2V – 5.5V
• 230mV very low dropout at 500mA load
• 500mV very low dropout at 1A load
• Very low quiescent current (I
• Adjustable output voltage range: 0.8V to 5.0V
• Very fast transient response
• High PSRR
• Accurate voltage regulation
): 125µA typical
Q
Applications
• Servers and laptops
• Smart phone and PDA
• MP3/MP4
• Bluetooth headset
• Low and medium power applications
• FPGA and DSP core or I/O power
• Current limiting and short circuit protection
• Thermal shutdown protection
• Stable with any type output capacitor ≥ 4.7µF
• Ambient temperature range -40ºC to 85°C
• SO-8EP: Available in “Green” Molding Compound (No
Br, Sb)
•Lead Free Finish/ RoHS Compliant (Note 1)
Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html.
Symbol Parameter Test Conditions Min Typ. Max Unit
I
SHDN
V
Dropout
V
V
ΔV
OUT
ΔV
IN
ΔV
OUT
PSRR
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I
I
SHORT
VOL
V
POK_TH_UP
V
POK_Hys
POK deglitch
I
POK_LK
T
T
Notes: 3. POK pin must be disconnected from IN pin.
layer and thermal vias to bottom layer ground plane.
= V
IN
I
Q
+1V, C
OUT
Input Quiescent Current I
= 1μF, C
IN
OUT
Input Shutdown Current VEN = 0V, I
Dropout Voltage
FB reference voltage 0.8 V
REF
I
FB
OUT
/ V
tST
/
FB leakage
Output Voltage Total Accuracy -3 3 %
Line Regulation
OUT
V
Load Regulation I
OUT
Start-up Time, from EN high to POK
high
Power Supply Rejection Ratio
LIMIT
V
IL
V
IH
I
EN
Current limit
Short-circuit Current V
EN Input Logic Low Voltage 0.4 V
EN Input Logic High Voltage 1.4 V
EN Input leakage V
POK output low voltage Force 2mA 100 200 mV
Output voltage (rising) POK threshold
Output voltage POK hysteresis 4% V
V
POK leakage current V
SHDN
HYS
θ
JA
4. Test condition for SO-8EP: Device mounted on 2" x 2" FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top
A 1μF ceramic capacitor is recommended to connect
between IN and GND pins to decouple input power supply
glitch and noise. The amount of the capacitance may be
increased without limit. A lower ESR (Equivalent Series
Resistance) capacitor allows the use of less capacitance,
while higher ESR type requires more capacitance. This
input capacitor should be located as close as possible to
the device to assure input stability and less noise. For
PCB layout, a wide copper trace is required for both IN
and GND.
Output Capacitor
The output capacitor is required to stabilize and help the
transient response of the LDO. The AP7168 is designed to
have excellent transient response for most applications
with a small amount of output capacitance. The AP7168 is
stable for all available types and values of output
capacitors ≥ 4.7μF . The device is also stable with multiple
capacitors in parallel, which can be of any type of value.
Additional capacitance helps to reduce undershoot and
overshoot during transient. This capacitor should be
placed as close as possible to OUT and GND pins for
optimum performance.
Adjustable Operation
The AP7168 provides output voltage from 0.8V to 5.0V
through external resistor divider as shown below.
V
IN
C
IN
The output voltage is calculated by:
Where V
Rearranging the equation will give the following equation
to find the approximate resistor divider values:
To maintain the stability of the internal reference voltage,
R
Other than external resistor divider, no minimum load is
required to keep the device stable. The device will remain
stable and regulated in no load condition.
ENABLE/SHUTDOWN Operation
The AP7168 is turned on by setting the EN pin high, and is
turned off by pulling it low. If this feature is not used, the
EN pin should be tied to IN pin to keep the regulator output
on at all time. To ensure proper operation, the signal
source used to drive the EN pin must be able to swing
above and below the specified turn-on/off voltage
thresholds listed in the Electrical Characteristics section
under V
and VIH.
IL
POWER-OK
The Power-Ok (POK) pin is an active high open-drain
output. It can be connected to any 5.5V or lower rail
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through an external pull-up resistor. The recommended
sink current of POK pin is up to 4mA, so the pull-up
resistor for POK should be in the range of 10kΩ to 1MΩ. If
output voltage monitoring is not needed, the POK pin can
be left floating.
Current Limit Protection
When output current at OUT pin is higher than current limit
threshold, the current limit protection will be triggered and
clamp the output current to approximately 1.6A (1.2A min)
to prevent over-current and to protect the regulator from
damage due to overheating.
Short Circuit Protection
When OUT pin is short-circuited to GND or OUT pin
voltage is less than 200mV, short circuit protection will be
triggered and clamp the output current to approximately
750mA. This feature protects the regulator from overcurrent and damage due to overheating.
Low Quiescent Current
The AP7168, consuming only around 150µA for all input
range and output loading, provides great power saving in
portable and low power applications.
Wide Output Range
The AP7168, with a wide output range of 0.8V to 5.0V,
provides a versatile solution for many portable and low
power applications.
Thermal Shutdown Protection
Thermal protection disables the output when the junction
temperature rises to approximately +145°C, allowing the
device to cool down. When the junction temperature
reduces to approximately +120°C the output circuitry is
enabled again. Depending on power dissipation, thermal
resistance, and ambient temperature, the thermal
protection circuit may cycle on and off. This cycling limits
the heat dissipation of the regulator, protecting it from
damage due to overheating.
Power Dissipation
The device power dissipation and proper sizing of the
thermal plane that is connected to the thermal pad is
critical to avoid thermal shutdown and ensuring reliable
operation. Power dissipation of the device depends on
input voltage and load conditions and can be calculated
by:
xI)VV(P−
OUTOUTIND
The AP7168 is available in the SO-8EP packages, both
with exposed pad, which is the primary conduction path fo r
heat to the printed circuit board (PCB). The pad can be
connected to ground or be left floating; however, to ensure
the device will not overheat, it should be attached to an
appropriate amount of copper PCB area.
However, the maximum power dissipation that can be
handled by the device depends on the maximum junction
to ambient thermal resistance, maximum ambient
temperature, and maximum device junction temperature,
which can be approximated by the equation below:
Notes: 5. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
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