Diodes AP65503 User Manual

Page 1
LIGHT LOAD IMPROVED 5A, 750kHz SYNCH DC/DC BUCK CONVERTER
Description
The AP65503 is a 750kHz switching frequency external compensated
synchronous DC/DC buck converter. It has integrated low R
and low side MOSFETs.
The AP65503 enables continues load current of up to 5A with
efficiency as high as 96%.
The AP65503 implements an automatic custom light load efficiency
improvement algorithm.
The AP65503 features current mode control operation, which enables
fast transient response times and easy loop stabilization.
The AP65503 simplifies board layout and reduces space
requirements with its high level of integration and minimal need for
external components, making it ideal for distributed power
architectures.
The AP65503 is available in a standard Green SO-8EP package and
is RoHS compliant.
DSON
high
Features
Pin Assignments
Applications
P65503
VIN 4.75V to 17V
5A Continuous Output Current, 7A Peak
Efficiency Up to 96%
Automated Light Load improvement
V
750kHz Switching Frequency
External Programmable Soft-Start
Enable Pin
OCP with Hiccup and Thermal Protection
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
Adjustable to 2.5 to 12V
OUT
Gaming Consoles
Flat Screen TV sets and Monitors
Set Top Boxes
Distributed power systems
Home Audio
Consumer electronics
Network Systems
FPGA, DSP and ASIC Supplies
Green Electronics
Typical Applications Circuit
AP65503
Document number: DS37127 Rev. 1 - 2
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Figure 1 Typical Application Circuit
April 2014
© Diodes Incorporated
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Pin Descriptions
P65503
Pin
Name
BS 1
IN 2
SW 3
GND 4 Ground
FB 5
COMP 6
EN 7
SS 8
EP EP Exposed Pad is connected to ground
Pin
Number
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET a
0.01µF or greater capacitor from SW to BS to power the high side switch.
Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.75V to 17V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See Input Capacitor.
Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch.
Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. The feedback threshold is 0.800V. See Setting the Output Voltage.
Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. See Compensation Components.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. Attach to IN with a 100k pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1µF capacitor sets the soft-start period to 13ms. To disable the soft-start feature, leave SS floating.
Functional Block Diagram
Function
AP65503
Document number: DS37127 Rev. 1 - 2
Figure 2 Functional Block Diagram
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P65503
Absolute Maximum Ratings (Note 4) (@T
Symbol Parameter Rating Unit
VIN
VSW
VBS
VFB
VEN
V
COMP
TST
TJ
TL
ESD Susceptibility (Note 5)
HBM Human Body Model 1.5 kV
MM Machine Model 150 V
Notes: 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time.
5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices.
Supply Voltage
Switch Node Voltage
Bootstrap Voltage
Feedback Voltage -0.3V to +6.0 V
Enable/UVLO Voltage -0.3V to +6.0 V
Comp Voltage -0.3V to +6.0 V
Storage Temperature -65 to +150 °C
Junction Temperature +160 °C
Lead Temperature +260 °C
= +25°C, unless otherwise specified.)
A
-0.3 to 20
-1.0 to V
V
-0.3 to VSW +6.0
SW
IN
+0.3
V
V
V
Thermal Resistance
Symbol Parameter Rating Unit
JA
JC
Note: 6. Test condition: SO-8EP: Device mounted on FR-4 substrate (2s2p) 2"x2" PCB, with 2oz copper trace thickness and minimum recommended pad on top
layer and thermal vias to bottom layer ground plane.
Recommended Operating Conditions (Note 7) (@T
Symbol Parameter Min Max Unit
VIN
TA
Note: 7. The device function is not guaranteed outside of the recommended operating conditions.
Junction to Ambient SO-8EP (Note 6) 43 °C/W
Junction to Case SO-8EP (Note 6) 6.3 °C/W
= +25°C, unless otherwise specified.)
A
Supply Voltage
Operating Ambient Temperature Range
4.75
-40
17.0 V
+85 °C
AP65503
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P65503
Electrical Characteristics (@T
= +25°C, VIN = 12V, unless otherwise specified.)
A
Symbol Parameter Test Conditions Min Typ Max Unit
I
SHDN
R
DS(ON)1
R
DS(ON)2
I
LIMIT
I
LIMIT
IQ
Shutdown Supply Current
Supply Current (Quiescent)
High-Side Switch On-Resistance (Note 8)
Low-Side Switch On-Resistance (Note 8)
HS Current Limit Minimum duty cycle 7 A
LS Current Limit From Drain to Source 0.9 A
High-Side Switch Leakage Current
AVEA
Error Amplifier Voltage Gain (Note 8)
GEA Error Amplifier Transconductance
GCS
FSW
FFB
D
MAX
TON
VFB
COMP to Current Sense Transconductance
Oscillator Frequency
Fold-back Frequency
Maximum Duty Cycle
Minimum On Time
Feedback Voltage
VEN = 0V
VEN = 2.0V, VFB = 1.0V
— —
— —
V
= 0V, VSW = 0V, V
EN
SW
=12V
— — 800 V/V
I
= ±10µA
C
— — 2.8 A/V
V
= 0.75V
FB
V
= 0V
FB
VFB = 800mV
TA = -40°C to +85°C
— 0.3 3.0 µA
0.3 1.5 mA
80
32
m
m
— 0 10 A
— 1000 — µA/V
660 750 840 kHz
— 0.30 —
fSW
— 90 — %
160
800
ns
mV
Feedback Overvoltage Threshold 1.0 V
V
EN_RISING
EN Rising Threshold 0.7 0.8 1.2 V
EN Lockout Threshold Voltage 2.2 2.5 2.7 V
EN Lockout Hysteresis 220 mV
INUV
INUV
V
VTH
VIN Under Voltage Threshold Hysteresis
HYS
Under Voltage Threshold Rising
IN
Soft-Start Current
Soft-Start Period
TSD
Note: 8. Guaranteed by design
Thermal Shutdown (Note 8)
— 3.80 4.05 4.40 V
V
C
SS
SS
= 0V
= 0.1µF
250
6
13
160
mV
A
ms
°C
AP65503
Document number: DS37127 Rev. 1 - 2
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Typical Performance Characteristics (@T
= +25°C, VIN = 12V, V
A
= 3.3V, unless otherwise specified.)
OUT
P65503
AP65503
Document number: DS37127 Rev. 1 - 2
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Typical Performance Characteristics (cont.) (@T
= +25°C, VIN = 12V, V
A
= 3.3V, unless otherwise specified.)
OUT
P65503
AP65503
Document number: DS37127 Rev. 1 - 2
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Typical Performance Characteristics (cont.)
(@TA = +25°C, VIN = 12V, V
Steady State Test 5A
= 3.3V, L = 4.7µH, C1 = 44µF, C2 = 72µF, unless otherwise specified.)
OUT
Startup Through Vin No Load
P65503
Startup Through Vin 5A Load
Time-2µs/div
Load Transient Test 2.5 to 5A
Time-2ms/div
Short Circuit Test
Time-50µs/div
Load Transient Test 5A to 2.5A
Time-5ms/div
Shutdown Through Vin no load
Time-200ms/div
Short Circuit Recovery
Time-2ms/div
Time-5ms/div
Shutdown Through Vin 5A Load
Time-100ms/div
Load Transient Test 2.5 to 5A
Time-50µs/div
Time-50µs/div
AP65503
Document number: DS37127 Rev. 1 - 2
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P65503
Application Information
Theory of Operation
The AP65503 is a 5A current mode control, synchronous buck regulator with built in power MOSFETs. Current mode control assures excellent
line and load regulation and a wide loop bandwidth for fast response to load transients. The Figure 1 depicts the functional block diagram of
AP65503.
The operation of one switching cycle can be explained as follows. At the beginning of each cycle, HS (high-side) MOSFET is off. The error
amplifier (EA) output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge of the
750kHz oscillator clock signal sets the RS Flip-Flop. Its output turns on HS MOSFET. The current sense amplifier is reset for every switching
cycle.
When the HS MOSFET is on, inductor current starts to increase. The current sense amplifier senses and amplifies the inductor current. Since
the current mode control is subject to sub-harmonic oscillations that peak at half the switching frequency, ramp slope compensation is utilized.
This will help to stabilize the power supply. This ramp compensation is summed to the current sense amplifier output and compared to the error
amplifier output by the PWM comparator. When the sum of the current sense amplifier output and the slope compensation signal exceeds the
EA output voltage, the RS Flip-Flop is reset and HS MOSFET is turned off.
For one whole cycle, if the sum of the current sense amplifier output and the slope compensation signal does not exceed the EA output, then the
falling edge of the oscillator clock resets the Flip-Flop. The output of the error amplifier increases when feedback voltage (VFB) is lower than the
reference voltage of 0.8V. This also increases the inductor current as it is proportional to the comp voltage.
If in one cycle the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. When
the HS MOSFET turns off, the synchronous LS MOSFET turns on until the next clock cycle begins. There is a “dead time” between the HS turn
off and LS turn on that prevents the switches from “shooting through” from the input supply to ground.
The voltage loop is compensated through an internal transconductance amplifier and can be adjusted through the external compensation
components.
Enable
Above the ‘EN Rising Threshold’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable
(EN) input allows the user to control turning on or off the regulator. To enable the AP65503, EN must be pulled above the ‘EN Lockout Threshold
Voltage’ and to disable the AP65503, EN must be pulled below ‘EN Lockout Threshold Voltage - EN Lockout Hysteresis’
(2.2V-0.22V =1.98V).
Automated No-Load and Light-Load Operation
The AP65503 operates in Light load high efficiency mode during light load operation. The advantage of this light load high efficiency mode is low power loss at no-load and light-load conditions. The AP65503 automatically detects the output current and enters the light load high efficiency mode. The output current reaches a critical level at which the transitions between the light-load and heavy current mode occurs. Once the output current exceeds the critical level, the AP65503 transitions from light load high efficiency mode to continuous PWM mode.
External Soft Start
Soft start is traditionally implemented to prevent the excess inrush current. This in turn prevents the converter output voltage from overshooting
when it reaches regulation. The AP65503 has an internal current source with a soft start capacitor to ramp the reference voltage from 0V to
0.800V. The soft start current is 6µA. The soft start sequence is reset when there is a Thermal Shutdown, Under Voltage Lockout (UVLO) or
when the part is disabled using the EN pin.
External Soft Start can be calculated from the formula below:
DV
I =
Where;
I
C = External Capacitor
DV=change in feedback voltage from 0V to maximum voltage
DT = Soft Start Time
SS
SS
AP65503
Document number: DS37127 Rev. 1 - 2
*C
DT
= Soft Start Current
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P65503
Application Information (cont.)
Current Limit Protection
In order to reduce the total power dissipation and to protect the application, AP65503 has cycle-by-cycle current limiting implementation. The
voltage drop across the internal high-side MOSFET is sensed and compared with the internally set current limit threshold. This voltage drop is
sensed at about 30ns after the HS turns on. When the peak inductor current exceeds the set current limit threshold, current limit protection is
activated. During this time the feedback voltage (VFB) drops down. When the voltage at the FB pin reaches 0.3V, the internal oscillator shifts
the frequency from the normal operating frequency of 750kHz to a fold-back frequency of 102kHz. The current limit is reduced to 70% of nominal
current limit when the part is operating at 102kHz. This low fold-back frequency prevents runaway current.
Under Voltage Lockout (UVLO)
Under Voltage Lockout is implemented to prevent the IC from insufficient input voltages. The AP65503 has a UVLO comparator that monitors
the input voltage and the internal bandgap reference. If the input voltage falls below 4.0V, the AP65503 will latch an under voltage fault. In this
event the output will be pulled low and power has to be re-cycled to reset the UVLO fault.
Over Voltage Protection
When the AP65503 FB pin exceeds 20% of the nominal regulation voltage of 0.800V, the over voltage comparator is tripped and the COMP pin
and the SS pin are discharged to GND, forcing the high-side switch off.
Thermal Shutdown
The AP65503 has on-chip thermal protection that prevents damage to the IC when the die temperature exceeds safe margins. It implements a
thermal sensing to monitor the operating junction temperature of the IC. Once the die temperature rises to approximately +160°C, the thermal
protection feature gets activated. The internal thermal sense circuitry turns the IC off thus preventing the power switch from damage.
A hysteresis in the thermal sense circuit allows the device to cool down to approximately +120°C before the IC is enabled again through soft
start. This thermal hysteresis feature prevents undesirable oscillations of the thermal protection circuit.
Setting the Output Voltage
The output voltage can be adjusted from 0.800V to 16V using an external resistor divider. Table 1 shows a list of resistor selection for common
output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there
is less current consumption in the feedback network. However the trade off is output voltage accuracy due to the bias current in the error
amplifier. R1 can be determined by the following equation:
R
V
⎛ ⎜
R
2
1
⎜ ⎝
OUT
0.8
= 1
⎞ ⎟
⎟ ⎠
Figure 3 Feedback Divider Network
AP65503
Document number: DS37127 Rev. 1 - 2
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V
(V)
OUT
2.5 21.5 10
3.3 31.6 10
5 52.3 10
12 140 10
Table 1 Resistor Selection for Common Output Voltages
R1 (k) R2 (kΩ)
April 2014
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P65503
Application Information (cont.)
Compensation Components
The AP65503 has an external COMP pin through which system stability and transient response can be controlled. COMP pin is the output of the
internal trans-conductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of
the control system. The DC gain of the voltage feedback loop is given by:
V
FB
V
OUT
is the load resistor value, GCS is the current sense trans-conductance and A
LOAD
f
=
P2
G
×
EA
VOUT
(V)
2.5 44 72 10.5 6.8 4.7
3.3 44 72 10.5 6.8 4.7
5 44 72 10.5 6.8 4.7
12 44 72 10.5 6.8 6.5 - 10
1
××π
fs1.02C2
×××π
G
CS
C
/C1
IN
(µF)
Table 2 Recommended Component Selection
R2C2
V
OUT
V
LOAD
FB
C
OUT
(µF)
/C2
Rc/R3
(k)
Cc/C3
(nF)
L1
(µH)
is the error
VEA
, to below one fourth of the
Z1
VEA
3R3C2
V
OUT
V
FB
AGRA ×××=
VEACSLOADVDC
<×
Where V
amplifier voltage gain. The control loop transfer function incorporates two poles one is due to the compensation capacitor (C3) and the output
resistor of error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at:
Where G
One zero is present due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at:
The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where
the feedback loop has the unity gain is crucial.
A rule of thumb is to set the crossover frequency to below one-tenth of the switching frequency. Use the following procedure to optimize the
compensation components:
1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation:
Where f
2. Choose the compensation capacitor (C3) to achieve the desired phase margin set the compensation zero, f crossover frequency to provide sufficient phase margin. Determine the C3 value by the following equation:
Where R3 is the compensation resistor value.
is the feedback voltage (0.800V), R
FB
G
f
=
P1
is the error amplifier trans-conductance.
EA
f
=
Z1
3R ×
=
is the crossover frequency, which is typically less than one tenth of the switching frequency.
C
3C
>
EA
××π
A3C2
1
××π
fc2C2
××π
GG
×
CSEA
2
fc3R
××π
Inductor
Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate
the inductor value;
)V(VV
OUTINOUT
L
=
I
Where
And
is the inductor ripple current.
L
f
is the buck converter switching frequency.
SW
AP65503
Document number: DS37127 Rev. 1 - 2
fIV
SWLIN
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P65503
Application Information (cont.)
Inductor (cont.)
Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from:
I
II
LOADL(MAX)
Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the
converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with appropriate
saturation current rating is important.
A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most
applications.
For highest efficiency, the inductor’s DC resistance should be less than 100m. Use a larger inductance for improved efficiency under light load
conditions.
Input Capacitor
The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to
sustain the ripple current produced during the on time on the upper MOSFET. It must hence have a low ESR to minimize the losses.
The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an
input capacitor which has RMs rating that is greater than half of the maximum load current.
Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used, it must be surge protected.
Otherwise, capacitor failure could occur. For most applications, a 44µF ceramic capacitor is sufficient.
Output Capacitor
The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The
output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it
supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited
by the inductor value.
Maximum capacitance required can be calculated from the following equation:
ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below:
L
+=
2
=
I
out
inductor
2
2
+
inductorcapacitor
)
V)V V(
out
An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 72µF ceramic capacitor will be sufficient.
+
L(I
out
=
C
o
V is the maximum output voltage overshoot.
Where
AP65503
Document number: DS37127 Rev. 1 - 2
ESR*IVout
2
2
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P65503
Application Information (cont.)
PC Board Layout
This is a high switching frequency converter. Hence attention must be paid to the switching currents interference in the layout. Switching current
from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces.
These interconnecting impedances should be minimized by using wide, short printed circuit traces. Note that the IN to GND decoupling
capacitors need to be immediately adjacent to the IN and GND pins of the device (U1), and 12 thermal vias from the back side thermal pad to
the GND plane are essential to achieve the best operation at full load current.
Figure 4 PC Board Layout
External Bootstrap Diode
It is recommended that an external bootstrap diode be added when the input voltage is no greater than 5V or the 5V rail is available in the
system. This helps to improve the efficiency of the regulator. This solution is also applicable for D > 65%. The bootstrap diode can be a low cost
one such as BAT54 or a Schottky that has a low V
Figure 5 External Bootstrap Compensation Components
Recommended Diodes:
.
F
Part Number
B130 30V, 1A Diodes Inc
SK13 30V, 1A Diodes Inc
Voltage/Current
Rating
Vendor
AP65503
Document number: DS37127 Rev. 1 - 2
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Ordering Information
P65503
Part Number Package Code Part Marking Identification Code
AP65503SP-13 SP SO-8EP NA 2500 -13
Note: 9. For packaging details, go to our website at http://www.diodes.com/products/packages.html
Tape and Reel
Quantity Part Number Suffix
Marking Information
SO-8EP
AP65503
Document number: DS37127 Rev. 1 - 2
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Page 14
Package Outline Dimensions (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
SO-8EP
85
E1
14
F
Exposed Pad
H
9° (All si des)
e
D
A1
b
4° ± 3°
A
7
°
Bottom View
N
E
45
°
E0
Q
C
L
Gauge Plane Seating Plane
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
SO-8EP
X2
Y2
Y1
X1
Dimensions Value(in mm)
C
Y
X
P65503
SO-8EP (SOP-8L-EP)
Dim Min Max Typ
A 1.40 1.50 1.45
A1 0.00 0.13 -
b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85
E0 3.85 3.95 3.90 E1 5.90 6.10 6.00
e - - 1.27
F 2.75 3.35 3.05 H 2.11 2.71 2.41
L 0.62 0.82 0.72 N - - 0.35 Q 0.60 0.70 0.65
All Dimensions in mm
C 1.270
X 0.802 X1 3.502 X2 4.612
Y 1.505 Y1 2.613 Y2 6.500
AP65503
Document number: DS37127 Rev. 1 - 2
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P65503
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Copyright © 2014, Diodes Incorporated
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IMPORTANT NOTICE
LIFE SUPPORT
AP65503
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