For purposes of improvement, specifications and
design are subject to change without notice.
●
Please use this service manual with referring to the
operating instructions without fail.
●
Some illustrations using in this service manual are
slightly different from the actual set.
16-11, YUSHIMA 3-CHOME, BUNKYO-KU, TOKYO 113-0034 JAPAN
●
本機の仕様は性能改良のため、予告なく変更すること
があります。
●
補修用性能部品の保有期間は、製造打切後8年です。
●
修理の際は、必ず取扱説明書を参照の上、作業を行っ
てください。
●
本文中に使用しているイラストは、説明の都合上現物
と多少異なる場合があります。
X0207 V.01 DE/CDM 0407
AVR-1505/485
SAFETY PRECAUTIONS
The following check should be performed for the continued protection of the customer and service technician.
LEAKAGE CURRENT CHECK
Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to chassis
resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side of the
power cord is less than 460 kohms, the unit is defective.
500V
1M
(1)
(2)
(1)
(2)
2
DIMENSION
AVR-1505/485
3
AVR-1505/485
CAUTION IN SERVICING
Initializing AV SURROUND RECEIVER
AV SURROUND RECEIVER initialization should be performed
when the µcom, peripheral parts of µcom, and Digital P.W.B. are
replaced.
1. Switch off the unit.
2. Hold the following SPEAKERS-A button and SPEAKERS-B
button, and switch on the unit.
3. Check that the entire display is flashing with an interval of
about 1 second, and release your fingers from the 2 buttons
and the microprocessor will be initialized.
・If step 3 does not work, start over from step 1.
Note:
・ All user settings will be lost and this factory setting will
be recovered when this initialization mode.
So make sure to memorize your setting for restoring
after the initialization.
34CKSTI/OClock switch transition period output/Demodulation master or slave function switching terminal
35INTI/OInterrupt output for µcom (Interrupt factor selectable)/Modulation or general I/O switching terminal
36RERROPLL lock error, data error flag output
37DOOµcom I/F, read out data output terminal (3-state)
38DIIµcom I/F, write data input terminal
39CEIµcom I/F, chip enable input terminal
40CLIµcom I/F, clock input terminal
41XMODEISystem reset input terminal
42DGND—Digital GND
43DVDD—Digital power
44TMCK/PIO0I/O256fs system clock input for modulation/General I/O in/output terminal
45TBCK/PIO1I/O64fs bit clock input for modulation/General I/O in/output terminal
46TLRCK/PIO2I/Ofs clock input for modulation/General I/O in/output terminal
47TDATA/PIO3I/OSerial audio data input for modulation/General I/O in/output terminal
48TXO/PIOENO/IModulation data output/ General I/O enable input terminal
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
BD3811K1 (IC701)
IN31
IN32
IN41
IN42
IN51
IN52
IN61
IN62
IN71
IN72
IN81
IN82
INDVDSR
INDVDSL
INDVDC
INDVDSW
OUT2(+)
OUT2(-)
OUT1(+)
OUT1(-)
IN1DSP
IN1MIX
IN2DSP
IN2MIX
IN22
IN21
IN12
IN11
ROUT32
ROUT31
ROUT22
ROUT21
ROUT12
ROUT11
AGND10
GOUT2
OUTC
VIN2
LOGIC
OUTSL
80797877767574737271706968676665
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2526
INDSPSR
5.1ch Mode SW2 DSP
2728293031323334353637383940
INDSPC
INDSPSL
5.1ch Mode SW2 DVD
AGND1
INDSPSW
GOUTSW
VINSW
AGND2
5.1ch Mode SW1
VINC
GOUTC
OUTSW
AGND9
TREBLE
BASS
BASS
BOOST
OUTSR
GOUT1
VINSL
VIN1
GOUTSL
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
TNF2
TNF1
BNF11
BNF21
BNF12
BNF22
BBNF2
OUT2
BBNF1
OUT1
AGND8
AGND7
VCC
AGND6
VEE
AGND5
MUTE
CL
DA
DGND
AGND4
GOUTSR
VINSR
AGND3
14
AD1837 (IC808)
AVR-1505/485
DSDATA3
DSDATA2
AGND
DGND
DSDATA1
39
38
37
36
35
34
33
32
31
30
29
28
27
NC
OUTL3
MCLKASDATAABCLKALRCLKODVDDDVDD DVDD
PD/RST M/S AVDD AVDD
CLOCK
DIGITAL
FILTER
DIGITAL
FILTER
DIGITAL
FILTER
DIGITAL
FILTER
DescriptionPin No.
DVDD
DBCLK
DLRCLK
M/S
AGND
OUTR4
NC
OUTL4
NC
AGND
AVDD
OUTR3
NC
V
Σ-∆
DAC
Σ-∆
DAC
Σ-∆
DAC
Σ-∆
DAC
REF
OUTL1
OUTR1
OUTL2
OUTR2
OUTL3
OUTR3
OUTL4
OUTR4
FILTD
FILTR
DLRCLK
DBCLK
DSDATA1
DSDATA2
DSDATA3
DSDATA4
ADCLP
ADCLN
ADCRP
ADCRN
AD1837 Terminal Function
Pin Name
CLATCH
PD/RST
Σ-∆
ADC
Σ-∆
ADC
AD1837
Input/
Output
DVDD
CIN
AGND
NC
OUTL1
NC
OUTR1
AGND
AVDD
NC
OUTL2
DGND
CCLK
COUT
ASDATA
ODVDD
MCLK
ALRCLK
ABCLK
50 494847 46 45 44 43 42 41 40
51
52
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
NC
OUTR2
SERIAL DATA
I/O PORT
DIGITAL
FILTER
DIGITAL
FILTER
TOP VIEW
FILTD
FILTR
AGND
DGND AGND AGND AGND AGNDDGND
AVDD
DSDATA4
ADCLP
ADCLN
ADCRN
CINCLATCHCCLKCOUT
CONTROL PORT
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
ADCRP
1,39DVDDDigital Power Supply. Connect to digital 5V supply.
2CLATCHILatch Input for Control Data
33CINISerial Control Input
4PD/RSTIPower-Down/Reset
5,10,16,24,30,35AGNDAnalog Ground
6,12,25,31NCNot connected
7,13,26,32OUTLxODACx Left Channel Output
8,14,27,33NCNot connected
9,15,28,34OUTRxODACx Right Channel Output
11,19,29AVDDAnalog Power Supply. Connect to analog 5V supply.
17FILTDFilter Capacitor Connection. Recommend 10µF/100nF.
18FILTRReference Filter Capacitor Connection. Recommended 10µF/100nF.
20ADCLNIADC Left Channel Negative Input
21ADCLPIADC Left Channel Positive Input
22ADCRNIADC Right Channel Negative Input
23ADCRPIADC Right Channel Positive Input
36M/SIADC Master/Slave Select
37DLRCLKI/ODAC LR Clock
38DBCLKI/ODAC Bit Clock
40,52DGNDDigital Ground
41-44DSDATAxIDACx Input Data (Left and Right Supply)
45ABCLKI/OADC Bit Clock
46ALRCLKI/OADC LR Clock
47MCLKIMaster Clock Input
48ADVDDDigital Output Driver Power Supply
49ASDATAOADC Serial Data Output
50COUTOOutput for Control Data
51CCLKIControl Clock Input for Control Data
15
AVR-1505/485
TC90A69F (IC609)
COUT
VSS1
28
27
DAC
26
25
DAC
YOUT
24
(8fsc)
CORING
2
VRT
3
VDD1
PEAKING
4
TESTI1
5
INTERPOLATION
1
BIASVB1
LC75721E (IC301)
G7 G8G9
G10
G11
AA8/G12
AA7/G13
AA6/G14
4833
49
DI
CL
CE
RES
DD
V
OSCI
OSCO
Vss
TEST
FL
V
G1
G2
G3
G4
G5
G6
64
AM 1
AM 2
AM 3
AM 4
AM 5
AM 6
AM 7
AM 8
VB2
PD
23
PLL DET1/2VCO
LPF
ADC
6
VRB
VSS2
AA5/G15
AA4/G16
AA3
AA2
AM 9
AM 10
AM 11
AM 12
Ped.
CLIP
AA1
AM35
AM 13
22
1/8
AM34
AM 14
7
AM 15
FIL
21
8fsc4fsc
KILLER
Sync. Clamp
8
YCIN
AM33
161
AM 16
VSS4
VDD4
FSC
TESTOUT
MODE1
SDA
20
19
18
17
16
SCL
15
IIC BUS
CORING V-ENHANCER
TEST
DELAY
CNR
C-N.C
9
KILLER
MEMORY
10
TESTI2
LINE
LINE
MEMORY
DYNAMIC COMB FILTER
11
12
VSS3
VDD3
13
VDD2
14
TESTI3
LC75721E Terminal Function
Symbol
32
17
V
DD
Vss
AM 17
V
FL
AM 18
AM 19
AM 20
DI
AM 21
CL
AM 22
AM 23
CE
AM 24
AM 25
AM 26
OSCI
AM 27
OSCO
AM 28
AM 29
RES
AM 30
AM 31
AM1~AM35
AM 32
AA1~AA3
AA4/G16
AA5/G15
AA6/G14
AA7/G13
AA8/G12
G1~G11Grid output terminal
TESTLSI test terminal
Power terminal +5V
Power terminal GND
Power terminal FL drive
Serial data transfer terminal
DI: Data
CL: Clock
CE: Chip enable
External CR connecting terminal
System reset terminal
Anode output terminal
Anode/Grid output terminal
Function
NJM2274R (IC614)
1
2
3
4
Power Save CTL
1Yin
Cin
8Bias
Clamp
Disc.
CLOCK
8
TOP
VIEW
7
6
5
Vref
Vcc
GND
2
+
+
2
7
7
C Mute CTL
BU2090F (IC302,607,615)
1
VSS
DATA
LCK
Q0
Q1
Q2
Q4
2
3
4
5
6
7
8
9
CONTROL CIRCUIT
12-bi t SHIFT REGI STER
12- bit STRAGE REGI STER
OUTPUT BUFF ER (OPE N DRAI N)
3 Vout
750
ohm
Vsag4
18
VDD
OE
17
16
Q11
Q10
15
Q9
14
Q8
13
12
Q7
Q6
11Q3
Q5
10
TA1270BF (IC606)
DAC237Y OUTPUT36GND35DAC
38
Y OFFSETSWDAC
DAC2
DAC1
Y INPUT
DAC Vcc (5V)
C Vcc (5V)
UV/CbCr SW
fsc OUTPUT
1HDL CONT
SECAM CONT
B-Y/Cb OUTPUT
R-Y/Cr OUTPUT
39
40
41
42
43
44
45
46
47
48
SUB-
DAC1
CONTRAST
PEDESTAL
CLAMP
fsc
Y DL
TRAP
SYSTEM
fsc
1H DL
CONTROL
SECAM
LPF / fsc
CONTROL
TRAP
BPFH. AFCH C / D
CbCr / UV
SW
VCXO
1
2
3
X’tal
X’tal
M-X’tal
4.43MHz
3.58MHz
TEST34SDA33SCL32Ys
TEST
CONTROL
Y DL
SW
APC
SUB-COLOR
4
5
APC
I2C BUS
C GND
CW
MATRIX
P / N ID
SW
TOF
ACC
6
CHROMA
Ys
7
OUTPUT
(TH=0.7V
HI; 1IN/LOW; 2IN)31R-Y1
TINT
DEMO
CHROMA
BLK
V SEP
SYNC
SEP
V-SEP
OFFSET
8
SYNC.
INPUT30B-Y1
PEDESTAL
SW
INPUT
CLAMP
9
SYNC.
INPUT29Y1
YUV RGB
NOSE
DET
10
AFC
OUTPUT
MATRIX
FILTER
INPUT28I
C
2
11
SYNC.
GND
GND
R-Y2
27
SW
32fH
VCO
12
32fh VCO
INPUT26B-Y2
PEDESTAL
CLAMP
13
VD
INPUT25Y2
HI: 20h/LOW: 24h
SW
CP / HP
IN
V C / D
14
HD
OUTPUT
OUTPUT
INPUT
SCP
24
23
22
21
20
19
18
17
16
15
SW GND
ADRS SW
R-Y/R
OUTPUT
B-Y/B
OUTPUT
Y/G
OUTPUT
SW
Vcc (9V)
SYNC
Vcc (9V)
CP/HP
INPUT
Dig GND
SCP
OUTPUT
MM74LCX244
(IC809-811)
TOP VIEW
1
OE
2
I0
3
O4
4
I1
5
O5
6
I2
7
O6
8
I3
912
O7O3
1011
GND
16
74LVX157
(IC816)
20
VCC
19
OE2
18
O0
17
I4
16
O1
15
I5
14
O2
13
I6
I7
SE
LECT
GND
1A
1B
1Y
2A
2B
2Y
1
SEL
2
3
4
5
5
6
7
8
16
15
14
13
12
11
10
Vcc
ST
4A
4B
4Y
3A
3B
9
3Y
BA7625 (IC651)
BA7626 (IC612,613,616,652,653)
AVR-1505/485
ABE
LL*IN 1LL*
HL*IN 2HL*IN 2HL*
LH*IN 3LH*IN 3LH*IN 3
HHLIN 4HHLIN 4HHLIN 4
HHHIN 5HHHIN 5HHHIN 5
Note 1: * mark means that feasible for either H or L.
Note 2: Each input terminal is provided with sink chip clamp (BA7625).
Each input terminal takes 20kohm at the end (BA7626).