DENON AVR1306E2 Diagram

SERVICE MANUAL
For Europe model
Ver. 1
MODEL
AV SURROUND RECEIVER
AVR-1306
注 意
サービスをおこなう前に、このサービスマニュアルを 必ずお読みください。本機は、火災、感電、けがなど に対する安全性を確保するために、さまざまな配慮を おこなっており、また法的には「電気用品安全法」に もとづき、所定の許可を得て製造されております。 従ってサービスをおこなう際は、これらの安全性が維 持されるよう、このサービスマニュアルに記載されて いる注意事項を必ずお守りください。
For purposes of improvement, specifications and design are subject to change without notice.
Please use this service manual with referring to the operating instructions without fail.
Some illustrations using in this service manual are slightly different from the actual set.
Denon Brand Company, D&M Holdings Inc.
TOKYO, JAPAN
本機の仕様は性能改良のため、予告なく変更すること があります。 補修用性能部品の保有期間は、製造打切後8年です。
修理の際は、必ず取扱説明書を参照の上、作業を行っ てください。
本文中に使用しているイラストは、説明の都合上現物 と多少異なる場合があります。
X0260V.01 DE/CDM 0509
AVR-1306

SAFETY PRECAUTIONS

The following check should be performed for the continued protection of the customer and service technician.
LEAKAGE CURRENT CHECK
Before returning the unit to the customer, make sure you make either (1) a leakage current check or (2) a line to chassis resistance check. If the leakage current exceeds 0.5 milliamps, or if the resistance from chassis to either side of the power cord is less than 460 kohms, the unit is defective.
500V
1M
(1)
(2)
(1)
(2)
2

DIMENSION

AVR-1306
3
AVR-1306

CAUTION IN SERVICING

Initializing AV SURROUND RECEIVER
AV SURROUND RECEIVER initialization should be performed when the µcom, peripheral parts of µcom, and Digital P.W.B. are replaced.
1. Switch off the unit.
2. Hold the following SPEAKERS-A button and SPEAKERS-B button, and switch on the unit.
3. Check that the entire display is flashing with an interval of about 1 second, and release your fingers from the 2 buttons and the microprocessor will be initialized.
Note:If step 3 does not work, start over from step 1.
All user settings will be lost and this factory setting will
be recovered when this initialization mode. So make sure to memorize your setting for restoring after the initialization.
サービス時の注意事項
AVサラウンドアンプの初期化について
マイコンやマイコン周辺部品、Digital 基板等を交換した場合 は、AV サラウンドアンプの初期化を行って下さい。
1. オン/オフボタンを OFF にします。
2. SPEAKERS-A ボタンと SPEAKERS-B ボタンを同時に押しな がら、オン/オフボタンを押して ON にします。
3. ディスプレイ表示が約 1秒間隔で点滅するのを確認後、2 つのボタンから指を離します。
*マイコンが初期化されます。
注意 :・上記 3 の状態にならない場合は、もう一度操作 1 か
らやり直してください。
・初期化を行うとお客様が設定した内容が工場出荷状
態に戻りますので、あらかじめ設定内容を控えてお き初期化後再設定してください。
4
AVR-1306

ADJUSTMENT

Audio Section
Idling Current
Required measurement equipment: DC Voltmeter
1. Preparation
(1) Avoid direct blow from an air conditioner or an electric
fan, and adjust the unit at normal room temperature 15 °C ~ 30 °C (59 °F ~ 86 °F).
(2) Presetting
• POWER (Power source switch) OFF
• SPEAKER (Speaker terminal) No load (Do not connect speaker, dummy resistor, etc.)
2. Adjustment
(1) Remove top cover and set VR101, VR102, VR103,
VR104, VR105, on Amp. unit, Unit at fully counterclock­wise ( ) position.
(2) Connect DC Voltmeter to test points (FRONT-Lch:
TP104, FRONT-Rch: TP105, CENTER ch: TP103, SUR­ROUND-Lch: TP101, SURROUND-Rch: TP102).
(3) Connect power cord to AC Line, and turn power switch
"ON".
(4) Presetting.
MASTER VOLUME : "---" counterclockwise ( min.) MODE : 5CH STEREO FUNCTION : CD
(5) Within 2 minutes after the power on, turn VR101 clock-
wise ( ) to adjust the TEST POINT voltage to 1.5 mV ± 0.5 mV DC.
(6) After 10 minutes from the preset above, turn VR101 to
set the voltage to 2.5 mV ± 0.5 mV DC.
(7) Adjust the Variable Resistors of other channels in the
same way.
調整
オーディオセクション
アイドリング電流の調整
調整に必要な測定器 : DCVoltmeter
1. 準備
(1) セットをクーラ、扇風機のそばなど風通しの良い場所
を避け、通常の使用状態に置きます。セットの周囲温 度は 15〜30 ℃、湿度は常湿とします。
(2) プリセット
・電源スイッチ OFF ・スピーカ端子 無負荷
( スピーカ・ダミー抵抗器などを接続しない。)
2. 調整
(1) 上カバーをはずし、パワーアンプ基板の VR101,VR102,
VR103,VR104,VR105 を反時計方向 ( )に回し切った 状態にセットします。
(2) テストポイント (FRONT-Lch:TP104,FRONT-Rch:
TP105,CENTERch:TP103,SURROUND-Lch:TP101, SURROUND-Rch:TP102) に DCVoltmeterを接続します。
(3) 電源コードを AC100V(95〜105Vの範囲でも可)に接
続し、電源スイッチを "ON"にします。
(4) ON後、次のようにセットします。
・MASTERVOLUME(音量調節つまみ)→反時計方向
( )に回す、最小の状態にする。
・SPEAKER(スピーカ端子)→無負荷(スピーカ、
ダミー抵抗器などを接続しない。)
MODE:5CHSTEREO  FUNCTION:CD
(5) 2分以内に VR101を時計方向 ( ) に回しテストポイ
ントの電圧を次のように調整します。
1.5mV ±0.5mVDC
(6) 予備調整から 10分後 VR101を回し、次のように電圧を
設定します。
2.5mV± 0.5mVDC
(7) 同じ方法で各チャネルの可変抵抗を調整します。

DC Voltmeter
F Lch
S Lch
C ch
S Rch
F Rch
VR104
TP104
VR101
TP101
VR103,TP103
VR102,TP102
VR105
TP105
5

BLOCK DIAGRAM

AVR-1306
6

LEVEL DIAGRAM

AVR-1306
7

SEMICONDUCTORS

Only major semiconductors are shown, general semiconductors etc. are omitted to list.
主な半導体を記載しています。汎用の半導体は記載を省略しています。
1. IC’s
M30622MEP (IC201)
DDVSS
PK1/TX
PK2/TEX
PI1/RMC
PI2/NMI
PI3/TO0/ADJ
PI4/INT1/CS1
PC6
PC7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7NCV
PI5/SCK1
AVR-1306
PC5 PC4 PC3 PC2 PC1 PC0
PB7/SI2
PB6/SO2
PB5/SCK2
PB4/TO2
PB3 PB2 PB1 PB0
PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1
PJ0 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
999897969594939291
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
31
32333435363738394041424344454647484950
PH7
PH6
PH5
PH4
PH3
PH2
908988878685848382
TOP VIEW
SS
V
PH1
PH0
RST
XTAL
PK7/TO1
EXTAL
PK5/SI0
PK6/CS0
PK4/SO0
PF7/AN11
PK3/SCK0
81
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
PF5/AN9
PF6/AN10
PI6/SO1 PI7/SI1 PE0/INT0 PE1/INT2 PE2/PWM0 PE3/PWM1 PE4 PE5 PE6 PE7 PG0/TxD PG1/RxD PG2/EC0 PG3/EC1 PG4/EC2 PG5/INT3 PG6/INT4 PG7/CINT AN0 AN1 AN2 AN3 PF0/AN4 PF1/AN5 PF2/AN6 PF3/AN7 AV
DD
AV
REF
AV
SS
PF4/AN8
M30622MEP Terminal Function
PIN No.
1 SW_SUM O SW SUMMING CONTROL
2 4094_CLK O BU4094(IC551~2) CLOCK
3 2090_CLK(VIDEO)/SEL2/G O LA7956(IC601) S2 CONTROL
4 2090_DATA/SEL1/F O LA7956(IC601) S1 CONTROL
5 2090_DATA2/VIDEO_MUTE O VIDEO MUTE CONTROL
6 RMC I REMOCON SIGNAL DATA INPUT
7 1837_SDIN I AD1837(IC808) COUT SERIAL DATA INPUT
8 BYTE GND GND
9 CNVSS - UP GRADE PIN (TP301 CNVSS)
10 2090_DATA/4094_DATA O BU2090(IC302) DATA/BU4094(IC551~2) DATA
11 FLD_RST/4094_EN O LC75721(IC301) RESET CONTROL/BU4094(IC551~2) OUT_ENABLE CONTROL
12 RESET I u-COM RESET SIGNAL INPUT
13 X-OUT O OSILATOR CONNECTION
14 Vss GND GND
15 X-IN I OSILATOR CONNECTION
16 Vcc1(+5V) 5V POWER 5V
17 NC I PULL UP
18 FLAG0 I EPROM chip select control for DSP
PIN NAME I/O FUNCTION
8
AVR-1306
PIN No.
19 89057_INT I LC89057(IC807) INT SIGNAL INPUT
20 PROTECTION I PROTECTION SIGNAL INPUT
21 FLD/2090_CLK O BU2090(IC302) CLOCK/ LC75721(IC301) CLOCK
22 FLD_DATA O LC75721(IC301) DATA
23 FLD_CE O LC75721(IC301) CHIP ENABLE
24 9273_STB/CDR_TAPE_MUTE O TC9273-004(IC703) STB
25 9273/9164_DATA O TC9273-004(IC703) DATA
26 9273/9164_CLK O TC9273-004(IC703) CLOCK
27 9164_STB I/O OPEN
28 9274_STB/MIC_RLY O AVR1706: MIC RELAY (RLY702) CONTROL
29 90A69/1270_CLK O TC90A69(IC609) SCLOCK/TA1270BF(IC606) SCLOCK
30 90A69/1270_DATA I/O TC90A69(IC609) SDATA/TA1270BF(IC606) SDATA
31 RS232C_TX O UP GRADE PIN(TP301) TXD
32 RS232C_RX I UP GRADE PIN(TP301) RXD
33 9274_DATA O OPEN
34 9274_CLK O OPEN
35 PLL_DATA_IN I TUNER DATA IN
36 PLL_DATA_OUT O TUNER DATA OUT
37 PLL_CLK O TUNER PLL CLOCK
38 PLL_CE O TUNER PLL CHIP ENABEL
39 TUNED I TUNED SIGNAL INPUT
40 STEREO I STEREO SIGNAL INPUT
41 EPM(UP_GRADE) I UP GRADE PIN (TP301 EPM)
42 VOL_UP I MASTER VOLUME ENCODER(VEC301)
43 VOL_DOWN I MASTER VOLUME ENCODER(VEC301)
44 SEL_UP I SELECT ENCONDER(VEC302)
45 SEL_DOWN I SELECT ENCONDER(VEC302)
46 CE(UP_GRADE) I UP GRADE PIN (TP301 CE)
47 PWR_DOWN I POWER DOWN CONTROL INPUT
48 RDS_DATA I TDA7330BD(IC202) RDDR SIGNAL INPUT
49 ERR_MUTE O ERROR MUTE
50 BSE O DIGITAL SIGNAL MUTE
51 89057_ENPHA I LC89057(IC807) PRE EMPHASIS INFOMATION SIGNAL INPUT
52 SHARC_SDIN I SHARC(IC804) SERIAL DATA INPUT
53 89057_SD_IN I LC89057(IC807) D0 SIGNAL INPUT
54 EEPROM_RST O FLASH ROM(IC805) RESET
55 89057_RST O LC89057(IC807) RESET
56 SHARC_CE O SHARC(IC804) CHIP ENABEL
57 SHARC_SDOUT O CHARC(IC804) SERIAL DATA OUT
58 89057_CE O LC89057(IC807) CHIP ENABLE
59 89057/1837_SDOUT O LC89057(IC807) D1 SIGNAL / AD1837(IC808) CIN SIGNAL
60 89057/1837_SCLK O LC89057(IC807) CLOCK/ AD1837(IC808) CCLOCK
61 1837_RST O AD1837(IC808) RESET SIGNAL OUT (TO IC821)
62 Vcc2(+5V) 5V POWER 5V
63 SHARC_SCLK O SHARC(IC804) SPICLK
64 Vss GND GND
65 SHARC_RST O SHARC(IC804) RESET SIGNAL
66 1837_CE O AD1837(IC808) CLATCH
67 FLAG3 I Special flag for ROM updata
68 FLAG2 I DSP operation check flag
69 FLAG1 I NON USE
70 H/P_DET I HEAD PHONE DETECT
71 FUNC_UP I FUNCTION ENCODER (VEC303)
72 FUNC_DOWN I FUNCTION ENCODER (VEC303)
73 RDS_CLK O TDA7332BD(IC202) CLOCK FOR RDS
PIN NAME I/O FUNCTION
9
AVR-1306
PIN No.
74 POWER_KEY I POWER SWICH SIGNAL INPUT
75 MIC_DET I MIC DETECTION
76 POWER_RELAY O FRONT PANEL POWER CONTROL
77 STBY_LED(RED) O STBY LED RED CONTROL
78 VCR_MUTE/9427_STB O NON USE
79 3811/94A27_CLK O BD3811K1(IC701) CLOCK/BD3812F (IC702) CLOCK
80 3811/94A27_DATA O BD3811K1(IC701) DATA/BD3812F(IC702) DATA
81 MUTE_POWER O MUTE POWER CONTROL
82 4094_STB(RLY) O BU4094(IC552) STB
83 4094_STB(RLY_MUTE) O OPEN
84 4094_STB(MUTE) O BU4094(IC551) STB
85 S-MON_DET/J I S-MONITOR DETECT
86 COMP_VIDEO_DET I COMPONENT SIGNAL INPUT DETECT
87 C_VIDEO_DET I CONPOSIT SIGNAL INPUT DETECT
88 S_VIDEO_DET I S VIDEO SIGNAL INPUT DETECT
89 RS232C_SW O OPEN
90 KEY_IN1 I KEY1 SIGNAL INPUT
91 KEY_IN2 I KEY2 SIGNAL INPUT
92 KEY_IN3 I KEY3 SIGNAL INPUT
93 SET_OPTION I MODEL OPTION SELECT
94 STEP_OPTION I AREA OPTION SELECT
95 74HC151_SW O TC74HC151(IC827) A CONTROL COAXIAL SIGNAL SELECT
96 AVss GND GND
97 SEL_CLK O SEL_CLK
98 VREF(+5V) 5V VREF
99 AVcc(+5V) 5V POWER 5V
100 74781_CE O OPEN
PIN NAME I/O FUNCTION
10
ADSP-21266SKSTZ-1B (IC804)
AVR-1306
144
1
PIN 1 INDICATOR
109
108
TOP VIEW
36
37
73
72
ADSP-21266SKSTZ-2B Terminal Function
LQFP
Pin Name
V
DDINT
Pin # Pin Name
1V
DDINT
CLKCFG0 2 GND 38 GND 74 V CLKCFG1 3 RD 39 V BOOTCFG0 4 ALE 40 GND 76 V
LQFP Pin # Pin Name
37 V
DDEXT
DDINT
LQFP Pin # Pin Name
73 GND 109
DDINT
75 GND 111
DDINT
BOOTCFG1 5 AD15 41 DAI_P10 (SD2B) 77 GND 113 GND 6 AD14 42 DAI_P11 (SD3A) 78 V V
DDEXT
7 AD13 43 DAI_P12 (SD3B) 79 GND 115 GND 8 GND 44 DAI_P13 (SCLK23) 80 V V
DDINT
9V
DDEXT
45 DAI_P14 (SFS23) 81 GND 117 GND 10 AD12 46 DAI_P15 (SD4A) 82 V V
DDINT
11 V
DDINT
47 V
DDINT
83 GND 119 GND 12 GND 48 GND 84 V V
DDINT
13 AD11 49 GND 85 RESET 121
DDINT
DDEXT
DDINT
DDINT
GND 14 AD10 50 DAI_P16 (SD4B) 86 SPIDS 122 FLAG0 15 AD9 51 DAI_P17 (SD5A) 87 GND 123 FLAG1 16 AD8 52 DAI_P18 (SD5B) 88 V
DDINT
AD7 17 DAI_P1 (SD0A) 53 DAI_P19 (SCLK45) 89 SPICLK 125 GND 18 V V
DDINT
19 GND 55 GND 91 MOSI 127
DDINT
54 V
DDINT
90 MISO 126
GND 20 DAI_P2 (SD0B) 56 GND 92 GND 128 V
DDEXT
GND 22 GND 58 DAI_P20 (SFS45) 94 V V
DDINT
AD6 24 V
21 DAI_P3 (SCLK0) 57 V
23 V
DDEXT
DDINT
59 GND 95 A 60 V
DDEXT
DDINT
93 V
96 A
DDINT
DDEXT
VDD
VSS
AD5 25 GND 61 FLAG2 97 GND 133 AD4 26 DAI_P4 (SFS0) 62 FLAG3 98 CLKOUT 134 V
DDINT
27 DAI_P5 (SD1A) 63 V
DDINT
99 EMU 135 GND 28 DAI_P6 (SD1B) 64 GND 100 TDO 136 AD3 29 DAI_P7 (SCLK1) 65 V AD2 30 V V
DDEXT
31 GND 67 V
GND 32 V
DDINT
DDINT
66 GND 102 TRST 138
68 GND 104 TMS 140
AD1 33 GND 69 V
DDINT
DDINT
DDINT
101 TDI 137
103 TCK 139
105 GND 141 AD0 34 DAI_P8 (SFS1) 70 GND 106 CLKIN 142 WR 35 DAI_P9 (SD2A) 71 V V
DDINT
36 V
DDINT
72 V
DDINT
DDINT
107 XTAL 143
108 V
DDEXT
LQFP Pin #
110
112
114
116
118
120
124
129 130 131 132
144
11
LC89057W (IC807)
AVR-1306
RXOUT
RX0 RX1 RX2 RX3
RX4 RX5/VI RX6/UI
LPF
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
10
13
44 45 46 47
48
1
2 3 4 5 8 9
EMPHA/UO33AUDIO/VO35INT40CL39CE38DI
32
Clock
Selector
27
Microcontroller
Input
Selector
Modulation
or
Parallel Port
29
XIN
C bit, U bit
Demodulation
&
Lock Detect
PLL
28
XOUT
XMCK34CKST
I/F
Data
Selector
I/N
XMODE 41
37
36
21
24
16 17 20 22 23
DO
RERR
RD ATA
SDIN
RMCK RBCK RLRCK SBCK SLRCK
36 RERR1RXOUT
35 INT2RX0
34 CKST3RX1
TOP VIEW
33 AUDIO/VO4RX2
32 EMPHA/UO5RX3
31 DGND6DGND
30 DVDD7DVDD
29 XIN8RX4
28 XOUT9RX5/VI
27 XMCK10RX6/UI
26 DVDD11DVDD
25 DGND12DGND
24 SDIN37DO 23 SLRCK38DI 22 SBCK39CE 21 RDATA40CL 20 RLRCK41XMODE 19 DVDD42DGND 18 DGND43DVDD 17 RBCK44TMCK/PIO0 16 RMCK45TBCK/PIO1 15 AGND46TLRCK/PIO2 14 AVDD47TDATA/PIO3 13 LPF48TXO/PIOEN
LC89057W Terminal Function
Pin No.
1 RXOUT O Input bi-phase select data output terminal
2 RX0 I TTL compatible digital data input terminal
3 RX1 I Coaxial compatible amp built-in digital data input terminal
4 RX2 I TTL compatible digital data input terminal
5 RX3 I TTL compatible digital data input terminal
6 DGND Digital GND
7 DVDD Digital power
8 RX4 I TTL compatible digital data input terminal
9 RX5/VI I TTL compatible digital data/Validity flag input terminal for modulation
10 RX6/UI I TTL compatible digital data/User data input terminal for modulation
11 DVDD Digital power for PLL
12 DGND Digital GND for PLL
13 LPF O PLL loop filter connecting terminal
14 AVDD Analog power for PLL
15 AGND Analog GND for PLL
16 RMCK O RMCK clock output terminal (256fs, 512fs, XIN, VCO)
17 RBCK O/I RBCK clock in/output terminal (64fs)
18 DGND Digital GND
19 DVDD Digital power
20 RLRCK O/I RLRCK clock in/output terminal (fs)
21 RDATA O Serial audio data output terminal
22 SBCK O SBCK clock output terminal (32fs, 64fs, 128fs)
23 SLRCK O SLRCK clock output terminal (fs/2, fs, 2fs)
24 SDIN I Serial audio data input terminal
25 DGND Digital GND
26 DVDD Digital power
27 XMCK O Osc. amp output terminal
Pin Name
I/O
Function
12
AVR-1306
Pin No.
Pin Name I/O
Function
28 XOUT O X’tal osc. connecting output terminal
29 XIN I X’tal osc. connection, external clock input terminal (24.576MHz or 12.288MHz)
30 DVDD Digital power
31 DGND Digital GND
32 EMPHA/UO I/O Emphasis information/U-data output/Chip address setting terminal
33 AUDIO/VO I/O Non-PCM detect/V-flag output/ Chip address setting terminal
34 CKST I/O Clock switch transition period output/Demodulation master or slave function switching terminal
35 INT I/O Interrupt output for µcom (Interrupt factor selectable)/Modulation or general I/O switching terminal
36 RERR O PLL lock error, data error flag output
37 DO O µcom I/F, read out data output terminal (3-state)
38 DI I µcom I/F, write data input terminal
39 CE I µcom I/F, chip enable input terminal
40 CL I µcom I/F, clock input terminal
41 XMODE I System reset input terminal
42 DGND Digital GND
43 DVDD Digital power
44 TMCK/PIO0 I/O 256fs system clock input for modulation/General I/O in/output terminal
45 TBCK/PIO1 I/O 64fs bit clock input for modulation/General I/O in/output terminal
46 TLRCK/PIO2 I/O fs clock input for modulation/General I/O in/output terminal
47 TDATA/PIO3 I/O Serial audio data input for modulation/General I/O in/output terminal
48 TXO/PIOEN O/I Modulation data output/ General I/O enable input terminal
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
BD3811K1 (IC701)
IN31
IN32
IN41
IN42
IN51
IN52
IN61
IN62
IN71
IN72
IN81
IN82
INDVDSR
INDVDSL
INDVDC
INDVDSW
OUT2(+)
OUT2(-)
OUT1(+)
OUT1(-)
IN1DSP
IN1MIX
IN2DSP
IN2MIX
IN22
IN21
IN12
IN11
ROUT32
ROUT31
ROUT22
ROUT21
ROUT12
ROUT11
AGND10
GOUT2
OUTC
VIN2
LOGIC
OUTSL
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26
INDSPSR
5.1ch Mode SW2 DSP
27 28 29 30 31 32 33 34 35 36 37 38 39 40
INDSPC
INDSPSL
5.1ch Mode SW2 DVD
AGND1
INDSPSW
GOUTSW
VINSW
AGND2
5.1ch Mode SW1
VINC
GOUTC
OUTSW
AGND9
TREBLE
BASS
BASS
BOOST
OUTSR
GOUT1
VINSL
VIN1
GOUTSL
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
TNF2
TNF1
BNF11
BNF21
BNF12
BNF22
BBNF2
OUT2
BBNF1
OUT1
AGND8
AGND7
VCC
AGND6
VEE
AGND5
MUTE
CL
DA
DGND
AGND4
GOUTSR
VINSR
AGND3
13
AD1837 (IC808)
AVR-1306
DSDATA2
DSDATA1
NC
AGND
MCLKASDATAABCLKALRCLKODVDDDVDD DVDD
CLOCK
DIGITAL FILTER
DIGITAL FILTER
DIGITAL FILTER
DIGITAL FILTER
DGND
DVDD
39
38
DBCLK
37
DLRCLK
M/S
36
AGND
35
34
OUTR4
33
NC
32
OUTL4
31
NC
30
AGND
29
AVDD
28
OUTR3
NC
27
OUTL3
PD/RST M/S AVDD AVDD
DAC
DAC
DAC
DAC
V
DescriptionPin No.
Σ-
Σ-
Σ-
Σ-
REF
OUTL1
OUTR1 OUTL2
OUTR2 OUTL3
OUTR3 OUTL4
OUTR4 FILTD FILTR
DLRCLK
DBCLK
DSDATA1
DSDATA2
DSDATA3
DSDATA4
ADCLP
ADCLN
ADCRP
ADCRN
AD1837 Terminal Function
Pin Name
CLATCH
PD/RST
OUTR1
Σ-
ADC
Σ-
ADC
AD1837
Input/
Output
DVDD
CIN
AGND
NC
OUTL1
NC
AGND
AVDD
NC
OUTL2
DGND
CCLK
COUT
ASDATA
ODVDD
MCLK
ALRCLK
ABCLK
50 494847 46 45 44 43 42 41 40
51
52
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
NC
OUTR2
SERIAL DATA
I/O PORT
DIGITAL FILTER
DIGITAL FILTER
TOP VIEW
FILTD
FILTR
AGND
DGND AGND AGND AGND AGNDDGND
AVDD
DSDATA4
ADCLP
ADCLN
ADCRN
CINCLATCHCCLK COUT
CONTROL PORT
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
DSDATA3
ADCRP
1,39 DVDD Digital Power Supply. Connect to digital 5V supply. 2 CLATCH I Latch Input for Control Data 33 CIN I Serial Control Input 4 PD/RST I Power-Down/Reset 5,10,16,24,30,35 AGND Analog Ground 6,12,25,31 NC Not connected 7,13,26,32 OUTLx O DACx Left Channel Output 8,14,27,33 NC Not connected 9,15,28,34 OUTRx O DACx Right Channel Output 11,19,29 AVDD Analog Power Supply. Connect to analog 5V supply. 17 FILTD Filter Capacitor Connection. Recommend 10µF/100nF. 18 FILTR Reference Filter Capacitor Connection. Recommended 10µF/100nF. 20 ADCLN I ADC Left Channel Negative Input 21 ADCLP I ADC Left Channel Positive Input 22 ADCRN I ADC Right Channel Negative Input 23 ADCRP I ADC Right Channel Positive Input 36 M/S I ADC Master/Slave Select 37 DLRCLK I/O DAC LR Clock 38 DBCLK I/O DAC Bit Clock 40,52 DGND Digital Ground 41-44 DSDATAx I DACx Input Data (Left and Right Supply) 45 ABCLK I/O ADC Bit Clock 46 ALRCLK I/O ADC LR Clock 47 MCLK I Master Clock Input 48 ADVDD Digital Output Driver Power Supply 49 ASDATA O ADC Serial Data Output 50 COUT O Output for Control Data 51 CCLK I Control Clock Input for Control Data
14
LC75721E (IC301) BU2090 (IC302)
2
SERIAL
IN
STROBE
Q
1
Q2
Q3
Q4
CLOCK
3
4
5
6
7
8
15
14
13
12
11
10
9
V
SS
1
OUTPUT ENABLE
V
DD
Q6
Q7
Q8
Q'S
Q5
QS
16
AVR-1306
G7 G8G9
48 33
49
DI CL CE
RES
DD
V
OSCI
OSCO
Vss
TEST
FL
V G1 G2 G3 G4 G5 G6
64
AM 1
AM 2
AM 3
G10
G11
AA8/G12
AA7/G13
AA6/G14
AA5/G15
AA4/G16
AA3
AA2
AA1
AM35
AM34
AM33
161
AM 4
AM 5
AM 6
AM 7
AM 8
AM 9
AM 10
AM 11
AM 12
AM 13
AM 14
AM 15
AM 16
LC75721E Terminal Function
Symbol
32
17
AM 17 AM 18 AM 19 AM 20 AM 21 AM 22 AM 23 AM 24 AM 25 AM 26 AM 27 AM 28 AM 29 AM 30 AM 31 AM 32
V
DD
Vss V
FL
DI CL CE
OSCI OSCO
RES
AM1~AM35 AA1~AA3
AA4/G16 AA5/G15 AA6/G14 AA7/G13 AA8/G12
Power terminal +5V Power terminal GND Power terminal FL drive Serial data transfer terminal
DI: Data CL: Clock CE: Chip enable
External CR connecting terminal
System reset terminal
Anode output terminal
Anode/Grid output terminal
Function
VSS
DATA
CLOCK
LCK
1
CONTROL CIRCUIT
2
12-bi t SHIFT REGI STER
3
4
5
6
7
8
9
12- bit STRAGE REGI STER
OUTPUT BUFF ER (OPE N DRAI N)
Q0
Q1
Q2
Q4
18
17
16
15
14
13
12
11Q3
10
G1~G11 Grid output terminal TEST LSI test terminal
74LVX157 (IC816) BA4510F (IC815A,816A) BU4094BC (IC551,552)
SE
LECT
1A
1B
1Y
2A
2B
2Y
GND
1
2
SEL
3
4
5
5
6
7
8
16
15
14
13
12
11
10
Vcc
OUT1
1
VCC
8
ST
4A
4B
4Y
– IN1
+ IN1
2
1ch
+
3
2ch
+
OUT2
7
– IN2
6
3A
3B
9
3Y
EE
V
4
+ IN2
5
VDD
OE
Q11
Q10
Q9
Q8
Q7
Q6
Q5
MM74LCX244 (IC809-811) MM74HCT244 (IC812) FAN1117-1.2 (IC824)
RC1117-3.3 (IC823)
TOP VIEW
1
OE
2
I0
3
O4
4
I1
5
O5
6
I2
7
O6
8
I3
912
O7 O3
10 11
GND
20
VCC
19
OE2
18
O0
17
I4
16
O1
15
I5
14
O2
13
I6
I7
1G
1A 2Y
1A 2Y 1A 2Y 1A 2Y
GND
0
0
1
1
2
2
3
3
20 1
V
CC
19 2
2G
0
18 3
1Y
0
17 4
2A
1
16 5
1Y
1
15 6
2A
2
14 7
1Y
2
13 8
2A
3
12 9
1Y
3
11 10
2A
V
15
OUT
FRONT VIEW
2
3
2
1
IN
OUT
ADJ/GND
AVR-1306
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
6A
6Y
5A
5Y
4A
4Y
LH28F800BJE (IC805)
SN74LV573APW (IC818,819) SN74LV14APW (IC829)
Vcc
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1 2
3 4
5 6
7 8
9
10
20
Q0
19
Q1
18
Q2
17
Q3
16
Q4
15
Q5
14
13
Q6
12
Q7
11
LE
OE
11
E
1
D1 D2
D0
234
D
D
D
Q
L
Q0 Q1
L
Q
Q
L
L
1819
17
Q2
D3 D4 D5 D6
567
D
D
Q
Q
L
L
16
Q3
89
D
Q
L
Q4 Q5 Q6 Q7
D7
D
D
Q
Q
L
L
12131415
SN74LVC139APWR (IC820) MM74HCT00MT (IC814,815)
FUNCTION TABLE
1G
1A
1B 1Y0 1Y1 1Y2 1Y3
GND
(each decoder/demultiplexer)
1
16
V
2
3
4
5
6
7
8
CC
15
2G
14
2A
13
2B
12
2Y0
11
2Y1
10
2Y2
9
2Y3
INPUTS
SELECT
G
G
B A Y3 Y2 Y1 Y0
L L L H H H L
L L HHHLH
L H LHLHH
L H HLHHH
H X X H H H H
OUTPUTS
OUTPUTS
GND
1A
1B
1Y
2A
2B
2Y
1
2
3
4
5
6
7
Vcc
14
4B
13
4A
12
4Y
11
3B
10
9
3A
3Y
8
IC63LV1024-10T (IC817)
16

2. FL DISPLAY

16-ST-82GNK (FL301)
AVR-1306
59
TUNED
STEREO
RDS
CH
G16
TUNED
RDS
CH
G15 G13
STEREO
AUTO
Pin Assignment
AUTO
G14
ZONE2
REC
ZONE2
REC
PHONO
VCR
G12
PHONO
VCR
G11
CD
-
1
G10
CD
-
TUNER
-2-
TUNER
-2-
1
AUX
3 V.AUX
G9
3
G8
DVD / CDR
G7
AUX
V.AUX
VDP TV
TAPE
/
G6
DVD / CDR
G5
/
-1-
G4
VDP
TAPE
/
2
DBS
DIGITAL
G3
TV
-1-
PRO LOGICII DIGITAL
ANALOG
G2
DBS
/
2
DIGITAL
1
G1
PRO LOGIC DIGITAL
ANALOG
G1
S38
S13
S14
S15
S12
S9
S10
S11
S1
S6
S2
S7
S5
S3
S4
G2~G16
S3
S8
S13
S18
S23
S28
S33
S4
S9
S14
S19
S24
S29
S34
S5
S10
S15
S20
S25
S30
S35
S2
S1
S7
S6
S12
S11
S17
S16
S22
II
S21
S26
S31
S27
S32
PIN NO. CONNECTION
PIN NO. CONNECTION
PIN NO. CONNECTION
12345
F1 F1 21 22
S18
NP
23 24 25
S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37
41 42 43 44 45
S38
G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 F2 F2
Anode & Grid Assignment
G1
G2~G16
S1 S2
S3 S4 S5 S6 S7 S8 S9
TV
VDP
2
-
1
TAPE
S36 S37 S38
S1 S2 S3 S4 S5 S6 S7
S1 S2 S3 S4 S5 S6
S7 S8 S9
S9
G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15
/
-
S38
DBS
6
S1 S2 S3
26
46
S10 S11 S12 S13 S14
S15
S10 S11 S12
S13 S14 S15
S16 S17 S18
DIGITAL
PRO LOGIC
/(DVD) /(CDR)
CDR
7 8 9 10 11 12 13 14 15 16 17 18 19
S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15
S4
27 28 29 30 31 32 33 34
35 36 37 38
47 48 49 50 51 52 53 54 55 56 57
G1
G2~G16
AUXDVD
V.AUX
S13
II
S10 S11 S12
S14 S15
S16 S17 S18
S19 S20
S21 S22 S23 S24 S25
S26
S27
TUNER
-
2
-
3
CD
-
G1
G2~G16
S19 S20 S21 S22 S23 S24
S25 S26
S28 S29 S30 S31 S32 S33 S34 S35
S27
PHONO
1
VCR
REC
ZONE2
20
S16 S17
39 40
58 59
F1, F2 : Filament G1~G16 : Grid S1~S38 : Anode
G1
G2~G16
S28 S29 S30 S31
S32 S33
S34 S35
G16
STEREO
AUTO
TUNED
RDS
CH
17

PRINTED WIRING BOARDS

MAIN P.W.B. UNIT

AVR-1306
18
COMPONENT SIDE

FRONT P.W.B. UNIT

AVR-1306
19
COMPONENT SIDE
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