Dell Inspiron 5480 Schematic

5
D D
4
3
2
1
BUCKY_WHL Schematic
C C
2018/04/10
REV : X01
B B
BV UMA TC TPM
BV UMA TC TPM
DY : None Installed
A A
UMA: UMA only installed OPS: DISCRTE OPTIMUS installed
5
4
3
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Cover Page
Cover Page
Size
Size
Size
Document Number R ev
Document Number R ev
Document Number R ev
A4
A4
A4
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet
Date: Sheet
Date: Sheet
2
Cover Page
Bucky WHL
Bucky WHL
Bucky WHL
1 105
1 105
1 105
1
SA
SA
o f
o f
o f
SA
5
https://shop62935598.taobao.com
VRAM(GDDR5) *2
2GB
D D
14"/15" LCD Touch Panel
HDMI 1.4
81,8 2
55
57
GDDR 5
LPS
C C
USB3.0 type-C
CC1/C C2
DP/USB 3.0
73
USB4(USB3.0)
B B
USB3(USB3.0)
CC
TI 65 982
MUX and Redriver
TI TUSB546
MB side
35
MB side
35
I2C
IO Board
Free Fall Sensor
Finger Printer with Power Button
Note:FP(UI) or IR came ra. either one for windows hello.
66
CardReader
Realtek RTS5144
LAN 10/100/1000
REALTEK RTL8111 REALTEK RTL8106
SD Card Slot
A A
USB2(USB2.0)
RJ45 Conn.
5
32
New
72
92
6666
NVIDIA N16S and N17S Codesign
USB PowerShare
70
4
3
Bucky WHL Block Diagram
GPU
DDR4 2400MHz Channel A(KBL-R)
DDR4 2400MHz Channel B(KBL-R)
PCIE (Gen1) x1
USB2.0 x1
SATA (Gen3) x1
PCIe (Gen3)x4
USB2.0 x1
SATA (Gen3) x1
I2C
HDA
eSPI BUS
SPI
I2C
3
76,77 ,78,7 9,80
USB3.0
DP
73
TI TPS2544RTER3 6
31
4
PCIE (Gen 3)x 4
eDP
I2C
DP1.2HDMI
USB2.0 x1
USB3.0 x1
USB2.0 x1
USB3.0 x1
USB2.0 x1
I2C
USB2.0 x1
USB2.0 x1
USB2.0 x1
PCIE (Gen1)x1
Intel CPU
Whiskey Lake U
15W
WHL PCH-LP
10 USB 2.0/1. 1 ports
6 USB 3.1Gen1/Gen2 Ports
High Definition Audio
3 SATA port s 16 PCIE ports LPC I/F ACPI 5.0
CNVi
Flash ROM
Vostro only
Redriver
SN75LVCP601RTJR-GP
Sensor Board
E-compass
ST LIS2MDL
Gyro+G
ST LSM6DS3 USTR
SMSC MEC1416-NU-GP
16MB
25
TPM 2.0
NPCT750
Jefferson's peak(CNVI)
Camera
Digital MIC
60
EC
91
PS2
NGFF WLAN
M.2 NGFF/NvMe
(SSD)
HDD
60
24
Int. KB
65
PrecisionTouch pad
2
DDR4
SODIMM A
DDR4
SODIMM B
61
63
Audio Codec
ALC3204
eSPI debug port
2
Project code: PCB P/N: 17859 Revision: SA
12
13
HP_R/L
MIC_IN/GN D
2CH SPEAKER (2CH 2W/4ohm)
27
68
26
65
1
CHARGER
ISL88 739
INPUT S
AD+
BT+
SYSTEM DC/DC
TPS51 225RUKR-GP
INPUT S
DCBATOUT
CPU Core Power
NCP81 208MNTXG NCP81382MNTXG x 2 NCP81382MNTXG (23e) NCP81 253MNTBG
INPUT S
DCBATOUT
DCBATOUT
DCBATOUT+VCCSA
DDR4 SUS
RT823 1AGQW-GP APL59 30KAI-TRG
INPUT S
DCBATOUT 3D3V_S5
CPU VCCPRIM_CORE 1V
INPUT S OUTPUTS
1D0V_S5
CPU DCDC-V1D00A
Universal Jack
29
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
AOZ22 62QI-10-GP-U
DCBATOUT
LDO-V1D8V
APL59 30KAI-TRG
3D3V_S5
5V/3V S0
TPS22 966DPUR-GP
5V_S 5 3D3V_ S5
EOPIO/EDRAM (23e)
TPS22 961DNYT
INPUT S
1D0V_ S5 1D0V_ S5
3D3V VGA
AO341 9L
INPUT S
3D3V_ S0
VGA_CORE
ISL62 771HRTZ-GP-U
INPUT S
DCBAT OUT
1D5V_VGA_S0
Y8288 RAC-G P
INPUT S
DCBAT OUT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Block Diagram
Block Diagram
Block Diagram
Bucky WHL
Bucky WHL
Bucky WHL
1
OUTPU TS
DCBATOUT
OUTPU TS
3D3V_PWR 3D3V_S5 5V_PWR 5V_S5
46~50
33
OUTPU TS
VCC_CORE
+VCCGTDCBATOUT
+VCCGT (23e)
OUTPU TS
1D2V_S3 0D6V_S0 2D5V_S3
+VCCPRIM_CORE
OUTPU TSINPUT S
1D0V_S5
OUTPU TSINPUT S
1D8V_S5
40
OUTPU TSINPUT S
5V_S 0 3D3V_ S0
OUTPU TS
+V_ED RAM_V R +V_EO PIO_V R
OUTPU TS
3D3V_ VGA_S 0
OUTPU TS
VGA_C ORE
OUTPU TS
1D5V_ VGA_S 0
of
of
of
2 105Friday, July 13, 2018
2 105Friday, July 13, 2018
2 105Friday, July 13, 2018
44
45
51
11
53
54
40
86
85
86
SA
SA
SA
5
SSID = CPU
PECI_CPU24 PROCHOT#_CPU24,44,46 TOUCH_PANEL_INTR#55
D D
C C
TP_WAKE_KBC#24,65
H_CPUPWRGD17
TOUCH_PANEL_PD#55
XDP_TCLK99
XDP_TDO_CPU99
XDP_TDI99
XDP_TMS99
XDP_TCK_JTAGX99
PCH_JTAG_TDO99
PCH_JTAG_TDI99
PCH_JTAG_TMS99
4
[PECI] an d [PROCH OT#] Impedance control: 50 ohm
3D3V_S5_PCH
1 2
Do Not Stuff
TP_WAKE_KBC#
1 2
R319
Do Not Stuff
3
1V_VCCSTG
12
R301 1KR2J-1-GP
Rb
CATERR#_CPU
TP301
TP307 TP308 TP302 TP303
TP304
R30449D9R2F-GP R30549D9R2F-GP
1
PECI_CPU PROCHOT#_CPU_RPROCHOT#_CPU THERMTRIP#_CPU
BPM_CPU_N0
1
BPM_CPU_N1
1
BPM_CPU_N2
1
BPM_CPU_N3
1
GPP_E3/CPU_GP0
1
TOUCH_PANEL_INTR#
TOUCH_PAD_INTR#
TOUCH_PANEL_PD#
CPU_POPIRCOMP
12
PCH_POPIRCOMP
12
Follow Rogue
Do Not Stuff
1 2
R302499R2F-2-GP
Ra
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff
R303
DY
5/28 SC 06/21 SD
CPU1D
AA4 AR1
Y4
BJ1
U1 U2 U3 U4
CE9
CN3 CB34 CC35
BP27
BW25
WHISKEY-LAKE-GP
ZZ.00CPU.271
CATERR# PECI PROCHOT# THRMTRIP#
BPM#0 BPM#1 BPM#2 BPM#3
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
PROC_POPIRCOMP PCH_OPIRCOMP
4 OF 20
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_TCK
PCH_TDI PCH_TDO PCH_TMS
PCH_TRST# PCH_JTAGX
PROC_PREQ# PROC_PRDY#
T6 U6 Y5 T5 AB6
W6 U5 W5 P5 Y6 P6
W2 W1
XDP_TCLK XDP_TDI XDP_TDO_CPU XDP_TMS XDP_TRST#
PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS XDP_TRST# XDP_TCK_JTAGX
XDP_PREQ# XDP_PRDY#
1 1
TP305 TP306
Do Not Stuff Do Not Stuff
2
1V_VCCST_CPU
12
R308
2
1
DY
3
1KR2J-1-GP
ED301
Do Not Stuff
Do Not Stuff
2nd = 075.52215.007D
THERMTRIP#_CPU
H_CPUPWRGD
RO13_20171 001
XDP_TMS
XDP_TDO_CPU
XDP_TDI
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
XDP_TCK_JTAGX
XDP_TRST#
XDP_TCLK
PCH_JTAG_TCK
Do Not Stuff
1
R309Do Not Stuff
1 2
DY
R310Do Not Stuff
1 2
DY
R311Do Not Stuff
1 2
DY
R31251R2J-2-GP 1 2
R31351R2J-2-GP 1 2
R31451R2J-2-GP 1 2
R315
1 2
DY
R316
1 2
Do Not Stuff
DY
1 2
R317 51R2J-2-GP
1 2
R318 Do Not Stuff
DY
1V_VCCSTG
(#543016) PROCHOT# Routing Guidelines
B B
A A
5
M1,2,3,4,5: <3 inches M6: 1-11 inches MCPU: 0.3 -1.5 inches Mt <0.3 mils Main route(M1+M2+M3+M4+M5+M6+MCPU): 1-12 inches
4
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Bucky WHL
Bucky WHL
Bucky WHL
Taipei Hsien 221, Taiwan, R .O.C.
of
of
of
3 105Friday, July 13, 2018
3 105Friday, July 13, 2018
3 105Friday, July 13, 2018
SA
SA
SA
1
Title
Title
Title
CPU (THML/JTAG)
CPU (THML/JTAG)
CPU (THML/JTAG)
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
3
2
SSID = CPU
5
4
3
2
1
DP to HDMI2.0
HDMI_DDI_TX_N057 HDMI_DDI_TX_P057 HDMI_DDI_TX_N157 HDMI_DDI_TX_P157 HDMI_DDI_TX_N257 HDMI_DDI_TX_P257 HDMI_DDI_TX_N357 HDMI_DDI_TX_P357
HDMI_HPD_CPU57
D D
C C
B B
HDMI_SDA_CPU57 HDMI_SCL_CPU57
DP for Type-C Mux
DP2_DDI_TX_N073 DP2_DDI_TX_P073 DP2_DDI_TX_N173 DP2_DDI_TX_P173 DP2_DDI_TX_N273 DP2_DDI_TX_P273 DP2_DDI_TX_N373 DP2_DDI_TX_P373
DP2_AUX_CPU_P73
DP2_AUX_CPU_N73
eDP_TX_CPU_N055 eDP_TX_CPU_P055 eDP_TX_CPU_N155 eDP_TX_CPU_P155
eDP_AUX_CPU_N55 eDP_AUX_CPU_P55
eDP_HPD_CPU55
DP1_HPD_CPU72,73
L_BKLT_EN24 L_BKLT_CTRL55 EDP_VDD_EN55
GPP_H17_STRAP15
2016/11/01 modify
3D3V_S0
RN401
HDMI_SDA_CPU
1
4
HDMI_SCL_CPU
2 3
SRN2K2J-1-GP
3D3V_S0
SRN2K2J-1-GP
CPU_DP2_CTRL_DATA
1
4
CPU_DP2_CTRL_CLK
2 3
RN403
(#543016) eDP_RCOMP Guideline
Signa l Trac e
Widt h
eDP_R COMP 20 mils 25 mils 24.9 Ω ± 1%
(#543016) DDI Disabling and Termination Guidelines
Port Stra p Enable Port Disable Port
Port 1
DDPB_ CTRLD ATA
Port 2
DDPC_ CTRLD ATA
Isola tion
Resis tor
Spaci ng
Valu e
PU to 3.3 V with 2.2-k ± 5% resistor
PU to 3.3 V with 2.2-k ± 5% resistor
Design Guideline: Skylake processor signal eDP_RCOMP should b e connected to the VCCIO rail via a sin gle 24.9 ± 1% Ω resistor.
Max = 100 mils
NC
NC
Lengt h
1.65GT Length 6.5" (3 VIA)
RO13_20170 626
Add RTC Gen 9 reset circuit_20170814 leakage issue
RTC_RST
DP to HDMI2.0
DP for Type-C Mux
1V_VCCIO
R401
1 2
24D9R2F-L-GP
SIO_EXT_SMI#
3D3V_S5_PCH 3D3V_S5_PCH
12
R406 10KR2J-3-GP
CPU_DP_HPD_P
1 2
10KR2J-3-GP
RO13_201 71011
Q401
Note:ZZ.27 002.F7C0 1
1
6
2
5
3 4
common part
2N7002KDW-1-GP
75.27002.F7C
2nd = 075.27002.0E7C
TP402Do Not Stuff
R402
RTC_RST
RTC_RST
HDMI_DDI_TX_N2 HDMI_DDI_TX_P2 HDMI_DDI_TX_N1 HDMI_DDI_TX_P1 HDMI_DDI_TX_N0 HDMI_DDI_TX_P0 HDMI_DDI_TX_N3 HDMI_DDI_TX_P3
DP2_DDI_TX_N0 DP2_DDI_TX_P0 DP2_DDI_TX_N1 DP2_DDI_TX_P1 DP2_DDI_TX_N2 DP2_DDI_TX_P2 DP2_DDI_TX_N3 DP2_DDI_TX_P3
eDP_RCOMP_CPU
HDMI_SCL_CPU HDMI_SDA_CPU
CPU_DP2_CTRL_CLK CPU_DP2_CTRL_DATA
1
GPP_H17_STRAP
3D3V_S0
12
R405 10KR2J-3-GP
DP1_HPD_CPU_R
DP1_HPD_CPU
GPP_E23
CPU1A
AL5
DDI1_TXN0
AL6
DDI1_TXP0
AJ5
DDI1_TXN1
AJ6
DDI1_TXP1
AF6
DDI1_TXN2
AF5
DDI1_TXP2
AE5
DDI1_TXN3
AE6
DDI1_TXP3
AC4
DDI2_TXN0
AC3
DDI2_TXP0
AC1
DDI2_TXN1
AC2
DDI2_TXP1
AE4
DDI2_TXN2
AE3
DDI2_TXP2
AE1
DDI2_TXN3
AE2
DDI2_TXP3
GPP_E13/DDPB_HPD0/DISP_MISC0 GPP_E14/DDPC_HPD1/DISP_MISC1 GPP_E15/DPPD_HPD2/DISP_MISC2 GPP_E16/DPPE_HPD3/DISP_MISC3
GPP_E17/EDP_HPD/DISP_MISC4
AM6
DISP_RCOMP
CC8
GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
CC9
GPP_E19/DPPB_CTRLDATA
CH4
GPP_E20/DPPC_CTRLCLK
CH3
GPP_E21/DPPC_CTRLDATA
CP4
GPP_E22/DPPD_CTRLCLK
CN4
GPP_E23/DPPD_CTRLDATA
CR26
GPP_H16/DDPF_CTRLCLK
CP26
GPP_H17/DDPF_CTRLDATA
WHISKEY-LAKE-GP
ZZ.00CPU.271
1 OF 20
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUX_N EDP_AUX_P
DISP_UTILS
DDI1_AUX_N DDI1_AUX_P DDI2_AUX_N DDI2_AUX_P DDI3_AUX_N DDI3_AUX_P
EDP_BKLTEN
EDP_VDDEN
EDP_BKLTCTL
AG4 AG3 AG2 AG1 AJ4 AJ3 AJ2 AJ1
AH4 AH3
AM7
AC7 AC6 AD4 AD3 AG7 AG6
CN6 CM6 CP7 CP6 CM7
CK11 CG11 CH11
eDP_TX_CPU_N0 eDP_TX_CPU_P0 eDP_TX_CPU_N1 eDP_TX_CPU_P1
eDP_AUX_CPU_N eDP_AUX_CPU_P
DP2_AUX_CPU_N DP2_AUX_CPU_P
HDMI_HPD_CPU DP1_HPD_CPU_R SIO_EXT_SMI#
eDP_HPD_CPU
L_BKLT_EN EDP_VDD_EN L_BKLT_CTRL
RTC Gen 9 reset circuit_20170814
1 2
NON_RTC_RST
Do Not Stuff
R404
R403 100KR2J-1-GP
1 2
Length 2" -10" (2VIA) Cable Length 4"-15"
Length 10" (3VIA)
for HDMI2.0 TYPE-C MUX
DP1_HPD_CPUDP1_HPD_CPU_R
DP for Type-C Mux
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
CPU (DDI/EDP/TBT/TPC/)
CPU (DDI/EDP/TBT/TPC/)
CPU (DDI/EDP/TBT/TPC/)
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
Bucky WHL
Bucky WHL
Bucky WHL
1
SA
SA
4 105Friday, July 13, 2018
4 105Friday, July 13, 2018
4 105Friday, July 13, 2018
SA
Main Func = CPU
M_B_DQ0 13 M_B_DQ1 13 M_B_DQ2 13 M_B_DQ3 13 M_B_DQ4 13 M_B_DQ5 13 M_B_DQ6 13 M_B_DQ7 13 M_B_DQ8 13
M_B_DQ9 13 M_B_DQ10 13 M_B_DQ11 13 M_B_DQ12 13 M_B_DQ13 13
D D
C C
B B
A A
M_B_DQ14 13 M_B_DQ15 13 M_B_DQ32 13 M_B_DQ33 13 M_B_DQ34 13 M_B_DQ35 13 M_B_DQ36 13 M_B_DQ37 13 M_B_DQ38 13 M_B_DQ39 13 M_B_DQ40 13 M_B_DQ41 13 M_B_DQ42 13 M_B_DQ43 13 M_B_DQ44 13 M_B_DQ45 13 M_B_DQ46 13 M_B_DQ47 13 M_B_DQ16 13 M_B_DQ17 13 M_B_DQ18 13 M_B_DQ19 13 M_B_DQ20 13 M_B_DQ21 13 M_B_DQ22 13 M_B_DQ23 13 M_B_DQ24 13 M_B_DQ25 13 M_B_DQ26 13 M_B_DQ27 13 M_B_DQ28 13 M_B_DQ29 13 M_B_DQ30 13 M_B_DQ31 13 M_B_DQ48 13 M_B_DQ49 13 M_B_DQ50 13 M_B_DQ51 13 M_B_DQ52 13 M_B_DQ53 13 M_B_DQ54 13 M_B_DQ55 13 M_B_DQ56 13 M_B_DQ57 13 M_B_DQ58 13 M_B_DQ59 13 M_B_DQ60 13 M_B_DQ61 13 M_B_DQ62 13 M_B_DQ63 13
M_B_CLK#0 13 M_B_CLK#1 13 M_B_CLK0 13 M_B_CLK1 13
M_B_CKE0 13 M_B_CKE1 13
M_B_CS#0 13 M_B_CS#1 13 M_B_DIMB_ODT0 13 M_B_DIMB_ODT1 13
M_B_A5 13
M_B_A9 13
M_B_A6 13
M_B_A8 13
M_B_A7 13
M_B_BG0 13
M_B_A12 13 M_B_A11 13
M_B_ACT_N 13 M_B_BG1 13
M_B_A13 13 M_B_A15 13 M_B_A14 13 M_B_A16 13
M_B_BA0 13
M_B_A2 13
M_B_BA1 13
M_B_A10 13
M_B_A1 13
M_B_A0 13
M_B_A3 13
M_B_A4 13
M_B_ALERT_N 5,13 M_B_PARITY 5,13 SM_DRAMRST# 12,13
SM_PGCNTL_R 51
M_A_DQS_DN0 M_A_DQS_DN1 M_A_DQS_DN2 M_A_DQS_DN3 M_A_DQS_DN4 M_A_DQS_DN5 M_A_DQS_DN6 M_A_DQS_DN7
M_A_DQS_DP0 M_A_DQS_DP1 M_A_DQS_DP2 M_A_DQS_DP3 M_A_DQS_DP4 M_A_DQS_DP5 M_A_DQS_DP6 M_A_DQS_DP7
M_B_DQS_DN0 M_B_DQS_DN1 M_B_DQS_DN2 M_B_DQS_DN3 M_B_DQS_DN4 M_B_DQS_DN5 M_B_DQS_DN6 M_B_DQS_DN7
M_B_DQS_DP0 M_B_DQS_DP1 M_B_DQS_DP2 M_B_DQS_DP3 M_B_DQS_DP4 M_B_DQS_DP5 M_B_DQS_DP6 M_B_DQS_DP7
5
M_B_ALERT_N 5,13 M_B_PARITY 5,13
M_A_CLK#0 12 M_A_CLK0 12 M_A_CLK#1 12 M_A_CLK1 12
M_A_CKE0 12 M_A_CKE1 12
M_A_CS#0 12 M_A_CS#1 12 M_A_DIMA_ODT0 12 M_A_DIMA_ODT1 12
M_A_BG0 12
M_A_A12 12
M_A_A11 12 M_A_ACT_N 12 M_A_BG1 12
M_A_A13 12
M_A_A15 12
M_A_A14 12
M_A_A16 12 M_A_BA0 12
M_A_BA1 12
M_A_A10 12
M_A_ALERT_N 12
M_A_PARITY 12
V_SM_VREF_CNTA 12
V_SM_VREF_CNTB 13
M_A_DQS_DN[7:0] 12
M_A_DQS_DP[7:0] 12
M_B_DQS_DN[7:0] 13
M_B_DQS_DP[7:0] 13
5
M_A_DQ0 12 M_A_DQ1 12 M_A_DQ2 12 M_A_DQ3 12 M_A_DQ4 12 M_A_DQ5 12 M_A_DQ6 12 M_A_DQ7 12 M_A_DQ8 12 M_A_DQ9 12 M_A_DQ10 12 M_A_DQ11 12 M_A_DQ12 12 M_A_DQ13 12 M_A_DQ14 12 M_A_DQ15 12 M_A_DQ32 12 M_A_DQ33 12 M_A_DQ34 12 M_A_DQ35 12 M_A_DQ36 12 M_A_DQ37 12 M_A_DQ38 12 M_A_DQ39 12 M_A_DQ40 12 M_A_DQ41 12 M_A_DQ42 12 M_A_DQ43 12 M_A_DQ44 12 M_A_DQ45 12 M_A_DQ46 12 M_A_DQ47 12 M_A_DQ16 12 M_A_DQ17 12 M_A_DQ18 12 M_A_DQ19 12 M_A_DQ20 12 M_A_DQ21 12 M_A_DQ22 12 M_A_DQ23 12 M_A_DQ24 12 M_A_DQ25 12 M_A_DQ26 12 M_A_DQ27 12 M_A_DQ28 12 M_A_DQ29 12 M_A_DQ30 12 M_A_DQ31 12 M_A_DQ48 12 M_A_DQ49 12 M_A_DQ50 12 M_A_DQ51 12 M_A_DQ52 12 M_A_DQ53 12 M_A_DQ54 12 M_A_DQ55 12 M_A_DQ56 12 M_A_DQ57 12 M_A_DQ58 12 M_A_DQ59 12 M_A_DQ60 12 M_A_DQ61 12 M_A_DQ62 12 M_A_DQ63 12
M_A_A5 12 M_A_A9 12 M_A_A6 12 M_A_A8 12 M_A_A7 12
M_A_A2 12
M_A_A1 12 M_A_A0 12
M_A_A3 12 M_A_A4 12
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3
M_A_DQ[ 0:7]
M_A_DQ[ 8:15]
M_A_DQ[ 32:39 ]
M_A_DQ[ 40:47 ]
M_B_DQ[ 0:7]
M_B_DQ[ 8:15]
M_B_DQ[ 32:39 ]
M_B_DQ[ 40:47 ]
DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel. Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. Also differential clock pair to clock pair swapping within a channel is not allowed.
M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46
M_A_DQ47 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47
PDG: DDR/ODT
4
DDR4 ball type: NON-Interleaved Type
CPU1B
A26
DDR0_DQ0/DDR 0_DQ0
D26
DDR0_DQ1/DDR 0_DQ1
D28
DDR0_DQ2/DDR 0_DQ2
C28
DDR0_DQ3/DDR 0_DQ3
B26
DDR0_DQ4/DDR 0_DQ4
C26
DDR0_DQ5/DDR 0_DQ5
B28
DDR0_DQ6/DDR 0_DQ6
A28
DDR0_DQ7/DDR 0_DQ7
B30
DDR0_DQ8/DDR 0_DQ8
D30
DDR0_DQ9/DDR 0_DQ9
B33
DDR0_DQ10/DD R0_DQ10
D32
DDR0_DQ11/DD R0_DQ11
A30
DDR0_DQ12/DD R0_DQ12
C30
DDR0_DQ13/DD R0_DQ13
B32
DDR0_DQ14/DD R0_DQ14
C32
DDR0_DQ15/DD R0_DQ15
H37
DDR0_DQ16/DD R0_DQ32
H34
DDR0_DQ17/DD R0_DQ33
K34
DDR0_DQ18/DD R0_DQ34
K35
DDR0_DQ19/DD R0_DQ35
H36
DDR0_DQ20/DD R0_DQ36
H35
DDR0_DQ21/DD R0_DQ37
K36
DDR0_DQ22/DD R0_DQ38
K37
DDR0_DQ23/DD R0_DQ39
N36
DDR0_DQ24/DD R0_DQ40
N34
DDR0_DQ25/DD R0_DQ41
R37
DDR0_DQ26/DD R0_DQ42
R34
DDR0_DQ27/DD R0_DQ43
N37
DDR0_DQ28/DD R0_DQ44
N35
DDR0_DQ29/DD R0_DQ45
R36
DDR0_DQ30/DD R0_DQ46
R35
DDR0_DQ31/DD R0_DQ47
AN35
DDR0_DQ32/DD R1_DQ0
AN34
DDR0_DQ33/DD R1_DQ1
AR35
DDR0_DQ34/DD R1_DQ2
AR34
DDR0_DQ35/DD R1_DQ3
AN37
DDR0_DQ36/DD R1_DQ4
AN36
DDR0_DQ37/DD R1_DQ5
AR36
DDR0_DQ38/DD R1_DQ6
AR37
DDR0_DQ39/DD R1_DQ7
AU35
DDR0_DQ40/DD R1_DQ8
AU34
DDR0_DQ41/DD R1_DQ9
AW35
DDR0_DQ42/DD R1_DQ10
AW34
DDR0_DQ43/DD R1_DQ11
AU37
DDR0_DQ44/DD R1_DQ12
AU36
DDR0_DQ45/DD R1_DQ13
AW36
DDR0_DQ46/DD R1_DQ14
AW37
DDR0_DQ47/DD R1_DQ15
BA35
DDR0_DQ48/DD R1_DQ32
BA34
DDR0_DQ49/DD R1_DQ33
BC35
DDR0_DQ50/DD R1_DQ34
BC34
DDR0_DQ51/DD R1_DQ35
BA37
DDR0_DQ52/DD R1_DQ36
BA36
DDR0_DQ53/DD R1_DQ37
BC36
DDR0_DQ54/DD R1_DQ38
BC37
DDR0_DQ55/DD R1_DQ39
BE35
DDR0_DQ56/DD R1_DQ40
BE34
DDR0_DQ57/DD R1_DQ41
BG35
DDR0_DQ58/DD R1_DQ42
BG34
DDR0_DQ59/DD R1_DQ43
BE37
DDR0_DQ60/DD R1_DQ44
BE36
DDR0_DQ61/DD R1_DQ45
BG36
DDR0_DQ62/DD R1_DQ46
BG37
DDR0_DQ63/DD R1_DQ47
WHISKEY-LAKE-GP
ZZ.00CPU.271
4
DDR0_CKN0/DDR 0_CKN0
DDR0_CKP0/DDR0 _CKP0
DDR0_CKN1/DDR 0_CKN1
DDR0_CKP1/DDR0 _CKP1
DDR0_CKE0/DDR0 _CKE0 DDR0_CKE1/DDR0 _CKE1
DDR0_CS#0/DDR 0_CS#0 DDR0_CS#1/DDR 0_CS#1
DDR0_ODT0/DDR 0_ODT0
NC/DDR0_ODT1
DDR0_CAB9/DDR0 _MA0
DDR0_DQ[16 ]
DDR0_CAB8/DDR0 _MA1
DDR0_DQ[17 ]
DDR0_CAB5/DDR0 _MA2
DDR0_DQ[18 ] DDR0_DQ[19 ]
DDR0_DQ[20 ]
DDR0_CAA0/DDR0 _MA5
DDR0_DQ[21 ]
DDR0_CAA2/DDR0 _MA6
DDR0_DQ[22 ]
DDR0_CAA4/DDR0 _MA7
DDR0_DQ[23 ]
DDR0_CAA3/DDR0 _MA8
DDR0_CAA1/DDR0 _MA9 DDR0_CAB7/DDR0 _MA10 DDR0_CAA7/DDR0 _MA11 DDR0_CAA6/DDR0 _MA12 DDR0_CAB0/DDR0 _MA13
DDR0_CAB2/DDR0 _MA14 DDR0_CAB1/DDR0 _MA15 DDR0_CAB3/DDR0 _MA16
DDR0_CAB4/DDR0 _BA0
DDR0_CAB6/DDR0 _BA1
DDR0_CAA5/DDR0 _BG0
DDR0_CAA8/DDR0 _ACT#
DDR0_CAA9/DDR0 _BG1
DDR0_DQSN0/DD R0_DQSN0
DDR0_DQSP0/DDR 0_DQSP0
DDR0_DQSN1/DD R0_DQSN1
DDR0_DQSP1/DDR 0_DQSP1
DDR0_DQSN2/DD R0_DQSN4
DDR0_DQSP2/DDR 0_DQSP4
DDR0_DQSN3/DD R0_DQSN5
DDR0_DQSP3/DDR 0_DQSP5
DDR0_DQSN4/DD R1_DQSN0
DDR0_DQSP4/DDR 1_DQSP0
DDR0_DQSN5/DD R1_DQSN1
DDR0_DQSP5/DDR 1_DQSP1
DDR0_DQSN6/DD R1_DQSN4
DDR0_DQSP6/DDR 1_DQSP4
DDR0_DQSN7/DD R1_DQSN5
DDR0_DQSP7/DDR 1_DQSP5
NC/DDR0_ALERT#
DDR0_VREF_DQ0 DDR0_VREF_DQ1
DDR1_VREF_DQ
2 OF 20
DDR0_CKE2/NC DDR0_CKE3/NC
NC/DDR0_MA3 NC/DDR0_MA4
NC/DDR0_PAR
DDR_VREF_CA
DDR_VTT_CTL
V32 V31 T32 T31
U36 U37 U34 U35
AE32 AF32 AE31 AF31
AC37 AC36 AC34 AC35 AA35 AB35 AA37 AA36 AB34 W36 Y31 W34 AA34 AC32
AC31 AB32 Y32
W32 AB31 V34
V35 W35
C27 D27 D31 C31 J35 J34 P34 P35 AP35 AP34 AV34 AV35 BB35 BB34 BF34 BF35
W37 W31 F36 D35 D37 E36 C35
M_A_CLK#0 M_A_CLK0 M_A_CLK#1 M_A_CLK1
M_A_CKE0 M_A_CKE1
M_A_CS#0 M_A_CS#1 M_A_DIMA_ODT0 M_A_DIMA_ODT1
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
M_A_A14 M_A_A15 M_A_A16
M_A_BA0 M_A_BA1 M_A_BG0
M_A_ACT_N M_A_BG1
M_A_DQS_DN0 M_A_DQS_DP0 M_A_DQS_DN1 M_A_DQS_DP1 M_A_DQS_DN4 M_A_DQS_DP4 M_A_DQS_DN5 M_A_DQS_DP5
M_B_DQS_DN0 M_B_DQS_DP0 M_B_DQS_DN1 M_B_DQS_DP1 M_B_DQS_DN4 M_B_DQS_DP4 M_B_DQS_DN5 M_B_DQS_DP5
M_A_ALERT_N M_A_PARITY V_SM_VREF_CNTA
V_SM_VREF_CNTB
SM_PGCNTL
3
M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19
M_A_DQ[ 16:23 ]
M_A_DQ[ 24:31 ]
M_A_DQ[ 48:55 ]
M_A_DQ[ 56:63 ]
M_B_DQ[ 16:23 ]
M_B_DQ[ 24:31 ]
M_B_DQ[ 48:55 ]
M_B_DQ[ 56:63 ]
SB 0402
2nd = 084.00138.0C31
084.00138.0A31
PJA138KA-GP
SM_PGCNTL
3
G
S
M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62
M_A_DQ63 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
3D3V_S5
R507
10KR2J-3-GP
1 2
Q501_G
D
Q502
CPU1C
J22
DDR1_DQ0/DDR 0_DQ16
H25
DDR1_DQ1/DDR 0_DQ17
G22
DDR1_DQ2/DDR 0_DQ18
H22
DDR1_DQ3/DDR 0_DQ19
F25
DDR1_DQ4/DDR 0_DQ20
J25
DDR1_DQ5/DDR 0_DQ21
G25
DDR1_DQ6/DDR 0_DQ22
F22
DDR1_DQ7/DDR 0_DQ23
D22
DDR1_DQ8/DDR 0_DQ24
C22
DDR1_DQ9/DDR 0_DQ25
C24
DDR1_DQ10/DD R0_DQ26
D24
DDR1_DQ11/DD R0_DQ27
A22
DDR1_DQ12/DD R0_DQ28
B22
DDR1_DQ13/DD R0_DQ29
A24
DDR1_DQ14/DD R0_DQ30
B24
DDR1_DQ15/DD R0_DQ31
G31
DDR1_DQ16/DD R0_DQ48
G32
DDR1_DQ17/DD R0_DQ49
H29
DDR1_DQ18/DD R0_DQ50
H28
DDR1_DQ19/DD R0_DQ51
G28
DDR1_DQ20/DD R0_DQ52
G29
DDR1_DQ21/DD R0_DQ53
H31
DDR1_DQ22/DD R0_DQ54
H32
DDR1_DQ23/DD R0_DQ55
L31
DDR1_DQ24/DD R0_DQ56
L32
DDR1_DQ25/DD R0_DQ57
N29
DDR1_DQ26/DD R0_DQ58
N28
DDR1_DQ27/DD R0_DQ59
L28
DDR1_DQ28/DD R0_DQ60
L29
DDR1_DQ29/DD R0_DQ61
N31
DDR1_DQ30/DD R0_DQ62
N32
DDR1_DQ31/DD R0_DQ63
AJ29
DDR1_DQ32/DD R1_DQ16
AJ30
DDR1_DQ33/DD R1_DQ17
AM32
DDR1_DQ34/DD R1_DQ18
AM31
DDR1_DQ35/DD R1_DQ19
AM30
DDR1_DQ36/DD R1_DQ20
AM29
DDR1_DQ37/DD R1_DQ21
AJ31
DDR1_DQ38/DD R1_DQ22
AJ32
DDR1_DQ39/DD R1_DQ23
AR31
DDR1_DQ40/DD R1_DQ24
AR32
DDR1_DQ41/DD R1_DQ25
AV30
DDR1_DQ42/DD R1_DQ26
AV29
DDR1_DQ43/DD R1_DQ27
AR30
DDR1_DQ44/DD R1_DQ28
AR29
DDR1_DQ45/DD R1_DQ29
AV32
DDR1_DQ46/DD R1_DQ30
AV31
DDR1_DQ47/DD R1_DQ31
BA32
DDR1_DQ48/DD R1_DQ48
BA31
DDR1_DQ49/DD R1_DQ49
BD31
DDR1_DQ50/DD R1_DQ50
BD32
DDR1_DQ51/DD R1_DQ51
BA30
DDR1_DQ52/DD R1_DQ52
BA29
DDR1_DQ53/DD R1_DQ53
BD29
DDR1_DQ54/DD R1_DQ54
BD30
DDR1_DQ55/DD R1_DQ55
BG31
DDR1_DQ56/DD R1_DQ56
BG32
DDR1_DQ57/DD R1_DQ57
BK32
DDR1_DQ58/DD R1_DQ58
BK31
DDR1_DQ59/DD R1_DQ59
BG29
DDR1_DQ60/DD R1_DQ60
BG30
DDR1_DQ61/DD R1_DQ61
BK30
DDR1_DQ62/DD R1_DQ62
BK29
DDR1_DQ63/DD R1_DQ63
WHISKEY-LAKE-GP
Design Guideline: SM_RCOMP keep routing length less than 500 mils.
Q501
G
S
2N7002K-2-GP
84.2N702.J31
2nd = 084.27002.0N31
Common
D
2
DDR1_CKN0/DDR 1_CKN0 DDR1_CKP0/DDR1 _CKP0 DDR1_CKN1/DDR 1_CKN1 DDR1_CKP1/DDR1 _CKP1
DDR1_CKE0/DDR1 _CKE0 DDR1_CKE1/DDR1 _CKE1
DDR1_CS#0/DDR 1_CS#0 DDR1_CS#1/DDR 1_CS#1 DDR1_ODT0/DDR 1_ODT0
DDR1_CAB9/DDR1 _MA0 DDR1_CAB8/DDR1 _MA1 DDR1_CAB5/DDR1 _MA2
DDR1_CAA0/DDR1 _MA5 DDR1_CAA2/DDR1 _MA6 DDR1_CAA4/DDR1 _MA7 DDR1_CAA3/DDR1 _MA8
DDR1_CAA1/DDR1 _MA9 DDR1_CAB7/DDR1 _MA10 DDR1_CAA7/DDR1 _MA11 DDR1_CAA6/DDR1 _MA12 DDR1_CAB0/DDR1 _MA13
DDR1_CAB2/DDR1 _MA14 DDR1_CAB1/DDR1 _MA15 DDR1_CAB3/DDR1 _MA16
DDR1_CAB4/DDR1 _BA0
DDR1_CAB6/DDR1 _BA1
DDR1_CAA5/DDR1 _BG0
DDR1_CAA9/DDR1 _BG1 DDR1_CAA8/DDR1 _ACT#
DDR1_DQSN0/DD R0_DQSN2 DDR1_DQSP0/DDR 0_DQSP2 DDR1_DQSN1/DD R0_DQSN3 DDR1_DQSP1/DDR 0_DQSP3 DDR1_DQSN2/DD R0_DQSN6 DDR1_DQSP2/DDR 0_DQSP6 DDR1_DQSN3/DD R0_DQSN7 DDR1_DQSP3/DDR 0_DQSP7 DDR1_DQSN4/DD R1_DQSN2 DDR1_DQSP4/DDR 1_DQSP2 DDR1_DQSN5/DD R1_DQSN3 DDR1_DQSP5/DDR 1_DQSP3 DDR1_DQSN6/DD R1_DQSN6 DDR1_DQSP6/DDR 1_DQSP6 DDR1_DQSN7/DD R1_DQSN7 DDR1_DQSP7/DDR 1_DQSP7
3D3V_S0
12
R506 220KR2F-GP
SM_PGCNTL_R
2
3 OF 20
DDR1_CKE2/NC DDR1_CKE3/NC
NC/DDR1_ODT1
NC/DDR1_MA3 NC/DDR1_MA4
NC/DDR1_ALERT#
NC/DDR1_PAR DRAM_RESET#
DDR_RCOMP0 DDR_RCOMP1 DDR_RCOMP2
1
M_B_CLK#0
AF28
M_B_CLK0
AF29
M_B_CLK#1
AE28
M_B_CLK1
AE29
M_B_CKE0
T28
M_B_CKE1
T29 V28 V29
M_B_CS#0
AL37
M_B_CS#1
AL35
M_B_DIMB_ODT0
AL36
M_B_DIMB_ODT1
AL34
M_B_A0
AG36
M_B_A1
AG35
M_B_A2
AF34
M_B_A3
AG37
M_B_A4
AE35
M_B_A5
AF35
M_B_A6
AE37
M_B_A7
AC29
M_B_A8
AE36
M_B_A9
AB29
M_B_A10
AG34
M_B_A11
AC28
M_B_A12
AB28
M_B_A13
AK35
M_B_A14
AJ35
M_B_A15
AK34
M_B_A16
AJ34
M_B_BA0
AJ37
M_B_BA1
AJ36
M_B_BG0
W29
M_B_BG1
Y28
M_B_ACT_N
W28
M_A_DQS_DN2
H24
M_A_DQS_DP2
G24
M_A_DQS_DN3
C23
M_A_DQS_DP3
D23
M_A_DQS_DN6
G30
M_A_DQS_DP6
H30
M_A_DQS_DN7
L30
M_A_DQS_DP7
N30
M_B_DQS_DN2
AL31
M_B_DQS_DP2
AL30
M_B_DQS_DN3
AU31
M_B_DQS_DP3
AU30
M_B_DQS_DN6
BC31
M_B_DQS_DP6
BC30
M_B_DQS_DN7
BH31
M_B_DQS_DP7
BH30
M_B_ALERT_N
Y29
M_B_PARITY
AE34
SM_DRAMRST#_CPU SM_DRAMRST#
BU31
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
1 2
R501 121R2F-GP
1 2
R502 80D6R2F-L-GP
1 2
R503 100R2F-L1-GP-U
BN28 BN27 BN29
#543 016
Layout Note:Layout Note:
1D2V_S3
12
R505 470R2F-GP
1
2
ED502 PESD5V0U2BT-215-GP
075.52215.007D
2nd = 75.05125.07D
3
SA 1027
1 2
R504
Do Not Stuff
06/21 SD
close to CPU
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_(DDR )
CPU_(DDR )
CPU_(DDR )
Document Number Rev
Document Number Rev
Document Number Rev
Bucky WHL
Bucky WHL
Bucky WHL
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
5 105Friday, July 13, 2018
5 105Friday, July 13, 2018
5 105Friday, July 13, 2018
SA
SA
SA
SSID = CPU
5
4
3
2
1
CPU1Q
WHL QS/CFL/WHL_ES1_CNL U
T4
SB 0330
1
CFG3 CFG4
D D
CFG315
CFG415
C C
TP621Do Not Stuff
CFG_RCOMP
12
R60149D9R2F-GP
ITP_PMODE
1
TP618Do Not Stuff
R4
T3
R3
J4
M4
J3 M3 R2 N2 R1 N1
J2
L2
J1
L1
L3 N3
L4 N4
AB5
W4
CG2 CG1
H4 H3
BV24 BV25
BK36 BK35
W3
AM4
AM3
WHISKEY-LAKE-GP
CFG0
CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG16 CFG18 CFG17 CFG19
CFG_RCOMP
ITP_PMODE
RSVD#CG2 RSVD#CG1
RSVD#H4 RSVD#H3
RSVD#BV24 RSVD#BV25
RSVD#BK36 RSVD#BK35
RSVD#W3 RSVD#AM4
RSVD_TP#AM3
17 OF 20
RSVD_TP#F37 RSVD_TP#F34
IST_TRIG
RSVD_TP#CN36
RSVD_TP#BJ36 RSVD_TP#BJ34
TP#BK34 TP#BR18
RSVD_TP#BT9 RSVD_TP#BT8
RSVD_TP#BP8 RSVD_TP#BP9
RSVD#CR4
RSVD#CP3 RSVD#CR3
RSVD_TP#AT3
RSVD_TP#AU3
RSVD#AN1 RSVD#AN2
RSVD#AN4 RSVD#AN3
IST_TP0 IST_TP1
IST_TRIG0 IST_TRIG1
TP#BP34
TP#BP35
RSVD_TP#CR35
SKTOCC#
F37 F34
IST_TRIG
CP36 CN36
BJ36 BJ34
BK34 BR18
BT9 BT8
BP8 BP9
CR4
CP3 CR3
AT3 AU3
AN1 AN2
AN4 AN3
AL2 AL1
AL4 AL3
BP34 BP36
VSS
BP35
CR35
E1
SKTOCC#
1
1
TP620
Do Not Stuff
TP619 Do Not Stuff
B B
SKL(#543016): Processor strap CFG[4] should be pulled low to enable embedded DisplayPort*
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU (CFG/IST)
CPU (CFG/IST)
CPU (CFG/IST)
Bucky WHL
Bucky WHL
Bucky WHL
1
SA
SA
6 105Friday, July 13, 2018
6 105Friday, July 13, 2018
6 105Friday, July 13, 2018
SA
5
4
3
2
1
SSID = CPU
VCC_SENSE46 VSS_SENSE46
SVID_DATA_CPU46 SVID_CLK_CPU46 SVID_ALERT#_CPU46
D D
C C
1V_CPU_CORE 1V_CPU_CORE
AN10 AN24 AN26 AN27
AP24 AP26
AR10 AR25 AR27
AT24 AT26
AU24 AU25 AU26 AU27
AV10 AV27
AW10
BC24
BB24
AN9
AP2 AP9
AR5 AR6 AR7 AR8
AT9
AU5 AU6 AU7 AU8 AU9
AV2 AV5 AV7
AW5 AW6 AW7 AW8 AW9
BB9
AY9
CPU1L
VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
RSVD#BB9 RSVD#BC24 RSVD#AY9 RSVD#BB24
WHISKEY-LAKE-GP
12 OF 20
VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
VCC_SENSE VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
RSVD#Y3
VCCSTG
AW24 AW25 AW26 AW27 AY24 AY26 BA5 BA7 BA8 BA25 BA27 BB2 BB26 BC5 BC6 BC7 BC9 BC10 BC26 BC27 BD5 BD8 BD10 BD25 BD27 BE9 BE24 BE25 BE26 BE27 BF2 BF9 BF24 BF26 BG27
VCC_SENSE
AN6
VSS_SENSE
AN5
SVID_ALERT#_CPU_R
AA3
SVID_CLK_CPU_R
AA1
SVID_DATA_CPU_R
AA2
Y3
BG3
1V_VCCSTG
Layout Note: The total Length of Da ta an d Cloc k (fro m CPU to each VR) must be equal (± 0.1 inch). Route the Alert signal between th e Clock and the Data signa ls.
1V_VCCST_CPU
SVID_ 543016:
#5446 69
12
R719 100R2F-L1-GP-U
12
R720 100R2F-L1-GP-U
1 2
R732
Do Not Stuff
220R2J-L2-GP
12
R726 100R2F-L1-GP-U
1 2
R709
Do Not Stuff
06/21 SD
06/21 SD
R728
12
確認是否 留 下
VCC_SENSE VSS_SENSE
Layout Note:
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE impedance=50 ohm
3. Length match<25mil
1V_VCCST_CPU
12
R723 Do Not Stuff
DY
1V_VCCST_CPU
12
R727 56R2J-4-GP
power
#5446 69 CLOSE TO CPU
頁已有預 留
3
SVID_DATA_CPU
CRB 使用4 3 oh m ,
SVID_CLK_CPU
SVID_ALERT#_CPUSVID_ALERT#_CPU_R
#5446 69 CLOSE TO VR
且上件
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU (VCCIN/VID)
CPU (VCCIN/VID)
CPU (VCCIN/VID)
Bucky WHL
Bucky WHL
Bucky WHL
1
7 105
7 105
7 105
SA
SA
SA
CLOSE TO CPU
SVID DATA
B B
SVID CLOCK
SVID_DATA_CPU_R
SVID_CLK_CPU_R
SVID ALERT
1V_CPU_CORE
A A
5
4
5
4
3
2
1
VSSSA_S ENSE46 VCCSA_S ENSE46
VCCGT_S ENSE46
D D
C C
B B
VSSGT_S ENSE46
1V_VCCG T 1V_VCCG T
CPU1M
WHL QS/CFL/W HL_ES1_CNL U
A5
VCCGT
A6
VCCGT
A8
VCCGT
A11
VCCGT
A12
VCCGT
A14
VCCGT
A15
VCCGT
A17
VCCGT
A18
VCCGT
A20
VCCGT
B3
VCCGT
B4
VCCGT
B6
VCCGT
B8
VCCGT
B11
VCCGT
B14
VCCGT
B17
VCCGT
B20
VCCGT
C2
VCCGT
C3
VCCGT
C6
VCCGT
C7
VCCGT
C8
VCCGT
C11
VCCGT
C12
VCCGT
C14
VCCGT
C15
VCCGT
C17
VCCGT
C18
VCCGT
C20
VCCGT
D4
VCCGT
D7
VCCGT
D11
VCCGT
D12
VCCGT
D14
VCCGT
D15
VCCGT
D17
VCCGT
D18
VCCGT
D20
VCCGT
E4
VCCGT
F5
VCCGT
F6
VCCGT
F7
VCCGT
F8
VCCGT
F11
VCCGT
F14
VCCGT
F17
VCCGT
F20
VCCGT
G11
VCCGT
G12
VCCGT
G14
VCCGT
G15
VCCGT
G17
VCCGT
G18
VCCGT
G20
VCCGT
H5
VCCGT
H6
VCCGT
H7
VCCGT
H8
VCCGT
H11
VCCGT
WHISKE Y-LAKE-GP
13 OF 20
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
VCCGT_SENSE
VSSGT_SENSE
H12 H14 H15 H17 H18 H20 J7 J8 J11 J14 J17 J20 K2 K11 L7 L8 L10 M9 N7 N8 N9 N10 P2 P8 R9 T8 T9 T10 U8 U10 V9 W8 W9 AA9 AB2 AB8 AB9 AB10 AC8 AD9 AE8 AE9 AE10 AF2 AF8 AF10 AG8 AG9 AH9 AJ8 AJ10 AK2 AK9 AL8 AL9 AL10 AM8 V2 Y8 Y10 E3 D2
VCCGT_S ENSE VSSGT_S ENSE
SA 1227
For WHL ES1/ES2 design
1V_GT_C ORE
05/18
SC1U10V 2KX-1DLGP
RO13_20171011
SB 0331
1 2
SA 1229
DY
SA 0118
1D2V_S3
12
C804 Do Not Stuff
1V_VCCS T_CPU
12
C801SC1U10V 2KX-1DLGP
12
C802SC1U25V 3KX-1-DLGP
1D2V_VC CSFR_OC
C803
1V_VCCS T_CPU
SCD1U16V2KX-3DLGP
0.04 A
1V_VCCS TG
SC1U10V2KX-1DLGP
C805
1 2
RO13_20171011
1V_VCCIO
CPU1N
AD36
VDDQ
AH32
VDDQ
AH36
VDDQ
AM36
VDDQ
AN32
VDDQ
AW32
VDDQ
AY36
VDDQ
BE32
VDDQ
BH36
VDDQ
R32
VDDQ
Y36
VDDQ
BC28
RSVD#BC28
BP11
VCCST
BP2
VCCST
BG1
VCCSTG
BG2
VCCSTG
BL27
VCCPLL_OC
BM26
VCCPLL_OC
BR11
VCCPLL
BT11
VCCPLL
0.12 A
C806
1 2
WHISKE Y-LAKE-GP
14 OF 20
VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT VCCIO_OUT
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
AK24 AK26 AL24 AL25 AL26 AL27 AM25 AM27 BH24 BH25 BH26 BH27 BJ24 BJ26 BP16 BP18
BG8 BG10 BH9 BJ8 BJ9 BJ10 BK8 BK25 BK27 BL8 BL9 BL10 BL24 BL26 BM24 BN25
BP28 BP29
BE7 BG7
VSSSA_S ENSE VCCSA_S ENSE
+VCCIO(ICCMAX.=2.73A
1V_VCCS A
1V_VCCS A
12
12
R810 100R2F-L 1-GP-U
R809 100R2F-L 1-GP-U
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (VDDQ/VCC/VCCST/VCCSTG)
CPU (VDDQ/VCC/VCCST/VCCSTG)
CPU (VDDQ/VCC/VCCST/VCCSTG)
Size Do cument Numb er Re v
Size Do cument Numb er Re v
Size Do cument Numb er Re v
A3
A3
A3
Date : Sheet o f
Date : Sheet o f
2
Date : Sheet o f
Bucky WHL
Bucky WHL
Bucky WHL
8 105Friday, July 13, 2018
8 105Friday, July 13, 2018
8 105Friday, July 13, 2018
1
SA
SA
SA
R807
R808
power
1V_VCCG T
12
12
頁已有預 留
VCCSA_S ENSE VSSSA_S ENSE
3
07/11 SD
R815
1 2
ES2
D0002R5 J-2-GP
R814
1 2
5
ES2
D0002R5 J-2-GP
R816
1 2
ES2
D0002R5 J-2-GP
For WHL ES1/ES2 design
SA 1227
A A
(ES1 used)(ES2 used)
ES1
R812
1 2
Do Not Stuff
R813
1 2
Do Not Stuff
ES1
1V_VCCG T1V_GT_C ORE1V_CPU_ CORE
100R2F-L 1-GP-U
VCCGT_S ENSE VSSGT_S ENSE
100R2F-L 1-GP-U
確認是否 留 下
4
5
4
3
2
1
Main Func = CPU
D D
C C
(Blanking)
B B
A A
5
4
3
2
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Do cument Numb er Re v
Size Do cument Numb er Re v
Size Do cument Numb er Re v
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
A3
A3
A3
CPU (RSVD)
CPU (RSVD)
CPU (RSVD)
Bucky WHL
Bucky WHL
Bucky WHL
9 105Friday, July 13, 2018
9 105Friday, July 13, 2018
9 105Friday, July 13, 2018
1
SA
SA
SA
SSID = CPU
5
1V_CPU_CORE
4
3
2
1
1V_CPU_CORE
D D
C C
PC1002
PC1012
PC1022
PC1003
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
PC1013
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
PC1023
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
12
PC1004
12
PC1014
12
PC1024
12
PC1006
PC1007
PC1005
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1015
12
PC1025
12
12
Do Not StuffDY12
PC1017
PC1016
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1026
PC1027
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
PC1008
12
PC1018
12
PC1028
12
PC1010
PC1011
12
PC1021
12
PC1031
12
PC1079
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1032
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1009
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
Do Not StuffDY12
PC1019
PC1020
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
PC1029
PC1030
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
PC1080
12
PC1034
PC1082
PC1081
PC1083
PC1084
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1036
Do Not StuffDY12
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
VCCGT
22U 0603 x 35 (3 DY)
1V_VCCGT
PC1039
22U 0603 x 39 (3DY)
PC1037
12
PC1038
PC1040
PC1041
Do Not StuffDY12
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
PC1042
12
PC1044
PC1043
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1046
PC1045
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
PC1070
PC1069
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
PC1047
Do Not StuffDY12
12
SC22U6D3V3MX-1-DL-GP
12
B B
PC1057
PC1058
12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
VCCSA
22U 0603 x 8 (3DY)
1V_VCCSA
PC1072
PC1071
PC1073
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
A A
12
SC22U6D3V3MX-1-DL-GP
12
5
PC1059
PC1074
PC1051
PC1052
12
PC1061
PC1076
PC1053
SC22U6D3V3MX-1-DL-GP
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
12
PC1063
PC1062
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
Do Not StuffDY12
PC1077
12
12
PC1078
SC22U6D3V3MX-1-DL-GP
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
PC1060
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
12
PC1075
Do Not StuffDY12
SC22U6D3V3MX-1-DL-GP
12
PC1054
PC1064
PC1056
PC1055
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
PC1066
PC1067
PC1068
PC1065
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
Do Not StuffDY12
PC1001
SC22U6D3V3MX-1-DL-GP
12
SC22U6D3V3MX-1-DL-GP
12
Do Not StuffDY12
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU(CORE Power Cap1)
CPU(CORE Power Cap1)
CPU(CORE Power Cap1)
Bucky WHL
Bucky WHL
Bucky WHL
1
10 105Friday, July 13, 2018
10 105Friday, July 13, 2018
10 105Friday, July 13, 2018
SA
SA
SA
PC1050
PC1048
PC1049
SSID = CPU
5
4
3
2
1
PCH DERIVED RAILS
1D0V_S5
D D
UNSLICED GT
1V_VCCG T
12
12
12
12
C1102
DY
Do Not Stuff
C1103
DY
Do Not Stuff
C1104
DY
Do Not Stuff
C1105
SC1U25V3KX-1-DLGP
12
C1106
DY
Do Not Stuff
12
C1107
SC1U10V2KX-1DLGP
VCCIO
1U 0402 x 6
1V_VCCIO
+VCCI O(IC CMAX .= 2.7 3A )
12
12
C1109
C1108
DY
SC1U25V3KX-1-DLGP
Do Not Stuff
12
C1110
07/06 SD
12
C1111
SC1U25V3KX-1-DLGP
DY
Do Not Stuff
RO13_20171107
12
C1112 SC22U6D 3V3MX-1-DL-GP
RO13_20171110
KR EC list
3D3V_S5 _PCH 3 D3V_VCCPRIM
1 2
C C
R1103
Do Not Stuff
RO13_20171020
06/21 SD
1D8V_S5 1D8V_VC CPRIM
1 2
R1104
Do Not Stuff
RO13_20171020
06/21 SD
1V_VCCIO
DY
DY
C1113
Do Not Stuff
12
SC1U25V3KX-1-DLGP
C1114
12
C1122
Do Not Stuff
12
DY
RO13_20171107
1D0V_S5
SB 0331
SB 0331
1D0V_S5 1D0V_S51D0V_S51D0V_S5
C1115
Do Not Stuff
12
C1116
SC1U10V2KX-1DLGP
12
+VCCI O(IC CMAX .= 2.7 3A )
C1133
C1134
12
B B
C1135
12
12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
DY
Do Not Stuff
C1128
C1129
12
12
SC22U6D3V3MX-1-DL-GP
SC22U6D3V3MX-1-DL-GP
1D2V_S3
12
C1136
SB 0331
+VCCMPHYGTAON_1P0(I CCMAX.=2.12A)
07/06 SD
C1117
Do Not Stuff
12
DY
SB 0331
12
12
C1137
C1138
12
12
C1139SCD1U16V2KX-3DLGP
12
C1140SCD1U16V2KX-3DLGP
C1141SCD1U16V2KX-3DLGP
C1118
SC22U6D3V3MX-1-DL-GP
12
RO13_20171110
KR EC list
12
C1142Do Not Stuff
07/06 SD
DY
RO13_20171030 +VCCMPHYGTAON_1P0_LS_SIP change to 1D0V_S5.
C1119
SC1U10V2KX-1DLGP
12
Do Not Stuff
C1120
12
12
DY
Layout Note:
1uF:
C1121
SC1U10V2KX-1DLGP
C1174 near N15 C1180 near K15 C1173 near AF20 C1172 near N18 C1175 near AB19 22uF : C1182 C1184 near N15 10uF: C1176 near N15
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
C1132
12
3D3V_VC CPRIM
Do Not Stuff
C1123
12
DY
U-line 23e 2 8W
A A
IccMax cur rent-10ms m ax = 34 A
DY
RO13_20170717
5
4
SC10U6D3V3MX-DL-GP
C1131
C1130
Do Not Stuff
Do Not Stuff
12
DY
SC22U6D3V3MX-1-DL-GP
12
FC1102
Do Not Stuff
12
FC1103
DY
Do Not Stuff
RO13_20170717
RF request 2016/01/12 modify
3
12
DY
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_(Power CAP2)
CPU_(Power CAP2)
Size Do cument Numb er Re v
Size Do cument Numb er Re v
Size Do cument Numb er Re v
A3
A3
A3
Date : Sheet o f
Date : Sheet o f
2
Date : Sheet o f
CPU_(Power CAP2)
Bucky WHL
Bucky WHL
Bucky WHL
11 105Friday, July 13, 2018
11 105Friday, July 13, 2018
11 105Friday, July 13, 2018
1
SA
SA
SA
5
4
3
2
1
Main Func = DDR4 SODIMM
DDR_DATA
M_A_A0 5 M_A_A1 5 M_A_A2 5 M_A_A3 5 M_A_A4 5 M_A_A5 5 M_A_A6 5 M_A_A7 5 M_A_A8 5
M_A_ACT_N5
M_A_PARITY5
M_A_BA05 M_A_BA15 M_A_BG05 M_A_BG15
M_A_CS#05 M_A_CS#15
M_A_CKE05 M_A_CKE15
M_A_CLK05
M_A_CLK15
M_A_A9 5 M_A_A10 5 M_A_A11 5 M_A_A12 5 M_A_A13 5 M_A_A14 5 M_A_A15 5 M_A_A16 5
M_A_DQ0 5 M_A_DQ1 5 M_A_DQ2 5 M_A_DQ3 5 M_A_DQ4 5 M_A_DQ5 5 M_A_DQ6 5 M_A_DQ7 5 M_A_DQ8 5 M_A_DQ9 5 M_A_DQ10 5 M_A_DQ11 5 M_A_DQ12 5 M_A_DQ13 5 M_A_DQ14 5 M_A_DQ15 5 M_A_DQ32 5 M_A_DQ33 5 M_A_DQ34 5 M_A_DQ35 5 M_A_DQ36 5 M_A_DQ37 5 M_A_DQ38 5 M_A_DQ39 5 M_A_DQ40 5 M_A_DQ41 5 M_A_DQ42 5 M_A_DQ43 5 M_A_DQ44 5 M_A_DQ45 5 M_A_DQ46 5 M_A_DQ47 5 M_A_DQ16 5 M_A_DQ17 5 M_A_DQ18 5 M_A_DQ19 5 M_A_DQ20 5 M_A_DQ21 5 M_A_DQ22 5 M_A_DQ23 5 M_A_DQ24 5 M_A_DQ25 5 M_A_DQ26 5 M_A_DQ27 5 M_A_DQ28 5 M_A_DQ29 5 M_A_DQ30 5 M_A_DQ31 5 M_A_DQ48 5 M_A_DQ49 5 M_A_DQ50 5 M_A_DQ51 5 M_A_DQ52 5 M_A_DQ53 5 M_A_DQ54 5 M_A_DQ55 5 M_A_DQ56 5 M_A_DQ57 5 M_A_DQ58 5 M_A_DQ59 5 M_A_DQ60 5 M_A_DQ61 5 M_A_DQ62 5 M_A_DQ63 5
Edison 11/13 for STU
Edison 11/13 for STU
5
1D2V_S3
1 2
R1215 Do Not Stuff
1D2V_S3
RN1201
1
4
2 3
SRN1KJ-7-GP
05/10 SC
SM_DRAMRST#
12
ED1217 Do Not Stuff
DY
Do Not Stuff
Layout note: closed to Dimm
4
DY
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_A16
M_A_BA0 M_A_BA1 M_A_BG0 M_A_BG1
M_A_CLK0 M_A_CLK#0 M_A_CLK1 M_A_CLK#1
M_A_CKE0 M_A_CKE1
M_A_CS#0 M_A_CS#1
M_A_DIMA_ODT0 M_A_DIMA_ODT1
DIMM1_SA0 DIMM1_SA1 DIMM1_SA2
PCH_SMBDATA PCH_SMBCLK
SM_DRAMRST#
M_A_ACT_N M_A_ALERT_N TS#_DIMM0_1
M_A_PARITY
M_VREF_CA_DIMMA
12
C1229
SCD1U25V2KX-1-DL-GP
20171011 Follow KR15.
R1206
1 2
2R2F-GP
144 133 132 131 128 126 127 122 125 121 146 120 119 158 151 156 152
150 145 115 113
92
91 101 105
88
87 100 104
137 139 138 140
109 110
149 157 162 165
155 161
256 260 166
254 253
108 114 116 134
143
164
V_SM_VREF_CNTAM_VREF_CA_DIMMA
C1222 SCD022U16V2KX-3DLGP
2 1
+V_VREF_PATH1
12
R1209
24D9R2F-L-GP
DM1A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 WE#/A14 CAS#/A15 RAS#/A16
BA0 BA1 BG0 BG1
CB0/NC CB1/NC CB2/NC CB3/NC CB4/NC CB5/NC CB6/NC CB7/NC
CK0_T CK0_C CK1_T/NF CK1_C/NF
CKE0 CKE1
CS0# CS1# C0/CS2#/NC C1/CS3#/NC
ODT0 ODT1
SA0 SA1 SA2
SDA SCL
RESET# ACT# ALERT# EVENT#/NF
PARITY
VREFCA
DDR4-260P-79-GP-U
062.10011.M003
1 OF 4
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
8 7 20 21 4 3 16 17 28 29 41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246
M_A_DQ28 M_A_DQ24 M_A_DQ26 M_A_DQ27 M_A_DQ29 M_A_DQ25 M_A_DQ30 M_A_DQ31 M_A_DQ5 M_A_DQ1 M_A_DQ3 M_A_DQ2 M_A_DQ0 M_A_DQ4 M_A_DQ7 M_A_DQ6 M_A_DQ8 M_A_DQ12 M_A_DQ14 M_A_DQ11 M_A_DQ9 M_A_DQ13 M_A_DQ15 M_A_DQ10 M_A_DQ23 M_A_DQ18 M_A_DQ20 M_A_DQ21 M_A_DQ19 M_A_DQ16 M_A_DQ22 M_A_DQ17 M_A_DQ50 M_A_DQ51 M_A_DQ55 M_A_DQ49 M_A_DQ53 M_A_DQ52 M_A_DQ48 M_A_DQ54 M_A_DQ61 M_A_DQ57 M_A_DQ62 M_A_DQ59 M_A_DQ60 M_A_DQ56 M_A_DQ63 M_A_DQ58 M_A_DQ36 M_A_DQ37 M_A_DQ35 M_A_DQ34 M_A_DQ32 M_A_DQ33 M_A_DQ38 M_A_DQ39 M_A_DQ45 M_A_DQ41 M_A_DQ46 M_A_DQ43 M_A_DQ40 M_A_DQ44 M_A_DQ47 M_A_DQ42
DDR4 SWAP 0212
3D3V_S0
1 2
Do Not Stuff
3D3V_S0
Do Not Stuff
3D3V_S0
Do Not Stuff
3
3
0
1
2
1D2V_S3
6
7
4
5
s w
12
R1204 Do Not Stuff
DY
R1205
06/21 SD
12
R1208 Do Not Stuff
DY
1 2
R1210
06/21 SD
12
R1211 Do Not Stuff
DY
1 2
R1212
06/21 SD
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
確認
DM1B
DM0#/DBI0#
DM2#/DBI2# DM3#/DBI3# DM4#/DBI4# DM5#/DBI5# DM6#/DBI6# DM7#/DBI7#
DM8#/DBI#/NC
DDR4-260P-79-GP-U
DIMM1_SA0
DIMM1_SA1
DIMM1_SA2
2 OF 4
DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T
DM1#/DBI#
DM1C
111 112 117 118 123 124 129 130 135 136 141 142 147 148 153 154 159 160 163
DDR4-260P-79-GP-U
SA 1225 SWAP
M_A_DQS_DN3
11
M_A_DQS_DP3
13
M_A_DQS_DN0
32
M_A_DQS_DP0
34
M_A_DQS_DN1
53
M_A_DQS_DP1
55
M_A_DQS_DN2
74
M_A_DQS_DP2
76
M_A_DQS_DN6
177
M_A_DQS_DP6
179
M_A_DQS_DN7
198
M_A_DQS_DP7
200
M_A_DQS_DN4
219
M_A_DQS_DP4
221
M_A_DQS_DN5
240
M_A_DQS_DP5
242 95 97
12 33 54 75 178 199 220 241 96
3 OF 4
255
VDDSPD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
1D2V_S3
257
VPP
259
VPP
258
VTT
261 262
NP1 NP2
C1202
12
DY
C1214
12
0D6V_S0
261 262
NP1 NP2
C1203
C1204
12
12
Do Not Stuff
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
C1216
C1215
12
12
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
2
2D5V_S3
C1205
12
C1217
12
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
07/06 SD
12
DY
12
DY
C1206
C1218
1D2V_S3
3D3V_S0
C1223
C1228
12
12
DY
Do Not Stuff
Do Not Stuff
C1208
C1209
12
12
Do Not Stuff
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
C1219
C1220
12
12
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
10 14 15 18 19 22 23 26 27 30 31 35 36 39 40 43 44 47 48 51 52 56 57 60 61 64 65 68 69 72 73 77 78 81 82 85 86 89 90 93 94 98
0D6V_S0
C1226
12
C1210
12
Do Not Stuff
DY
C1221
EC1201
12
12
SC1U10V2KX-1DLGP
Do Not Stuff
DY
4 OF 4
DM1D
VSS1VSS
2
VSS
5
VSS
6
VSS
9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
DDR4-260P-79-GP-U
SC1U10V2KX-1DLGP
EC1202
12
Do Not Stuff
DY
99 102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
VSS
C1233
12
12
SC1U10V2KX-1DLGP
C1225
SC4D7U6D3V3KX-DLGP
2D5V_S3
C1211
12
Do Not Stuff
DY
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
DDR (DDR4-CHA)
DDR (DDR4-CHA)
DDR (DDR4-CHA)
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet of
Date: Sheet of
Date: Sheet of
C1224
C1230
12
12
Do Not Stuff
Do Not Stuff
DY
DY
C1232
12
12
Do Not Stuff
C1231
SC4D7U6D3V3KX-DLGP
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Bucky WHL
Bucky WHL
Bucky WHL
1
12
C1227
SC4D7U6D3V3KX-DLGP
C1212
12
Do Not Stuff
DY
12 105
12 105
12 105
07/06 SD
12
DY
C1207
C1213
12
Do Not Stuff
Do Not Stuff
DY
SA
SA
SA
D D
C C
M_A_DQS_DN[7:0]5
M_A_DQS_DP[7:0]5
B B
DDR CMD/ADD
M_A_ALERT_N5
V_SM_VREF_CNTA5
DDR CTRL
M_A_DIMA_ODT05 M_A_DIMA_ODT15
DDR CLOCK
A A
M_A_CLK#05
M_A_CLK#15
DDR OTHERS
SM_DRAMRST#5,12,13
PCH_SMBDATA13,18,65
PCH_SMBCLK13,18,65
SM_DRAMRST#5,12,13
Main Func = DDR4 SODIMM
5
DDR_DATA
D D
C C
M_B_DQS_DN[7:0]5
B B
M_B_DQS_DP[7:0]5
DDR CMD/ADD
V_SM_VREF_CNTB5
M_B_ALERT_N5
M_B_ACT_N5
M_B_PARITY5
M_B_A0 5 M_B_A1 5 M_B_A2 5 M_B_A3 5 M_B_A4 5 M_B_A5 5 M_B_A6 5 M_B_A7 5 M_B_A8 5 M_B_A9 5 M_B_A10 5 M_B_A11 5
M_B_A12 5 M_B_A13 5 M_B_A14 5 M_B_A15 5 M_B_A16 5
M_B_DQ0 5 M_B_DQ1 5 M_B_DQ2 5 M_B_DQ3 5 M_B_DQ4 5 M_B_DQ5 5 M_B_DQ6 5 M_B_DQ7 5 M_B_DQ8 5
M_B_DQ9 5 M_B_DQ10 5 M_B_DQ11 5 M_B_DQ12 5 M_B_DQ13 5 M_B_DQ14 5 M_B_DQ15 5 M_B_DQ32 5 M_B_DQ33 5 M_B_DQ34 5 M_B_DQ35 5 M_B_DQ36 5 M_B_DQ37 5 M_B_DQ38 5 M_B_DQ39 5 M_B_DQ40 5 M_B_DQ41 5 M_B_DQ42 5 M_B_DQ43 5 M_B_DQ44 5 M_B_DQ45 5 M_B_DQ46 5 M_B_DQ47 5 M_B_DQ16 5 M_B_DQ17 5 M_B_DQ18 5 M_B_DQ19 5 M_B_DQ20 5 M_B_DQ21 5 M_B_DQ22 5 M_B_DQ23 5 M_B_DQ24 5 M_B_DQ25 5 M_B_DQ26 5 M_B_DQ27 5 M_B_DQ28 5 M_B_DQ29 5 M_B_DQ30 5 M_B_DQ31 5 M_B_DQ48 5 M_B_DQ49 5 M_B_DQ50 5 M_B_DQ51 5 M_B_DQ52 5 M_B_DQ53 5 M_B_DQ54 5 M_B_DQ55 5 M_B_DQ56 5 M_B_DQ57 5 M_B_DQ58 5 M_B_DQ59 5 M_B_DQ60 5 M_B_DQ61 5 M_B_DQ62 5 M_B_DQ63 5
1D2V_S3
1 2
R1312
Edison 11/13 for STU
Do Not Stuff
DY
4
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_A16
M_B_BA0 M_B_BA1 M_B_BG0 M_B_BG1
M_B_CLK0 M_B_CLK#0 M_B_CLK1 M_B_CLK#1
M_B_CKE0 M_B_CKE1
M_B_CS#0 M_B_CS#1
M_B_DIMB_ODT0 M_B_DIMB_ODT1
DIMM2_SA0 DIMM2_SA1 DIMM2_SA2
PCH_SMBDATA PCH_SMBCLK
SM_DRAMRST# M_B_ACT_N M_B_ALERT_N
TS#_DIMM1_1
M_B_PARITY
M_VREF_CA_DIMMB
12
C1301
SCD1U25V2KX-1-DL-GP
20171011 Follow KR15.
DM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
WE#/A14
156
CAS#/A15
152
RAS#/A16
150
BA0
145
BA1
115
BG0
113
BG1
92
CB0/NC
91
CB1/NC
101
CB2/NC
105
CB3/NC
88
CB4/NC
87
CB5/NC
100
CB6/NC
104
CB7/NC
137
CK0_T
139
CK0_C
138
CK1_T/NF
140
CK1_C/NF
109
CKE0
110
CKE1
149
CS0#
157
CS1#
162
C0/CS2#/NC
165
C1/CS3#/NC
155
ODT0
161
ODT1
256
SA0
260
SA1
166
SA2
254
SDA
253
SCL
108
RESET#
114
ACT#
116
ALERT#
134
EVENT#/NF
143
PARITY
164
VREFCA
DDR4-260P-79-GP-U
1 OF 4
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
3
M_B_DQ1
8
DQ0
M_B_DQ5
7
DQ1
M_B_DQ7
20
DQ2
M_B_DQ3
21
DQ3
M_B_DQ0
4
DQ4
M_B_DQ4
3
DQ5
M_B_DQ6
16
DQ6
M_B_DQ2
17
DQ7
M_B_DQ12
28
DQ8
M_B_DQ11
29
DQ9
M_B_DQ14
41
M_B_DQ15
42
M_B_DQ13
24
M_B_DQ8
25
M_B_DQ10
38
M_B_DQ9
37
M_B_DQ37
50
M_B_DQ36
49
M_B_DQ38
62
M_B_DQ39
63
M_B_DQ35
46
M_B_DQ32
45
M_B_DQ33
58
M_B_DQ34
59
M_B_DQ41
70
M_B_DQ44
71
M_B_DQ43
83
M_B_DQ42
84
M_B_DQ40
66
M_B_DQ45
67
M_B_DQ46
79
M_B_DQ47
80
M_B_DQ17
174
M_B_DQ22
173
M_B_DQ18
187
M_B_DQ19
186
M_B_DQ16
170
M_B_DQ23
169
M_B_DQ20
183
M_B_DQ21
182
M_B_DQ24
195
M_B_DQ28
194
M_B_DQ26
207
M_B_DQ30
208
M_B_DQ25
191
M_B_DQ29
190
M_B_DQ31
203
M_B_DQ27
204
M_B_DQ49
216
M_B_DQ48
215
M_B_DQ50
228
M_B_DQ55
229
M_B_DQ52
211
M_B_DQ53
212
M_B_DQ51
224
M_B_DQ54
225
M_B_DQ56
237
M_B_DQ61
236
M_B_DQ62
249
M_B_DQ58
250
M_B_DQ60
232
M_B_DQ57
233
M_B_DQ63
245
M_B_DQ59
246
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
SA 1225 SWAP
1D2V_S3
DM2C
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
129
VDD
130
VDD
135
VDD
136
VDD
141
VDD
142
VDD
147
VDD
148
VDD
153
VDD
154
VDD
159
VDD
160
VDD
163
VDD
DDR4-260P-79-GP-U
3 OF 4
VDDSPD
DM2B
DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T
DM0#/DBI0#
DM1#/DBI# DM2#/DBI2# DM3#/DBI3# DM4#/DBI4# DM5#/DBI5# DM6#/DBI6# DM7#/DBI7#
DM8#/DBI#/NC
DDR4-260P-79-GP-U
VPP VPP
VTT
261 262
NP1 NP2
2 OF 4
255
257 259
258
261 262
NP1 NP2
11 13 32 34 53 55 74 76 177 179 198 200 219 221 240 242 95 97
12 33 54 75 178 199 220 241 96
M_B_DQS_DN0 M_B_DQS_DP0 M_B_DQS_DN1 M_B_DQS_DP1 M_B_DQS_DN4 M_B_DQS_DP4 M_B_DQS_DN5 M_B_DQS_DP5 M_B_DQS_DN2 M_B_DQS_DP2 M_B_DQS_DN3 M_B_DQS_DP3 M_B_DQS_DN6 M_B_DQS_DP6 M_B_DQS_DN7 M_B_DQS_DP7
2D5V_S3
0D6V_S0
2
DM2D
4 OF 4
VSS1VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
3D3V_S0
C1329
Do Not Stuff
C1328 Do Not Stuff
12
12
DY
DY
1D2V_S3
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
DDR4-260P-79-GP-U
99 102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
VSS
1
M_B_BA05 M_B_BA15 M_B_BG05 M_B_BG15
DDR CTRL
M_B_CS#05 M_B_CS#15
M_B_CKE05 M_B_CKE15
M_B_DIMB_ODT05 M_B_DIMB_ODT15
DDR CLOCK
A A
M_B_CLK05
M_B_CLK#05
M_B_CLK15
M_B_CLK#15
DDR OTHERS
SM_DRAMRST#5,12,13
PCH_SMBDATA12,18,65
PCH_SMBCLK12,18,65
SM_DRAMRST#5,12,13
5
1D2V_S3
RN1301
1
4
Edison 11/13 for STU
SM_DRAMRST#
12
ED1302 Do Not Stuff
DY
Do Not Stuff
M_VREF_CA_DIMMB
2 3
SRN1KJ-7-GP
05/10 SC
Layout note: closed to Dimm
R1305
1 2
2R2F-GP
4
2 1
+V_VREF_PATH2
12
V_SM_VREF_CNTB
C1323 SCD022U16V2KX-3DLGP
R1309
24D9R2F-L-GP
DDR4 SWAP 0212
3D3V_S0
1 2
R1302 Do Not Stuff
DY
1 2
R1303
Do Not Stuff
06/21 SD
3D3V_S0
1 2
R1306 10KR2F-L1-GP
1 2
R1307 Do Not Stuff
DY
3D3V_S0
1 2
R1310 Do Not Stuff
DY
1 2
R1311
Do Not Stuff
06/21 SD
s w
確認
DIMM2_SA0
DIMM2_SA1
DIMM2_SA2
1D2V_S3 0D6V_S0
C1304
C1303
12
12
SC10U6D3V3MX-DL-GP
DY
C1315
12
12
SC1U10V2KX-1DLGP
3
C1316
C1306
C1305
C1307
C1308
C1309
C1320
C1310
12
12
SC10U6D3V3MX-DL-GP
Do Not Stuff
SC10U6D3V3MX-DL-GP
DY
C1321
C1322
12
12
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
12
12
12
Do Not Stuff
SC10U6D3V3MX-DL-GP
C1317
12
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
12
SC10U6D3V3MX-DL-GP
Do Not Stuff
DY
C1318
C1319
12
12
12
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
C1324
12
SC10U6D3V3MX-DL-GP
EC1301
12
Do Not Stuff
DY
2
C1326
C1325
12
C1327
12
12
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
2D5V_S3
C1312
C1330
05/02 SC Common part
12
12
SC1U10V2KX-1DLGP
C1311
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
Size
Size
Size
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
Do Not Stuff
SC4D7U6D3V3KX-DLGP
DY
C1331
Do Not Stuff
DY
DDR (DDR4-CHB)
DDR (DDR4-CHB)
DDR (DDR4-CHB)
Document Number Re v
Document Number Re v
Document Number Re v
Bucky WHL
Bucky WHL
Bucky WHL
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
C1313
12
DY
07/06 SD
Do Not Stuff
C1314
12
Do Not Stuff
DY
13 105
13 105
13 105
12
Do Not Stuff
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
1
SA
SA
SA
5
D D
C C
4
3
2
1
(Blanking)
B B
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
DDR (RSVD) (DDR4-CHA1)
DDR (RSVD) (DDR4-CHA1)
DDR (RSVD) (DDR4-CHA1)
Size
Size
Size
Document Number R ev
Document Number R ev
Document Number R ev
A4
A4
A4
Date: Sheet o f
Date: Sheet o f
5
4
3
Date: Sheet o f
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Bucky WHL
Bucky WHL
Bucky WHL
14 105Friday, July 13, 2018
14 105Friday, July 13, 2018
14 105Friday, July 13, 2018
1
SA
SA
SA
Main Func = PCH
SPKR19,27
SPI_SI_ROM18,25,91
CPU_SMB_ALER T#18
CPU_SMB_ALER T#_P018
SPI_WP_ROM18,25
SPI_HOLD_R OM18,25
NRB_BIT20
CFG46
D D
CFG36
CNV_RGI_DT_R2 0,61
HDA_SDOUT_C PU19
GPP_B22_GSP I1_MOSI20
GPP_H2321
INPUT3VSEL17
CPU_SMB_ALER T#_P118
GPP_H2121
GPD721
RTC_DET#20,25
GPP_H17_ST RAP4
5
R1501
1 2
SPKR
DY
Do Not Stuff
4
3D3V_S5_PC H
12
R1502
DY
Do Not Stuff
NRB_BIT CPU_SMB_ALER T#
12
R1503
DY
Do Not Stuff
3
3D3V_S5_PC H
12
R1551
DY
Do Not Stuff
12
R1552 Do Not Stuff
DY
2
GPP_B22_GSP I1_MOSI
12
DY
1
SA 0104 STRAP
R1553 Do Not Stuff
3D3V_S5_PC H
SA 1227
12
R1504 4K7R2J-L-GP
CPU_SMB_ALER T#_P0
12
R1505 Do Not Stuff
DY
C C
3D3V_S5_PC H
R1508 100KR2F-L2 -GP
SPI_WP_ROM
1 2
12
R1509
DY
Do Not Stuff
SA 0104 STRAP
B B
Page 4 RN403 2.2K PU 3.3V_S0
1D8V_S5
12
R1515 20KR2J-L2 -GP
CNV_RGI_DT_R
12
Inte l
建議
R1516 Do Not Stuff
DY
A A
5
[BDW Only]PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED
CFG[3 ]
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
1 : DISABLED
PCH strap pin:
CFG3
12
R1517 Do Not Stuff
DY
4
SA 0109
3D3V_S5_PC H
12
R1506
100KR2F-L2 -GP
SPI_SI_ROM
12
R1507 Do Not Stuff
DY
3D3V_S5_PC H
R1510 100KR2F-L2 -GP
1 2
SPI_HOLD_R OM
12
R1511
DY
Do Not Stuff
SA 0104 STRAP
3D3V_VCCDSW
12
SA 0104 STRAP
R1520
DY
Do Not Stuff
INPUT3VSEL
12
R1521 4K7R2J-L-GP
(#5430 16)
DISPLAY PORT PRESENCE STRAP
0 : ENABLED
CFG[4 ]
An external Display Port device is connected to the Embedded Display Port.
1 : DISABLED (Default) No Physical Display Port attached to Embedded DisplayPort*. No connect for disable.
CFG4
12
R1518 1KR2J-1-GP
3
3D3V_S5_PC H
12
R1554
20KR2J-L2 -GP
12
R1519
DY
Do Not Stuff
Do Not Stuff
RO13_CFLU_20180106 reserve for strap (Intel review)
CPU_SMB_ALER T#_P1
12
R1555
Do Not Stuff
3D3V_S5_PC H
DY
DY
DY
3D3V_S5_PC H
SA 1227
12
R1522
4K7R2J-L-GP
GPP_H21
12
R1523 Do Not Stuff
DY
12
SA 0104 STRAP
R1513 Do Not Stuff
GPP_H23
12
R1514 Do Not Stuff
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corpo ration
Wistron Corpo ration
Wistron Corpo ration
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih, Taipei Hs ien 2 21, Taiwan, R .O.C.
Taipei Hs ien 2 21, Taiwan, R .O.C.
Taipei Hs ien 2 21, Taiwan, R .O.C.
Title
Title
Title
CPU (STRAP)
CPU (STRAP)
CPU (STRAP)
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
A0
A0
A0
Bucky WHL
Bucky WHL
Bucky WHL
15 105Friday, July 13, 201 8
15 105Friday, July 13, 201 8
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
15 105Friday, July 13, 201 8
RTC_DET#
1D8V_VCCPRIM
12
R1512
Do Not Stuff
DY
HDA_SDOUT_C PU
GPP_H17_ST RAP
12
R1527
DY
3D3V_VCCDSW
SA 0104 STRAP
12
R1525 100KR2F-L2 -GP
GPD7
12
R1524 Do Not Stuff
DY
2
Page 4 RN401 2.2K PU 3.3V_S0
SA
SA
SA
Main Func = PCH
D D
C C
5
#543016 : 220 nF nominal capacitors are recommended for Gen 3.
GFX_PCIE_RX_N076 GFX_PCIE_RX_P076 GFX_PCIE_TX_N076 GFX_PCIE_TX_P076
GFX_PCIE_RX_N176 GFX_PCIE_RX_P176 GFX_PCIE_TX_N176 GFX_PCIE_TX_P176
GFX_PCIE_RX_N276 GFX_PCIE_RX_P276 GFX_PCIE_TX_N276 GFX_PCIE_TX_P276
GFX_PCIE_RX_P376 GFX_PCIE_RX_N376 GFX_PCIE_TX_N376 GFX_PCIE_TX_P376
WLAN_PCIE_RX_N61 WLAN_PCIE_RX_P61 WLAN_PCIE_TX_N61 WLAN_PCIE_TX_P61
HDD_SATA_RX_N60
HDD_SATA_RX_P60
HDD_SATA_TX_N60
HDD_SATA_TX_P60
SSD_PCIE_RX_N163 SSD_PCIE_RX_P163 SSD_PCIE_TX_N163 SSD_PCIE_TX_P163
SSD_PCIE_RX_N263 SSD_PCIE_RX_P263 SSD_PCIE_TX_N263 SSD_PCIE_TX_P263
SSD_PCIE_RX_N363 SSD_PCIE_RX_P363 SSD_PCIE_TX_N363 SSD_PCIE_TX_P363
SSD_SATA_RX_N63 SSD_SATA_RX_P63 SSD_SATA_TX_N63 SSD_SATA_TX_P63
USB1_USB30_RX_N35 USB1_USB30_RX_P35 USB1_USB30_TX_N35
USB1_USB30_TX_P35
USB2_USB30_RX_N35 USB2_USB30_RX_P35 USB2_USB30_TX_N35
USB2_USB30_TX_P35
FP_USB20_N66
FP_USB20_P66
USB4_USB30_RX_N73 USB4_USB30_RX_P73 USB4_USB30_TX_N73
USB4_USB30_TX_P73
USB1_USB20_N36 USB1_USB20_P36
USB2_USB20_N35 USB2_USB20_P35
USB4_USB20_N72
USB4_USB20_P72
CCD_USB20_N55 CCD_USB20_P55
CARD1_USB20_N66 CARD1_USB20_P66
BT_USB20_N61 BT_USB20_P61
USB_OC1#36
HDD_DEVSLP60
SSD_DEVSLP63
M2_SSD_PEDET63
SATA_LED#64
USB_OC3#34
100 nF nominal capacitors are recommended for Gen 2.
4
diff 12/25
diff 12/25
刪除 重複
GPU
LAN_PCIE_TX_N
LAN
WLAN
HDD1
Celeron CPU onl y
SSD
Do Not Stuff
1 2
C1606
GFX_PCIE_TX_P0 GFX_PCIE_TX_C_P0
GFX_PCIE_TX_N1 GFX_PCIE_TX_C_N1 GFX_PCIE_TX_P1
GFX_PCIE_TX_N2 GFX_PCIE_TX_P2
GFX_PCIE_TX_N3 GFX_PCIE_TX_P3
LAN_PCIE_RX_N LAN_PCIE_RX_P
WLAN_PCIE_RX_N WLAN_PCIE_RX_P WLAN_PCIE_TX_N WLAN_PCIE_TX_P
HDD_SATA_RX_N HDD_SATA_RX_P HDD_SATA_TX_N HDD_SATA_TX_P
SSD_SATA_RX_N1 SSD_SATA_RX_P1 SSD_SATA_TX_N1 SSD_SATA_TX_P1
Layout Note:
OPS
1 2
C1605
OPS
Do Not Stuff
Do Not Stuff
1 2
C1608
OPS
1 2
C1607
OPS
Do Not Stuff
Do Not Stuff
1 2
C1610
OPS
1 2
C1609
OPS
Do Not Stuff
Do Not Stuff
1 2
C1612
OPS
1 2
C1611
OPS
Do Not Stuff
SCD1U16V2KX-3DLGP
1 2
C1613
1 2
C1614
SCD1U16V2KX-3DLGP
SSD_PCIE_RX_N1 SSD_PCIE_RX_P1 SSD_PCIE_TX_N1 SSD_PCIE_TX_P1
SSD_PCIE_RX_N2 SSD_PCIE_RX_P2 SSD_PCIE_TX_N2 SSD_PCIE_TX_P2
SSD_PCIE_RX_N3 SSD_PCIE_RX_P3 SSD_PCIE_TX_N3 SSD_PCIE_TX_P3
SSD_SATA_RX_N SSD_SATA_RX_P SSD_SATA_TX_N SSD_SATA_TX_P
1 2
R1604
100R2F-L1-GP-U
1. Trace Width: 4 mils min (breakout) 12-15 mils (trace) Note: Mus t main tain l ow DC resis tance routing (<0.1 ohm).
2. Isolat ion Spacing : At least 12 mils to any adjacent high speed I/O.
GFX_PCIE_RX_N0 GFX_PCIE_RX_P0
GFX_PCIE_TX_C_N0GFX_PCIE_TX_N0
GFX_PCIE_RX_N1 GFX_PCIE_RX_P1
GFX_PCIE_TX_C_P1
GFX_PCIE_RX_N2
GFX_PCIE_RX_P2 GFX_PCIE_TX_C_N2 GFX_PCIE_TX_C_P2
GFX_PCIE_RX_N3
GFX_PCIE_RX_P3 GFX_PCIE_TX_C_N3 GFX_PCIE_TX_C_P3
LAN_PCIE_TX_C_N LAN_PCIE_TX_C_PLAN_PCIE_TX_P
PCIE_RCOMPN PCIE_RCOMPP
CPU1H
BW9
PCIE5_ RXN/USB31 _5_RX N
BW8
PCIE5_ RXP/USB3 1_5_R XP
BW4
PCIE5_ TXN/USB31 _5_TX N
BW3
PCIE5_ TXP/USB3 1_5_T XP
BU6
PCIE6_ RXN/USB31 _6_RX N
BU5
PCIE6_ RXP/USB3 1_6_R XP
BU4
PCIE6_ TXN/USB31 _6_TX N
BU3
PCIE6_ TXP/USB3 1_6_T XP
BT7
PCIE7_ RXN
BT6
PCIE7_ RXP
BU2
PCIE7_ TXN
BU1
PCIE7_ TXP
BU9
PCIE8_ RXN
BU8
PCIE8_ RXP
BT4
PCIE8_ TXN
BT3
PCIE8_ TXP
BP5
PCIE9_ RXN
BP6
PCIE9_ RXP
BR2
PCIE9_ TXN
BR1
PCIE9_ TXP
BN6
PCIE10 _RXN
BN5
PCIE10 _RXP
BR4
PCIE10 _TXN
BR3
PCIE10 _TXP
BN10
PCIE11 _RXN/SAT A0_RX N
BN8
PCIE11 _RXP/SA TA0_R XP
BN4
PCIE11 _TXN/SAT A0_TX N
BN3
PCIE11 _TXP/SA TA0_T XP
BL6
PCIE12 _RXN/SAT A1A_R XN
BL5
PCIE12 _RXP/SA TA1A_ RXP
BN2
PCIE12 _TXN/SAT A1A_T XN
BN1
PCIE12 _TXP/SA TA1A_ TXP
BK6
PCIE13 _RXN
BK5
PCIE13 _RXP
BM4
PCIE13 _TXN
BM3
PCIE13 _TXP
BJ6
PCIE14 _RXN
BJ5
PCIE14 _RXP
BL2
PCIE14 _TXN
BL1
PCIE14 _TXP
BG5
PCIE15 _RXN/SAT A1B_R XN
BG6
PCIE15 _RXP/SA TA1B_ RXP
BL4
PCIE15 _TXN/SAT A1B_T XN
BL3
PCIE15 _TXP/SA TA1B_ TXP
BE5
PCIE16 _RXN/SAT A2_RX N
BE6
PCIE16 _RXP/SA TA2_R XP
BJ4
PCIE16 _TXN/SAT A2_TX N
BJ3
PCIE16 _TXP/SA TA2_T XP
CE6
PCIE_R COMP_N
CE5
PCIE_R COMP_P
CR28
GPP_H12 /M2_SKT2 _CFG0
CP28
GPP_H13 /M2_SKT2 _CFG1
CN28
GPP_H14 /M2_SKT2 _CFG2
CM28
GPP_H15 /M2_SKT2 _CFG3
WHISKEY-LAKE-GP
3
(#545659) The xHCI controller supports USB Debug port on all USB3.0 capable ports.
8 OF 20
USB1_USB30_RX_N
CB5
USB2N_1 USB2P_1
USB2N_2 USB2P_2
USB2N_3 USB2P_3
USB2N_4 USB2P_4
USB2N_5 USB2P_5
USB2N_6 USB2P_6
USB2N_7 USB2P_7
USB2N_8 USB2P_8
USB2N_9 USB2P_9
USB2N_10 USB2P_1 0
USB2_CO MP
RSVD#A R3
USB_ID
CB6 CA4 CA3
BY8 BY9 CA2 CA1
BY7 BY6 BY4 BY3
BW6 BW5 BW2 BW1
CE3 CE4
CE1 CE2
CG3 CG4
CD3 CD4
CG5 CG6
CC1 CC2
CG8 CG9
CB8 CB9
CH5 CH6
CC3 CC4
CC5 CE8 CC6
CK6 CK5 CK8 CK9
CP8 CR8 CM8
CN8 CM10 CP10
CN7
AR3
USB1_USB30_RX_P USB1_USB30_TX_N USB1_USB30_TX_P
USB2_USB30_RX_N USB2_USB30_RX_P USB2_USB30_TX_N USB2_USB30_TX_P
USB4_USB30_RX_N USB4_USB30_RX_P USB4_USB30_TX_N USB4_USB30_TX_P
USB1_USB20_N USB1_USB20_P
USB2_USB20_N USB2_USB20_P
USB3_USB20_N USB3_USB20_P
USB4_USB20_N USB4_USB20_P
FP_USB20_N FP_USB20_P
CCD_USB20_N CCD_USB20_P
CARD1_USB20_N CARD1_USB20_P
BT_USB20_N BT_USB20_P
USBCOMP USB2_ID
USB2_VBUSSENSE
USB_OC0#
USB_OC1# USB_OC2# USB_OC3#
HDD_DEVSLP SIO_EXT_SCI# SSD_DEVSLP
M2_SSD_PEDET
SATA_LED#
Follow Rogue
USB3 (USB3.0 Por t1)
USB4 (USB3.0 Port2)
USB3.0 Type C
USB3 (USB3.0 por t1)
USB4 (USB3.0 por t2)
USB2 (USB2.0 Port3 on IOBD )
USB3.0 Type C
Finger Print ( USB2.0 Port5)
CAMERA (USB2.0 Port6)
Card Reader (USB2.0 Port7)
Co-design will be cancel these port
Bluetooth (USB2.0 Port8)
1 2
R1603 113R2F-GP
(#543016) When used a s DEV SLP, n o exte rnal p ull-up or pu ll-down termination required from SATA Host DEVSLP.
RN1602
USB2_VBUSSENSE
1
USB2_ID
2 3
DY
Do Not Stuff
PCIE1_ RXN/USB31 _1_RX N PCIE1_ RXP/USB3 1_1_R XP PCIE1_ TXN/USB31 _1_TX N PCIE1_ TXP/USB3 1_1_T XP
PCIE2_ RXN/USB31 _2_RX N/SSIC_1 _RXN PCIE2_ RXP/USB3 1_2_R XP/SSIC _1_RX P PCIE2_ TXN/USB31 _2_TX N/SSIC_1 _TXN PCIE2_ TXP/USB3 1_2_T XP/SSI C_1_TX P
PCIE3_ RXN/USB31 _3_RX N PCIE3_ RXP/USB3 1_3_R XP PCIE3_ TXN/USB31 _3_TX N PCIE3_ TXP/USB3 1_3_T XP
PCIE4_ RXN/USB31 _4_RX N PCIE4_ RXP/USB3 1_4_R XP PCIE4_ TXN/USB31 _4_TX N PCIE4_ TXP/USB3 1_4_T XP
USB_VBUS SENSE
GPP_E9 /USB2_OC 0#/GP_ BSSB_C LK
GPP_E1 0/USB2_O C1#/GP _BSSB_ DI
GPP_E1 1/USB2_O C2# GPP_E1 2/USB2_O C3#
GPP_E4 /DEVSLP 0 GPP_E5 /DEVSLP 1 GPP_E6 /DEVSLP 2
GPP_E0 /SATAXP CIE0/S ATAGP 0 GPP_E1 /SATAXP CIE1/S ATAGP 1 GPP_E2 /SATAXP CIE2/S ATAGP 2
GPP_E8 /SATALE D#/SPI 1_CS1 #
(#543016) Unused SATAGP[2:0]/GPP_E[2:0] pins must be terminated to either 3.3 V ra il or GND using 8.2 KΩ t o 10 KΩ on t he motherbo ard. Do not use both pu ll-up and pu ll-down. Either pull-up or pull-down is acceptable.
DC r esistance < 0.5ohm.
USB_OC2# USB_OC3# USB_OC1# USB_OC0#
4
2
1
diff 12/25
3D3V_S0
RN1601
8 7
SRN10KJ-6-GP
1 2 3456
SIO_EXT_SCI#
3D3V_S5_PCH
12
R1608 10KR2J-3-GP
BUCKY Rogue
USB_OC0#
TYPEC PD
USB_OC1#
Power share
USB_OC2#
USB_OC3#
USB3.0 Power
USB2.0 Power
3D3V_S0
R1606
SATA_LED#
12
(#54361 1) The SATAL ED# signal is open-collector and requires a weak external pull-up (8.2 k Ω to 10 kΩ ) t o Vcc3_3.
10KR2J-3-GP
NC
USB3.0 Power
NC
TYPEC PD
新 增 部分
USB3_USB20_N66 USB3_USB20_P66
LAN_PCIE_RX_N66 LAN_PCIE_RX_P66 LAN_PCIE_TX_N66
B B
A A
LAN_PCIE_TX_P66
SSD_SATA_RX_N163 SSD_SATA_RX_P163 SSD_SATA_TX_N163 SSD_SATA_TX_P163
USB_OC0#72
USB_OC2#35
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU_(PCIE/SATA/USB)
CPU_(PCIE/SATA/USB)
CPU_(PCIE/SATA/USB)
Bucky WHL
Bucky WHL
Bucky WHL
SA
SA
SA
16 105Friday, July 13, 2018
16 105Friday, July 13, 2018
16 105Friday, July 13, 2018
SSID = PCH
SYS_PWROK24 RESET_OUT#24,26,40
VCCST_PWRGD24,40 PCH_RSMRST#24 3V_5V_POK17,25,40,45 PM_SLP_S0#24,40,68,91 PM_SLP_S3#27,40,68 PM_SLP_S4#40,51,66,68 AUX_EN_WOWL24,61 SIO_PWRBTN#24
D D
C C
B B
ACOK_IN_M43,44
H_CPUPWRGD3
LAN_WAKE#24
3V_5V_POK17,25,40,45
SIO_SLP_A#68
XDP_DBRESET#68
PLT_RST#26,61,63,66,76,91
PM_SLP_S5#68
INPUT3VSEL15
5
4
3D3V_VCCDSW
RTC_AUX_S5
3D3V_AUX_S5
1 2
RN1704
1
4
2 3
SRN10KJ-5-GP
R1730
#544669 (CRB): 330k.
330KR2J-L1-GP
SM_INTRUDER#
1 2
[#543016 Rev0.7]
3D3V_VCCPRIM
3D3V_S5
12
R1717 10KR2J-3-GP
R1726 10KR2J-3-GP
EXT_PWR_GATE#: Due to a bug on A0, a temporary pull-up resistor will be required to overcome the internal 20k pull-down that is active during the early portion of the power up sequence
R1731
EXT_PWR_GATE#
1 2
100KR2F-L2-GP
確認
se que nce
R1721 10KR2J-3-GP
GPD11/LANPHYPC
RN1703
1
4
2 3
SRN10KJ-5-GP
12
AOZ Power switch, P/N: 074.01334.0093 Low Rds(on)= 5m Ohm Turn on rise time = 10us
R1727
100KR2J-1-GP
1 2
Q1701
3V_5V_POK#
6
Note:ZZ.27002. F7C0 1
2N7002KDW-1-GP
75.27002.F7C
2nd = 075.27002.0E7C
2017/03/0 9
3
3D3V_VCCDSW
Follow Rogue
PCIE_WAKE#_CPU PM_SLP_S0# AC_PRESENT
NON_RTC_RST
#544669 Rev0.52 CRB: No P L resi stor o n THE RMTRIP#.
H_CPUPWRGD
12
DY
R1714
PM_RSMRST# PM_PCH_PWROK
SYS_PWROK
Do Not Stuff
RO13_20171001 move ED1702 TVS to dual TVS ED401
1D8V_VCCPRIM
CRB 是3.3V
1 2
R1738 Do Not Stuff
DY
remove R1724 R1735 C1704 EC1710 and +VCCMPHYGTAON_1P0_LS_SIP change to 1D0V_S5.
07/02 SD
12
R1722
RTC_RST
10KR2J-3-GP
PCH_BATLOW#
12
R1723 Do Not Stuff
ME_SUS_PWR_ACK_R SUSACK#_R
ME_SUS_PWR_ACK_R
R1708
1 2
Do Not Stuff
RO13_20170822 remove 3D3V_S5 short +VCCPDSW_3P3 (R1711) U2502 instead it.
SB 0331 SB 0331
1
TP1706Do Not Stuff
RESET_OUT#
1 2
R1706 Do Not Stuff
1 2
R1704 Do Not Stuff
06/21 SD
3D3V_VCCDSW
diff 12/25 check function
(PDG#543 016) WAKE#: En sure that WAKE# signal Trise (Maximum) is <100 ns.
DY
VCCST_PWRGD
VCCST_PWRGD_R
XDP_DBRESET#
R1707
1 2
10KR2J-3-GP
TP1707Do Not Stuff
TP1705Do Not Stuff
2
3D3V_VCCPRIM
DY
3
12
R1701 10KR2J-3-GP
PCH_PLTRST#
PM_RSMRST#
1
H_CPUPWRGD
1
VCCST_PWRGD_R
SYS_PWROK PM_PCH_PWROK PCH_DPWROKPM_RSMRST#
ME_SUS_PWR_ACK_R SUSACK#_R
PCIE_WAKE#_CPU LAN_WAKE#
GPD11/LANPHYPC
R1716 100KR2F-L1-GP
1
ED1704
Do Not Stuff
Do Not Stuff
2nd = 075.52215.007D
RO13_20171001
1 2
RO13_20171030
3
1
ED1701
AZ5125-02S-R7G-GP
2
1
3
75.05125.07D 2nd = 075.52215.007D
2
DY
3
ED1702
AZ5125-02S-R7G-GP
2
12
EC1706
Do Not Stuff
DY
75.05125.07D
2nd = 075.52215.007D
1KR2J-1-GP R1702
PM_RSMRST#
1 2
3V_5V_POK_C
2345
1 2
R1728
Do Not Stuff
1
06/21 SD
PCH_RSMRST#
3V_5V_POK
12
C1710
DY
Do Not Stuff
12
EC1712
DY
Do Not Stuff
2
CPU1K
BJ35
GPP_B1 3/PLTRS T#
CN10
SYS_RES ET#
BR36
RSMRST#
AR2
PROCPW RGD
BJ2
VCCST_ PWRGO OD
CR10
SYS_PW ROK
BP31
PCH_PW ROK
BP30
DSW_P WROK
BV34
GPP_A1 3/SUSWA RN#/SUSP WRDAC K
BY32
GPP_A1 5/SUSACK #
BU30
WAKE#
BU32
GPD2/LA N_WAKE #
BU34
GPD11/L ANPHYPC
WHISKEY-LAKE-GP
Dis-wire with XDP_PM_RSMRST_PWRGD_XDP
3D3V_S0
R1718 Do Not Stuff
DY
1 2
12
R1719 47KR2F-GP
XDP_DBRESET#
SYS_PWROK
PLT_RST#
RESET_OUT#
3V_5V_POK
1
ED1703
Do Not Stuff
Do Not Stuff
2nd = 075.52215.007D
VCCST_PWRGD_R
GPP_B1 1/EXT_P WR_G ATE#
GPP_B2 /VRALER T#
C1711
12
DY
RO13_20171001
11 OF 20
PM_SLP_S0#
GPP_B1 2/SLP_S 0#
GPD4/SL P_S3# GPD5/SL P_S4#
GPD10/S LP_S5#
SLP_SUS #
SLP_LA N#
GPD9/SP L_WLA N#
GPD6/SL P_A#
GPD3/PW RBTN#
GPD1/AC PRESENT
GPD0/BA TLOW#
INTRUDER #
INPUT3VS EL
BJ37 BU36 BU27 BT29
BU29 BT31 BT30 BU37
BU28 BU35 BV36
BR35
CC37 CC36
BT27
1
PM_SLP_S3#
1
PM_SLP_S4#
1
PM_SLP_S5#
1
AUX_EN_WOWL SIO_SLP_A#
1
SIO_PWRBTN#
1
AC_PRESENT PCH_BATLOW#
RO13_20171027 PCH_BATLOW# Software set GPD0 avoid 屬性 BATL OW # PU會漏電
SM_INTRUDER#
EXT_PWR_GATE#
1
VRALERT#
INPUT3VSEL
R1722 & EC1708 modify to 100k and 0.01uF at DVT1
Do Not Stuff
#543016 Rev0.7
1. VCCST_ PWRGD is only 1.0 V t olerant.
2. VCCST_ PWRGD must go low du ring Sx pwr states, regardless of the voltage level of VCCST
3D3V_AUX_S5
R1737
PM_RSMRST#_M
1 2
100KR2J-1-GP
TP1709 Do Not Stuff TP1710 Do Not Stuff TP1711 Do Not Stuff TP1712 Do Not Stuff
TP1713 Do Not Stuff
TP1714 Do Not Stuff
TP1708 Do Not Stuff
RO13_20171011
common part
2N7002KDW-1-GP
75.27002.F7C
2nd = 075.27002.0E7C
BATLOW# : Pull-up required even if not implemented.
06/21 SD
PLT_RST#
1 2
R1713
Do Not Stuff
12
12
R1715
DY
DY
83.R2003.A8M
2ND = 083.52030.008F
2345
1
C1701 Do Not Stuff
D1701
RB520S30-GP
KA
Do Not Stuff
Q1702
6
Note:ZZ.27002. F7C0 1
Reserve by NON DS3 function 20150413
1
0329 CNL PDG
AC_PRESENT
12
DY
PCH_PLTRST#
RO13_20170921 remove R1720 short pad
Dummy C1710 by it's useless
EC1707 Do Not Stuff
ACOK_IN_M
AC_PRESENT
PM_RSMRST#
新增
3D3V_S5
12
R1724 Do Not Stuff
CNL
EC1711 modify to 100k and 0.01uF at DVT1 20150203
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
PCH_(PMU)
PCH_(PMU)
PCH_(PMU)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Bucky WHL
Bucky WHL
Bucky WHL
17 105Friday, July 13, 2018
17 105Friday, July 13, 2018
17 105Friday, July 13, 2018
SA
SA
SA
ESPI_IO3 ESPI_IO1 ESPI_IO2 ESPI_IO0
5
1D8V_VCCPRIM
SSID = PCH
WLAN_CLK_CPU_N61 WLAN_CLK_CPU_P61 WLAN_CLKREQ_CPU_N61
SSD_CLK_CPU_N63 SSD_CLK_CPU_P63 SSD_CLKREQ_CPU_N63
SPI_CLK_ROM25,91 SPI_SO_ROM25,91 SPI_SI_ROM15,25,91
SPI_WP_ROM15,25 SPI_HOLD_ROM15,25 SPI_CS_ROM_N025
D D
SPI_CS_ROM_N291
ESPI_IO[3..0]24,68
CPU_SMB_SCL_P124,26,79 CPU_SMB_SDA_P124,26,79 ESPI_CS#24,68 ESPI_RESET#24,68
SUS_CLK24,61
RTCRST_ON24,25
ESPI_CLK24,68
FFS_INT170 TPM_SPI_IRQ#91
PCH_SMBCLK12,13,65
PCH_SMBDATA12,13,65
CPU_SMB_ALERT#15
CPU_SMB_ALERT#_P015
RTC_RST#68
3D3V_S0
R1821
1 2
10KR2J-3-GP
SERIRQ PH: PDG: 8.2k CRB: 10k
R1820
1 2
DY
Do Not Stuff
4
ESPI_ALERT#
CRB 預留3.3V & 1.8 V
SIO_RCIN#
不上件
SA 1212 For CNVi
SPI_CLK_ROM SPI_SO_ROM SPI_SI_ROM SPI_WP_ROM SPI_HOLD_ROM
RCIN#: Frequency to Avoid: 33 MHz
06/21 SD
1 2 1 2 1 2 1 2 1 2
TP1804Do Not Stuff
TP1806Do Not Stuff
3
SPI_CLK_CPU
R1814Do Not Stuff
SPI_SO_CPU
R1819Do Not Stuff
SPI_SI_CPU
R1823Do Not Stuff
SPI_WP_CPU
R1824Do Not Stuff
SPI_HOLD_CPU
R1845Do Not Stuff
SPI_CS_ROM_N0
SPI_CS_ROM_N2
TPM_SPI_IRQ#
FFS_INT1
CPU_D4_TP
1
PROJECT_ID0
CPU_D6_TP
1
follow Rogue
SIO_RCIN# ESPI_ALERT#
CPU1E
CH37
SPI0_C LK
CF37
SPI0_MI SO
CF36
SPI0_MO SI
CF34
SPI0_I O2
CG34
SPI0_I O3
CG36
SPI0_C S0#
CG35
SPI0_C S1#
CH34
SPI0_C S2#
CF20
GPP_D1 /SPI1_C LK/BK1 /SBK1
CG22
GPP_D2 /SPI1_MI SO_IO 1/BK2/SB K2
CF22
GPP_D3 /SPI1_MO SI_IO 0/BK3/SB K3
CG23
GPP_D2 1/SPI1_ IO2
CH23
GPP_D2 2/SPI1_ IO3
CG20
GPP_D0 /SPI1_C S0#/BK 0/SBK0
CH7
CL_CLK
CH8
CL_DAT A
CH9
CL_RST #
BV29
GPP_A0 /RCIN#/TI ME_SYNC1
BV28
GPP_A6 /SERIRQ
WHISKEY-LAKE-GP
Strap
GPP_A1 4/SUS_ST AT#/ES PI_RE SET#
5 OF 20
GPP_C0 /SMBCLK
GPP_C1 /SMBDATA
GPP_C2 /SMBALER T#
GPP_C3 /SML0CLK
GPP_C4 /SML0DAT A
GPP_C5 /SML0ALE RT#
Strap
GPP_C6 /SML1CLK
GPP_C7 /SML1DAT A
GPP_B2 3/SML1AL ERT#/P CHHOT#
GPP_A1 /LAD0/ES PI_IO 0 GPP_A2 /LAD1/ES PI_IO 1 GPP_A3 /LAD2/ES PI_IO 2 GPP_A4 /LAD3/ES PI_IO 3
GPP_A5 /LFRAME# /ESPI_ CS#
GPP_A9 /CLKOUT_ LPC0/E SPI_CL K
GPP_A1 0/CLKOUT _LPC1
GPP_A8 /CLKRUN#
CK14 CH15 CJ15
CH14 CF15 CG15
CN15 CM15 CC34
CA29 BY29 BY27 BV27 CA28 CA27
BV32 BV30 BY30
CPU_SMB_SCL CPU_SMB_SDA CPU_SMB_ALERT#
CPU_SMB_SCL_P0 CPU_SMB_SDA_P0 CPU_SMB_ALERT#_P0
CPU_SMB_SCL_P1 CPU_SMB_SDA_P1 CPU_SMB_ALERT#_P1
PCH_ESPI_IO0 PCH_ESPI_IO1 PCH_ESPI_IO2 PCH_ESPI_IO3 ESPI_CS# ESPI_RESET#
PCH_ESPI_CLK
CLKRUN#
1 2
R1843
Do Not Stuff
06/21 SD
For eSPI
3D3V_VCCDSW
12
DY
R1822 Do Not Stuff
JIO3_PCIE_WAKE#
2
RN1806
ESPI_IO3 ESPI_IO1 ESPI_IO2 ESPI_IO0
R1805
RO13_CFLU_20171206
3456 2
7
1
8
SRN15J-GP
ESPI_CLKPCH_ESPI_CLK
33R2F-3-GP
1 2
12
EC1801 Do Not Stuff
DY
CPU_SMB_SDA PCH_SMBDATA
CPU_SMB_SCL
common parts
2N7002KDW-1-GP
75.27002.F7C
2nd = 075.27002.0E7C
PCH_ESPI_IO3 PCH_ESPI_IO1 PCH_ESPI_IO2 PCH_ESPI_IO0
3D3V_S0
Q1801
Note:ZZ.27002. F7C0 1
6
1
3D3V_S5_PCH
RN1807
CPU_SMB_SCL_P0 CPU_SMB_SCL_P1 CPU_SMB_SDA_P1 CPU_SMB_SDA_P0
CPU_SMB_ALERT#_P1
CPU_SMB_SDA CPU_SMB_SCL
RN1810
3D3V_S0
1234
1
2345
SRN10KJ-5-GP
PCH_SMBCLK
8 7
SRN2K2J-4-GP
SRN2K2J-1-GP
RN1811
1 2 3456
12
R1837150KR2J-GP
1234
LAN_CLK_CPU_N66 LAN_CLK_CPU_P66 LAN_CLKREQ_CPU_N66
JIO3_PCIE_WAKE#61
CLKIN_XTAL_LCP_R61
C C
PROJECT_ID021
GFX_CLK_CPU_N76 GFX_CLK_CPU_P76 CLK_PCIE_PEG_REQ#76
CPU_SMB_ALERT#_P115
B B
3D3V_S0
RN1813
1 2 3 4 5
SRN10KJ-6-GP
2017/04/2 4
WLAN_CLKREQ_CPU_N
8
LAN_CLKREQ_CPU_N
7
SSD_CLKREQ_CPU_N
6
CLK_PCIE_PEG_REQ#
WLAN
SSD
新增
GFX_CLK_CPU_N GFX_CLK_CPU_P
CLK_PCIE_PEG_REQ#
WLAN_CLK_CPU_N WLAN_CLK_CPU_P WLAN_CLKREQ_CPU_N
LAN_CLK_CPU_N LAN_CLK_CPU_P LAN_CLKREQ_CPU_N
SSD_CLK_CPU_N SSD_CLK_CPU_P SSD_CLKREQ_CPU_N
RO13_20171106
CPU1J
AW2
CLKOUT_ PCIE_N0
AY3
CLKOUT_ PCIE_P 0
CF32
GPP_B5 /SRCCLK REQ0#
BC1
CLKOUT_ PCIE_N1
BC2
CLKOUT_ PCIE_P 1
CE32
GPP_B6 /SRCCLK REQ1#
BD3
CLKOUT_ PCIE_N2
BC3
CLKOUT_ PCIE_P 2
CF30
GPP_B7 /SRCCLK REQ2#
BH3
CLKOUT_ PCIE_N3
BH4
CLKOUT_ PCIE_P 3
CE31
GPP_B8 /SRCCLK REQ3#
BA1
CLKOUT_ PCIE_N4
BA2
CLKOUT_ PCIE_P 4
CE30
GPP_B9 /SRCCLK REQ4#
BE1
CLKOUT_ PCIE_N5
BE2
CLKOUT_ PCIE_P 5
CF31
GPP_B1 0/SRCCL KREQ5 #
WHISKEY-LAKE-GP
10 OF 20
CLKOUT_ ITPXDP _N CLKOUT_ ITPXDP _P
GPD8/SUS CLK
XTAL_I N
XTAL_O UT
XCLK_B IASREF
CLKIN_X TAL
SRTCRS T#
RTCRST #
XDP_CLK_CPU_N
AU1 AU2
BT32
CK3 CK2
CJ1 CM3
BN31
RTCX1
BN32
RTCX2
BR37 BR34
1
XDP_CLK_CPU_P
XTL_24M_X1_CPU XTL_24M_X2_CPU
XCLK_BIASREF CLKIN_XTAL_LCP CLKIN_XTAL_LCP_R
XTL_32K_X1_CPU XTL_32K_X2_CPU
SRTC_RST# RTC_RST#
TP1808 Do Not Stuff
1
TP1807 Do Not Stuff
RO13_20170921 remove R1813 short pad
1 2
R1842
Do Not Stuff
06/21 SD
SUS_CLK
12
RO13_CFLU_20171206
R1803 60D4R2F-GP
EC1804
RTCRST_ON
Do Not Stuff
12
DY
CLKRUN#
SB 0410
C1804
SC15P50V2JN-DL-GP
For RTC Gen 9 reset circuit n eed DY 2017081 4
Q1802
G
NON_RTC_RST
12
NON_RTC_RST
R1816
Do Not Stuff
S
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
3rd = 84.07002.I31
(#514849)
Layout: P lace at the open doo r are a.
R1818
Do Not Stuff
1 2
DY
R1815 10MR2J-L-GP
1 2
12
XTAL-32D768KHZ-98-GP
082.30003.0301
2nd = 082.30003.0191
common part
RO13_20170901
RO13_20171025 C1803 C1804 1pF->10pF
D
C1806
SC1U10V2KX-1DLGP
1 2
X1802
XTL_24M_X1_CPU
XTL_24M_X2_CPU
12
3D3V_S0
XTL_32K_X1_CPU
XTL_32K_X2_CPU
SB 0410
12
C1803 SC15P50V2JN-DL-GP
SB 0410
1MR2J-1-GP
2
DY
R1841
3
XTL_24M_X1_R
X1801
12
XTAL-24MHZ-135-GP
082.30006.0041 2nd = 82.30004.A01
XTL_24M_X2_R
SUS_CLK
DY
1 2
RO13_20171026
SRTC_RST# RTC_RST#
1
ED1801 Do Not Stuff
Do Not Stuff
2nd = 075.52215.007D
RO13_20171001 EMI request
INPUT/OUTP UT#1
INPUT/OUTP UT#3
FC1801
Do Not Stuff
DY
FC1801 close to EC1803
1 2
1 2
R1839
Do Not Stuff
06/21 SD
1 2
R1840
Do Not Stuff
06/21 SD
RTC_AUX_S5
1
23
RN1801 SRN20KJ-1-GP
4
21
G1801
12
C1805
Do Not Stuff
SC1U10V2KX-1DLGP
2017/03/1 7
NC#2
EC1803
Do Not Stuff
C1807
12
SC15P50V2JN-DL-GP
1 2 3
SB 0410
C1808
12
SC15P50V2JN-DL-GP
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
CPU (SPI/ESPI/SMBS/XTAL/CLK)
CPU (SPI/ESPI/SMBS/XTAL/CLK)
CPU (SPI/ESPI/SMBS/XTAL/CLK)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Bucky WHL
Bucky WHL
Bucky WHL
18 105Friday, July 13, 2018
18 105Friday, July 13, 2018
18 105Friday, July 13, 2018
SA
SA
SA
SSID = PCH
5
4
3
2
1
HDA_SYNC_CPU HDA_BITCLK_CPU HDA_SDOUT_CPU
SPKR15,27
HDA_SDIN0_CPU27 HDA_SYNC_CODEC27 HDA_BITCLK_CODEC27
ME_FWP_SW98
HDA_SDOUT_CODEC27
D D
KB_LED_BL_DET65
GC6_THM_DIS#24
HDA_SDOUT_CPU15
DMIC_PCH_CLK55 DMIC_PCH_DATA55
DGPU_PWROK24,85
BT_PCMFRM_CRF_RST_N61
BT_PCMOUT_CLKREQ061
3D3V_S5
12
diff 12/25 Bucky DMIC I2C from Codec IC
R1910 Do Not Stuff
fwTPM
TPM_ID
12
R1911 10KR2J-3-GP
TPM
Do Not Stuff
1 2
R1923
33R2J-2-GP
1 2
R1922
33R2J-2-GP
TP1903
BT_PCMFRM_CRF_RST_N_RBT_PCMFRM_CRF_RST_N
BT_PCMOUT_CLKREQ0_RBT_PCMOUT_CLKREQ0
HDA_SDIN0_CPU
HDA_RST_N_CPU
1
DMIC_PCH_CLK DMIC_PCH_DATA
TPM_ID DGPU_PWROK
SPKR
CPU1G
BN34
HDA_SYNC/I2S0_SFRM
BN37
HDA_BCLK/I2S0_SCLK
BN36
HDA_SDO/I2S0_TXD
BN35
HDA_SDI0/I2S0_RXD
BL36
HDA_SDI1/I2S1_RXD/SNDW1_DATA
BL35
HDA_RST#/I2S1_SCLK/SNDW1_CLK
CK23
GPP_D23/I2S_MCLK
BL37
I2S1_SFRM/SNDW2_CLK
BL34
I2S1_TXD/SNDW2_DATA
CJ32
GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#
CH32
GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
CH29
GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
CH30
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO
CP24
GPP_D19/DMIC_CLK0/SNDW4_CLK
CN24
GPP_D20/DMIC_DATA0/SNDW4_DATA
CK25
GPP_D17/DMIC_CLK1/SNDW3_CLK
CJ25
GPP_D18/DMIC_DATA1/SNDW3_DATA
CF35
GPP_B14/SPKR
WHISKEY-LAKE-GP
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
7 OF 20
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD# GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_1P8_RCOMP SD_3P3_RCOMP
3D3V_S5
12
CLAM
12
2IN1
CH36
GC6_THM_DIS#
CL35 CL36 CM35 CN35 CH35
KB_LED_BL_DET
CK36 CK34
SENSOR_DB_DET#
BW36 BY31
CK33 CM34
R1913 10KR2J-3-GP
SENSOR_DB_DET#
R1912 Do Not Stuff
SD_RCOMP
R1901
RO13_CFLU_20171207
200R2F-L-GP1 2
CHECK
C C
EC1901
HDA_BITCLK_CODEC
1 2
DY
Do Not Stuff
RO13_20171 027 delete ED1901
HDA_SYNC_CODEC
HDA_BITCLK_CODEC HDA_BITCLK_CPU HDA_SDOUT_CODEC
ME_FWP_SW
R1907,R1912 merge to RN1902 2015/10/06 modify
1 2
R1908
Do Not Stuff
07/06 SD
R1920~R1921 need to close for merge prepare
1 2
R1920
R1921
1 2
1 2
R1909 1KR2J-1-GP
0R2J-L-GP 33R2J-2-GP
HDA_SYNC_CPU
HDA_SDOUT_CPU
HDA_SDOUT_CODEC
Do Not Stuff
12
EC1903
B B
A A
5
DY
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
CPU (HAD/I2S/SD/DMIC)
CPU (HAD/I2S/SD/DMIC)
CPU (HAD/I2S/SD/DMIC)
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
Bucky WHL
Bucky WHL
Bucky WHL
1
SA
SA
19 105Friday, July 13, 2018
19 105Friday, July 13, 2018
19 105Friday, July 13, 2018
SA
SSID = PCH
5
GC6_FB_EN79,86
CPU_I2C_SDA_P155
CPU_I2C_SCL_P155
CPU_I2C_SDA_P065
CPU_I2C_SCL_P065
DBC_PANEL_EN55
UART_2_CRXD_DTXD68 UART_2_CTXD_DRXD68
SIO_EXT_WAKE#24
D D
C C
KB_DET#65
GSEN_INT166
GSEN_INT266 GSEN2_INT1_C70 GSEN2_INT2_C70
GYRO_INT_C70 GYRO_DRDY66
RTC_DET#15,25 SENSOR_I2C_SDA66,70 SENSOR_I2C_SCL66,70
FFS_INT270
PIRQA#91
BOARD_ID221
CNV_BRI_RSP61
CNV_RGI_DT_R15,61
CNV_BRI_DT_R61
CNV_RGI_RSP61
DGPU_HOLD_RST#76
GPU_EVENT#79
DGPU_PWR_EN86
NRB_BIT15
GPP_B22_GSPI1_MOSI15
1D8V_VCCPRIM
3D3V_S0
1D8V_S5
4
1 2
R2053 Do Not Stuff
DY
1 2
DEBUG
1 2
DEBUG
1 2
DY
1 2 1 2 1 2
1 2
3D3V_S5_PCH
DY
1 2
SB 0404
1 2
R2029 20KR2J-L2-GP
1 2
R2030 20KR2J-L2-GP
EC2002
Do Not Stuff
1 2 3
Do Not Stuff
R2048Do Not Stuff R2049Do Not Stuff
R2043Do Not Stuff R204410KR2J-3-GP R204510KR2J-3-GP R204610KR2J-3-GP
R2011Do Not Stuff
DY
DGPU_HOLD_RST#
12
RN2009
OPS
UART_2_CRXD_DTXD UART_2_CTXD_DRXD
DBC_PANEL_EN FFS_INT2 KB_DET# IR_CAM_DET#
確認是否 有
DGPU_PWR_EN
R204110KR2J-3-GP
DGPU_HOLD_RST#
4
DGPU_PWR_EN
PIRQA#
IR F UN CTION
SIO_EXT_WAKE#
CNV_RGI_RSP
CNV_BRI_RSP
3
GC6_FB_EN GC6_FB_EN_MCP
1 2
R2004 Do Not Stuff
OPS
1 2
R2003 Do Not Stuff
OPS
SA 1212 For CNVi
CNV_RGI_DT_R CNV_BRI_DT_R
diff 12/25
1 2
R2006 75R2J-1-GP
1 2
R2007 75R2J-1-GP
TPAD
Touch panel
GPU_EVENT_MCP#GPU_EVENT#
PIRQA#
NRB_BIT
DBC_PANEL_EN
GPP_B22_GSPI1_MOSI
CNV_BRI_RSP CNV_RGI_DT CNV_BRI_DT CNV_RGI_RSP
UART_2_CRXD_DTXD UART_2_CTXD_DRXD SIO_EXT_WAKE# KB_DET#
CPU_I2C_SDA_P0 CPU_I2C_SCL_P0
CPU_I2C_SDA_P1 CPU_I2C_SCL_P1
CPU1F
CC27
GPP_B15/GSPI0_CS0#
CC32
GPP_A7/PIRQA#/GSPI0_CS1#
CE28
GPP_B16/GSPI0_CLK
CE27
GPP_B17/GSPI0_MISO
CE29
GPP_B18/GSPI0_MOSI
CA31
GPP_B19/GSPI1_CS0#
CA32
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
CC29
GPP_B20/GSPI1_CLK
CC30
GPP_B21/GSPI1_MISO
CA30
GPP_B22/GSPI1_MOSI
CK20
GPP_F5/CNV_BRI_RSP
CG19
GPP_F6/CNV_RGI_DT
CJ20
GPP_F4/CNV_BRI_DT
CH19
GPP_F7/CNV_RGI_RSP
CR12
GPP_C20/UART2_RXD
CP12
GPP_C21/UART2_TXD
CN12
GPP_C22/UART2_RTS#
CM12
GPP_C23/UART2_CTS#
CM11
GPP_C16/I2C0_SDA
CN11
GPP_C17/I2C0_SCL
CK12
GPP_C18/I2C1_SDA
CJ12
GPP_C19/I2C1_SCL
CF27
GPP_H4/I2C2_SDA
CF29
GPP_H5/I2C2_SCL
CH27
GPP_H6/I2C3_SDA
CH28
GPP_H7/I2C3_SCL
CJ30
GPP_H8/I2C4_SDA
CJ31
GPP_H9/I2C4_SCL
WHISKEY-LAKE-GP
Strap
2
6 OF 20
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK GPP_D11/ISH_SPI_MISO/GSPI2_MISO GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_H10/I2C5_SDA/ISH_I2C2_SDA
GPP_H11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD
GPP_D14/ISH_UART0_TXD
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
CPU_I2C_SDA_ISH0 CPU_I2C_SCL_ISH0
CPU_I2C_SDA_ISH1 CPU_I2C_SCL_ISH1
(PDG#543016) Ensure that all I2C interface on-board term inations are pu lled up to the same voltage rail as the devi ce/end point.
CN22
DGPU_HOLD_RST#
CR22
IR_CAM_DET#
CM22
RTC_DET#
CP22
CPU_I2C_SDA_ISH0
CK22
CPU_I2C_SCL_ISH0 SENSOR_I2C_SCL
CH20
CPU_I2C_SDA_ISH1
CH22
CPU_I2C_SCL_ISH1
CJ22
CJ27 CJ29
DGPU_PWR_EN
CM24
VRAM_ID2
CN23 CM23 CR24
BOARD_ID1
CG12
FFS_INT2
CH12
UART1_RTS#
CF12
UART1_CTS#
CG14
ISH_KB_DISABLE
BW35 BW34 CA37
GSEN2_INT1_ISH
CA36
GSEN2_INT2_ISH
CA35
GYRO_INT_ISH
CA34
GYRO_DRDY_ISH
BW37
RN2007 SRN1KJ-7-GP
1
4
2 3
RN2008 Do Not Stuff
1
4
DY
2 3
1 2
R2021 Do Not Stuff
1 2
R2020 Do Not Stuff
06/21 SD
KBLR:GPP_F10~F11: 1.8V only CFLU:GPP_H10~H11: 3.3V
確認
設定是否可省略後端 準 位轉 換 電 路
G P IO
remove TP2012 TP2014 TP2016 TP2017 and net. 2013103 1
1
TP2001
Do Not Stuff
1
TP2002
Do Not Stuff
1 2
R2025 Do Not Stuff
1 2
R2026 Do Not Stuff
1 2
R2027 Do Not Stuff
1 2
R2028
DY
3D3V_S0
1
SENSOR_I2C_SDA
RO13_20170921 remove R2023 R2024 short pad
Do Not Stuff
06/21 SD
GSEN_INT1 GSEN_INT2 GSEN2_INT1_C GSEN2_INT2_C
GYRO_INT_C
GYRO_DRDY
2016/11/07 modify
3D3V_S0
12
UMA
R2038 10KR2J-3-GP
VRAM_ID2
12
R2037 Do Not Stuff
OPS
B B
3D3V_S0 3D3V_S0
BOARD_ID2
2IN1
CLAM
12
R2005 Do Not Stuff
12
R2008 10KR2J-3-GP
BOARD_ID1
CNL
WHL-U
12
R2010 Do Not Stuff
12
R2009 10KR2J-3-GP
3D3V_S5
2IN1
12
R2001 Do Not Stuff
KB_DISABLE_CPU_R
Vth(max)=1.1V
2IN1
Q2001
Note:ZZ.27 002.F7C0 1
1
6
2345
Do Not Stuff
Do Not Stuff
2nd = 075.27002.0E7C
ISH_KB_DISABLE
NB_MODE#
3D3V_S5
2IN1
CLAM
NB_MODE# 24
R2050 Do Not Stuff
1 2
R2002 10KR2J-3-GP
1 2
1D8V_S0
12
R2052
Do Not Stuff
DY
R2051
2017/03/1 7
12
DY
GYRO_DRDY_ISH
Do Not Stuff
(PDG#543016) If the UART/GPIO functi onality is al so not used, th e sign als ca n be left as no-connect.
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU (UART/I2C/ISH)
CPU (UART/I2C/ISH)
CPU (UART/I2C/ISH)
Bucky WHL
Bucky WHL
Bucky WHL
1
20 105Friday, July 13, 2018
20 105Friday, July 13, 2018
20 105Friday, July 13, 2018
SA
SA
SA
5
4
3
2
1
SSID = PCH
SSID = PCH
D D
GPPC_H18_BOOTMPC40
WIFI_RF_EN61
BLUETOOTH_EN61
BOARD_ID220
GPP_H2315
GPP_H2115
CNV_WT_CLKN61 CNV_WT_CLKP61
CNV_WT_DP061 CNV_WT_DN061
CNV_WT_DP161 CNV_WT_DN161
CNV_WR_CLKN61
CNV_WR_CLKP61
CNV_WR_DP061
CNV_WR_DN061
CNV_WR_DP161
CNV_WR_DN161
C C
PROJECT_ID018
GPD715
3D3V_S0
Touch
NON-Touch
12
R2119 Do Not Stuff
TOUCH_DETECT
12
R2120 10KR2J-3-GP
R2101150R2F-1-GP
CNV_WR_DN0 CNV_WR_DP0
CNV_WR_DN1 CNV_WR_DP1
CNV_WT_DN0 CNV_WT_DP0
CNV_WT_DN1 CNV_WT_DP1
CNV_WR_CLKN CNV_WR_CLKP
CNV_WT_CLKN CNV_WT_CLKP
CNV_WT_RCOMP
12
PROJECT_ID1 PROJECT_ID2
BLUETOOTH_EN TOUCH_DETECT BOARD_ID2
CPU1I
CR30
CNV_WR_D0N
CP30
CNV_WR_D0P
CM30
CNV_WR_D1N
CN30
CNV_WR_D1P
CN32
CNV_WT_D0N
CM32
CNV_WT_D0P
CP33
CNV_WT_D1N
CN33
CNV_WT_D1P
CN31
CNV_WR_CLKN
CP31
CNV_WR_CLKP
CP34
CNV_WT_CLKN
CN34
CNV_WT_CLKP
CP32
CNV_WT_RCOMP#CP32
CR32
CNV_WT_RCOMP#CR32
CP20
GPP_F0/CNV_PA_BLANKING
CK19
GPP_F1
CG17
GPP_F2
CR14
GPP_C8/UART0_RXD
CP14
GPP_C9/UART0_TXD
CN14
GPP_C10/UART0_RTS#
CM14
GPP_C11/UART0_CTS#
CJ17
GPP_F8/CNV_MFUART2_RXD
CH17
GPP_F9/CNV_MFUART2_TXD
CF17
GPP_F23/A4WP_PRESENT
WHISKEY-LAKE-GP
GPP_D4/IMGCLKOUT0/BK4/SBK4
9 OF 20
GPP_H18/CPU_C10_GATE#
GPP_H19/TIMESYNC0
GPP_H21 GPP_H22 GPP_H23
GPP_F10
GPD7
GPP_F3
GPP_H20/IMGCLKOUT1
GPP_F12/EMMC_DATA0 GPP_F13/EMMC_DATA1 GPP_F14/EMMC_DATA2 GPP_F15/EMMC_DATA3 GPP_F16/EMMC_DATA4 GPP_F17/EMMC_DATA5 GPP_F18/EMMC_DATA6 GPP_F19/EMMC_DATA7
GPP_F20/EMMC_RCLK
GPP_F21/EMMC_CLK
GPP_F11/EMMC_CMD
GPP_F22/EMMC_RESET#
EMMC_RCOMP
GPPC_H18_BOOTMPC
CN27
CM27
GPP_H21
CF25 CN26
GPP_H23
CM26 CK17
diff 12/25 check function Rogue
BV35
GPD7 PROJECT_ID3
CN20
WIFI_RF_EN
CG25 CH25
CR20 CM20 CN19 CM19
GPP_F: VCCPGPPF = 1.8V Only
CN18 CR18 CP18 CM18
CM16 CP16 CR16 CN16
CK15
EMMC_RCOMP
R2108
1 2
200R2F-L-GP
Change to Dummy 20150402
PROJECT_ID 1
1D8V_VCCPRIM
12
R2111 Do Not Stuff
DY
PROJECT_ID1
12
R2112 10KR2J-3-GP
1D8V_VCCPRIM
12
R2113 10KR2J-3-GP
12
R2114 Do Not Stuff
WIFI_RF_EN
BLUETOOTH_EN
PROJECT_ID0
使用不同設定
PROJECT_ID 0 TypeC H--> Full function L--> data only
TypeC full
TypeC data
3D3V_S0
R2107
12
DY
Do Not Stuff
3D3V_S0
R2109
12
DY
Do Not Stuff
PROJECT_ID[3:2] 11: Inspiron
1D8V_VCCPRIM1D8V_VCCPRIM
12
12
DY
R2115 10KR2J-3-GP
R2116 Do Not Stuff
12
12
DY
R2117 10KR2J-3-GP
R2118 Do Not Stuff
PROJECT_ID2PROJECT_ID3
B B
A A
5
4
3
RO13_20171 025
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU (CSI/EMMC/CNVi)
CPU (CSI/EMMC/CNVi)
CPU (CSI/EMMC/CNVi)
Bucky WHL
Bucky WHL
Bucky WHL
1
21 105Friday, July 13, 2018
21 105Friday, July 13, 2018
21 105Friday, July 13, 2018
SA
SA
SA
5
4
3
2
1
SSID = PCH
RO13_201 71107
1D0V_S5
RO13_CFLU_20171208
D D
RO13_CFLU_20171208
RVP_CRB: +VCCPRIM_CORE
C2223
Do Not Stuff
EC2201
SCD1U16V2KX-3DLGP
12
12
DY
C C
3D3V_VCCPRIM
3D3V_VCCDSW
C2224
SC1U10V2KX-1DLGP
12
1D8V_VCCPRIM
3D3V_VCCPRIM
RO13_201 71107
1D0V_VCCDSW
1D0V_S5
1D0V_VCCPRIM_MPHY
1D0V_VCCAMPHYPLL
1D0V_S5
1D0V_S5
3D3V_VCCDSW
3D3V_VCCPRIM
1D0V_S5
1D0V_VCCPRIM_MPHY
1D0V_S5
RO13_CFLU_20171208
2.57 A
BP20 BW16 BW18 BW19
BY16
CA14
CC15
CD15
CD16
CP17
CB22
CB23
CC22
CC23
CD22
CD23
CP29
BU15
BU22
BV15
BV16
BV18
BV19
BV20
BV22 BW20 BW22
CA12
CA16
CA18
CA19
CA20
CB12
CB14
CB15
BT24
BU14
BV12 BW12 BW14
BY12
BY14
BR15
CC12
BR24
BT20
BV23
BT18
BT19
BU18
BU19
BT22
BP22
BV14
BV2
CPU1P
WHISKEY-LAKE-GP
VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05
VCCPRIM_1P8 VCCPRIM_1P8 VCCPRIM_1P8 VCCPRIM_1P8
VCCPRIM_3P3 VCCPRIM_3P3 VCCPRIM_3P3 VCCPRIM_3P3 VCCPRIM_3P3 VCCPRIM_3P3 VCCPRIM_3P3
VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCDSW_1P05
VCCAPLL_1P05
VCCPRIM_MPHY_1P05 VCCPRIM_MPHY_1P05 VCCPRIM_MPHY_1P05 VCCPRIM_MPHY_1P05 VCCPRIM_MPHY_1P05
VCCAMPHYPLL_1P05
VCCAPLL_1P05
VCCDUSB_1P05
VCCDSW_3P3
VCCHDA
VCCSPI
VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05 VCCPRIM_1P05
VCCPRIM_1P05 VCCPRIM_1P05
VCCPRIM_MPHY_1P05
16 OF 20
VCCPRIM_3P3
VCCRTC
VCCPRIM_1P05
DCPRTC
VCCPRIM_1P05
VCCAPLL_1P05
VCCA_BCLK_1P05
VCCAPLL_1P05
VCCA_SRC_1P05
VCCA_XTAL_1P05
VCCDPHY_1P24 VCCDPHY_1P24
VCCDPHY_1P24 VCCDPHY_1P24 VCCDPHY_1P24
VCCDSW_3P3
VCCA_19P2_1P05
VCCPRIM_1P8 VCCPRIM_1P8 VCCPRIM_1P8 VCCPRIM_1P8 VCCPRIM_1P8
VCCPRIM_3P3
VCCPRIM_3P3
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
CB16
BR23
BY20 BP24
BR20
BT12
BP14
BR14
BU12
CP5
BY24 CA24
BY23 CA23 CP25
BT23
BR12
CC18 CC19 CD18 CD19 CP23
BW23
BP23
CB36 CB35
VCCRTCEXT
V0.85A_VID0 V0.85A_VID1
3D3V_VCCPRIM
3D3V_VCCPRTC
1D0V_S5
1 2
DY
1D0V_S5
1D0V_S5
1D0V_S5
1D0V_S5
1D0V_S5
1D0V_VCCA_XTAL
1D24V_VCCDPHY_EC
3D3V_VCCDSW
1D0V_S5
1D8V_VCCPRIM
3D3V_VCCPRIM
Do Not Stuff
1
TP2201
1
TP2202
Do Not Stuff
C2201 Do Not Stuff
1D24V_VCCDPHY
CRB# output?
RO13_CFLU_20171208
RO13_CFLU_20171208
CPU1O
K12 K14 K15 K17 K18 K20
L25 M24 M26 P24 P26 R24 R25 R26 V24
W25
Y24 Y25
G2 G1
C34
G3
G4 A34 B35
AJ27
AH26
L5
WHISKEY-LAKE-GP
WHL QS/CFL U/WHL ES1_CNL U22
RSVD#K12 RSVD#K14 RSVD#K15 RSVD#K17 RSVD#K18 RSVD#K20 RSVD#L25 RSVD#M24 RSVD#M26 RSVD#P24 RSVD#P26 RSVD#R24 RSVD#R25 RSVD#R26 RSVD#V24 RSVD#W25 RSVD#Y24 RSVD#Y25 RSVD#G2 RSVD#G1 RSVD#C34 RSVD#G3 RSVD#G4 RSVD#A34 RSVD#B35 RSVD#AJ27 RSVD#AH26 RSVD#L5
15 OF 20
RSVD#AA24 RSVD#AA26 RSVD#AB25 RSVD#AC24 RSVD#AC25 RSVD#AC26 RSVD#AD24 RSVD#AD26
RSVD#V25 RSVD#T25 RSVD#A35 RSVD#D34
RSVD#N5
Layout Note:
AA24 AA26 AB25 AC24 AC25 AC26 AD24 AD26 V25 T25 A35 D34 N5
確認
ES 1 powe r sourc e
RO13_CFLU_20171208
RO13_201 71107
1D0V_S5
1D0V_VCCDSW1D8V_VCCPRIM3D3V_VCCPRIM
C2211
C2210
C2206
C2203
SC1U10V2KX-1DLGP
C2204
C2202
SC1U10V2KX-1DLGP
12
B B
12
SC1U10V2KX-1DLGP
12
12
SCD1U16V2KX-3DLGP
C2207
C2205
SC1U10V2KX-1DLGP
12
SCD1U16V2KX-3DLGP
12
DY
SC1U10V2KX-1DLGP
C2212
SC1U10V2KX-1DLGP
C2213
Do Not Stuff
12
12
12
SC1U10V2KX-1DLGP
12
RO13_201 71107
1D0V_S5
12
RO13_CFLU_20171208
RO13_20171110
KR EC list
1 2
Do Not Stuff
1 2
Do Not Stuff
06/21 SD
C2216
SC1U10V2KX-1DLGP
C2215
SC1U10V2KX-1DLGP
12
R2202
R2203
1D0V_VCCA_XTAL1D0V_S5
1D0V_VCCPRIM_MPHY1D0V_S5
1D0V_S5
RO13_20171 030
C2217
SC1U10V2KX-1DLGP
12
3D3V_VCCPRTC
06/21 SD
3D3V_VCCPRTCRTC_AUX_S5
1 2
R2204
Do Not Stuff
1D0V_VCCAMPHYPLL
1 2
R2205
Do Not Stuff
C2222
SC1U10V2KX-1DLGP
C2221
SCD1U16V2KX-3DLGP
12
12
RO13_201 71107
1D0V_VCCAMPHYPLL 1D0V_S5
C2208
C2209
12
Do Not Stuff
SC1U25V3KX-1-DLGP
12
DY
SB 0331SB 0331
RO13_CFLU_20171208
A A
SC1U25V3KX-1-DLGP
C2214
12
C2219
SC1U10V2KX-1DLGP
1D0V_VCCPRIM_MPHY
12
SC22U6D3V3MX-1-DL-GP
C2220
1D24V_VCCDPHY_EC
12
C2218
SC4D7U6D3V3KX-DLGP
1D0V_VCCA_XTAL
12
RO13_CFLU_20171208
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
CPU (PCH-LP PWR&Caps)
CPU (PCH-LP PWR&Caps)
CPU (PCH-LP PWR&Caps)
Bucky WHL
Bucky WHL
Bucky WHL
1
22 105Friday, July 13, 2018
22 105Friday, July 13, 2018
22 105Friday, July 13, 2018
SA
SA
SA
SSID = PCH
5
4
3
2
1
D D
18 OF 20
CPU1R
CR34
VSS
BT5
VSS
BY5
VSS
CP35
VSS
CM37
VSS
CK37
VSS
AW1
VSS
CM1
VSS
BD6
VSS
AY4
VSS
B34
VSS
E35
VSS
A4
VSS
AE24
VSS
AE26
VSS
AF25
VSS
AG24
VSS
AG26
VSS
AH24
VSS
AH25
VSS
B2
VSS
B36
VSS
C36
VSS
C37
VSS
CN1
VSS
CN2
VSS
CN37
VSS
CP2
VSS
D1
VSS
A32
VSS
F33
VSS
A3
VSS
BJ7
VSS
CJ36
VSS
A36
VSS
BK10
CM13
CM17
AC10
CM21
AC27
CM25
AC30
CM29
CM31
AD33
CM33
AD35
CJ4
AB27
BK2 CK1
AB3 BK28 AB30
BK3
CK4 AB33 BK33
CK7 AB36
BK4
CL2
AB4
BK7
AB7 BL25
BL28
BL29
BL30
BL31
BL32
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
WHISKEY-LAKE-GP
C C
B B
BL7
VSS
AE25
VSS
BM33
VSS
CM5
VSS
AE27
VSS
BM35
VSS
CM9
VSS
AE30
VSS
BM36
VSS
CN13
VSS
AE7
VSS
BM9
VSS
CN17
VSS
AF27
VSS
BN30
VSS
CN21
VSS
AF3
VSS
BN7
VSS
CN25
VSS
AF30
VSS
CN29
VSS
AF33
VSS
BP15
VSS
AF36
VSS
AF4
VSS
CN5
VSS
AF7
VSS
BP25
VSS
CN9
VSS
AG10
VSS
BP3
VSS
CP1
VSS
BP32
VSS
CP11
VSS
AH27
VSS
BP33
VSS
CP13
VSS
AH28
VSS
BP4
VSS
CP15
VSS
AH29
VSS
BP7
VSS
CP19
VSS
AH30
VSS
CP21
VSS
AH31
VSS
BR19
VSS
CP27
VSS
AH33
VSS
BR25
VSS
AH35
VSS
CP37
VSS
AJ25
VSS
BT15
VSS
AJ28
VSS
BT16
VSS
CP9
VSS
AJ7
VSS
CR2
VSS
AK3
VSS
CR36
VSS
AK33
VSS
D21
VSS
AK36
VSS
BT25
VSS
D25
VSS
AK4
VSS
BT28
VSS
AL28
VSS
BT33
VSS
D5
VSS
AL29
VSS
AM10 BU11
AM28
AM33 BU23
AM35 BU24
BU25
AN25
AN28
AN29
AN30
AN31
BW11
BW15
AR28
BW24
BY11 AU10 BY15
AU28 BY22
AU29
BT35
AL32 BT36
AL7
E23
E27
E29
E31
E33
BU7
BV11
BV3
AN7
BV31
AN8
BV33
BV4
AP3
AP33
G21
AP36
G27 AP4 G33
G35 G36
AT33
AT35
H21 AT36 BW7
H27
AT4
CPU1S
VSS
D6
VSS VSS VSS
D8
VSS VSS
D9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
E9
VSS VSS VSS
F12
VSS VSS
F15
VSS VSS
F18
VSS VSS VSS
F2
VSS VSS VSS
F21
VSS VSS VSS
F24
VSS VSS
F3
VSS VSS VSS
F4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
G9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
H9
VSS VSS VSS
J12
VSS VSS
J15
VSS
WHISKEY-LAKE-GP
19 OF 20
BY25
VSS
J18
VSS
AU32
VSS
BY28
VSS
J21
VSS
AV25
VSS
BY33
VSS
J24
VSS
AV28
VSS
BY35
VSS
J33
VSS
AV3
VSS
BY36
VSS
J36
VSS
AV33
VSS
J6
VSS
AV36
VSS
C1
VSS
K21
VSS
AV4
VSS
C21
VSS
K22
VSS
AV6
VSS
C25
VSS
K24
VSS
AV8
VSS
C29
VSS
K25
VSS
AW28
VSS
C33
VSS
K27
VSS
AW29
VSS
C4
VSS
K28
VSS
AW3
VSS
C9
VSS
K29
VSS
AW30
VSS
CA11
VSS
K3
VSS
AW31
VSS
CA15
VSS
K30
VSS
AY33
VSS
CA22
VSS
K31
VSS
AY35
VSS
K32
VSS
B12
VSS
K4
VSS
B15
VSS
CA25
VSS
K9
VSS
B18
VSS
CB11
VSS
L27
VSS
B21
VSS
L33
VSS
B23
VSS
L35
VSS
B25
VSS
CB18
VSS
L36
VSS
B27
VSS
CB19
VSS
L6
VSS
B29
VSS
CB2
VSS
N25
VSS
B31
VSS
CB20
VSS
N27
VSS
CB25
VSS
CC11
CC20
CC25
CC28
CC31
CD11
CD12
CD14
CD24
CD25
CB33
BA10
BA28
BB33
BB36
BC25
BC29
BC32
CE33
BD28 CE35
BD33 CE36
BD35
BD36 CF11
BE10 CF14
BE28 CF19
BE29
CC7
CPU1T
N6
VSS
B37
VSS
CB3
VSS
P10
VSS
B5
VSS VSS
P3
VSS
B7
VSS
CB4
VSS
P33
VSS
B9
VSS
CB7
VSS
P36
VSS VSS VSS
P4
VSS VSS
P7
VSS
BA3
VSS VSS
R27
VSS
BB3
VSS VSS
R28
VSS VSS VSS
R29
VSS VSS VSS
R30
VSS
BB4
VSS VSS
R31
VSS VSS VSS
T27
VSS VSS
T30
VSS VSS VSS
T33
VSS
T35
VSS VSS VSS
T36
VSS VSS
T7
VSS
BC8
VSS VSS
U26
VSS VSS VSS
U7
VSS VSS VSS
V26
VSS VSS
CE7
VSS
V27
VSS VSS VSS
V3
VSS VSS VSS
V30
VSS VSS VSS
V33
VSS VSS
CF2
VSS
V36
VSS
BE3
VSS
WHISKEY-LAKE-GP
20 OF 20
CF23
VSS
V4
VSS
BE30
VSS
CF28
VSS
W10
VSS
BE31
VSS
CF3
VSS
W27
VSS
CF4
VSS
W30
VSS
BF3
VSS
CG33
VSS
W7
VSS
BF33
VSS
CG7
VSS
BF36
VSS
Y26
VSS
BF4
VSS
CH31
VSS
Y27
VSS
BG25
VSS
Y30
VSS
BG28
VSS
CJ11
VSS
Y33
VSS
CJ14
VSS
Y35
VSS
BH28
VSS
CJ19
VSS
Y7
VSS
BH29
VSS
CJ23
VSS
BH32
VSS
CJ28
VSS
BH33
VSS
CJ33
VSS
BH35
VSS
CJ35
VSS
BP19
VSS
BR16
VSS
BY18
VSS
BY19
VSS
CC16
VSS
BU16
VSS
CC14
VSS
BR22
VSS
BU20
VSS
CD20
VSS
BT14
VSS
BP12
VSS
CB24
VSS
CC24
VSS
J5
VSS
U24
VSS
BD7
VSS
AR4
VSS
AU4
VSS
AW4
VSS
BA6
VSS
BC4
VSS
BE4
VSS
BE8
VSS
BA4
VSS
BD4
VSS
BG4
VSS
CJ2
VSS
CJ3
VSS
AM5
VSS
CM4
VSS
AC5
VSS
AG5
VSS
CR6
VSS
A A
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
PCH_(VSS)
PCH_(VSS)
PCH_(VSS)
Bucky WHL
Bucky WHL
Bucky WHL
1
SA
SA
23 105Friday, July 13, 2018
23 105Friday, July 13, 2018
23 105Friday, July 13, 2018
SA
Main Func = KBC
KSO[0..16]65
KSI[0..7]65
D D
C C
B B
A A
CLK_TP_SIO65
DAT_TP_SIO65
SIO_PWRBTN#17
PCH_RSMRST#17
ESPI_IO[3..0]18,68
LAN_WAKE#17,2 4
ESPI_CLK18 ,68
ESPI_RESET#18,68
MASK_SATA_LED#64
RTCRST_ON18,25
AC_DIS43
TP_WAKE_KBC#3,65
PM_LAN_ENABLE66
VCCST_PWRGD17,40
RESET_OUT#17,26,40
SUS_CLK18,61
USB_PWR_EN #34 ,35
PROCHOT#_C PU3,44,46
ESPI_CS#18 ,68
PBAT_CHG_SMBDAT43,44
PBAT_CHG_SMBCL K43 ,44
SYS_PWROK1 7
PBAT_PRES#43 ,44
FAN1_TACH26
LID_CL_SIO#64
LID_CL_SIO_ TAB#66
KB_LED_PWM65
BEEP27
DGPU_PWROK19 ,24,85
PS_ID43
LANWAKE#_IC24,66
ME_FWP98
HOST_DEBUG_ TX68
PECI_CPU3
NB_MUTE#27
ALWON40
ACOK_IN44
LCD_VCC_TE ST_EN_ R55
CMP_VOUT026
CMP_VIN0_R26
USB_PWR_SH R_EN _L#36
SIO_EXT_WAKE#20
AD_IA24,44
USB_POWERSH ARE_VBUS _EN36
CPU_SMB_SD A_P118,26 ,79
CPU_SMB_SC L_P118 ,26,79
CAP_LED#_D65
VCCDSW_ON25
KBC_PWRBTN #64,68
CHG_AMBER_LED #64
TP_EN#65
L_BKLT_EN4,24
BATT_WHITE_LED#64
TP_LOCK#65
BLON_OUT55
TYPEC_SMBDA_Q72
TYPEC_SMBCLK_Q7 2
DGPUHOT#44,79
FPR_SCAN#66
UPD1_SMBINT#72
PRIM_PWRGD40,53
NB_MODE#20
AUX_EN_WOWL17,61
FAN1_PWM26
SYS_LED_MASK#_R64
11/2 0
新增
LAN_WAKE#17,24
LCD_TST55
HW_ACAVIN_NB43
TOUCH_REPO RT_SW55
TYPEC_DCIN_E N#74
GC6_THM_DIS#19
SSD_SCP#_ M26 3
5
Layout Note:
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
ESPI_IO0 ESPI_IO1 ESPI_IO2 ESPI_IO3
11/21 DEL
1D0V_S5
3D3V_S5_KBC
3D3V_S5
Need very close to EC
06/21 SD
R2402
1 2
Do Not Stuff
11/29 del follow rogue
RN2403
1 2 3 4 5
SRN10KJ-6 -GP
RN2404
1 2 3 4 5
SRN10KJ-6 -GP
RN2412
1 2 3 4 5
SRN100KJ- 5-GP
RN2414
1 2 3 4 5
SRN100KJ- 5-GP
3D3V_S5_KBC
3D3V_S5_KBC
R2415 10KR2J -3-GP
R2429 10KR2J -3-GP
CAP_LED#_D
RN2405
8 7
SRN100KJ- 5-GP
8 7 6
8 7 6
8 7 6
8 7 6
3D3V_AUX_S5
1 2
SRN4K7J-8 -GP
1 2 3456
12
DY
12
D
R2453 Do Not Stuff
R2455 100KR2J-1 -GP
1V_VREF_CPU
12
C2406
KSI7 KSI4 KSI2 KSI1
KSI0 KSI3 KSI5 KSI6
KSO5
KSO7 KSO12 KSO16
KSO15
KSO13
KSO11
KSO10
RN2402
2 3 1
12
2N7002K-2 -GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
TP_EN#
LID_CL_SIO#
SYSPWR_PRES
SCD1U25V2KX-1-DL-GP
4
Q2414
3D3V_S5_KBC
1 2 3 4 5
SRN100KJ- 5-GP
1 2 3 4 5
SRN100KJ- 5-GP
PBAT_CHG_SMBCL K PBAT_CHG_SMBDAT
PBAT_PRES#
FPR_SCAN#
G
S
Q2412 and Q2413 merge
BAT1_LED#
RN2415
8
KSO1
7
KSO0
6
KSO14
KSO2
RN2416
8
KSO3
7
KSO8
6
KSO4 KSO6
3D3V_S03D3 V_S0
12
R2489
100KR2J-1 -GP
CAP_LED#
Part Reference = Q2412
1
6
2345
2N7002KD W-1-GP
2nd = 075.27002.0E7C
Power Switch Logic(PSL)
3D3V_ECVBAT
12
R2451
1 2
R2479
Do Not Stuff
06/21 SD
GPIO123 (BSS_STRAP)GPIO102 (CR_STRAP)
Already pull low on CPU side
PCH_RSMRST#
1
Do Not Stuff
100KR2J-1 -GP
POWER_SW_IN#KBC_PWRBTN #
12
C2426
SC2D2U10V3KX-1DLGP-U
3D3V_S5
12
R2434 100KR2J-1 -GP
R2432
1 2
1KR2J-1-GP
USB_EN# U SB_PWR _EN#
For eSPI
3D3V_S5_KBC
12
R2450 100KR2J-1 -GP
KSO9
12
R2449
DY
Do Not Stuff
TP2402
BAT2_LED#B ATT_WHITE_L ED#
CHG_AMBER_LED #
4
3D3V_S5 3D3V_S5_KBC
12
12
C2416
C2421
C2420
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
EC_AGND
SB 0331
R2417
Do Not Stuff
R2418 Do Not S tuff
12
DY
SB 0404
For eSPI
SUS_CLK
1 2
DY
Q2408
Need check,KR15 use 84.2N702.031
G
D
S
2N7002K-2 -GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
DGPU_PWROK
EC2401
12
DY
Do Not Stuff
3D3V_S53D3V_S5
Layout Note:
Need very close to EC
ALL_SYS_PWRGD assert, delay 10ms; RESET_OUT# assert.
Edison 11/13 for STU
PROCHOT
Do Not Stuff
12
C2412
VCCST_PWRGD
R2428
DY
H_PROCHOT# _R
3D3V_S5
SCD1U25V2KX-1-DL-GP
PCH_RSMRST#
12
06/21 SD
1 2
R2446
Do Not Stuff
3D3V_S5_KBC
12
12
12
12
12
C2411
C2410
C2413
C2414
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16
CAP_LED#
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
CLK_TP_SIO DAT_TP_SIO SIO_PWRBTN# VCCDSW_ON
ESPI_IO0 ESPI_IO1 ESPI_IO2 ESPI_IO3 ESPI_CS#
MASK_SATA_LED#
ESPI_CLK TYPEC_DCIN_E N# SYS_LED_MASK# GPU_PWR_LE VEL TP_EN# ESPI_RESET# LID_CL_SIO#
UPD1_SMBINT# SYS_PWROK
PBAT_PRES#
PRIM_PWRGD RTCRST_ON
BKLT_IN_EC
AC_DIS
USB_POWERSH ARE_VBUS _EN
FPR_SCAN# TP_WAKE_KBC#
AUX_ONPM_LAN_ENABL E
1 2
R2491
Do Not Stuff
USB_EN#
1 2
RUNPWROK
R2421
RESET_OUT#
Do Not Stuff
MEC_XTAL2
06/21 SD
MEC_XTAL1_R
07/06 SD
COMMON PARTS
X2401
1 2
XTAL-32D768KH Z-98-GP
082.30003.0301
2nd = 082.30003.0191
SB 0410
C2425
SC18P50V2JN-1-GP
1 2
1 2
Do Not Stuff
DGPUHOT#
R2416
06/21 SD
GC6_THM_DIS# _EC
R2426
DY
Do Not Stuff
1 2
PROCHOT#_C PU
07/02 SD
X01 20161230B change
Do Not Stuff
SC18P50V2JN-1-GP
1 2
06/21 SD
1 2
C2424
R2422
R2477
DY
Do Not Stuff
If don't need RTC alarm wake up, can change to 3D3V_AUX_S5
need to check power source
R2473 Do Not Stuff
C2428
SCD1U25V2K X-1-DL-GP
U2401
2
GPIO027/KSO00/PVT_IO1
14
GPIO015/KSO01/PVT_CS#
15
GPIO016/KSO02/PVT_SCLK
16
GPIO017/KSO03/PVT_IO0
37
GPIO045/BCM_INT1#/KSO04
38
GPIO046/BCM_DAT1/KSO05
39
GPIO047/BCM_CLK1/KSO06
50
GPIO025/KSO07/PVT_IO2
46
GPIO055/PWM2/KSO08/PVT_IO3
68
GPIO102/KSO09/CR_STRAP
72
GPIO106/KSO10
74
GPIO110/KSO11
75
GPIO111/KSO12
76
GPIO112/PS2_CLK1A/KSO13
77
GPIO113/PS2_DAT1A/KSO14
86
GPIO125/KSO15
92
GPIO132/KSO16
93
GPIO140/KSO17
98
GPIO143/KSI0/DTR#
99
GPIO144/KSI1/DCD#
6
GPIO005/SMB00_DATA/SMB00_DATA18/KSI2
7
GPIO006/SMB00_CLK/SMB00_CLK18/KSI3
104
GPIO147/KSI4/DSR#
105
GPIO150/KSI5/RI#
107
GPIO151/KSI6/RTS#
108
GPIO152/KSI7/CTS#
78
GPIO114/PS2_CLK0
79
GPIO115/PS2_DAT0
52
GPIO026/PS2_CLK1B
88
GPIO127/PS2_DAT1B
59
GPIO040/LAD0/ESPI_IO0
60
GPIO041/LAD1/ESPI_IO1
61
GPIO042/LAD2/ESPI_IO2
62
GPIO043/LAD3/ESPI_IO3
58
GPIO044/LFRAME#/ESPI_CS#
56
GPIO064/LRESET#
57
GPIO034/PCI_CLK/ESPI_CLK
63
GPIO067/CLKRUN#
55
GPIO063/SER_IRQ/ESPI_ALERT#
10
GPIO011/SMI#/EMI_INT#
49
GPIO060/KBRST
53
GPIO061/LPCPD#/ESPI_RESET#
66
GPIO100/EC_SCI#
32
GPIO126/SHD_SCLK
28
GPIO133/SHD_IO0
29
GPIO134/SHD_IO1
30
GPIO135/SHD_IO2
31
GPIO136/SHD_IO3
27
GPIO123/SHD_CS#
67
GPIO101/SPI_CLK
69
GPIO103/SPI_IO0
71
GPIO105/SPI_IO1
42
GPIO052/SPI_IO2
33
GPIO062/SPI_IO3
3
GPIO001/SPI_CS#/32KHZ_OUT
13
RESET_IN#/GPIO014
48
GPIO057/VCC_PWRGD
73
GPIO107/RESET_OUT#
125
XTAL2
123
XTAL1
MEC1416-NU -D0-GP
12
R2458 Do Not Stuff
XTAL_KBC_2
1 2
SB 0410
GPU_PWR_LE VEL
DY
3D3V_S5_KBC
12
Do Not Stuff
06/21 SD
3D3V_ECVBAT
12
1.8V GPIO
3
3D3V_RTC3D3V_AUX_ S5
R2472
071.01416.000G
VSS_VBAT
84
124
06/21 SD
R2445
1 2
Do Not Stuff
3D3V_S5_KBC
12
DGPU_PWROK 19,24,85
3D3V_S5_KBC 3 D3V_S5_ KBC
12
R2414
EC_DEBUG
10KR2F-2-GP
1 2
5/28 SC
06/21 SD
R2474
BOARD_ID_R
BOARD_ID
1 2
Do Not Stuff
C2408
SCD1U25V2KX-1-DL-GP
For eSPI
1D8V_S5 1D8V_S5_K BC
R2462
1 2
Do Not Stuff
06/21 SD
RTC Gen 9 reset circuit_20170726
12
43
103
122
VTR_33_18
VTR5VTR19VTR
VTR65VTR82VTR
VBAT
GPIO007/SMB01_DATA/SMB01_DATA18
GPIO010/SMB01_CLK/SMB01_CLK18
GPIO012/SMB02_DATA/SMB02_DATA18
GPIO013/SMB02_CLK/SMB02_CLK18
GPIO130/SMB03_DATA/SMB03_DATA18
GPIO131/SMB03_CLK/SMB03_CLK18
GPIO141/SMB04_DATA/SMB04_DATA18
GPIO142/SMB04_CLK/SMB04_CLK18
GPIO050/TACH0 GPIO051/TACH1
GPIO053/PWM0 GPIO054/PWM1
GPIO056/PWM3 GPIO030/BCM_INT0#/PWM4 GPIO031/BCM_DAT0/PWM5 GPIO032/BCM_CLK0/PWM6
GPIO002/PWM7
GPIO157/LED0/TST_CLK_OUT
GPIO156/LED1 GPIO104/LED2
GPIO116/TFDP_DATA/UART_RX
GPIO117/TFDP_CLK/UART_TX
GPIO035/SB-TSI_CLK
GPIO033/PECI_DAT/SB_TSI_DAT
VREF_CPU
GPIO145/ICSP_CLOCK
GPIO146/ICSP_DATA
ICSP_MCLR
BGPO/GPIO004
SYSPWR_PRES/GPIO003
VCI_OUT/GPIO036 VCI_IN1#/GPIO162 VCI_IN0#/GPIO163
VCI_OVRD_IN/GPIO164
GPIO160/DAC_0
GPIO161/DAC_1
DAC_VREF
GPIO124/CMP_VOUT0
GPIO020/CMP_VIN0
GPIO165/CMP_VREF0
GPIO120/CMP_VOUT1
GPIO021/CMP_VIN1
GPIO166/CMP_VREF1/UART_CLK
GPIO024/ADC7
GPIO023/ADC6/A20M
GPIO022/ADC5 GPIO153/ADC4 GPIO154/ADC3 GPIO155/ADC2 GPIO122/ADC1 GPIO121/ADC0
ADC_VREF
VR_CAP18VSS17VSS51AVSS
VSS
VSS64VSS
112
100
EC_AGND
VR_CAP
12
C2418
SC1U10V2KX-1G P
Layout Note:
EC_AGND
Connect GND and AGND planes via either 0R resistor or connect directly.
R2420 100KR2J-1 -GP
R2478 Do Not Stuff
ICSP_CLK ICSP_DAT
HOST_DEBUG_ TX
ICSP_CLR
3D3V_S5
SB 0331
M00 (SA)
07/06 SD
12
X01 (SB )
R2443 49K9R2F-L- GP
X02 (SC)
X03 (SD)
A00 (1 )
12
A01
R2444 100KR2F-L1 -GP
1 2
A02 1.80 8V
A03 1.59 4V100.0K 107K
Reserv ed
EC_AGND
12
C2423
SCD1U25V2KX-1-DL-GP
54
PBAT_CHG_SMBDAT
8
PBAT_CHG_SMBCL K
9
GPU_THM_SMBDAT
11
GPU_THM_SMBCL K
12
TYPEC_SMBDA
89
TYPEC_SMBCLK
91 96 97
40 41
44 45
47 34 35 36 4
1 106 70
80 81
90 94
95
101 102 87
119 120 121 126 127 128
23 24 22
85 20 25
83 21 26
118 117 116 109 110 111 113 114 115
R2427
NC_AUX_EN_WO WL_EC AUX_EN_WOWL
12
DY
FAN1_TACH
Do Not Stuff
LID_CL_SIO_ TAB#
FAN1 TACH need check.
KB_LED_PWM
BEEP
FAN1_PWM NB_MODE#
LANWAKE#
PS_ID
PCIE_WAKE#
BAT2_LED# BAT1_LED#
ME_FWP HOST_DEBUG_ TX
Need very close to EC
Need very close to EC
PTP_DIS#
H_PECI
1V_VREF_CPU
ICSP_CLK ICSP_DAT
ICSP_CLR
NB_MUTE#
SYSPWR_PRES
ALWON
VCI_IN1# POWER_SW_IN#
HW_ACAV_IN
GC6_THM_DIS# _EC GC6_THM_DIS#
HW_ACAVIN_NB
CMP_VOUT0 CMP_VIN0
VCREF0
PROCHOT SSD_SCP# SSD_SCP#_M2
LCD_TST
USB_PWR_SH R_EN _L# PANEL_BKEN_ EC
SIO_EXT_WAKE# MODEL_ID
I_ADP BOARD_ID LCD_VCC_TE ST_EN LCD_VCC_TE ST_EN_ R I_BATT
3D3V_S5_KBC
EC_AGND
12
C2422
SCD1U25V2KX-1-DL-GP
Do Not Stuff
C2405
12
DY
06/21 SD
1 2
R2469
Do Not Stuff
1 2
R2480
Do Not Stuff
1 2
C2429 SCD1U25 V2KX-1-DL -GP
1 2
R2470 Do Not Stuff
06/21 SD
R2430
12
Do Not Stuff
DY
Do Not Stuff
DBG3
7 1
2 3 4
EC_DEBUG
5 6 8
Do Not Stuff
Do Not Stuff
1 2
1 2
R2437 43R2J-GP
R2419
06/21 SD
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0KReser ve d 154K
SB 0404
SB 0404
SB 0404
PECI_CPU
3D3V_ECVBAT
ACOK_IN
3D3V_S5_KBC
CMP_VIN0_R
SB 0404
SB 0331
SB 0331
USB_PWR_SH R_EN _L#
EC
要求增加
LID_CL_SIO_ TAB#
10.0K
17.8K
27.0K
37.4K
49.9K
64.9K
82.5K
Do Not Stuff
12
R2452 100KR2J-1 -GP
add LCD_VCC_TEST_EN for customer request DVT1 3/1
3D3V_S5
12
R2475
10KR2J-3-GP
3D3V_S5
12
R2440 100KR2J-1 -GP
Bucky
For USB TypeC
For 65982DC
Need check
VOLTAGEPULL-HIGH RESISTORPULL-LOW RESISTORPCB VERSION A/D(PIN98)
3.0V
2.801 V
2.598 V
2.402 V
2.201 V
2.001 V
1.299 V
1.1V200K100.0K
Bucky
12
R24060R2J-2-GP
DY
12
R2476
05/15 SC
3D3V_S5_KBC
R2424
20KR2F-L-GP
Vref = 1.117 temp around 85
1 2
12
12
C2409
R2448
SCD01U50V2KX-1DLGP
10KR2F-2-GP
3D3V_S0
DY
SSD_SCP#
R2467 0R2J-L-GP
TYPEC_SMBDA_Q
3D3V_S5_KBC 3D 3V_S5_K BC
TYPEC_SMBCLK_Q
2
MODEL_ID
LANWAKE#
PM_SLP_S0# 17,40,68,91
12
R2490
Do Not Stuff
Type C
Part Reference = Q2417
3 4
2
DY
1
Do Not Stuff
Do Not Stuff
2nd = 075.27002.0E7C
R2468
Type C
64K9R2F-1- GP
C2407
SCD1U25V2KX-1-DL-GP
LANWAKE#_IC 24,66
12
5
6
12
0R2J-L-GP
DY
R2442
MODEL_ID
1 2
Do Not Stuff
3D3V_S5_KBC
EC_AGND
1 2
12
12
12
R2407
R2435Do Not Stuff
R2441 100KR2F-L1 -GP
06/21 SD
TYPEC_SMBDA
TYPEC_SMBCLK
MODEL_ID_DET(GP IO1 53 ) PULL-HIGH RESISTORPULL-LOW RESISTOR
Bucky N Discre te
Bucky V Discre te
Bensolo MS Discrete
Bucky N UM A
Bucky V UM A
Bensolo MS UMA Bensolo Value UMA Reserv e Reserv e Reserv e Reserv e
X02 2017 0316 change
X02 2017 0316 change
LAN_WAKE# 17,24
X01 2017 0109 change
3D3V_S5_KBC
1
23
RN2413
SRN2K2J-1 -GP
4
Type C
TBD
GPU_THM_SMBDAT
GPU_THM_SMBCL K
BKLT_IN_EC
I_BATT
I_ADP
SYS_LED_MASK#
LID_CL_SIO#
Follow S F
PTP_DIS#
Follow KR13
BLON_OUT
R2401 Do Not Stu ff
SB 0402
EC_AGND
EC_AGND
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
SB 0331
D2402
L1SS355T1G -GP
83.00355.G1F
2nd = 83.00355.D1F
D2405 RB520S30 -GP
K A
83.R2003.A8M
2ND = 083.52030.008F
1 2
R2439 Do Not Stuff
1 2
R2438 Do Not Stuff
D2401
3
BAT54C-12-GP
75.00054.A7D 2nd = 75.00054.T7D
1 2
06/21 SD
1 2
12
C2431 SC2200P5 0V2KX-2GP
1 2
12
Need very close to EC
C2436 SC2200P5 0V2KX-2GP
12
C2430 Do Not Stuff
DY
17.8K(64.17 82 5.6 DL)
27.0K
37.4K(064. 374 25 .06 DS)
49.9K
64.9K(64.64 92 5.6 DL)
(64.82525.6DL)
82.5K 107K 154K
(64.20035.6DL)
200K
TBD TBD TBD TBD
TOUCH_REPO RT_SW
AK
06/21 SD
1
2
R2483
330R2J-3-G P
R2423
330R2J-3-G P
VOLTAGE
3.0V10.0K(6 4.10 025 .6D L)
2.801 V
2.598 V
2.402 V
2.201 V
2.001 V
1.808 V
1.594 V100.0K
1.299 V
1.1V
0.9V
0.7V
0.5V
0.3V
TP_LOCK#
CPU_SMB_SD A_P1
CPU_SMB_SC L_P1
PANEL_BKEN_ EC
L_BKLT_EN_ L
Do Not Stuff
12
R2436 100KR2J-1 -GP
11/24 修改fo r powe r co -lay
BMON22 44
AD_IA 24,44
12
R2403
DY
Do Not Stuff
R2431
1 2
DY
Do Not Stuff
12
R2404
DY
Do Not Stuff
eDP backlight Control from EC
R2405
DY
L_BKLT_EN 4,24
SYS_LED_MASK#_R
L_BKLT_EN
12
eDP backlight Control from PCH
1
SA 0122
1D8V_S5
R2497 Do Not Stuff
DY
SYS_LED_MASK#_R
1 2
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corpo ration
Wistron Corpo ration
Wistron Corpo ration
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih, Taipei Hs ien 2 21, Taiwan, R .O.C.
Taipei Hs ien 2 21, Taiwan, R .O.C.
Taipei Hs ien 2 21, Taiwan, R .O.C.
Title
Title
Title
KBC SMSC 1404
KBC SMSC 1404
KBC SMSC 1404
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
A0
A0
A0
Bucky WHL
Bucky WHL
Bucky WHL
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
24 105
24 105
24 105
SA
SA
SA
Main Func = SPI Flash
5
Edison 11/13 for STU
SPI_CS_ROM_N018
SPI_SO_ROM18,91
D D
SPI_CLK_ROM18,91
SPI_SI_ROM15,18,91
SPI_HOLD_ROM15,18
SPI_WP_ROM15,18
SPI_SO_ROM
R2507
1 2
33R2J-2-GP
4
4K7R2J-2-GP
SPI_CS_ROM_N0
3D3V_SPIVCC1
12
R2501
SPI_WP_ROM_R
4
RN2501 Do Not Stuff
DY
1
2 3
SPI Flash ROM1(16M) for PCH
U2501
1
CS#
2
DO/IO1
HOLD#/RESET#/IO3
3
WP#/IO2
4
GND
W25Q128JVSIQ-GP
072.25128.0B51
2nd = 072.25127.0001
3rd = 072.25128.0D61
DI/IO0
VCC
CLK
8 7 6 5
07/06 SD
3D3V_SPIVCC1
SPI_HOLD_ROM_RSPI_SO_ROM_R SPI_CLK_ROM_R SPI_SI_ROM_R
3
Do Not Stuff
EVT1 20170713 0805-->0603
1 2
R2570 33R2J-2-GP
1 2
R2568 33R2J-2-GP
1 2
R2569 33R2J-2-GP
1 2
R2571 33R2J-2-GP
3D3V_SPIVCC1
C2501
12
DY
3D3V_S5_PCH
Follow PDGFollow PDG
SPI_HOLD_ROM
06/21 SD
R2515 Do Not Stuff
1 2
12
C2502
SCD1U16V2KX-3DLGP
SPI_CLK_ROM SPI_SI_ROM
SPI_WP_ROMSPI_WP_ROM_R
3D3V_S5
For RTC Gen 9 reset circuit_20170726
12
R2517 Do Not Stuff
DY
SPI_CS_ROM_N0 SPI_SO_ROM_R SPI_WP_ROM_R
SKT251
1 2 3 6
EVT
4
Do Not Stuff
Do Not Stuff
8 7
5
2
3D3V_SPIVCC1
SPI_HOLD_ROM_R SPI_CLK_ROM_R SPI_SI_ROM_R
1
Main Func = RTC
NON_RTC_RST
R2512
1 2
Do Not Stuff
084.03415. 0031
3D3V_AUX_S5
SB 0409
R2502
SB 0331
+RTC_VCC
1 2
12
R2503
DY
Do Not Stuff
R2504
10MR2J-L-GP
5/21 Vincent
R2506
1 2
1KR2J-1-GP
0R2J-L-GP
3D3V_RTC_SYS
12
07/02 SD
+RTC_VCC
common parts
Q2501
G
S
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
RTC1
3
1
2
4
ETY-CON2-22-GP-U
20.F1841.002
20.F1639.002
20.F1804.002
1
For RTC Gen 9 reset circuit_20170726
3D3V_RTC
D2501
1
3
2
BAT54C-12-GP
75.00054.A7D 2nd = 75.00054.T7D
D
AFTP2502
1
AFTP2501
RTC_DET#
12
C2503 SCD47U25V3KX-1-DL-GP
100KR2J-1-GP
RTC_RST
VCCDSW_ON
R2520
3D3V_S5
Do Not Stuff
RTCRST_ON RTC_3P3_EN_G
12
3V_5V_POK17,40,45
VCCDSW_ONVCCDSW _ON
12
DY
C2525
C C
+RTC_VCC
RTC_DET#15,20
VCCDSW_ON24
RTCRST_ON18,24
B B
Q2507
SM2421PSANC-TRG-GP
G
RTC_RST
084.02421.0031
12
3D3V_S5
DS
D2502
Do Not Stuff
R2567
1 2
RTC_RST
1MR2J-1-GP
R2518 100KR2J-1-GP
RTC_RST
3V_5V_POK
U2502
RTC_RST
4
EN
5
IN
SY6288C20AAC-GP
074.06288.007B
2nd = 074.00524.0B9F
DY
AK
R2513
1 2
NON_RTC_RST
Do Not Stuff
D2503
1
2
BAT54A-11-GP
RTC_RST
3
OC#
2
GND
1
OUT
RTC_AUX_S53D3V_RTC
C2517 SCD022U16V2KX-3DLGP
2 1
RTC_RST
3D3V_S5
12
R2514 10KR2J-3-GP
RTC_RST
3
3D3V_VCCDSW 3D3V_S5_PCH
R2505 4K7R2J-2-GP
RTC_RST
1 2
D
S
G
3V_5V_DSW_OK
06/21 SD
1 2
R2516 Do Not Stuff
Q2510 2N7002K-2-GP
RTC_RST
確認是否 換
3V_5V_DSW_OK 52,53
0 8SI ZE
R2511
R201 1
A A
Add RTC Gen 9 reset circuit_20170726
5
4
3
2
1 2
NON_RTC_RST
Do Not Stuff
R4 10 1_ 2 01 7 0 8 2 3
移到這,並刪 掉
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
Flash
Flash
Flash
Bucky WHL
Bucky WHL
Bucky WHL
1
25 105
25 105
25 105
SA
SA
SA
Main Func = Thermal Sensor
5
D D
CPU_SMB_SDA_P118,24,79
CPU_SMB_SCL_P118,24,79
RESET_OUT#17,24,40
PURE_HW_SHUTDOWN#40
CMP_VOUT024
CMP_VIN0_R24
C C
FAN1_PWM24
FAN1_TACH24
PLT_RST#17,61, 63,66,76,91
4
CPU_SMB_SDA_P1
CPU_SMB_SCL_P1
3D3V_S0 3D3V_S0
Part Reference = Q2601
Note:ZZ.27 002.F7C0 1
6
7718
75.27002.F7C
2N7002KDW-1-GP
2nd = 075.27002.0E7C
3D3V_S0
C2601
Do Not Stuff
12
7718
DY
3
2
1
PWM FAN1
Layout Note:
Signal Routing Guideline: Trace width = 15mil
5V_S0
Need check
1
23
RN2602 SRN2K2J-1-GP
7718
4
1
2345
C2602
SCD1U16V2KX-3DLGP
12
THM_SML1_DATA
THM_SML1_CLK
PWM/TACH level 為5V
12/15 thermal team suggest
SRN10KJ-5-GP
FAN1_TACH
RN2603
3D3V_S0
4
1
2 3
1 2
R2612
Do Not Stuff
06/21 SD
5V_FAN_VCC
C2604
12
AFTP2604
5V_FAN_VCC
SC4D7U6D3V3KX-DLGP
12
FAN1_TACH
FAN1_PWM
5V_FAN_VCC
C2605
SCD1U16V2KX-3DLGP
1
D2601
Do Not Stuff
KA
DY
Do Not Stuff
5V_FAN_VCC
FAN1_PWMFAN1_PWM FAN1_TACH
1
1
1
DY
AFTP2601
AFTP2602
AFTP2603
C2603
Do Not Stuff
12
FAN1
6 4 3 2
1
5
ACES-CON4-29-GP
20.F1639.004
020.F0097.0004
20.F1804.004
5/21 Vincent
B B
A A
5
7718
Q2603
MMBT3904-5-GP-U
84.T3904.K11
C
E
NCT7718_DXP
05/02 SC
C2606
Do Not Stuff
12
B
DY
NCT7718_DXN
2.System Sensor, Put on palm rest
Layout Note:
C2607 close THM2601
Layout Note:
Both DXN and DX P routi ng 10 mil trace width and 10 mi l spacing.
3D3V_S0
1 2
R2603 7K5R2F-1-GP
7718
1 2
R2604 7K5R2F-1-GP
7718
4
7718
SC2200P50V2KX-2GP
C2607
ALERT#
T_CRIT#
12
R2601
Do Not Stuff
THM261
1
VDD
2
D+
3
D-
T_CRIT#
T_CRIT#4GND
NCT7718W-GP
12
DY
74.07718.0B9
PLT_RST#
Do Not Stuff
RESET_OUT# RESET_OUT#_G
1 2
Do Not Stuff
THERM_SYS_SHDN#
7718
R2617
06/21 SD
SCL
SDA
ALERT#
R2616
1 2
8 7 6
ALERT#
5
THM_SML1_CLK THM_SML1_DATA
C2609
Do Not Stuff
C2608
Do Not Stuff
12
12
DY
DY
DY
Q2602
G
3
S
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
D
C2610
Do Not Stuff
12
DY
PURE_HW_SHUTDOWN#
CMP_VOUT0
1 2
DY
R2615 Do Not Stuff
KBC T8
DVT1 0210, for T8 function
12
R2609 Do Not Stuff
DY
R2610
NTC-100K-8-GP
69.60035.041
2
3D3V_S5
R2607 10KR2J-3-GP
1 2
R2602
Do Not Stuff
06/21 SD
3D3V_S5_KBC3D3V_S0
12
R2608 27KR2F-L-GP
DVT1 0210, for T8 function
12
C2612
12
SCD1U16V2KX-3DLGP
1 2
VD_IN1_C
CMP_VOUT0
Close to KBC VD_IN1 for system thermal sensorClose to Thermal sensor
CMP_VIN0_R
12
C2613
SC100P50V2JN-3DLGP
1 2
R2611
Do Not Stuff
06/21 SD
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Title
Title
Title
THERMAL NCT7718W/Fan
THERMAL NCT7718W/Fan
THERMAL NCT7718W/Fan
Size
Size
Size
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
Bucky WHL
Bucky WHL
Bucky WHL
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R .O.C.
1
26 105
26 105
26 105
SA
SA
SA
5
4
3
2
1
Main Func = Audio
HDA_SDIN0_CPU19
HDA_SDOUT_CODEC19
HDA_SYNC_CODEC19
HDA_BITCLK_CODEC19
5V_S0 +5V_PVDD
1 2
D D
AUD_SPK_R+29
AUD_SPK_R-29
AUD_SPK_L+29
AUD_SPK_L-29
DMIC_SDA_CODEC55
DMIC_SCL_CODEC55
PM_SLP_S3#17,40,68
NB_Mute#24
SPKR15,19
BEEP24
AUD_SENSE29
LINE1_VREFO29
MIC2_VREFO29
AUD_HP1_JACK_L29
AUD_HP1_JACK_R29
C C
B B
LINE1_L29
LINE1_R29
AUD_SLEEVE29
AUD_RING29
12
DY
R2701
Do Not Stuff
1 2
R2707
Do Not Stuff
1D8V_S0
1 2
R2709
Do Not Stuff
+5V_PVDD
DVDD must >= DVDD_IO
1 2
R2715
Do Not Stuff
06/21 SD
Azalia I/F EMI
HDA_SDOUT_CODEC HDA_BITCLK_CODEC
DMIC_SDA_CODEC
12
12
EC2709
Do Not Stuff
EC2711
EC2710
Do Not Stuff
DY
DY
1D8V_CPVDD
>2A
R2713 Do Not Stuff R2714 Do Not Stuff
Do Not Stuff
Audio Codec Chip ALC3204
Analo g
1D8V_S0
1 2 1 2
07/06 SD
+3V_1D8V_DVDD3D3V_S0
C2741
12
Digit al
moat
SCD1U16V2KX-3GP
1.8V power rail should be supplied by linear regulator, not awitching regulator.if switch regulator is unavilable, please make sure that switch frequency operates at out-band(over 20KHz)
1 2
R2719
Do Not Stuff
06/21 SD
12
C2740
12
AUD_AGND
SC2D2U10V3KX-L-GP
C2710 SC10U6D3V3MX-GP
12
C2713
SC10U6D3V3MX-GP
12
C2717
SC10U6D3V3MX-GP
NB_Mute#
AUD_AGND
AUD_AGND
12
C2714
SCD1U16V2KX-3GP
12
Layout Note:
C2718
SCD1U16V2KX-3GP
Speaker trace width >40mil @ 2W4ohm speaker power
+3V_1D8V_DVDD
確認是否 是 否
12
R2717
DY
Do Not Stuff
1 2
R2712
Do Not Stuff
HDA_SDIN0_CPU HDA_CODEC_SDIN0
HDA_SDOUT_CODEC
HDA_BITCLK_CODEC
1 2
R2724 22R2J-2-GP
07/06 SD
1 2
R2722 Do Not Stuff
1 2
R2723 22R2J-2-GP
1D8V_CPVDD
12
C2711
SC10U6D3V3MX-GP
high
PDB_R
05/15 SC
LDO2_CAP
+3V_1D8V_AVDD
+5V_PVDD1
AUD_SPK_L+
AUD_SPK_L-
AUD_SPK_R-
AUD_SPK_R+
+5V_PVDD1
PDB_R
0602 DY
Close pin3
C2704
SCD1U16V2KX-3GP
12
+3V_1D8V_DVDD
place close to pin1
HDA_SDOUT_CODEC_R
HDA_BITCLK_CODEC_R
0602 Delete C2727
C2705
SC2D2U10V3KX-L-GP
12
U2701
31
AVSS2
32
LDO2-CAP
33
AVDD2
34
PVDD1
35
SPK-L+
36
SPK-L-
37
SPK-R-
38
SPK-R+
39
PVDD2
40
PDB
41
GND
ALC3204-CG-GP-U
C2720
SC10U6D3V3MX-GP12C2721
12
AUD_HP1_JACK_L
AUD_HP1_JACK_R
C2708 SC2D2U10V3KX-L-GP
C2709
12
12
SC2D2U10V3KX-L-GP
CBN
CPVEE
CBP
30
29
28
27
26
25
CBP
CBN
CPVEE
CPVDD
HP-OUT-L
HP-OUT-R
ALC32 04
QFN40 (5X5)
DVDD1GPIO0/DMIC-DATA122GPIO1/DMIC-CLK3SDATA-OUT4BIT-CLK5LDO3-CAP6SDATA-IN7DVDD-IO8SYNC9DC_DET
SCD1U16V2KX-3GP
LDO3_CAP
HDA_BITCLK_CODEC_R
DMIC_SDA_CODEC
HDA_SDOUT_CODEC_R
DMIC_SCL_CODEC
12
AUD_AGND
C2702
12
AUD_VREF
MIC2_VREFO
LINE1_VREFO
SC2D2U10V3KX-L-GP
24
23
22
VREF
MIC2-VREFO
LINE1-VREFO-L
HP/LINE1-JD_JD1
HDA_SYNC_CODEC
HDA_CODEC_SDIN0
C2722 SC10U6D3V3MX-GP
LDO1_CAP
21
LDO1-CAP
VD33STB
MIC2-CAP
SLEEV/MIC2-R
RING2/MIC2-L
10
DVSS
LDO1_CAP
AVDD1
AVSS1
LINE1-L
LINE1-R
PCBEEP
+3V_1D8V_DVDD
C2723
12
SC4D7U6D3V3KX-DLGP
20
19
18
17
16
15
14
13
12
11
12
R2702
100KR2J-1-GP
AUD_AGND
+5V_AVDD
LINE1_L
LINE1_R
V3D3_STB
MIC_CAP
AUD_SLEEVE
AUD_RING
AUD_HPJD_N
AUD_PC_BEEP
SPKR
BEEP
C2703
SC2D2U10V3KX-L-GP
12
Layout Note:
Place close to Pin 20
1 2
C2715 SC10U6D3V3MX-GP
place close to pin8
Open drain output. pull up to DVDD or max. 5V
3D3V_RTC
3D3V_S0
AUD_SENSE
+3V_1D8V_DVDD
1 2
R2741
Do Not Stuff
1 2
R2734
Do Not Stuff
06/21 SD
moat
1 2
R2703
5/21 Vincent06/21 SD
V3D3_STB
DVSS
12
R2735
06/21 SD
moat
1KR2J-1-GP
DY
5V_S0
AUD_AGND
AUD_AGND
C2739
12
C2735
1 2
Do Not Stuff
EC2701 Do Not Stuff EC2702 Do Not Stuff EC2703 SCD1U25V2KX-GP EC2704 SCD1U25V2KX-GP EC2705 Do Not Stuff
R2704 Do Not Stuff R2705 Do Not Stuff R2706 Do Not Stuff
+5V_AVDD
Do Not Stuff
C2706
SCD1U16V2KX-3GP
C2707
SC10U6D3V3MX-GP
12
12
AUD_AGND
AUD_AGND
AUD_AGND
Analo g
Digit al
For RTC Gen9 reset circuit change power rail. 20170921
06/21 SD
1 2
R2708 Do Not Stuff
1 2
R2716 Do Not Stuff
DY
D2703
1
2
BAT54C-12-GP
75.00054.A7D
AUD_HPJD_N
AUD_PC_BEEP_C
3
R2711 200KR2F-L-GP
R2710 100KR2J-1-GP
HDA_SPKR_R
KBC_BEEP_R
1 2
1 2
moat
1 2
DY
1 2
DY
1 2 1 2 1 2
DY
1 2 1 2 1 2
07/06 SD
Layout Note:
Tied at point only under Codec or near the Codec
AUD_PC_BEEP
SCD1U16V2KX-3GP
1D8V_S0
Q2704
DS
12
C2736
DY
G
Do Not Stuff
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R .O.C.
Taipei Hsien 221, Taiwan, R .O.C.
Bucky WHL
Bucky WHL
Bucky WHL
1
Taipei Hsien 221, Taiwan, R .O.C.
27 105Friday, July 13, 2018
27 105Friday, July 13, 2018
27 105Friday, July 13, 2018
SA
SA
SA
Title
Title
Title
Size
Size
Size
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Audio Codec ALC3204
Audio Codec ALC3204
Audio Codec ALC3204
Document Number Re v
Document Number Re v
Document Number Re v
A2
A2
A2
1D8V_S5
C2737
SCD1U16V2KX-3GP
12
Q4009_G
3D3V_S0
DY
12
R2737 Do Not Stuff
0602 Delete R2739
PM_SLP_S3#
1 2
R2740
Do Not Stuff
06/21 SD
A A
5
4
Q2705
G
S
2N7002K-2-GP
12
R2736 10KR2J-L-GP
1 2
R2738 4K7R2J-2-GP
D
1D8V_EN#
150mA
12
C2738 SCD22U10V2KX-L1-GP
SM2421PSANC-TRG-GP
084.02421.0031
1D8V_EN_R#
3
5
D D
C C
4
3
2
1
(Blanking)
B B
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size
Size
Size
Document Number R ev
Document Number R ev
Document Number R ev
A4
A4
A4
Date: Sheet o f
Date: Sheet o f
5
4
3
Date: Sheet o f
2
Bucky WHL
Bucky WHL
Bucky WHL
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
28 105Friday, July 13, 2018
28 105Friday, July 13, 2018
28 105Friday, July 13, 2018
1
SA
SA
SA
5
4
3
2
1
Main Func = Audio
Layout Note:
Speaker trace width >40mil @ 2W4ohm speaker power
AUD_SPK _R+27 AUD_SPK _R-27 AUD_SPK _L-27
D D
AUD_SPK _L+27
AUD_SPK _R+
AUD_SPK _R­AUD_SPK _L­AUD_SPK _L+
05/02 SC
12
EC2902
SC1KP50V2KX-1DLGP
12
EC2901
SC1KP50V2KX-1DLGP
12
EC2903
SC1KP50V2KX-1DLGP
1 2
R2904 Do Not Stuff
1 2
R2903 Do Not Stuff
1 2
R2901 Do Not Stuff
1 2
R2902 Do Not Stuff
06/21 SD
12
EC2904
SC1KP50V2KX-1DLGP
AUD_SPK _R+_C
AUD_SPK _R-_C AUD_SPK _L-_C AUD_SPK _L+_C
AUD_SPK _L-_C AUD_SPK _L+_C AUD_SPK _R-_C AUD_SPK _R+_C
Speaker
SPK1
5
1
2 3 4
6
ACES-CON 4-29-GP
20.F1639.004
020.F0097.0004
20.F1804 .004
1
AFTP290 1
1
AFTP290 2
1
AFTP290 3
1
AFTP290 4
CONN Pin
Pin1
Pin2
Pin3
Pin4
Net name
SPK_R +
SPK_R -
SPK_L -
SPK_L +
C C
1 2
1 2
12
C2902 Do Not Stuff
12
R2914 Do Not Stuff
AUD_AGN D
RN2901
2 3 1
SRN2K2J -1-GP
1 2
R2912 4K7R2J-2 -GP
1 2
R2913 4K7R2J-2 -GP
AUD_SEN SE 27
06/21 SD
4
1 2
R2908 10R2F-L1 -GP
1 2
R2910 10R2F-L1 -GP
12
ED2910
12
Do Not Stuff
DY
3
12
EC2908
SC100P50V2JN-3DLGP
DY
AUD_AGN D
Do Not Stuff
DY
EC2907
R2920
Do Not Stuff
12
AUD_AGN D AUD_AG ND
ED2911
ED2908
12
12
Do Not Stuff
DY
AUD_HP1 _JACK_R1
12
R2919
Do Not Stuff
SC100P50V2JN-3DLGP
DY
ED2909
12
Do Not Stuff
DY
R2906 Do Not Stuff R2907 Do Not Stuff
R2909 Do Not Stuff R2911 Do Not Stuff
EC2906
SC100P50V2JN-3DLGP
12
Do Not Stuff
EC2905
12
ED2907
12
Do Not Stuff
DY
2
12
DY
MIC2_VREF O27
AUD_RING27
AUD_HP1 _JACK_L27
LINE1_L27
LINE1_R27
AUD_HP1 _JACK_R2 7
AUD_SLE EVE27
LINE1_VRE FO2 7
B B
AUD_RING AUD_HP1 _JACK_L AUD_HP1 _JACK_L1 LINE1_L
AUD_HP1 _JACK_R AUD_SLE EVE
LINE1_VRE FO
1 2
C2907
SC4D7U6 D3V3KX-DLGP
1 2
C2908
D2901
3
BAT54A-1 1-GP
05/10 SC for common part
Delay circuit (JACK_PLUG_DET: on IO Board)
JACK_PL UG
A A
5
10 mils
4
Do Not Stuff
MIC2_VREF O
LINE1-L_C
LINE1-L_RLINE1_R
SC4D7U6 D3V3KX-DLGP
1
2
1 2
R2923
06/21 SD
JACK_PL UG_DET
10 mils
R2922 1KR2J-1-G P
R2921 1KR2J-1-G P
LINE1_VRE FO_D1
LINE1_VRE FO_D2
10 mils
DY
AUD_AGN D
Universal Jack (Moved to I/O Board)
1 2 1 2
1 2 1 2
SC100P50V2JN-3DLGP
07/06 SD
AUD_POR TA_R_HPMIC1 AUD_POR TA_L_HPMIC1 RING2_HPM IC1 JACK_PL UG JACK_PL UG_DET SLEEVE_ R
CLOSS TO HPMIC1
ED2912
05/09 SC EMI suggest
RING2_HPM IC1 AUD_POR TA_L_HPMIC1
JACK_PL UG
JACK_PL UG_DET AUD_POR TA_R_HPMIC1 SLEEVE_ R
AUD_AGN D
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Title
Title
Title
Size Do cument Numb er Re v
Size Do cument Numb er Re v
Size Do cument Numb er Re v
A3
A3
A3
Date : Sheet o f
Date : Sheet o f
Date : Sheet o f
Audio IO
Audio IO
Audio IO
Bucky WHL
Bucky WHL
Bucky WHL
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
SC 0529 CE quest
Audio(IP/NK comb)
022.1000 2.0Q31
1
AUD1
29 105
29 105
29 105
3 1
5 6 2 4
MS
AUDIO-JK66 2-GP-U
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SA
SA
SA
5
D D
C C
4
3
2
1
(Blanking)
B B
BV UMA TC TPM
BV UMA TC TPM
BV UMA TC TPM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
(Reserved)
(Reserved)
Size
Size
Size
A4
A4
A4
Date: Sheet o f
Date: Sheet o f
5
4
3
Date: Sheet o f
2
(Reserved)
Document Number R ev
Document Number R ev
Document Number R ev
Bucky WHL
Bucky WHL
Bucky WHL
Friday, July 13, 2018
Friday, July 13, 2018
Friday, July 13, 2018
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SA
SA
30 105
30 105
30 105
1
SA
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