Dell fx2mb d3a ns 0907a Schematics

A

B

C

D

E

PWA : UW521 PWB : UW509

Kirin (FX2 with NS)

1 1

VER : 3A

DDRII-SODIMM1

PG 7,8

DDRII-SODIMM2

PG 7,8

533 MHz DDR II

Dual-Core 35W / Single-Core 25W

AMD S1

Turion 64 Rev.F Dual-Core/ Sempron Rev.F Single-Core

(638 S1g1 socket)

PG 3,4,5,6

CPU VR

CLOCKS Thermal

Monitor

PG 13

PG 35

SYSTEM

PG 38

VCCP DDR II

PG 39 PG 40

BATT CHARGER

PG 36PG 37

AC/BATT Conn.

PG 41

RUN POWER SW

HT_LINK(800 MHz)

PCI-E(1)

Panel Connector

PG 18

2 2

VGA Conn.

LVDS

VGA

RS485 A12

465 FCBGA

PG 19

PG 9,10,11,12

SATA - HDD

PG 23

Fixed PATA ODD

PG 23

SATA II

IDE

A_LINK

SB600 A13

USB2.0(P1)

PCI-E(2)

USB2.0(P5)

USB2.0(P0,P2)

USB2.0(P4,P6)

BCM4401 (rev. B0)

PG 33 PG 34

549 BGA

3 3

AUDIO

PG 31

Audio Jacks

PG 32

MDC

PG 26

Tip Ring

PG 26

AC97/Azalia

PG 14,15,16,17

LPC

KBC

NS97551/87541

33MHz PCI

3 in 1 Card R5C832

PG 20,21 PG 22

PG 27

X-Bus

Express Card

PG 25

Mini Card (WLAN)

PG 24

USB Conn. Right Side x2

PG 28

USB Conn. Back side x2

PG 28

RJ45/Magnetics

3 in 1 Conn.

Mini PCI(for debug)

PG 42

AMD S1 Socket

Fan Conn

FX2 MB

K/B Conn.

ODD Conn.

VGA Conn.

Dash Conn.

ATI RS485M

R-BATT Conn.

TP Conn.

USB-3 USB-2

LCD Conn.

DDR II

LAN with

Modem

trancformet

LID SW Conn

ATI SB600

PCB1

Express Conn.

Mini Card Latch

Mini Card Conn.

SATA Conn.

BCM4401

Power Jack

R5C832

3 in 1 Conn.

USB-0,1

Phone Jack/MIC

KB

4 4

A

Conn.

PG 35

Touch Pad

PG 30

Flash ROM

SPK Conn.

Battery Conn.

PG 27

QUANTA

QUANTA COMPUTER

COMPUTER

Title

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Date: Sheet

COMPUTER

BLOCK DIAGRAM

FX2 3A

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151Thursday, September 07, 2006

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INDEX

1 1

2 2

3 3

Page Description

BLOCK DIAGRAM

1

FRONT PAGE

2

ATHLON64 HT I/F

3 4

ATHLON64 DDRII MEMORY

5

ATHLON64 CTRL & DEBUG

6

ATHLON64 PWR & GND

7

DDRII SODIMMX2 DDRII TERMINATION

8 9

RS485-HT LINK0 I/F

10

RS485-PCIE LINK I/F

11

RS485-LVDS

12

RS485-POWER

13

CLOCK GENERATOR

14

SB600M-PCIE/PCI/LPC

15

SB600M ACPI/USB/AC97

16

SB600M HDD/POWER

17

SB600M STRAPS

18

LCD CONN

19

CRT

20

5C832/PCI

21

CARD READER

22

CARD READER CONN

23

SATA HDD & PATA ODD

24

MINI Card

25

MINI Card

26

MDC CONN

27

PC87541 & FLASH

28

USB

29

EMI & Screw hole

30

SWITCH & TP & LED

31

Azelia CODEC

32

AUDIO CONN

33

LAN(BCM4401)

34

LAN JACK

35

KB & THERMAL & FAN

36

CHARGER (MAX8731)

37

VHCORE (MAX8774)

38

SYSTEM (MAX8734)

39

VCCP & DDR2 (MAX8743)

40

RUN POWER SW

41

DCIN,Batt

42

MINI PCI(for debug)

43

Power On Sequence

44

Power On Diagram

45

SMBUS BLOCK

4 4

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

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D

Date: Sheet

COMPUTER

FRONT PAGE

FX2 1A

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251Thursday, September 07, 2006

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4

3

2

1

D D

HT_CADIN15_P(9) HT_CADIN15_N(9) HT_CADIN14_P(9) HT_CADIN14_N(9) HT_CADIN13_P(9)

C C

B B

VLDT_RUN

HT_CADIN13_N(9) HT_CADIN12_P(9) HT_CADIN12_N(9) HT_CADIN11_P(9) HT_CADIN11_N(9) HT_CADIN10_P(9) HT_CADIN10_N(9) HT_CADIN9_P(9) HT_CADIN9_N(9) HT_CADIN8_P(9) HT_CADIN8_N(9) HT_CADIN7_P(9) HT_CADIN7_N(9) HT_CADIN6_P(9) HT_CADIN6_N(9) HT_CADIN5_P(9) HT_CADIN5_N(9) HT_CADIN4_P(9) HT_CADIN4_N(9) HT_CADIN3_P(9) HT_CADIN3_N(9) HT_CADIN2_P(9) HT_CADIN2_N(9) HT_CADIN1_P(9) HT_CADIN1_N(9) HT_CADIN0_P(9) HT_CADIN0_N(9)

HT_CLKIN1_P(9) HT_CLKIN1_N(9) HT_CLKIN0_P(9) HT_CLKIN0_N(9)

R2 49.9/FR2 49.9/F

49.9/FR149.9/F

R1

HT_CTLIN0_P(9) HT_CTLIN0_N(9)

PROCESSOR HYPERTRANSPORT INTERFACE

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

VLDT_RUN

U1AU1A

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

Athlon 64 S1 Processor Socket

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

T5 R5

R2 R3

HT_CPU_CTLOUT1_PHT_CTLIN1_P HT_CPU_CTLOUT1_NHT_CTLIN1_N

C1

4.7U_6.3V_0603

HT_CADOUT15_P (9) HT_CADOUT15_N (9) HT_CADOUT14_P (9) HT_CADOUT14_N (9) HT_CADOUT13_P (9) HT_CADOUT13_N (9) HT_CADOUT12_P (9) HT_CADOUT12_N (9) HT_CADOUT11_P (9) HT_CADOUT11_N (9) HT_CADOUT10_P (9) HT_CADOUT10_N (9) HT_CADOUT9_P (9) HT_CADOUT9_N (9) HT_CADOUT8_P (9) HT_CADOUT8_N (9) HT_CADOUT7_P (9) HT_CADOUT7_N (9) HT_CADOUT6_P (9) HT_CADOUT6_N (9) HT_CADOUT5_P (9) HT_CADOUT5_N (9) HT_CADOUT4_P (9) HT_CADOUT4_N (9) HT_CADOUT3_P (9) HT_CADOUT3_N (9) HT_CADOUT2_P (9) HT_CADOUT2_N (9) HT_CADOUT1_P (9) HT_CADOUT1_N (9) HT_CADOUT0_P (9) HT_CADOUT0_N (9)

HT_CLKOUT1_P (9) HT_CLKOUT1_N (9) HT_CLKOUT0_P (9) HT_CLKOUT0_N (9)

T1T1 T2T2

HT_CTLOUT0_P (9) HT_CTLOUT0_N (9)

+1.2V_VCCP

L1

L1 FBJ3216HS800_1206

FBJ3216HS800_1206

80 ohm(4A)

L2

L2 FBJ3216HS800_1206

FBJ3216HS800_1206

VLDT_RUN

C2

4.7U_6.3V_0603

C3

4.7U_6.3V_0603

C4

.22U_6.3V

C5

.22U_6.3V

12

C6

180P_50V

12

C7

180P_50V

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS

A A

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

ATHLON64 HT I/F

FX2 2B

351Thursday, September 07, 2006

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B

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D

E

C9 1000p_50VC91000p_50V

U1B

MEMVREF

VTT_SENSE

MEMZN MEMZP

MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0

MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0

MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0

MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0

MA_BANK2 MA_BANK1 MA_BANK0

MA_RAS_L MA_CAS_L MA_WE_L

C15

.22U_6.3V

C23

180P_50V

+1.8V_SUS

R3 2K/FR32K/F

R4 2K/FR42K/F

MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1

MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1

MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

DDR II: CMD/CTRL/CLK

Athlon 64 S1 Processor Socket

C16

.22U_6.3V

C24

180P_50V

VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9

MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_WE_L

B

D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10

Y16 AA16 E16 F16

AF18 AF17 A17 A18

W23 W26 V20 U19

J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24

K26 T26 U26

U24 V26 U22

C17

.22U_6.3V

C25

180P_50V

+0.9V_DDR_VTT

M_B_A15 M_B_A14 M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0

M_CLKOUT1 (7) M_CLKOUT1# (7) M_CLKOUT0 (7) M_CLKOUT0# (7)

M_CLKOUT4 (7) M_CLKOUT4# (7) M_CLKOUT3 (7) M_CLKOUT3# (7)

M_ODT3 (7,8) M_ODT2 (7,8) M_ODT1 (7,8) M_ODT0 (7,8)

M_B_A[0..15] (7,8)

M_B_BS#2 (7,8) M_B_BS#1 (7,8) M_B_BS#0 (7,8)

M_B_RAS# (7,8) M_B_CAS# (7,8) M_B_WE# (7,8)

M_B_DQ[0..63](7)

To SODIMM socket B (Far)

M_B_DM[0..7](7) M_A_DM[0..7] (7)

M_B_DQS[0..7](7)

M_B_DQS#[0..7](7)

C

Processor DDR2 Memory Interface

U1C

M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40 M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24 M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8 M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DM7 M_B_DM6 M_B_DM5 M_B_DM4 M_B_DM3 M_B_DM2 M_B_DM1 M_B_DM0

M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0

AD11 AF11 AF14 AE14

AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24

AD12 AC16 AE22 AB26

AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26

Y11

G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11

E25 A22 B16 A12

F26 E26 A24 A23 D16 C16 C12 B12

U1C

MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0

MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0

MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0

Athlon 64 S1 Processor Socket

D

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

DDR: DATA

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

Y13 AB16 Y19 AC24 F24 E19 C15 E12

W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32 M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16 M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8 M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0

M_A_DM7 M_A_DM6 M_A_DM5 M_A_DM4 M_A_DM3 M_A_DM2 M_A_DM1 M_A_DM0

M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0

M_A_DQS[0..7](7)

M_A_DQS#[0..7](7)

Title

Size Document Number Rev

Date: Sheet

M_A_DQ[0..63] (7)

To SODIMM socket A (near)

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

QUANTA

QUANTA COMPUTER

COMPUTER

ATHLON64 DDRII MEMORY

FX2 2B

E

451Thursday, September 07, 2006

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VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

12

M_CKE3(7,8) M_CKE2(7,8) M_CKE1(7,8) M_CKE0(7,8)

M_A_BS#2(7,8) M_A_BS#1(7,8) M_A_BS#0(7,8)

M_A_RAS#(7,8) M_A_CAS#(7,8)

M_A_WE#(7,8)

CPU_M_VREF

R566 0R566 0

M_ZN M_ZP

C13

4.7U_6.3V_0603

C21

1000p_50V

M_A_A15 M_A_A14 M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0

C14

.22U_6.3V

C22

180P_50V

C8 .1U_10VC8.1U_10V

W17

AE10 AF10

W24

M19 M20 M24 M22

Y10

V19 J22 V22 T19

Y26 J24

U23

H26 J23 J20 J21

K19 K20 V24 K24 L20 R19 L19 L22 L21

N22 N21 R21

K22 R20 T22

T20 U20 U21

4 4

C677

470P_50V

C12

4.7U_6.3V_0603

C20

1000p_50V

A

VTT_SENSE

M_A_CS#3(7,8) M_A_CS#2(7,8) M_A_CS#1(7,8) M_A_CS#0(7,8)

M_B_CS#3(7,8) M_B_CS#2(7,8) M_B_CS#1(7,8) M_B_CS#0(7,8)

M_A_A[0..15](7,8)

+0.9V_DDR_VTT

VTT_SENSE(39)

+1.8V_SUS

R6

39.2/FR639.2/F

1 2

R5

39.2/FR539.2/F

1 2

PLACE THEM CLOSE TO CPU WITHIN 1"

3 3

2 2

C10

4.7U_6.3V_0603

1 1

C18

1000p_50V

C11

4.7U_6.3V_0603

C19

1000p_50V

5

LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

CPU_VDDA_RUN

C26

D D

C C

C26

4.7U_6.3V_0603

CPUCLK(13)

CPUCLK#(13)

R14 close U1 within 600 mil , C30 & C31 close U1 within 1250 mil

CPU_PWRGD(14)

LDT_STOP#(11,14)

LDT_RST#(14)

33 ohm(3A)

BLM18PG330SN1D_0603

C27

.22U_6.3V

C30 3900p_25VC30 3900p_25V

R14

169/F_0603

C31 3900p_25VC31 3900p_25V

R19 0R19 0

12

R525

R525 10K

10K

R20 0R20 0

12

R526

R526 10K

10K

R527 0R527 0

12

R528

R528 10K

10K

L3

C28

3900p_25V

C29

100U_6.3V_3528

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

CPU_ALL_PWROK

CPU_LDTSTOP#

CPU_HT_RESET#

+2.5V_RUN

R527 can be used for EMI verifing, place close to CPU

4

If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300-Ω (±5%) pulldown to VSS.

+1.8V_SUS

for CPU rev.F , if for rev.G , populate R7,R9,R523,R524 and depopulate R10

R7 *300_NCR7 *300_NC R9 *300_NCR9 *300_NC

R10 300R10 300

R523 *0_NCR523 *0_NC

CPU_SIC(14) CPU_SID(14)

R524 *0_NCR524 *0_NC

CPU_SIC_R CPU_SID_R

place them to CPU within 1"

CPU_TEST5_THERMDC(35)

CPU_TEST4_THERMDA(35)

To Power

3

ATHLON Control and Debug

C707

470P_50V

COREFB+V(37)

COREFB-(37)

12

VLDT_RUN

CPU_TEST5_THERMDC CPU_TEST4_THERMDA

VDDIO_FB_H(39)

R13 44.2/FR13 44.2/F

R12 44.2/FR12 44.2/F

470P_50V

T13T13 T12T12

T15T15 T16T16

T19T19 T21T21

T24T24

T26T26 T28T28

T34T34 T36T36 T35T35 T37T37

CPU_HT_RESET#

T6T6

CPU_ALL_PWROK

T5T5

CPU_LDTSTOP#

T7T7

T8T8

T4T4

VDDIO_FB_H

12

C678

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

CPU_DBRDY

CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_TEST17_BP3 CPU_TEST16_BP2

CPU_TEST07_ANALOG_T CPU_TEST6_DIECRACKMON

CPU_TEST3_GATE0 CPU_TEST2_DRAIN0

CPU_RSVD_MA0_CLK3_P CPU_RSVD_MA0_CLK3_N CPU_RSVD_MA0_CLK0_P CPU_RSVD_MA0_CLK0_N

CPU_RSVD_MB0_CLK3_P CPU_RSVD_MB0_CLK3_N CPU_RSVD_MB0_CLK0_P CPU_RSVD_MB0_CLK0_N

CPU_VDDA_RUN

CPU_SIC_R CPU_SID_R

CPU_HTREF1 CPU_HTREF0

R567 0R567 0

F10

AF4 AF5

W9

G10

AA9 AC9 AD9 AF9

H10 AA7

AC8

AA6

W7 W8

AB6

P20 P19 N20 N19

R26 R25 P22 R22

F8 F9

B7 A7

P6 R6

F6 E6

Y9

A9 A8

E9 E8 G9

C2 D7 E7 F7 C7

C3

Y6

U1D

VDDA2 VDDA1

RESET_L PWROK LDTSTOP_L

SIC SID

HT_REF1 HT_REF0

VDD_FB_H VDD_FB_L

VDDIO_FB_H VDDIO_FB_L

CLKIN_H CLKIN_L

DBRDY

TMS TCK TRST_L TDI

TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12

TEST7 TEST6 TEST5 TEST4 TEST3 TEST2

RSVD0 RSVD1 RSVD2 RSVD3

RSVD4 RSVD5 RSVD6 RSVD7

2

+1.8V_SUS

R551

300

H_THERMTRIP#

AF6

MISC

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

TEST29_H

TEST29_L

TEST28_H

TEST28_L

H_PROCHOT#

AC7

A5

VID5

C6

VID4

A6

VID3

A4

VID2

C5

VID1

B5

VID0

CPU_PRESENT#

AC6

A3

PSI_L

PSI_L is a Power Status Indicator signal. This signal is asserted when the processor is in a low powerstate. PSI_L should be connected to the power supply controller, if the controller supports “skipmode, or diode emulation mode”. PSI_L is asserted by the processor during the C3 and S1 states.

CPU_DBREQ#

E10

DBREQ_L

TEST24 TEST23 TEST22 TEST21 TEST20

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

TDO

CPU_TDO

AE9

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

AE7

CPU_TEST23_TSTUPD

AD7 AE8

CPU_TEST21_SCANEN

AB8 AF7

CPU_TEST28_H_PLLCHRZ_P

J7

CPU_TEST28_L_PLLCHRZ_N

H8 AF8

CPU_TEST26_BURNIN#

AE6

CPU_TEST10_ANALOGOUT

K8

CPU_TEST08_DIG_T

C4

CPU_MA_RESET#

H16

CPU_MB_RESET#

B18

CPU_RSVD_VIDSTRB1

B3

CPU_RSVD_VIDSTRB0

C1

CPU_RSVD_VDDNB_FB_P

H6

CPU_RSVD_VDDNB_FB_N

G6

CPU_RSVD_CORE_TYPE

D5

R24 W18 R23 AA8 H18 H19

PSI# (37)

T11T11

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

R8

300R8300

R16 80.6/FR16 80.6/F

1

H_THERMTRIP# (35)

VID5 (37) VID4 (37) VID3 (37) VID2 (37) VID1 (37) VID0 (37)

T14T14

T18T18 T17T17

T20T20 T22T22

T25T25 T27T27T23T23

T30T30 T29T29

T31T31 T32T32 T33T33

AMD NPT S1 SOCKET

+1.8V_SUS

2

Processor Socket

HDT connector is added for debug convenience.

HDT CONNECTOR

JHDT1

GND1GND Resreved3GND

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

Resreved5GND DBREQ_L7GND DBRDY9GND TCK11GND TMS13GND

15

TDI TRST_L17GND TDO19GND VDDIO21GND VDDIO23RESET_L

R580

*10K_NC

1

R581

+1.8V_SUS+3.3V_SUS

Q55

2

*MMBT3904_NC

CPU_HT_RESET#CPU_RESET#

13

551Thursday, September 07, 2006

2 4 6 8 10 12 14

*10K_NC

16

GND

18 20 22 24 25

GND

*HDT conn_NC

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ATHLON64 CTRL & DEBUG

FX2 2B

of

B B

+1.8V_RUN

2

R24

10K

Q2 MMBT3904Q2MMBT3904

13

*MMBT3904_NC

*MMBT3904_NC Q49

Q49

CPU_EC_PROCHOT# (27)

CPU_PROCHOT# (15)

CPU_TEST26_BURNIN# CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H

CPU_TEST21_SCANEN CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

If no use which Net need pull-up or down

R22 300R22 300 R25 1K/FR25 1K/F R26 510/FR26 510/F

R32 300R32 300 R44 510/FR44 510/F R45 300R45 300 R46 300R46 300

+1.8V_SUS

R27

300

H_PROCHOT#

+1.8V_SUS

SB this pin is 3.3V,need it level-shift.

A A

5

4

3

5

+VCC_CORE +VCC_CORE

D D

C C

B B

A1

AC4 AD2

M10

N11

R11

U11 U13

G4

H2

J9 J11 J13

K6 K10 K12 K14

L4 L7

L9 L11 L13

M2 M6 M8

N7 N9

P8

P10

R4 R7 R9

T2 T6

T8 T10 T12 T14

U7

U9

V6

V8 V10

U1E

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42

Athlon 64 S1 Processor Socket

POWER

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8

VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

+1.8V_SUS

A26

AA4 AA11 AA13 AA15 AA17 AA19

AB2

AB7

AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD6

AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

B4 B6 B8 B9

D6 D8 D9

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7

H9

J4

U1F

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

Athlon 64 S1 Processor Socket

4

GROUND

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3

BOTTOM SIDE DECOUPLING

+VCC_CORE

C39

+VCC_CORE

+1.8V_SUS

C37

22U_10V_0805

C44

22U_10V_0805

C50

22U_10V_0805

C38

22U_10V_0805

C45

22U_10V_0805

C51

22U_10V_0805

C39

22U_10V_0805

C46

.22U_6.3V

C52

.22U_6.3V

C40

22U_10V_0805

C47

.22U_6.3V

C53

.22U_6.3V

C41

22U_10V_0805

C48

.01U_16V

C42

22U_10V_0805

C49

180P_50V

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8V_SUS

C56

C54

4.7U_6.3V_0603

+1.8V_SUS

C62

.01U_25V

C55

4.7U_6.3V_0603

C63

.01U_25V

C56

4.7U_6.3V_0603

C64

10P_50V

C57

4.7U_6.3V_0603

C65

180P_50V

C58

.22U_6.3V

C66

180P_50V

C59

.22U_6.3V

12

C647

180P_50V

2

C43

22U_10V_0805

C61

C60

.22U_6.3V

12

C648

180P_50V

C61

.22U_6.3V

1

Athlon 64 S1g1

uPGA638

A A

Top View

AF1

5

4

PROCESSOR POWER AND GROUND

Title

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

ATHLON64 PWR & GND

FX2 2B

1

of

651Thursday, September 07, 2006

A

B

C

D

E

+1.8V_SUS

JDIM1

117

M_A_A[0..15](4,8)

4 4

M_A_BS#0(4,8) M_A_BS#1(4,8) M_A_BS#2(4,8)

M_A_DM[0..7](4)

3 3

M_A_DQS[0..7](4)

M_A_DQS#[0..7](4)

M_CLKOUT0(4)

M_CLKOUT0#(4)

M_CLKOUT1(4)

M_CLKOUT1#(4)

M_CLKOUT0

C78

1.5P_50V

M_CLKOUT0#

2 2

M_CLKOUT1

C82

1.5P_50V

M_CLKOUT1#

SMBDT(13) SMBCK(13)

+3.3V_RUN

1 1

+1.8V_SUS

C92 .1U_10VC92 .1U_10V

2.2U_10V_0805

M_A_RAS#(4,8) M_A_CAS#(4,8)

M_A_WE#(4,8) M_A_CS#0(4,8) M_A_CS#1(4,8)

SMBUS Address [A0]

C89 .1U_10VC89 .1U_10V

C94

1 2

M_A_A0

102

M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM5 M_A_DM4 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS5 M_A_DQS4 M_A_DQS6 M_A_DQS7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#5 M_A_DQS#4 M_A_DQS#6 M_A_DQS#7

M_CKE0(4,8) M_CKE1(4,8)

M_ODT0(4,8) M_ODT1(4,8)

C98

C98 .1U_10V

.1U_10V

A

A0

101

A1

1

2 3 8 9

A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

BA0 BA1 BA2

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

CK0 CK0 CK1 CK1

CKE0 CKE1

RAS CAS WE S0 S1

ODT0 ODT1

SA0 SA1

SDA SCL

VDDspd

VREF

VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

59

100

99 98 97 94 92 93 91

105

90 89

116

86 84

107 106

85

10 26 52

67 130 147 170 185

13

31

51

70 131 148 169 188

11

29

49

68 129 146 167 186

30

32 164 166

79

80

108 113 109 110 115

114 119

198 200

195 197

199

12

15

18

21

24

27

28

33

34

39

40

41

42

47

48

53

54

118

103

111

104

112

VDD8

VDD7

VDD9

VDD10

VDD11

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59

PC4200 DDR2 SDRAM

DQ60

SO-DIMM (200P)

DQ61 DQ62 DQ63

NC/TEST

VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

FOXCONN_AS0A426-N4SN-7F

132

128

127

122

121

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

NC1 NC2 NC3 NC4

5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

50 69 83 120 163

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133

B

M_A_DQ0 M_A_DQ4 M_A_DQ6 M_A_DQ3 M_A_DQ1 M_A_DQ5 M_A_DQ2 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ15 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ10 M_A_DQ14 M_A_DQ22 M_A_DQ19 M_A_DQ18 M_A_DQ16 M_A_DQ17 M_A_DQ20 M_A_DQ21 M_A_DQ23 M_A_DQ25 M_A_DQ24 M_A_DQ30 M_A_DQ27 M_A_DQ29 M_A_DQ28 M_A_DQ26 M_A_DQ31 M_A_DQ46 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ42 M_A_DQ47 M_A_DQ41 M_A_DQ40 M_A_DQ32 M_A_DQ38 M_A_DQ34 M_A_DQ39 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ33 M_A_DQ48 M_A_DQ49 M_A_DQ54 M_A_DQ55 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ56 M_A_DQ57 M_A_DQ59 M_A_DQ58 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ62

M_A_CS#2 (4,8) M_A_CS#3 (4,8)

+0.9V_REF

R54

R54 *0_NC

*0_NC

C103

1U_10V

M_A_DQ[0..63] (4)

+1.8V_SUS

M_CLKOUT3

C76

1.5P_50V

M_CLKOUT3#

M_CLKOUT4

C83

1.5P_50V

M_CLKOUT4#

R55

R55 1K/F

1K/F

R56

R56 1K/F

1K/F

MVREF_DIM

M_B_A[0..15](4,8)

M_B_BS#0(4,8) M_B_BS#1(4,8) M_B_BS#2(4,8)

M_B_DM[0..7](4)

M_B_DQS[0..7](4)

M_B_DQS#[0..7](4)

M_CLKOUT3(4)

M_CLKOUT3#(4)

M_CLKOUT4(4)

M_CLKOUT4#(4)

+3.3V_RUN

SMBUS Address [A4]

+3.3V_RUN

C90 .1U_10VC90 .1U_10V

C95

2.2U_10V_0805

1 2

C

M_CLKOUT3 M_CLKOUT3# M_CLKOUT4 M_CLKOUT4#

M_CKE2(4,8) M_CKE3(4,8)

M_B_RAS#(4,8) M_B_CAS#(4,8)

M_B_WE#(4,8) M_B_CS#0(4,8) M_B_CS#1(4,8)

M_ODT2(4,8) M_ODT3(4,8)

R53 0R53 0 R52 10KR52 10K

SMBDT SMBCK

C87 .1U_10VC87 .1U_10V

MVREF_DIMMVREF_DIM

C96

C96 .1U_10V

.1U_10V

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM7 M_B_DM4 M_B_DM5 M_B_DM6

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS7 M_B_DQS4 M_B_DQS5 M_B_DQS6

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#7 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10

90

A11

89

A12

116

A13

86

A14

84

A15

107

BA0

106

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3

129

DQS4

146

DQS5

167

DQS6

186

DQS7

30

CK0

32

CK0

164

CK1

166

CK1

79

CKE0

80

CKE1

108

RAS

113

CAS

109

WE

110

S0

115

S1

114

ODT0

119

ODT1

198

SA0

200

SA1

195

SDA

197

SCL

199

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

+1.8V_SUS

JDIM2

117

118

103

111

104

112

DQ0

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

59

VDD7

PC4200 DDR2 SDRAM

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

DQ1

VDD8

VDD9

DQ2

VDD10

VDD11

DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60

SO-DIMM (200P)

DQ61 DQ62 DQ63

NC1

NC2

NC3

NC4

NC/TEST

VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

FOXCONN_AS0A426-N4RN-7F

132

128

127

122

121

D

M_B_DQ5

5

M_B_DQ1

7

M_B_DQ2

17

M_B_DQ3

19

M_B_DQ0

4

M_B_DQ4

6

M_B_DQ6

14

M_B_DQ7

16

M_B_DQ9

23

M_B_DQ13

25

M_B_DQ11

35

M_B_DQ14

37

M_B_DQ8

20

M_B_DQ12

22

M_B_DQ15

36

M_B_DQ10

38

M_B_DQ16

43

M_B_DQ21

45

M_B_DQ23

55

M_B_DQ19

57

M_B_DQ20

44

M_B_DQ17

46

M_B_DQ18

56

M_B_DQ22

58

M_B_DQ29

61

M_B_DQ25

63

M_B_DQ27

73

M_B_DQ26

75

M_B_DQ24

62

M_B_DQ28

64

M_B_DQ31

74

M_B_DQ30

76

M_B_DQ58

123

M_B_DQ57

125

M_B_DQ61

135

M_B_DQ60

137

M_B_DQ59

124

M_B_DQ63

126

M_B_DQ62

134

M_B_DQ56

136

M_B_DQ34

141

M_B_DQ37

143

M_B_DQ38

151

M_B_DQ39

153

M_B_DQ33

140

M_B_DQ32

142

M_B_DQ36

152

M_B_DQ35

154

M_B_DQ45

157

M_B_DQ44

159

M_B_DQ46

173

M_B_DQ42

175

M_B_DQ41

158

M_B_DQ40

160

M_B_DQ47

174

M_B_DQ43

176

M_B_DQ52

179

M_B_DQ49

181

M_B_DQ50

189

M_B_DQ51

191

M_B_DQ48

180

M_B_DQ54

182

M_B_DQ55

192

M_B_DQ53

194

50 69 83 120 163

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133

M_B_DQ[0..63] (4)

+1.8V_SUS

*10U_6.3V_0805_NCC67 *10U_6.3V_0805_NCC67

*10U_6.3V_0805_NCC68 *10U_6.3V_0805_NCC68

10U_10V_0805C69 10U_10V_0805C69

10U_10V_0805C70 10U_10V_0805C70

.1U_10VC71 .1U_10VC71

.1U_10VC72 .1U_10VC72

.1U_10VC73 .1U_10VC73

.1U_10VC74 .1U_10VC74

.1U_10VC75 .1U_10VC75

.1U_10VC77 .1U_10VC77

.1U_10VC79 .1U_10VC79

.1U_10VC80 .1U_10VC80

.1U_10VC81 .1U_10VC81

.1U_10VC84 .1U_10VC84

.1U_10VC85 .1U_10VC85

M_B_CS#2 (4,8) M_B_CS#3 (4,8)

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

DDRII SODIMMX2

FX2 2B

.1U_10VC86 .1U_10VC86

.1U_10VC88 .1U_10VC88

.1U_10VC91 .1U_10VC91

.1U_10VC93 .1U_10VC93

.1U_10VC97 .1U_10VC97

.1U_10VC99 .1U_10VC99

.1U_10VC100 .1U_10VC100

.1U_10VC101 .1U_10VC101

.1U_10VC102 .1U_10VC102

751Thursday, September 07, 2006

of

E

of

1

A A

B B

+0.9V_DDR_VTT

*10U_6.3V_0805_NCC104 *10U_6.3V_0805_NCC104

*10U_6.3V_0805_NCC105 *10U_6.3V_0805_NCC105

.1U_10VC106 .1U_10VC106 .1U_10VC108 .1U_10VC108 .1U_10VC107 .1U_10VC107 .1U_10VC109 .1U_10VC109 RP5 4P2R-47RP5 4P2R-47 .1U_10VC111 .1U_10VC111 .1U_10VC110 .1U_10VC110 .1U_10VC112 .1U_10VC112 .1U_10VC114 .1U_10VC114 .1U_10VC113 .1U_10VC113 *.1U_10V_NCC116 *.1U_10V_NCC116

C C

*.1U_10V_NCC115 *.1U_10V_NCC115 .1U_10VC118 .1U_10VC118 .1U_10VC117 .1U_10VC117 .1U_10VC119 .1U_10VC119 .1U_10VC120 .1U_10VC120 .1U_10VC122 .1U_10VC122 *.1U_10V_NCC121 *.1U_10V_NCC121 .1U_10VC123 .1U_10VC123 .1U_10VC125 .1U_10VC125 .1U_10VC124 .1U_10VC124 *.1U_10V_NCC126 *.1U_10V_NCC126 .1U_10VC128 .1U_10VC128 .1U_10VC127 .1U_10VC127 .1U_10VC129 .1U_10VC129 *.1U_10V_NCC131 *.1U_10V_NCC131 .1U_10VC130 .1U_10VC130

2

3

M_A_A[0..15](4,7)

M_B_A[0..15](4,7)

4

M_CKE0(4,7) M_CKE1(4,7) M_CKE2(4,7) M_CKE3(4,7)

M_ODT0(4,7) M_ODT1(4,7) M_ODT2(4,7) M_ODT3(4,7)

M_A_BS#0(4,7) M_A_BS#1(4,7) M_A_BS#2(4,7)

M_A_WE#(4,7) M_A_CAS#(4,7) M_A_RAS#(4,7)

M_B_BS#0(4,7) M_B_BS#1(4,7) M_B_BS#2(4,7)

M_B_WE#(4,7) M_B_CAS#(4,7) M_B_RAS#(4,7)

M_A_CS#0(4,7) M_A_CS#1(4,7) M_A_CS#2(4,7) M_A_CS#3(4,7)

M_B_CS#0(4,7) M_B_CS#1(4,7) M_B_CS#2(4,7) M_B_CS#3(4,7)

M_A_A13 M_A_A10 M_A_A0 M_A_A2 M_A_A4 M_A_A6 M_A_A7 M_A_A11 M_A_A12 M_A_A9 M_A_A3 M_A_A1 M_A_A8 M_A_A5 M_A_A14 M_A_A15

M_B_A0 M_B_A2 M_B_A4 M_B_A6 M_B_A7 M_B_A11 M_B_A3 M_B_A1 M_B_A8 M_B_A5 M_B_A12 M_B_A9 M_B_A10 M_B_A13 M_B_A14 M_B_A15

M_A_BS#0 M_A_BS#1 M_A_BS#2

M_A_WE# M_A_CAS# M_A_RAS#

M_B_BS#0 M_B_BS#1 M_B_BS#2

M_B_WE# M_B_CAS# M_B_RAS#

5

R57 47R57 47 R59 47R59 47 R58 47R58 47 R60 47R60 47

R61 47R61 47 R62 47R62 47 R64 47R64 47 R63 47R63 47

R66 47R66 47 R65 47R65 47 R67 47R67 47

R68 47R68 47 R70 47R70 47 R69 47R69 47

R71 47R71 47 R73 47R73 47 R72 47R72 47

R75 47R75 47 R74 47R74 47 R76 47R76 47

R77 47R77 47 R79 47R79 47 R78 47R78 47 R80 47R80 47

R81 47R81 47 R83 47R83 47 R82 47R82 47 R84 47R84 47

R85 47R85 47 R86 47R86 47

RP1 4P2R-47RP1 4P2R-47

1 2 3 4

RP2 4P2R-47RP2 4P2R-47

1 2 3 4

RP3 4P2R-47RP3 4P2R-47

1 2 3 4

RP4 4P2R-47RP4 4P2R-47

1 2 3 4 1 2 3 4

RP6 4P2R-47RP6 4P2R-47

1 2 3 4

RP7 4P2R-47RP7 4P2R-47

1 2 3 4

RP8 4P2R-47RP8 4P2R-47

1 2 3 4

RP9 4P2R-47RP9 4P2R-47

1 2 3 4

RP10 4P2R-47RP10 4P2R-47

1 2 3 4

RP11 4P2R-47RP11 4P2R-47

1 2 3 4

RP12 4P2R-47RP12 4P2R-47

1 2 3 4

RP13 4P2R-47RP13 4P2R-47

1 2 3 4

R87 47R87 47 R88 47R88 47 RP14 4P2R-47RP14 4P2R-47

1 2 3 4

+0.9V_DDR_VTT

6

7

8

D D

Title

Size Document Number Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

DDRII TERMINATION

FX2 1A

851Thursday, September 07, 2006

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7

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8

5

D D

HT_CADOUT15_P(3) HT_CADOUT15_N(3) HT_CADOUT14_P(3) HT_CADOUT14_N(3) HT_CADOUT13_P(3) HT_CADOUT13_N(3) HT_CADOUT12_P(3) HT_CADOUT12_N(3) HT_CADOUT11_P(3) HT_CADOUT11_N(3) HT_CADOUT10_P(3) HT_CADOUT10_N(3) HT_CADOUT9_P(3) HT_CADOUT9_N(3) HT_CADOUT8_P(3)

C C

B B

VDDHT_PKG

HT_CADOUT8_N(3)

HT_CADOUT7_P(3) HT_CADOUT7_N(3) HT_CADOUT6_P(3) HT_CADOUT6_N(3) HT_CADOUT5_P(3) HT_CADOUT5_N(3) HT_CADOUT4_P(3) HT_CADOUT4_N(3) HT_CADOUT3_P(3) HT_CADOUT3_N(3) HT_CADOUT2_P(3) HT_CADOUT2_N(3) HT_CADOUT1_P(3) HT_CADOUT1_N(3) HT_CADOUT0_P(3) HT_CADOUT0_N(3)

HT_CLKOUT1_P(3) HT_CLKOUT1_N(3)

HT_CLKOUT0_P(3) HT_CLKOUT0_N(3)

HT_CTLOUT0_P(3) HT_CTLOUT0_N(3)

R89 49.9/FR89 49.9/F R91 100/FR91 100/F

R90

49.9/F

4

HT_RXCALP HT_RXCALN

R19 R18 R21 R22 U22 U21 U18

U19 W19 W20

AC21 AB22 AB20 AA20 AA19

Y19

T24

R25

U25

U24

V23

U23

V24

V25

AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25

W21 W22

Y24 W25

P24

P25

A24

C24

U6A

HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N

HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N

HT_RXCLK1P HT_RXCLK1N

HT_RXCLK0P HT_RXCLK0N

HT_RXCTLP HT_RXCTLN

HT_RXCALP HT_RXCALN

RS485M A12 HT

3

PART 1 OF 5

HYPER TRANSPORT CPU I/F

HT_TXCAD15P

HT_TXCAD15N

HT_TXCAD14P

HT_TXCAD14N

HT_TXCAD13P

HT_TXCAD13N

HT_TXCAD12P

HT_TXCAD12N

HT_TXCAD11P

HT_TXCAD11N

HT_TXCAD10P

HT_TXCAD10N

HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N

HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCTLP HT_TXCTLN

HT_TXCALP HT_TXCALN

P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22

N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25

L21 L22

J24 J25

N23 P23

C25 D24

HT_TXCALP HT_TXCALN

HT_CADIN15_P (3) HT_CADIN15_N (3) HT_CADIN14_P (3) HT_CADIN14_N (3) HT_CADIN13_P (3) HT_CADIN13_N (3) HT_CADIN12_P (3) HT_CADIN12_N (3) HT_CADIN11_P (3) HT_CADIN11_N (3) HT_CADIN10_P (3) HT_CADIN10_N (3) HT_CADIN9_P (3) HT_CADIN9_N (3) HT_CADIN8_P (3) HT_CADIN8_N (3)

HT_CADIN7_P (3) HT_CADIN7_N (3) HT_CADIN6_P (3) HT_CADIN6_N (3) HT_CADIN5_P (3) HT_CADIN5_N (3) HT_CADIN4_P (3) HT_CADIN4_N (3) HT_CADIN3_P (3) HT_CADIN3_N (3) HT_CADIN2_P (3) HT_CADIN2_N (3) HT_CADIN1_P (3) HT_CADIN1_N (3) HT_CADIN0_P (3) HT_CADIN0_N (3)

HT_CLKIN1_P (3) HT_CLKIN1_N (3)

HT_CLKIN0_P (3) HT_CLKIN0_N (3)

HT_CTLIN0_P (3) HT_CTLIN0_N (3)

2

1

A A

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

RS485-HT LINK0 I/F

FX2 1A

951Thursday, September 07, 2006

of

1

of

5

4

3

2

1

C133

*.1U_25V_NC

C142

*.1U_10V_NC

C393

*.1U_10V_NC

C400

*.1U_10V_NC

+3.3V_LAN

C134

*.1U_25V_NC

+PWR_SRC

C143

*.1U_25V_NC

+1.8V_SUS

C394

*.1U_10V_NC

+0.9V_DDR_VTT

+1.8V_SUS

C420

*.1U_10V_NC

+0.9V_DDR_VTT

C135

*.1U_25V_NC

+1.8V_SUS +1.8V_SUS +1.8V_SUS

C144

*.1U_10V_NC

+PWR_SRC

+1.8V_SUS

+0.9V_DDR_VTT

+1.8V_SUS

+0.9V_DDR_VTT

C395

*.1U_10V_NC

C421

*.1U_10V_NC

+1.8V_SUS

+0.9V_DDR_VTT

+1.8V_SUS

+0.9V_DDR_VTT

+DC_IN +DC_IN

C132

D D

C C

B B

C132

*.1U_25V_NC

+PWR_SRC +PWR_SRC

+1.8V_SUS

+0.9V_DDR_VTT

+1.8V_SUS

+0.9V_DDR_VTT

+3.3V_LAN

VLDT_RUN VLDT_RUN

C141

*.1U_10V_NC

+VCC_CORE +VCC_CORE +VCC_CORE+1.2V_VCCP

+1.8V_SUS

C392

*.1U_10V_NC

+0.9V_DDR_VTT

+1.8V_SUS

C399

*.1U_10V_NC

+0.9V_DDR_VTT

+5V_SUS

C136

*.1U_25V_NC

+5V_RUN +5V_RUN

C145

*.1U_25V_NC

+3.3V_RUN

+1.8V_SUS

C396

*.1U_10V_NC

+0.9V_DDR_VTT

+1.8V_SUS

C422

*.1U_10V_NC

+0.9V_DDR_VTT

C137

*.1U_10V_NC

C146

*.1U_10V_NC

C397

*.1U_10V_NC

C426

*.1U_10V_NC

+PWR_SRC+PWR_SRC+PWR_SRC

C138

*.1U_25V_NC

+3.3V_RUN+3.3V_RUN

C147

*.1U_10V_NC

GND

+1.8V_SUS

C398

*.1U_10V_NC

+0.9V_DDR_VTT

+1.8V_SUS

C427

*.1U_10V_NC

+0.9V_DDR_VTT

+3.3V_RUN

C139

*.1U_10V_NC

+1.8V_RUN+1.8V_RUN

C148

*.1U_10V_NC

+0.9V_DDR_VTT

+1.8V_RUN

C140

*.1U_10V_NC

+1.2V_VCCP+1.2V_VCCP

U6B

G5

GFX_RX0P

G4

GFX_RX0N

J8

GFX_RX1P

J7

GFX_RX1N

J4

GFX_RX2P

J5

GFX_RX2N

L8

GFX_RX3P

L7

GFX_RX3N

L4

GFX_RX4P

L5

GFX_RX4N

M8

GFX_RX5P

M7

GFX_RX5N

M4

GFX_RX6P

M5

GFX_RX6N

P8

GFX_RX7P

P7

GFX_RX7N

P4

GFX_RX8P

P5

GFX_RX8N

R4

GFX_RX9P

R5

GFX_RX9N

R7

GFX_RX10P

R8

GFX_RX10N

U4

GFX_RX11P

U5

GFX_RX11N

W4

GFX_RX12P

W5

GFX_RX12N

Y4

GFX_RX13P

Y5

GFX_RX13N

V9

GFX_RX14P

W9

GFX_RX14N

AB7

GFX_RX15P

AB6

GFX_RX15N

W11

GPP_RX0P

W12

GPP_RX0N

PCIE_RXP1(25) PCIE_TXP1 (25) PCIE_RXN1(25)

MINI_PCIE_RXP2(24) MINI_PCIE_RXN2(24)

A_RX0P(14) A_RX0N(14)

A_RX1P(14) A_RX1N(14)

R93 10KR93 10K R92 8.25K/F_0603R92 8.25K/F_0603

10KOhm FOR RS485

R93:

1.47KOhm FOR RS690

8.25KOhm FOR RS485

R92:

DNI FOR RS690

AA11

GPP_RX1P

AB11

GPP_RX1N

Y7

GPP_RX2P

AA7

GPP_RX2N

AB9

GPP_RX3P

AA9

GPP_RX3N

W14

SB_RX0P

W15

SB_RX0N

AB12

SB_RX1P

AA12

SB_RX1N

AA14

PCE_ISET(PCE_CALI)

AB14

PCE_TXISET(NC)

RS485M A12 HT

PART 2 OF 5

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_PCAL(PCE_CALRP)

PCE_NCAL(PCE_CALRN)

GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GPP_TX0P GPP_TX0N

GPP_TX1P GPP_TX1N

GPP_TX2P GPP_TX2N

GPP_TX3P GPP_TX3N

SB_TX0P SB_TX0N

SB_TX1P SB_TX1N

J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4

AD8 AE8

GPP_TX1P_C

AD7

GPP_TX1N_C

AE7

GPP_TX2P_C

AD4

GPP_TX2N_C

AE5

AD5 AD6

A_TX0P_C

AE9

A_TX0N_C

AD10

A_TX1P_C

AC8

A_TX1N_C

AD9

R95 150/FR95 150/F

AD11

R94 100/FR94 100/F

AE11

150 Ohm FOR RS485

R95:

562 Ohm FOR RS690

R94:

Ward update to 100 Ohm FOR RS485 2KOhm FOR RS690

C151 .1U_10VC151 .1U_10V

C153 .1U_10VC153 .1U_10V

C157 .1U_10VC157 .1U_10V

C159 .1U_10VC159 .1U_10V

VDDA12_PKG2

Place these caps close to connector

C152 .1U_10VC152 .1U_10V

C154 .1U_10VC154 .1U_10V

C158 .1U_10VC158 .1U_10V

C160 .1U_10VC160 .1U_10V

PCIE_TXN1 (25)

MINI_PCIE_TXP2 (24) MINI_PCIE_TXN2 (24)

A_TX0P (14) A_TX0N (14)

A_TX1P (14) A_TX1N (14)

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

RS485-PCIE LINK I/F

FX2 1A

1

of

10 51Thursday, September 07, 2006

5

+1.8V_RUN

BLM18AG221SN1D_0603

D D

+1.8V_RUN

BLM18AG221SN1D_0603

220 ohm(200mA)

DDCDAT

C C

DDCCLK

LDT_STOP#(5,14)

HTPVDD

L4

C161

10U_10V

PLLVDD

L7

C168

10U_10V_0805

4.7U_6.3V_0603

+3.3V_RUN +3.3V_RUN

1

3

RP15

RP15 4P2R-2.2K

2

4

1

4P2R-2.2K

+3.3V_RUN

1

2

Q8

Q8 2N7002W-7-F

2N7002W-7-F

3

+1.8V_RUN

2

1 3

Q9

Q9 MMBT3904

MMBT3904

R110

10K

C162

4.7U_6.3V_0603

C169

Q7

Q7 2N7002W-7-F

2N7002W-7-F

3

+3.3V_RUN

R111

10K

+1.8V_RUN

C711

.1U_10V

C713

.1U_10V

DAT_DDC2 (19)

CLK_DDC2 (19)

LDT_STOP#_NB

BLM18AG221SN1D_0603

220 ohm(200mA)220 ohm(200mA)

AVDDQ

L5

10U_10V_0805

VGA_RED(19) VGA_GRN(19) VGA_BLU(19)

LOAD_ROM#: LOAD ROM STRAP ENABLE

B B

A A

5

High, LOAD ROM STRAP DISABLE

Low, LOAD ROM STRAP ENABLE

4

C163

C164

1 2

2.2U_10V_0805

close to NB

12

OSCOUT(A11) DVO_D0(AD14) DVO_D1(AD15) DVO_D1 DVO_D3(AD16)

DVO_D7(AE19) DVO_D8(AD19) DVO_D9(AE20) DVO_D10(AD20)

4

R104

R104 150/F

150/F

+3.3V_RUN +1.8V_RUN

BK1608HS330_0603

C712

.1U_10V

12

R105

R105 150/F

150/F

BK1608HS330_0603

33 ohm(500mA)

12

R106

R106 150/F

150/F

ALINK_RST#(14,23,24,25,33)

NB_PWRGD(27)

R116 *3K/F_NCR116 *3K/F_NC

AVDD_NB AVDD1

L6

C165

4.7U_6.3V_0603

AVDDQ

C171

.1U_10V

DDCCLK DDCDAT

R102 0R102 0

ALLOW_LDTSTOP(14)

HTREFCLK(13)

NB_OSC(13)

NBSRC_CLKP(13) NBSRC_CLKN(13)

SBLINK_CLKP(13) SBLINK_CLKN(13)

LOAD_ROM#

by default

D1 RB751D1 RB751

BMREQ#(14)

0428 : reserve R583 & R584 for NB thermal Diode

RS485

OSCOUT DVO_D0

2 1

RS690

PLLVDD12 GPP_TX4P

SB_NB_THRMDA(16) SB_NB_THRMDC(16)

R126

4.7K/F

PHL_CLK(18) PHL_DATA(18)

+3.3V_RUN

GPP_TX4N DVO_D3 DVO_D4 DVO_D7 DVO_D8 DVO_D9 DVO_D10

GPP_RX4P

GPP_RX4NDVO_D4(AE16)

GPP_TX5N

GPP_TX5P

GPP_RX5N

GPP_RX5P

0614 : for LCD backlight issue , delete U40, depop U7 & R591, pop R129, move R130 to connect "LVDS_BLON" & "FPBACK_EN" & U7 pin1

3

C166

.1U_10V

AVDD_NB

AVDD1

VSYNC(19) HSYNC(19)

R108 0R108 0 R101 0R101 0

T50T50

R115 *2.7K/F_NCR115 *2.7K/F_NC

R118 *2.7K/F_NCR118 *2.7K/F_NC R120 *2.7K/F_NCR120 *2.7K/F_NC R119 *2.7K/F_NCR119 *2.7K/F_NC R121 *2.7K/F_NCR121 *2.7K/F_NC

PLLVDD

HTPVDD

R109 0R109 0

R112 10KR112 10K

R124 10KR124 10K

T65T65 T68T68

3

R107 715/F_0603R107 715/F_0603

PLLVDD12

R583 *0_NCR583 *0_NC R584 *0_NCR584 *0_NC

R123 2K/FR123 2K/F

R96 0/F_0603R96 0/F_0603

T139T139 T140T140 T141T141

NB_RST#

LDT_STOP#_NB

TV_SWITCH

DFT_GPIO0

DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5

STRP_DATA

B22 C22 G17 H17 A20 B20

A21 A22

C21 C20 D19

E19

F19

G19

C6 A5

B21

B6 A6

A10 B10

B24 B25

C10 C11

C5 B5

C23 B23

C2

B11 A11

F2 E1

G1 G2

D6 D7 C8 C7 B8 A8

B2 A2

B4 AA15 AB15

C14

B3

C3

A3

FPBACK_EN(27)

C167

2.2U_10V_0805

1 2

CT_0616: Reserved R607~R610 resistors for EMI request.

U6C

AVDD1 AVDD2 AVSSN1 AVSSN2 AVDDDI AVSSDI

AVDDQ AVSSQ

C_R Y_G COMP_B

RED GREEN BLUE DACVSYNC DACHSYNC

RSET

DACSCL DACSDA

PLLVDD(PLLVDD18) PLLVSS

HTPVDD HTPVSS

SYSRESET# POWERGOOD LDTSTOP# ALLOW_LDTSTOP

HTTSTCLK HTREFCLK

TVCLKIN

OSCIN OSCOUT(PLLVDD12)

GFX_CLKP GFX_CLKN

SB_CLKP SB_CLKN

DFT_GPIO0 DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5

BMREQb I2C_CLK I2C_DATA THERMALDIODE_P THERMALDIODE_N

TMDS_HPD DDC_DATA TESTMODE STRP_DATA

RS485M A12 HT

PART 3 OF 5

CRT/TVOUT

PLL PWR

PM

LVDS_BLON

R1300R130

R591

*100K_NC

2

TXUOUT0+ TXUOUT0-

TXUOUT1+ TXUOUT1-

TXUOUT2+ TXUOUT2-

TXUCLKOUT+ TXUCLKOUT-

CLOCKs

MIS.

0

1 2

R607 *100_NCR607 *100_NC

1 2

R608 *100_NCR608 *100_NC

1 2

R609 *100_NCR609 *100_NC

1 2

R610 *100_NCR610 *100_NC

1 2

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N

TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN

LVDDR18D_1

LVDS

LVDDR18D_2 LVDDR18A_1 LVDDR18A_2

LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8

LVSSR12 LVSSR13

LVDS_DIGON

LVDS_BLON

LVDS_BLEN

DVO_D0(GPP_TX4P) DVO_D1(GPP_TX4N)

DVO_D2(NC) DVO_D3(GPP_RX4P) DVO_D4(GPP_RX4N)

DVO_D5(NC)

DVO_D6(NC)

DVO_D7(GPP_TX5N) DVO_D8(GPP_TX5P)

DVO_D9(GPP_RX5N)

DVO

DVO_D10(GPP_RX5P)

DVO_D11(NC)

DVO_VSYNC(NC)

DVO_DE(NC)

DVO_HSYNC(NC)

DVO_IDCKP(NC)

DVO_IDCKN(NC)

R129

NB_PWRGD

*74LVC1G08GW_NC

2

LPVDD LPVSS

*0_NC

U7

B14 B15 B13 A13 H14 G14 D17 E17

A15 B16 C17 C18 B17 A17 A18 B18

E15 D15 H15 G15

D14 E14

A12 B12 C12 C13

A16 A14 D12 C19 C15 C16

F14 F15

E12 G12 F12

AD14 AD15 AE15 AD16 AE16 AC17 AD18 AE19 AD19 AE20 AD20 AE21

AD13 AC13 AE13 AE17 AD17

12

+3.3V_RUN

53

1

2

4

1

C170

4.7U_6.3V_0603

BLM18AG221SN1D_0603

C174

LCD_POWER_ON (18)

T69T69

R602 *100_NCR602 *100_NC

1 2

R603 *100_NCR603 *100_NC

1 2

R604 *100_NCR604 *100_NC

1 2

R605 *100_NCR605 *100_NC

1 2

RS485: LVDDR18A=1.8V

220 ohm(200mA)

L8 BLM18AG221SN1D_0603L8 BLM18AG221SN1D_0603

+1.8V_RUN

L10

BLM18AG221SN1D_0603

C175

.1U_10V

R125 2K/FR125 2K/F

LCD_PON

R127 2K/FR127 2K/F

LVDS_BLON

R128 2K/FR128 2K/F

LVDS_BLEN

1

TXLOUT0+

TXLOUT1+

TXLOUT2+

TXLCLKOUT+ TXLCLKOUT-

TXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2-

TXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2+ TXUOUT2-

TXLCLKOUT+ TXLCLKOUTTXUCLKOUT+ TXUCLKOUT-

.1U_10V

LCD_PON

R114 0R114 0

LVDS_BLON LVDS_BLEN

+3.3V_RUN

R601

10K

Title

Size Document Number Rev

Date: Sheet

TXLOUT0+ (18) TXLOUT0- (18) TXLOUT1+ (18) TXLOUT1- (18) TXLOUT2+ (18)

TXLOUT2- (18)

T47T47 T48T48

TXUOUT0+ (18)

TXUOUT0- (18)

TXUOUT1+ (18)

TXUOUT1- (18)

TXUOUT2+ (18)

TXUOUT2- (18)

T49T49 T46T46

TXLCLKOUT+ (18) TXLCLKOUT- (18) TXUCLKOUT+ (18) TXUCLKOUT- (18)

C172

C172 .1U_10V

.1U_10V

C173

4.7U_6.3V_0603

T146T146

T51T51 T52T52 T54T54 T53T53 T55T55 T57T57 T56T56 T58T58 T59T59 T60T60 T64T64 T63T63

T67T67 T66T66

T71T71 T70T70

BLON (18)

QUANTA

COMPUTER

RS485-LVDS

FX2 2B

TXLOUT0-

TXLOUT1-

TXLOUT2-

+1.8V_RUN

L9

C176

4.7U_6.3V_0603

11 51Thursday, September 07, 2006

of

5

V12

M3

VSSA2

C182

1U_10V

C204

1U_10V

VDDHT_PKG VDDA12_PKG1 VDDA12_PKG2

VDDA12_PKG1

VSSA1

PART 5 OF 5

VSS1

VSS2

F11

A25

C215

10U_10V_0805

D D

VLDT_RUN

C180

C179

D4

L13

C179

1U_10V

D2

2 1

BA316D2BA316

C195

2.2U_10V_0805

2 1

BA316D3BA316

1 2

C178

+1.8V_RUN

C178

10U_10V_0805

2 1

BA316D4BA316

TI201209G121_0805

120 ohm(3A)

C177

10U_10V_0805

C C

10U_10V_0805

+3.3V_RUN

RS485: VDDA18=1.8V

+1.8V_RUN

L12

BLM18PG330SN1D_0603

33 ohm(3A)

+3.3V_RUN

B B

+1.8V_RUN

VDDA12

RS485: 0 Ohm RESISTOR

A A

C189

10U_10V_0805

L14

BLM18AG221SN1D_0603

220 ohm(200mA)

L15

TI201209G121_0805

120 ohm(3A)

R131 0/F_0603R131 0/F_0603

C201

10U_10V_0805

VDDR3

C210

C210 1U_10V

1U_10V

VDDPLL

C213

4.7U_6.3V_0603

C209

4.7U_6.3V_0603

VDDDVO

C211

C211 1U_10V

1U_10V

D3

VDD18

C202

1U_10V

C196

2.2U_10V_0805

1 2

C190

1U_10V

C212

C212 1U_10V

1U_10V

C214

1U_10V

C181

1U_10V

VDDA18

C203

1U_10V

V11

V14

VSSA3

VSSA4

VSS3

VSS4E9VSS5

D23

C183

1U_10V

4

VSS17

L23

VSS18

M11

P9

VSS19

VSS20

VSS21

VSS22

N12

N14

M20

M23

M25

PART 4 OF 5

VSSA23

VSS23

B7

AE6

AE10

V15

G3

VSSA5F3VSSA6

VSSA7A1VSSA8H1VSSA9

VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25U2VSSA26T3VSSA27U3VSSA28U6VSSA30Y1VSSA32W6VSSA33

VSSA14

VSSA12

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

J22

J12

L12

L14

M15

G23

AE24 AD24 AD22 AB17 AE23

W17 AC18 AD21 AC19 AC20 AB19 AD23 AA17 AE25

AC3

AD2

AC12 AD12 AE12

AC11

Y17

AE2 AB3

AB4

AE1

E11 D11

D22

L20

U6D

VDD_HT1 VDD_HT2 VDD_HT3 VDD_HT4 VDD_HT5 VDD_HT6 VDD_HT7 VDD_HT8 VDD_HT9 VDD_HT10 VDD_HT11 VDD_HT12 VDD_HT13 VDD_HT14 VDD_HT15

J14

VDD18_1

J15

VDD18_2

VDDA18_1(VDDA12_13) VDDA18_2(VDDA12_14)

U7

VDDA18_3(VDDA12_15)

W7

VDDA18_4(VDDA12_16) VDDA18_5(VDDA12_17) VDDA18_6(VDDA12_18) VDDA18_7(VDDA12_19) VDDA18_8(VDDA12_20)

VDDR3_1 VDDR3_2

VDD_DVO1(VDDR_1) VDD_DVO2(VDDR_2) VDD_DVO3(VDDR_3)

E7

VDDA12_13(VDDPLL_1)

F7

VDDA12_14(VDDPLL_2)

F9

VSSA49(VSSPLL_1)

G9

VSSA50(VSSPLL_2)

VDDHT_PKG

M1

VDDA12_PKG1 VDDA12_PKG2

RS485M A12 HT

Y23

G11

C205

1U_10V

P11

R24

AE18

AC4

VSSA29

VSS25

VSS26

VSS27

VSS28

VSS29

VSS24

L24

P13

P20

P15

R12

R14

VDDA12_1 VDDA12_2 VDDA12_3 VDDA12_4 VDDA12_5 VDDA12_6 VDDA12_7 VDDA12_8

VDDA12_9 VDDA12_10 VDDA12_11 VDDA12_12

VDDC_1 VDDC_2 VDDC_3

POWER

VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32

AC2

Y11

Y15

VSSA34Y3VSSA35Y9VSSA36

VSSA31

GROUND

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

Y25

R20

U20

H25

W23

AD25

D1 G7 E2 C1 E3 D2 M9 F4 B1 D3 L9 E6

L11 L13 L15 M12 R15 M14 N11 N13 N15 J11 H11 P12 P14 R11 R13 A19 B19 U11 U14 P17 L17 J19 D20 G20 A9 B9 C9 D9 A7 A4 U12 U15

AD1

AC5

VSSA37R9VSSA38

VSSA39

VSS37

VSS38

VSS39

Y22

W24

AC23

AC6

AC7

VSSA40

VSS40

D25

G24

AD3

AC9

VSSA41

VSSA42

VSS41

VSS42

H12

AC14

3

AC10

G6

VSSA43

VSSA44

VSS44

VSS43

R23

AC22

C191

1U_10V

VSSA45

VSS45

Y12

Y14

AA3

VSSA46

VSSA47

VSSA48

VSS46C4VSS47

VSS48

VSS49

VSS50

T23

T25

AE22

AE14

VDDA12

C186

10U_10V_0805

VSS52

VSS53

VSS51

H23

R17

M17

C184

1U_10V

10U_10V_0805

VSS54

A23

C197

VSS55

AC15

F17

VSS56

VSS57D4VSS59

AC16

C192

1U_10V

VSS58

M13

U6E

U6E RS485M A12 HT

RS485M A12 HT

C193

10U_10V_0805

C198

1U_10V

C206

1U_10V

C199

1U_10V

C207

1U_10V

+1.2V_VCCP

C194

10U_10V_0805

C187

1U_10V

C208

1U_10V

2

L11

L11 FBJ3216HS800_1206

FBJ3216HS800_1206

80 ohm(4A)

C185

100U_6.3V_3528

C200

C188

1U_10V

100U_6.3V_3528

+1.2V_VCCP

1

NB RS485 POWER STATES

Power Signal

VDDHT VDDR VDD18 VDDC VDDA18 VDDA12

AVDDDI PLLVDD HTPVDD VDDR3 LPVDD LVDDR18D

S3

S0

ON ON ON ON ON ON ON ON ON ON ON ON ON

S4/S5

S1

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFFAVDD

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

LVDDR18A OFFON ON OFF OFF

G3

OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

RS485-POWER

FX2 2B

1

of

12 51Thursday, September 07, 2006

5

4

3

2

1

+3.3V_RUN

BK1608HS330_0603

33 ohm(500mA)

D D

1- PLACE ALL SERIAL TERMINATION RESISTORS CLOSE TO U8

2- PUT DECOUPLING CAPS CLOSE TO Clock Gen.POWER PIN

C C

B B

CLK_VDD

L16

C217

C216

22U_10V_0805

PDAT_SMB(15,24,25)

PCLK_SMB(15,24,25)

C217

C218

.1U_10V

+3.3V_RUN

BK1608HS330_0603

33 ohm(500mA)

CLK_RESET_IN#(27)

0428 : add "CLK_RESET_IN#" connected to EC GPIO for CLK enable as ATI suggestion

Q10

*2N7002E-LF_NC

3

Q11

*2N7002E-LF_NC

3

C219

.1U_10V

+3.3V_RUN

L19

+3.3V_RUN

2

R172 0R172 0

+3.3V_RUN

2

R179 0R179 0

C220

.1U_10V

L18 BK1608HS330_0603L18 BK1608HS330_0603

33 ohm(500mA)

CLK_VDD_REF

CLK_VDD

1 2

R585 0R585 0

R153

*10K_NC

1

C221

.1U_10V

C229

C229 1U_10V

1U_10V

R139

10K

C222

.1U_10V

R154

R154 *10K_NC

*10K_NC

SMBDT

SMBCK

C224

C223

.1U_10V

CLK_VDD_USB

C228

C227

.1U_10V

1U_10V

C230

C230 .1U_10V

.1U_10V

Parallel Resonance Crystal

C231 33P_50VC231 33P_50V

C232 33P_50VC232 33P_50V

21

CLK_XOUT_R

Y1

14.31818MHZ

SMBUS Address [D2]

Ioh = 5 * Iref (2.32mA)

Voh = 0.71V @ 60 ohm

R140

R140 *1M/F_NC

*1M/F_NC

R144 0R144 0

SMBCK(7) SMBDT(7)

CLK_VDD

CLK_XIN

CLK_XOUT

SMBCK SMBDT

R173

R173 475/F

475/F

U8

54

VDDCPU

14

VDD_SRC1

23

VDD_SRC2

28

VDD_SRC3

44

VDD_SRC4

5

VDD_48

39

VDD_ATIG

2

VDD_REF

60

VDDHTT

53

GND_CPU

15

GND_SRC1

22

GND_SRC2

29

GND_SRC3

45

GND_SRC4

8

GND_48

38

GND_ATIG

1

GND_REF

58

GNDHTT

3

XIN

4

XOUT

11

RESET_IN#

61

NC

9

SMBCLK

10

SMBDAT

48

IREF

ICS951462

CLKREQA# CONTROL SRC5,6,7 CLKREQB# CONTROL SRC2,3,4, ATIG3 CLKREQC# CONTROL SRC0,1,ATIG0/1/2

CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1

VDDA GNDA

SRCCLKT6

SRCCLKC6 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1 ATIGCLKT2 ATIGCLKC2 ATIGCLKT3 ATIGCLKC3

SRCCLKT5

SRCCLKC5

SRCCLKT4

SRCCLKC4

SRCCLKT3

SRCCLKC3

SRCCLKT2

SRCCLKC2

SRCCLKT0

SRCCLKC0

SRCCLKT1

SRCCLKC1

SRCCLKT7

SRCCLKC7

CLKREQA#

CLKREQB#

CLKREQC#

48MHz_1 48MHz_0

FS1/REF1 FS0/REF0 FS2/REF2

HTTCLK0

50 49

56 55 52 51

16 17 41 40 37 36 35 34 30 31 18 19 20 21 24 25 26 27 47 46 43 42 12 13

57 32 33

7 6

63 64 62 59

CLK_VDDA

CPUCLK_EXT_R CPUCLK#_EXT_R

SBLINK_CLKP_R SBLINK_CLKN_R NBSRC_CLKP_R NBSRC_CLKN_R

SBSRC_CLKP_R SBSRC_CLKN_R

GPP_CLK2P_R GPP_CLK2N_R GPP_CLK3P_R GPP_CLK3N_R

R152 2.2KR152 2.2K

R155 2.2KR155 2.2K

CLK_48M_2_R

R157 0R157 0 R156 0R156 0

CLK_VDDA

C225

C225 .1U_10V

.1U_10V

R133 47/F_0603R133 47/F_0603 R134 47/F_0603R134 47/F_0603

R135 33/FR135 33/F R137 33/FR137 33/F R136 33/FR136 33/F R138 33/FR138 33/F

T144T144 T145T145

R141 33/FR141 33/F R142 33/FR142 33/F

R147 33/FR147 33/F R149 33/FR149 33/F R151 33/FR151 33/F R150 33/FR150 33/F

CLK_VDD

T72T72

R174 33/FR174 33/F

SB_OSCIN_R

NB_OSCIN_R

HTREFCLK_R

L17 BK1608HS330_0603L17 BK1608HS330_0603

33 ohm(500mA)

C226

C226 22U_10V_0805

22U_10V_0805

R132 261/FR132 261/F

NEW_CLKREQ# (25) MINI_CLKREQ3# (24)

USBCLK (15)

R181 8.2KR181 8.2K R180 8.2KR180 8.2K R182 8.2KR182 8.2K

R186 33/FR186 33/F

R187 33/FR187 33/F

R188 33/FR188 33/F

+3.3V_RUN

CLK_VDD

CPUCLK (5) CPUCLK# (5)

R158 49.9/FR158 49.9/F

R159 49.9/FR159 49.9/F

R176

2.2K

R189

49.9/F

R161 49.9/FR161 49.9/F

R160 49.9/FR160 49.9/F

R178

R177

2.2K

SB_OSCIN (15)

NB_OSC (11)

HTREFCLK (11)

R166 49.9/FR166 49.9/F

R168 49.9/FR168 49.9/F

R167 49.9/FR167 49.9/F

R184 *0_NCR184 *0_NC R183 *0_NCR183 *0_NC R185 *0_NCR185 *0_NC

SBLINK_CLKP (11) SBLINK_CLKN (11) NBSRC_CLKP (11) NBSRC_CLKN (11)

SBSRCCLK (14) SBSRCCLK# (14)

CLK_PCIE_NEW (25)

CLK_PCIE_NEW# (25)

CLK_PCIE_MINI_A (24)

CLK_PCIE_MINI_A# (24)

R171 49.9/FR171 49.9/F

R170 49.9/FR170 49.9/F

R169 49.9/FR169 49.9/F

EXT CLK FREQUENCY SELECT TABLE(MHZ)

FS2

FS0

FS1

0 0 0

A A

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 1

CPU

Hi-Z X

180.00

220.00

100.00

133.33

200.00

5

SRCCLK

[2:1]

100.00

HTT

PCI

Hi-Z

Hi-Z X/3 X/6

60.00

30.00

36.56

73.12

66.66

33.33

66.66

33.33

66.66

33.33 48.00

COMMENT

USB

Reserved

48.00

Reserved Reserved

48.00 Reserved

48.00

Reserved Reserved

48.00 Normal ATHLON64 operation

Check AMD clock

4

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

COMPUTER

CLOCK GENERATOR

FX2 2A

1

of

13 51Thursday, September 07, 2006

5

74LVC1G08GW

ALINK_RST#(11,23,24,25,33)

D D

74LVC1G08GW

SB CALIBRATION RESISITOR VALUE

BALL

CALRP

CALRN

CALI

SB600

562 OHM 1%

2.05K 1%

0 ohm

PCIE Power

+1.2V_VCCP

C C

B B

A A

L21

TI201209G121_0805

120 ohm(3A)

C242

22U_10V_0805

RTC

+3.3V_RTC_LDO

C650

*2.2U_6.3V_0603_NC

+3.3V_ALW

R213 1K/FR213 1K/F

CT_0901: Change BT1 footprint from BAT-23_2-4_2 to BAT-23_2-4_2-FX2

C269

C269 .1U_10V

.1U_10V

SUYIN_060016MA002G200NL

12

RTC_N02

1 2

C258

1U_10V

BT1

5

SB460

150 OHM 1%

4.12K 1%

+1.2V_VCCP

SBK160808T-301Y-S_0603

300 ohm(200mA)

C243

1U_10V

U37

5

OUT

4

FB

GND2EN

*MIC5235-3.3_NC

D38 *RB751_NCD38 *RB751_NC

2 1

D5 RB751D5 RB751

2 1

D6 RB751D6 RB751

2 1

C265

1U_10V

IN

*1U_25V_0805_NC

U9

R194 *0_NCR194 *0_NC

L20

C259

1U_10V

R533

R533 *10K_NC

*10K_NC

1

C649

3

RTC-BATTERYRTC-BATTERY

+3.3V_SUS

53

4

PCIE_PVDD

C244

.1U_10V

+PWR_SRC

12

C266

.1U_10V

C233 .1U_10VC233 .1U_10V

EC_PWRGD

1

2

C256

10U_10V_0805

C260

.1U_10V

12

C651

*.1U_50V_0603_NC

VCCRTC

SBSRCCLK(13)

SBSRCCLK#(13)

A_RX0P(10) A_RX0N(10) A_RX1P(10) A_RX1N(10)

A_TX0P(10)

A_TX0N(10)

A_TX1P(10)

A_TX1N(10)

PCIE_VDDR

C240

1U_10V

C245

.1U_10V

4

R190 8.2KR190 8.2K

16mA

C250 .1U_10VC250 .1U_10V C237 .1U_10VC237 .1U_10V C251 .1U_10VC251 .1U_10V

T73T73 T76T76 T75T75 T74T74

T78T78 T77T77 T79T79 T80T80

C246

.1U_10V

For SB600, connect to CPU_PG/LDT_PG For SB460, connect to SSMUXSEL/GPIO0

ALLOW_LDTSTOP(11)

C253 .1U_10VC253 .1U_10V

R203 562/F_0603R203 562/F_0603 R204 2.05K/F_0603R204 2.05K/F_0603

R206 0/F_0603R206 0/F_0603

C241

.1U_10V

PCIE_VDDR

C247

C261

.1U_10V

ATi Recommend Vendor: NSK Part Number: NXG 32.768KAE12FUD 16 PPM.

Y2 32.768KHZY2 32.768KHZ

41

R211

20M

CPU_PWRGD(5)

LDT_STOP#(5,11)

LDT_RST#(5)

+3.3V_RUN

2 3

R212 20MR212 20M

C263

18P_50V

ATI recommand have internal pull-up

CPU_PWR_SB

R214

R214 10K

10K

R217 0R217 0

LDT_RST#

reserve R570 for EMI verifing, place close to SB

H_DPSLP# should be pull down , reserve R229 for verifing

CPU_SIC(5) CPU_SID(5)

R229

R229 *10K_NC

*10K_NC

R588

R588 10K

10K

4

T81T81 T82T82 T83T83 T84T84

T86T86

T88T88

T89T89

H_DPSLP#

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C

PCIE_CALRP PCIE_CALRN

PCIE_CALI

32K_X1

32K_X2

C264

18P_50V

32K_X1

32K_X2

H_DPSLP#

R570 0R570 0

U10A

AG10

A_RST#

J24

PCIE_RCLKP

J25

PCIE_RCLKN

P29

PCIE_TX0P

P28

PCIE_TX0N

M29

PCIE_TX1P

M28

PCIE_TX1N

K29

PCIE_TX2P

K28

PCIE_TX2N

H29

PCIE_TX3P

H28

PCIE_TX3N

T25

PCIE_RX0P

T26

PCIE_RX0N

T22

PCIE_RX1P

T23

PCIE_RX1N

M25

PCIE_RX2P

M26

PCIE_RX2N

M22

PCIE_RX3P

M23

PCIE_RX3N

E29

PCIE_CALRP

E28

PCIE_CALRN

E27

PCIE_CALI

U29

PCIE_PVDD

U28

PCIE_PVSS

F27

PCIE_VDDR_1

F28

PCIE_VDDR_2

F29

PCIE_VDDR_3

G26

PCIE_VDDR_4

G27

PCIE_VDDR_5

G28

PCIE_VDDR_6

G29

PCIE_VDDR_7

J27

PCIE_VDDR_8

J29

PCIE_VDDR_9

L25

PCIE_VDDR_10

L26

PCIE_VDDR_11

L29

PCIE_VDDR_12

N29

PCIE_VDDR_13

D2

X1

C1

X2

AC26

CPU_PG/LDT_PG

W26

INTR/LINT0

W24

NMI/LINT1

W25

INIT#

AA24

SMI#

AA23

SLP#/LDT_STP#

AA22

IGNNE#/SIC

AA26

A20M#/SID

Y27

FERR#

AA25

STPCLK#/ALLOW_LDTSTP

AH9

CPU_STP#/DPSLP_3V#

B24

DPSLP_OD#/GPIO37

W23

DPRSLPVR

AC25

LDT_RST#/DPRSTP#/PROCHOT#

SB600 A13

3

SB600 SB 27x27mm

Part 1 of 4

SPDIF_OUT/PCICLK7/GPIO41

PCI CLKS

AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11

AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7

PCI EXPRESS INTERFACE

XTAL

3

CBE0#/ROMA10

CBE1#/ROMA1

CBE2#/ROMWE#

PCI INTERFACE

DEVSEL#/ROMA0

TRDY#/ROMOE#

PAR/ROMA19

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

CPU

RTC_IRQ#/GPIO69

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6

PCIRST#

AD8/ROMA9 AD9/ROMA8

AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE3#

FRAME#

IRDY#

STOP# PERR# SERR# REQ0# REQ1# REQ2#

GNT0# GNT1# GNT2#

CLKRUN#

LOCK#

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

VBAT

RTC_GND

U2 T2 U1 V2 W3 U3 V1 T1

AJ9

W7 Y1 W8 W5 AA5 Y3 AA6 AC5 AA7 AC3 AC7 AJ7 AD4 AB11 AE6 AC9 AA3 AJ4 AB1 AH4 AB2 AJ3 AB3 AH3 AC1 AH2 AC2 AH1 AD2 AG2 AD1 AG1 AB9 AF9 AJ5 AG3 AA2 AH6 AG5 AA1 AF7 Y2 AG8 AC11 AJ8 AE2 AG9 AH8 AH5 AD11 AF2 AH7 AB12 AG4 AG7 AF6

AD3 AF1 AF4 AF3

AG24 AG25 AH24 AH25 AF24 AJ24 AH26 W22 AF23

D3 F5

E1 D1

PCI_MINI PCI_591 PCI_PCM

PCI_CLK4 PCI_LAN PCI_CLK6

PCIRST#_C

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3# REQ4# GNT0# GNT1# GNT2# GNT3# GNT4# CLKRUN# PCI_LOCK#

INTE#

INTF# INTG# INTH#

LFRAME#/FWH4 LDRQ#0 LDRQ#1 BMREQ# SERIRQ

C270

.1U_10V

R191 22R191 22 R201 22R201 22 R192 22R192 22

T143T143

R195 22R195 22 R196 22R196 22 R202 22R202 22 R617

R617

AD[0..31]

VCCRTC

2

10K

*82P_50V_NC

CBE0# (20,33,42) CBE1# (20,33,42) CBE2# (20,33,42) CBE3# (20,33,42) FRAME# (20,33,42) DEVSEL# (20,33,42) IRDY# (20,33,42) TRDY# (20,33,42) PAR (20,33,42) STOP# (20,33,42) PERR# (20,33,42) SERR# (20,33,42)

T149T149 T150T150

REQ2# (20) REQ3# (33) REQ4# (42)

T151T151 T152T152

GNT2# (20) GNT3# (33) GNT4# (42) CLKRUN# (20,27,33,42)

T153T153

INTE# (20) INTF# (33) INTG# (42) INTH# (42)

Add for debug.

T154T154 T155T155

T156T156

2

PCLK_MINI PCLK_591 PCLK_PCM

PCICLK4 PCLK_LAN PCICLK6

AD[0..31] (17,20,33,42)

EC_PWRGD(15,27,35)

PCIRST#_C

R205

C255

8.2K

REQ2# : Media Card REQ3# : LAN REQ4# : Mini PCI

GNT2# : Media Card GNT3# : LAN GNT4# : Mini PCI

INTE# : Media Card INTF# : LAN INTG# : Mini PCI INTH# : Mini PCI

LAD0/FWH0 (24,27) LAD1/FWH1 (24,27) LAD2/FWH2 (24,27) LAD3/FWH3 (24,27) LFRAME#/FWH4 (24,27)

BMREQ# (11) SERIRQ (20,27,42)

RTC_CLK (17)

1

Reserved For EMI

PCLK_MINI (17,42) PCLK_591 (17,27) PCLK_PCM (20)

PCICLK4 (17,24) PCLK_LAN (33) PCICLK6 (17)

CT_0803: Del T142. Add R617 10K pull down per TDC.

+3.3V_RUN

1

2

R198 *0_NCR198 *0_NC

Title

SB600M-PCIE/PCI/LPC

Size Document Number Rev

FX2 3A

Date: Sheet

PCLK_MINI PCLK_591 PCLK_PCM

PCICLK4 PCLK_LAN PCICLK6

C254 .1U_10VC254 .1U_10V

U11

U11 74LVC1G08GW

74LVC1G08GW

53

PCIRST#

4

BMREQ#

C268

18P_50V

QUANTA

QUANTA COMPUTER

COMPUTER

C248 *33P_50V_NCC248 *33P_50V_NC C234 *33P_50V_NCC234 *33P_50V_NC C235 *33P_50V_NCC235 *33P_50V_NC

C236 33P_50VC236 33P_50V C238 *33P_50V_NCC238 *33P_50V_NC C252 33P_50VC252 33P_50V

C239

82P_50V

R228 10KR228 10K

1

PCIRST# (20,24,33,42)

+3.3V_RUN

14 51Thursday, September 07, 2006

of

Dell fx2mb d3a ns 0907a Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual