Dell DB13 DIS Schematics

5

4

3

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1

DB13 DIS Schematics Document

D D

Sandy Bridge

Intel PCH

C C

2010-11-25 REV : X00

B B

DY :None Installed PSL: KBC795 PSL circuit for 10mW solution installed. 10mW: External circuit for 10mW solution installed. GSONSOR_ST: Stuff for ST G-Sensor GSENSOR_ADI: Stuff for ADI G-Sensor

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cover

DB13 DIS

1 105Friday, November 26, 2010

of

1

of

X00

5

##OnMainBoard

4

VRAM

512MB/1GB Colay

D D

88,89

4

gDDR3 800MHz

NVIDIA N12P-GV

83.84,85,86,87

C C

HDMI

Display Port

LCD

SD/SDIO/SDHC /SDXC/MS/MS Pro MSXC/MMC/xD

51

52

49

74

LVDS(Dual Channel)

Card Reader

RTS5209

PCIE x 1

32

(9 in 1)

CAMERA

B B

w/ Digital MIC

49

USB 2.0 x 1

CODEC

HP

58

MIC IN

58

A A

2CH SPEAKER (2W/4ohm)

5

58

IDT 92HD87B1

4

3

DB13 DIS Block Diagram

Intel CPU

DDRIII 1066/1333 Channel A

Sandy Bridge

PCIe x 16

(Discrete only)

PCIE x 1 USB2.0 x 1

HDA

29

4

BGA Type

4,5,6,7,8,9,10,11,12,13

FDIx4x2

(UMA only)

PCH Cougar Point

14 USB 2.0/1.1 ports

ETHERNET (10/100/1000Mb)

High Definition Audio

SATA ports (6)

PCIE ports (8)

17,18,19,20,21,22,23,24,25,26

SPI

Flash ROM

4MB

27

Touch PAD

60

NUVOTON

NPCE795PA

69 69

DMIx4

Intel

LPC I/F

ACPI 1.1

SMBus

LPC Bus

KBC

ADC

PWM

Int. KB

http://hobi-elektronika.net

DDRIII 1066/1333 Channel B

PCIE x 1

PCIE x 1,USB2.0 x 1

SATA x 2

Free Fall Sensor

Thermal Sensor

Main:ENEP2800

PWM x 1

3

79

28

25

Project Code: 91.4NY01.001 PCB P/N :48.4NY02.0SA Revision : 10320-SA

10/100/1000 LOM

Realtek

RTL8111E-VB

USB3.0 Controller

TI TUSB7320RKM (NEC uPD720200F1)

(On Daughter Board)

Mini-Card

WWAN

Mini-Card

802.11a/b/g + BT version 3.0

PWM Fan

28

DDRIII 1066/1333

31

66

65

2

Slot 1

14

Slot 2

15

RJ45 CONN

35

(On Daughter Board)

HDD

ODD

USB3.0 x 2

SIM

56

2

1

CPU DC/DC

VT1316+VT1317

INPUTS

DCBATOUT

SYSTEM DC/DC

VT1316+VT1317

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51461

INPUTS

DCBATOUT

SYSTEM DC/DC

INPUTS

VT358

DCBATOUT

SYSTEM DC/DC

VT357

INPUTS

DCBATOUT

TI CHARGER

59

BQ24745

INPUTS

+DC_IN_S5

SYSTEM DC/DC

62

TPS51427

INPUTS

DCBATOUT 5V_S5

26

SYSTEM DC/DC

TPS51311

INPUTS

3D3V_S5

Switches

INPUTS OUTPUTS

1D5V_S3 5V_S5

PCB LAYER

DIS

L1:Top L2:GND L3:Signal L4:Signal L5:VCC L6:Signal L7:GND L8:Bottom

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Friday, November 26, 2010

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

DB13 DIS

1

OUTPUTS

VCC_CORE

OUTPUTS

VCC_GFXCORE

OUTPUTS

0D85V_S0

OUTPUTS

1D5V_S3 0D75V_S0 DDR_VREF_S3

OUTPUTS

1D05V_VTT

OUTPUTS

DCBATOUT+PBATT

OUTPUTS

5V_AUX_S5 3D3V_AUX_S5

3D3V_S5 15V_S5

OUTPUTS

1D8V_S0

1D5V_S0 5V_S0 3D3V_S03D3V_S5

of

2 105

42

44

48

46

45

40

41

47

36

X00

5

PCH Strapping

Huron River Schematic Checklist Rev.1_0

Name Schematics Notes

SPKR

INIT3_3V# Weak internal pull-up. This signal should not be pulled low. Leave as "No Connect".

GNT3#/GPIO55

D D

GNT2#/GPIO53 GNT1#/GPIO51

INTVRMEN

DF_TVS

SATA1GP /GPIO19

C C

HDA_SDO

HDA_SYNC

GPIO15

DSWVRMEN

B B

GPIO28

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Enable when Pull-up.

No Reboot Mode with TCO Disabled:

GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3 power rail.

Integrated 1.05 V VRM Enable / Disable

Integrated 1.05 V VRMs is enabled when high. This signal should always be pulled high

DMI and FDI Tx/Rx Termination Voltage

Weak internal pull-down. It needs to be connected to PROC_SELECT with a 1K±5% pull-up resistor to PCH VCCPNAND rail and a 4.7K±5% series resistor.

Boot BIOS Strap bit 0

This Signal has a weak internal pull-up. Note: This field determines the destination of accesses to the BIOS memory range. This strap is used in conjunction with Boot BIOS Destination Selection 1 strap. Bit11 Bit 10 Boot BIOS Destination 0 1 Reserved 1 0 PCI 1 1 SPI 0 0 LPC

Signal has a weak internal pull-down. Default: the security measures defined in the Flash Descriptor will be in effect. Pull-up: the Flash Descriptor Security will be overridden. This strap should only be asserted high via external pull-up in manufacturing or debug environments ONLY.

On-Die PLL Voltage Regulator Voltage Select

This signal has a weak internal pull-down. On Die PLL VR is supplied by 1.5 V when sampled high, 1.8 V when sampled low. Needs to be pulled High for Huron River platform.

TLS Confidentiality

Low - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality High - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality This signal has a weak internal pull-down.



NOTE: A strong pull-up may be needed for GPIO functionality

Deep S4/S5 Well On-Die Voltage Regulator Enable

This signal enables the internal Deep Sleep 1.05 V regulators. This signal must be always pulled-up to VccRTC.

On-Die PLL Voltage Regulator

This signal has a weak internal pull-up. The On-Die PLL voltage regulator is enabled when sampled high. When sampled low the On-Die PLL Voltage Regulator is disabled. If not used, 8.2-kȍ to 10-kȍ pull-up to +V3.3A power-rail.

4

3

Processor Strapping

Pin Name Strap Description Configuration (Default value for each bit is

CFG[2]

CFG[4]

CFG[6:5]

CFG[7]

POWER PLANE

5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_VTT 0D85V_S0 0D75V_S0 VCC_CORE VCC_GFXCORE

5V_USBX_S3 1D5V_S3 DDR_VREF_S3

BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_S5

PCI-Express Static Lane Reversal

Display Port Presence strap

PCI-Express Port Bifurcation Straps

PEG DEFER TRAINING

VOLTAGE DESCRIPTION

5V

3.3V

1.8V

1.5V

1.05V

0.95 - 0.85V

0.75V

0.35V to 1.5V

0.4 to 1.25V

5V

1.5V

0.75V

6V-14.1V 6V-14.1V 5V 5V

3.3V

3.3V3D3V_LAN_S5

3.3V

1 unless specified otherwise)

1:

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Disabled - No Physical Display Port attached to

1:

Embedded Display Port.

Enabled - An external Display Port device is

0:

connectd to the Embedded Display Port

11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01 : Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled

1:

PEG Train immediately following xxRESETB de assertion PEG Wait for BIOS for training

0:

Voltage Rails

ACTIVE IN

S0

S3

All S states

WOL_EN

DSW, Sx ON for supporting Deep Sleep states

G3, Sx

2

Huron River Schematic Checklist Rev.1_0

CPU Core Rail Graphics Core Rail

AC Brick Mode only

Legacy WOL

Powered by Li Coin Cell in G3 and +V3ALW in Sx

Default Value

0

1

11

1

USB Table

PCIE Routing

LANE1

LANE2

LANE3

LANE4

A A

LANE5

LANE6

LANE7

X

LAN (I/O Board)

Mini Card2(WWAN)

Mini Card1(WLAN)

USB3.0

Card Reader

X

SATA Table

SATA

Pair

0

1

2

3

4

5

Device

HDD1

N/A

ODD

N/A

LANE8 X

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

5

4

Device

X

Mini Card2 (WWAN)

X

Mini Card1 (WLAN)

CAMERA

X

http://hobi-elektronika.net

SMBus ADDRESSES

2

I C / SMBus Addresses

Device

EC SMBus 1 Battery Capacity Board

EC SMBus 2 PCH MXM LCD Thermal Sensor

PCH SMBus CK505 Clock Generator SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot

3

HURON RIVER ORB

Address Hex Bus Ref Des

KBC_SDA1/KBC_SCL1 KBC_SDA1/KBC_SCL1

KBC_SDA2/KBC_SCL2 KBC_SDA2/KBC_SCL2 KBC_SDA2/KBC_SCL2 KBC_SDA2/KBC_SCL2

PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

DB13 DIS

3 105Friday, November 26, 2010

1

of

X00

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3

2

1

SSID = CPU

Signal Routing Guideline: PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

1 OF 9

CPU1A

D D

C C

Note: Intel DMI supports both Lane Reversal and polarity inversion but only at PCH side. This is enabled via a soft strap.

Note: Intel FDI supports both Lane Reversal and polarity inversion but only at PCH side. This is enabled via a soft strap.

Note: Lane reversal does not apply to FDI sideband signals.

1D05V_VTT

DMI_TXN[3:0](19)

DMI_TXP[3:0](19)

DMI_RXN[3:0](19)

DMI_RXP[3:0](19)

FDI_TXN[7:0](19)

FDI_TXP[7:0](19)

FDI_FSYNC0(19) FDI_FSYNC1(19)

FDI_INT(19)

FDI_LSYNC0(19) FDI_LSYNC1(19)

R402 24D9R2F-L-GPR402 24D9R2F-L-GP

1 2

X00 1111 Del R403

B B

NOTE. Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

Signal Routing Guideline: EDP_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. EDP_COMPIO keep W/S=4/15 mils and routing length less than 500 mils.

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

DP_COMP

M2

DMI_RX#0

P6

DMI_RX#1

P1

DMI_RX#2

P10

DMI_RX#3

N3

DMI_RX0

P7

DMI_RX1

P3

DMI_RX2

P11

DMI_RX3

K1

DMI_TX#0

M8

DMI_TX#1

N4

DMI_TX#2

R2

DMI_TX#3

K3

DMI_TX0

M7

DMI_TX1

P4

DMI_TX2

T3

DMI_TX3

U7

FDI0_TX#0

W11

FDI0_TX#1

W1

FDI0_TX#2

AA6

FDI0_TX#3

W6

FDI1_TX#0

V4

FDI1_TX#1

Y2

FDI1_TX#2

AC9

FDI1_TX#3

U6

FDI0_TX0

W10

FDI0_TX1

W3

FDI0_TX2

AA7

FDI0_TX3

W7

FDI1_TX0

T4

FDI1_TX1

AA3

FDI1_TX2

AC8

FDI1_TX3

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

EDP_COMPIO

AD2

EDP_ICOMPO

AG11

EDP_HPD

AG4

EDP_AUX#

AF4

EDP_AUX

AC3

EDP_TX#0

AC4

EDP_TX#1

AE11

EDP_TX#2

AE7

EDP_TX#3

AC1

EDP_TX0

AA4

EDP_TX1

AE10

EDP_TX2

AE6

EDP_TX3

SANDYBRIDGE-1-GP-U-NF

DMI

Intel(R) FDI

DP

1 OF 9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8

PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15

SANDYBRIDGE

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9

PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15

PCI EXPRESS -- GRAPHICS

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

PEG_IRCOMP_R

PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0

PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0

PEG_C_TXN15 PEG_C_TXN14 PEG_C_TXN13 PEG_C_TXN12 PEG_C_TXN11 PEG_C_TXN10 PEG_C_TXN9 PEG_C_TXN8 PEG_C_TXN7 PEG_C_TXN6 PEG_C_TXN5 PEG_C_TXN4 PEG_C_TXN3 PEG_C_TXN2 PEG_C_TXN1 PEG_C_TXN0

PEG_C_TXP15 PEG_C_TXP14 PEG_C_TXP13 PEG_C_TXP12 PEG_C_TXP11 PEG_C_TXP10 PEG_C_TXP9 PEG_C_TXP8 PEG_C_TXP7 PEG_C_TXP6 PEG_C_TXP5 PEG_C_TXP4 PEG_C_TXP3 PEG_C_TXP2 PEG_C_TXP1 PEG_C_TXP0

R401 24D9R2F-L-GPR401 24D9R2F-L-GP

1 2

PEG_RXN[0..15]

PEG_RXP[0..15]

C401 SCD22U10V2KX-1GPC401 SCD22U10V2KX-1GP

1 2

C402 SCD22U10V2KX-1GPC402 SCD22U10V2KX-1GP

1 2

C403 SCD22U10V2KX-1GPC403 SCD22U10V2KX-1GP

1 2

C404 SCD22U10V2KX-1GPC404 SCD22U10V2KX-1GP

1 2

C405 SCD22U10V2KX-1GPC405 SCD22U10V2KX-1GP

1 2

C406 SCD22U10V2KX-1GPC406 SCD22U10V2KX-1GP

1 2

C407 SCD22U10V2KX-1GPC407 SCD22U10V2KX-1GP

1 2

C408 SCD22U10V2KX-1GPC408 SCD22U10V2KX-1GP

1 2

C409 SCD22U10V2KX-1GPC409 SCD22U10V2KX-1GP

1 2

C410 SCD22U10V2KX-1GPC410 SCD22U10V2KX-1GP

1 2

C411 SCD22U10V2KX-1GPC411 SCD22U10V2KX-1GP

1 2

C412 SCD22U10V2KX-1GPC412 SCD22U10V2KX-1GP

1 2

C413 SCD22U10V2KX-1GPC413 SCD22U10V2KX-1GP

1 2

C414 SCD22U10V2KX-1GPC414 SCD22U10V2KX-1GP

1 2

C415 SCD22U10V2KX-1GPC415 SCD22U10V2KX-1GP

1 2

C416 SCD22U10V2KX-1GPC416 SCD22U10V2KX-1GP

1 2

C417 SCD22U10V2KX-1GPC417 SCD22U10V2KX-1GP

1 2

C418 SCD22U10V2KX-1GPC418 SCD22U10V2KX-1GP

1 2

C419 SCD22U10V2KX-1GPC419 SCD22U10V2KX-1GP

1 2

C420 SCD22U10V2KX-1GPC420 SCD22U10V2KX-1GP

1 2

C421 SCD22U10V2KX-1GPC421 SCD22U10V2KX-1GP

1 2

C422 SCD22U10V2KX-1GPC422 SCD22U10V2KX-1GP

1 2

C423 SCD22U10V2KX-1GPC423 SCD22U10V2KX-1GP

1 2

C424 SCD22U10V2KX-1GPC424 SCD22U10V2KX-1GP

1 2

C425 SCD22U10V2KX-1GPC425 SCD22U10V2KX-1GP

1 2

C426 SCD22U10V2KX-1GPC426 SCD22U10V2KX-1GP

1 2

C427 SCD22U10V2KX-1GPC427 SCD22U10V2KX-1GP

1 2

C428 SCD22U10V2KX-1GPC428 SCD22U10V2KX-1GP

1 2

C429 SCD22U10V2KX-1GPC429 SCD22U10V2KX-1GP

1 2

C430 SCD22U10V2KX-1GPC430 SCD22U10V2KX-1GP

1 2

C431 SCD22U10V2KX-1GPC431 SCD22U10V2KX-1GP

1 2

C432 SCD22U10V2KX-1GPC432 SCD22U10V2KX-1GP

1 2

1D05V_VTT

PEG_RXN[0..15] (83)

PEG_RXP[0..15] (83)

NOTE. If PEG is not implemented, the RX&TX pairs can be left as No Connect

PEG_TXN[0..15]

PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0

PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0

PEG_TXP[0..15]

PEG_TXN[0..15] (83)

PEG_TXP[0..15] (83)

Stuff to disable internal graphics function for power saving.

A A

http://hobi-elektronika.net

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU 1/7(PEG/DMI/FDI/eDP)

Size Document Number Rev

Date: Sheet

CPU 1/7(PEG/DMI/FDI/eDP)

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

of

4 105Friday, November 26, 2010

of

4 105Friday, November 26, 2010

of

4 105Friday, November 26, 2010

X00

5

SSID = CPU

1D05V_VTT

R501

D D

C C

7,31,32,35,65,66,71,83)

R501

1 2

62R2J-GP

H_PROCHOT#

CRB : 47pf CEKLT:43pf

R503

1 2

PLT_RST#

12

C502

C502 SC47P50V2JN-3GP

SC47P50V2JN-3GP

Connect EC to PROCHOT# through inverting OD buffer.

10KR2J-3-GP

1 2

1K5R2F-2-GP

EDS R1.5: BGA have different name with rPGA

X00 1008

H_SNB_IVB#(18)

TP501TPAD14-GP TP501TPAD14-GP

TP502TPAD14-GP TP502TPAD14-GP

H_PECI(22,27)

H_PROCHOT#(27,40,42)

H_THERMTRIP#(22,36)

H_CPUPWRGD_R

H_PM_SYNC(19)

H_CPUPWRGD(22,36)

PM_DRAM_PWRGD(19,37)

VDDPWRGOOD(37)

R510

12

R509

R509 750R2F-GP

750R2F-GP

1

R513

1 2

56R2J-4-GP

20100923 X01 Modify: Change R504 to 0R0402 short pad from 0ohm.

R504

1 2

0R0402-PAD

R505

1 2

DY

12

C501

DY

SC220P50V2KX-3GP

SKTOCC#_R

H_CATERR#

H_PROCHOT#_R

H_CPUPWRGD_R

VDDPWRGOOD

0R2J-2-GP

BUF_CPU_RST#

4

CPU1B

MISC

F49

PROC_SELECT#

C57

PROC_DETECT#

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

C48

PM_SYNC

B46

UNCOREPWRGOOD

BE45

SM_DRAMPWROK

D44

RESET#

SANDYBRIDGE-1-GP-U-NF

THERMAL

SANDYBRIDGE

PWR MANAGEMENT

3

2 OF 9

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

MISC

BCLK_ITP

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PRDY# PREQ#

TCK TMS

TRST#

TDO

DBR#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

TDI

CLOCKS

DDR3

JTAG & BPM

J3 H2

AG3 AG1

N59 N58

AT30

BF44 BE43 BG43

N53 N55

L56 L55 J58

M60 L59

K58

G58 E55 E59 G55 G59 H60 J59 J61

CLK_DP_P_R CLK_DP_N_R

TEST_ITP TEST_ITP#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_PRDY# XDP_PREQ#

XDP_TCLK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

R512

1 2

1KR2J-1-GP

R514

1 2

1KR2J-1-GP

1

TP513 TPAD14-GPTP513 TPAD14-GP

1

TP514 TPAD14-GPTP514 TPAD14-GP

R502

1 2

4K99R2F-L-GP

R506 140R2F-GPR506 140R2F-GP

1 2

R507 25D5R2F-GPR507 25D5R2F-GP

1 2

R508 200R2F-L-GPR508 200R2F-L-GP

1 2

1

TP511 TPAD14-GPTP511 TPAD14-GP

1

TP512 TPAD14-GPTP512 TPAD14-GP

XDP_DBRESET# (19)

1 1 1 1 1 1 1 1

2

CLK_EXP_P (20) CLK_EXP_N (20)

1D05V_VTT

X00 1011

SM_DRAMRST# (37)

TP503 TPAD14-GPTP503 TPAD14-GP TP504 TPAD14-GPTP504 TPAD14-GP TP505 TPAD14-GPTP505 TPAD14-GP TP506 TPAD14-GPTP506 TPAD14-GP TP507 TPAD14-GPTP507 TPAD14-GP TP508 TPAD14-GPTP508 TPAD14-GP TP509 TPAD14-GPTP509 TPAD14-GP TP510 TPAD14-GPTP510 TPAD14-GP

Disabling Guidelines: If motherboard only supports external graphics: Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5% resistorpower (~15 mW) may be wasted.

Signal Routing Guideline: SM_RCOMP keep routing length less than 500 mils.

1

X00 1011

XDP_TDI XDP_TMS XDP_TDO XDP_TCLK

XDP_TRST#

RN501

1

8

2

7

3

6

4 5

SRN51J-1-GP

R511 51R2J-2-GPR511 51R2J-2-GP

1 2

1D05V_VTT

3D3V_S0

XDP_DBRESET#

B B

DY

VCC

1D05V_VTT

DY

5

4

12

R518

R518 75R2J-1-GP

75R2J-1-GP

3D3V_S0

12

C503

DY

SCD1U10V2KX-5GP

1 2

DY

R517 43R2J-GP

DY

12

0R2J-2-GP

BUF_CPU_RST#BUFO_CPU_RST#

R515

0617 Modify:Joseph Removed U501 Buffer reset to CPU circuit. 2010/07/19 Add buffer for PLT_RST# based on Intel review. 2010/07/20 DY buffer circuit and add R510, R509 and C501

2010/07/20 Change U501 to 73.01G09.AAH

Buffered reset to CPU

U501

1

IN B

A A

PLT_RST#(18,27,31,32,35,65,66,71,83)

2

IN A

GND3OUT Y

74VHC1G09DFT2G-GP

73.01G09.AAH

http://hobi-elektronika.net

For XDP connector no enough space 6/28

Title

CPU 2/7(THERMAL/CLOCK/PM )

Size Document Number Rev

Date: Sheet

1 2

20100722 Modify: Change R516 10K from 1K

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

R516

R516 10KR2J-3-GP

10KR2J-3-GP

5 105Friday, November 26, 2010

X00

of

X00

5

SSID = CPU

4

3

2

1

3 OF 9

CPU1C

M_A_DQ[63:0](14)

D D

C C

B B

M_A_DQ[63:0]

M_A_BS0(14) M_A_BS1(14) M_A_BS2(14)

M_A_CAS#(14) M_A_RAS#(14) M_A_WE#(14)

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AG6

AP11

AJ10

AR11

AP6 AU6 AV9 AR6 AP8

AT13

AU13

BC7

BB7 BA13 BB11

BA7

BA9

BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45

AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54

AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37

BF36 BA28

BE39 BD39

AT41

CPU1C

SA_DQ0

AJ6

SA_DQ1 SA_DQ2

AL6

SA_DQ3 SA_DQ4

AJ8

SA_DQ5

AL8

SA_DQ6

AL7

SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1 SA_BS2

SA_CAS# SA_RAS# SA_WE#

SANDYBRIDGE

DDR SYSTEM MEMORY A

3 OF 9

SA_CLK0

SA_CLK#0

SA_CKE0

SA_CLK1

SA_CLK#1

SA_CKE1

SA_CS#0 SA_CS#1

SA_ODT0 SA_ODT1

SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

AU36 AV36 AY26

AT40 AU40 BB26

BB40 BC41

AY40 BA41

AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DIM0_CLK_DDR0 (14) M_A_DIM0_CLK_DDR#0 (14) M_A_DIM0_CKE0 (14)

M_A_DIM0_CLK_DDR1 (14) M_A_DIM0_CLK_DDR#1 (14) M_A_DIM0_CKE1 (14)

M_A_DIM0_CS#0 (14) M_A_DIM0_CS#1 (14)

M_A_DIM0_ODT0 (14) M_A_DIM0_ODT1 (14)

M_A_DQS#[7:0] (14)

M_A_DQS[7:0] (14)

M_A_A[15:0] (14)

M_B_DQ[63:0](15)

M_B_DQ[63:0]

M_B_BS0(15) M_B_BS1(15) M_B_BS2(15)

M_B_CAS#(15) M_B_RAS#(15) M_B_WE#(15)

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9

BD13

BF12

BF8 BD10 BD14 BE13

BF16 BE17 BE18 BE21 BE14 BG14 BG18

BF19 BD50

BF48 BD53

BF52 BD49 BE49 BD54 BE53

BF56 BE57 BC59 AY60 BE54 BG54 BA58

AW59 AW58

AU58 AN61 AN59 AU59 AU61 AN58 AR58 AK58

AL58 AG58 AG59 AM60

AL59

AF61 AH60

BG39 BD42

AT22

AV43

BF40 BD45

4 OF 9

CPU1D

AL4

SB_DQ0

AL1

SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0 SB_BS1 SB_BS2

SB_CAS# SB_RAS# SB_WE#

SANDYBRIDGE

DDR SYSTEM MEMORY B

4 OF 9

SB_CLK0

SB_CLK#0

SB_CKE0

SB_CLK1

SB_CLK#1

SB_CKE1

SB_CS#0 SB_CS#1

SB_ODT0 SB_ODT1

SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

BA34 AY34 AR22

BA36 BB36 BF27

BE41 BE47

AT43 BG47

AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59

AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61

BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DIM0_CLK_DDR0 (15) M_B_DIM0_CLK_DDR#0 (15) M_B_DIM0_CKE0 (15)

M_B_DIM0_CLK_DDR1 (15) M_B_DIM0_CLK_DDR#1 (15) M_B_DIM0_CKE1 (15)

M_B_DIM0_CS#0 (15) M_B_DIM0_CS#1 (15)

M_B_DIM0_ODT0 (15) M_B_DIM0_ODT1 (15)

M_B_DQS#[7:0] (15)

M_B_DQS[7:0] (15)

M_B_A[15:0] (15)

SANDYBRIDGE-1-GP-U-NF

A A

5

4

http://hobi-elektronika.net

3

SANDYBRIDGE-1-GP-U-NF

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU 3/7(DDR)

DB13 DIS

1

of

6 105Friday, November 26, 2010

of

6 105Friday, November 26, 2010

of

6 105Friday, November 26, 2010

X00

5

4

3

2

1

SSID = CPU

BGA pin out modify

5 OF 9

CPU1E

X00 1011

CFG2

CFG4 CFG5

D D

C C

CFG6

Remove to Page 8, BGA pin out

X00 1011

CPU1E

B50

CFG0

C51

CFG1

B54

CFG2

D53

CFG3

A51

CFG4

C53

CFG5

C55

CFG6

H49

CFG7

A55

CFG8

H51

CFG9

K49

CFG10

K53

CFG11

F53

CFG12

G53

CFG13

L51

CFG14

F51

CFG15

D52

CFG16

L53

CFG17

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD#H48

K48

RSVD#K48

BA19

RSVD#BA19

AV19

RSVD#AV19

AT21

RSVD#AT21

BB21

RSVD#BB21

BB19

RSVD#BB19

AY21

RSVD#AY21

BA22

RSVD#BA22

AY22

RSVD#AY22

AU19

RSVD#AU19

AU21

RSVD#AU21

BD21

RSVD#BD21

BD22

RSVD#BD22

BD25

RSVD#BD25

BD26

RSVD#BD26

BG22

RSVD#BG22

BE22

RSVD#BE22

BG26

RSVD#BG26

BE26

RSVD#BE26

BF23

RSVD#BF23

BE24

RSVD#BE24

SANDYBRIDGE

RESERVED

5 OF 9

RSVD#BE7

RSVD#BG7

RSVD#N42

RSVD#L42 RSVD#L45 RSVD#L47

RSVD#M13 RSVD#M14 RSVD#U14

RSVD#W14

RSVD#P13

RSVD#AT49

RSVD#K24

RSVD#AH2 RSVD#AG13 RSVD#AM14 RSVD#AM15

RSVD#N50

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1

DC_TEST_A58 DC_TEST_A59

DC_TEST_C59

DC_TEST_A61 DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1 DC_TEST_BD1

X00 1116 remove M3

M_VREF_DQ_DIMM0_C

BE7

M_VREF_DQ_DIMM1_C

BG7

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4

DC_TEST_C4D3

C4 D3 D1 A58

DC_TEST_A59C59

A59 C59

DC_TEST_A61C61

A61 C61 D61 BD61

DC_TEST_BE61BE59

BE61 BE59

DC_TEST_BG61BG59

BG61 BG59 BG58 BG4

DC_TEST_BG3BE3

BG3 BE3

DC_TEST_BE1BG1

BG1 BE1 BD1

CFG5

CFG6

CFG4

CFG2

DY

12

R701

DY

1KR2J-1-GP

12

DY

12

R702

R702 1KR2J-1-GP

1KR2J-1-GP

R703

R703 3K3R2F-2-GP

3K3R2F-2-GP

PEG Static Lane Reversal

CFG2

PCIE Port Bifurcation Straps

R704

1KR2J-1-GP

CFG[6:5]

11: x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

PEG DEFER TRAINING

CFG7

1: PEG Train immediately following xxRESETB de assertion

0: PEG Wait for BIOS for training

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

Display Port Presence Strap

CFG4

1: Disabled; No Physical Display Port attached to Embedded Display Port

0: Enabled; An external Display Port device is connected to the Embedded Display Port

SANDYBRIDGE-1-GP-U-NF

B B

Intel CRB

X00 1011

X00 2010-11-16 Remove M3 - Processor Generated SO-DIMM VREF_DQ

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU 4/7(RESERVED)

Size Document Number Rev

Date: Sheet

CPU 4/7(RESERVED)

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

7 105Friday, November 26, 2010

of

7 105Friday, November 26, 2010

of

7 105Friday, November 26, 2010

1

X00

5

4

3

2

1

SSID = CPU

D D

X00 1008

VCCIO Output Decoupling Recommendation:

Modify VCCCORE Cap

X00 1011

VCC_CORE

PROCESSOR CORE POWER: 53A

12

C801

SC10U6D3V5KX-1GP

12

C818

C C

SC10U6D3V5KX-1GP

12

C822

C821

SC2D2U6D3V2CX-LL-GP

12

C858

C856

SC2D2U6D3V2CX-LL-GP

12

C802

SC10U6D3V5KX-1GP

Layout Note: 10u Cap place during CPU & IMVP

C819

SC10U6D3V5KX-1GP

12

SC2D2U6D3V2CX-LL-GP

12

SC2D2U6D3V2CX-LL-GP

C804

C803

SC10U6D3V5KX-1GP

12

C847

C849

SC10U6D3V5KX-1GP

12

C823

C824

SC2D2U6D3V2CX-LL-GP

Layout Note: 2.2u Cap place under CPU

12

C851

C861

SC2D2U6D3V2CX-LL-GP

POP rule: 1. MLCC number * 0.8

2. 22u-->10u

12

C811

SC10U6D3V5KX-1GP

12

C817

SC10U6D3V5KX-1GP

12

C826

C825

SC2D2U6D3V2CX-LL-GP

12

C853

C855

SC2D2U6D3V2CX-LL-GP

C814

C813

SC10U6D3V5KX-1GP

12

C837

C836

SC10U6D3V5KX-1GP

12

C828

C827

SC2D2U6D3V2CX-LL-GP

12

C859

C862

SC2D2U6D3V2CX-LL-GP

VCC_CORE

12

C815

C816

C812

SC10U6D3V5KX-1GP

12

SC10U6D3V5KX-1GP

12

C831

SC2D2U6D3V2CX-LL-GP

C852

SC2D2U6D3V2CX-LL-GP

12

C820

C846

SC10U6D3V5KX-1GP

12

C820

C848

SC10U6D3V5KX-1GP

12

C832

C833

SC2D2U6D3V2CX-LL-GP

12

C857

C854

SC2D2U6D3V2CX-LL-GP

C850

C835

C834

SC2D2U6D3V2CX-LL-GP

12

C863

C864

C860

SC2D2U6D3V2CX-LL-GP

VCC Output Decoupling CAP Recommendation:

1. 1.9m ohm loadline design:(for SV) 4 x 470 uF

B B

A A

25 x 22 uF 35 x 2.2uF

2. 2.9m ohm loadline design: (for ULV/LV) 3 x 330uF 12 x 22uF 16 x 2.2uF

Revised VCC decoupling Cap list

X00 1011

5

4

CPU1F

A26

VCC

A29

VCC

A31

VCC

A34

VCC

A35

VCC

A38

VCC

A39

VCC

A42

VCC

C26

VCC

C27

VCC

C32

VCC

C34

VCC

C37

VCC

C39

VCC

C42

VCC

D27

VCC

D32

VCC

D34

VCC

D37

VCC

D39

VCC

D42

VCC

E26

VCC

E28

VCC

E32

VCC

E34

VCC

E37

VCC

E38

VCC

F25

VCC

F26

VCC

F28

VCC

F32

VCC

F34

VCC

F37

VCC

F38

VCC

F42

VCC

G42

VCC

H25

VCC

H26

VCC

H28

VCC

H29

VCC

H32

VCC

H34

VCC

H35

VCC

H37

VCC

H38

VCC

H40

VCC

J25

VCC

J26

VCC

J28

VCC

J29

VCC

J32

VCC

J34

VCC

J35

VCC

J37

VCC

J38

VCC

J40

VCC

J42

VCC

K26

VCC

K27

VCC

K29

VCC

K32

VCC

K34

VCC

K35

VCC

K37

VCC

K39

VCC

K42

VCC

L25

VCC

L28

VCC

L33

VCC

L36

VCC

L40

VCC

N26

VCC

N30

VCC

N34

VCC

N38

VCC

SANDYBRIDGE-1-GP-U-NF

SANDYBRIDGE

CORE SUPPLY

POWER

6 OF 9

AF46

VCCIO

AG48

VCCIO

AG50

VCCIO

AG51

VCCIO

AJ17

VCCIO

AJ21

VCCIO

AJ25

VCCIO

AJ43

VCCIO

AJ47

VCCIO

AK50

VCCIO

AK51

VCCIO

AL14

VCCIO

AL15

VCCIO

AL16

VCCIO

AL20

VCCIO

AL22

VCCIO

AL26

VCCIO

AL45

VCCIO

AL48

VCCIO

AM16

VCCIO

AM17

VCCIO

AM21

VCCIO

AM43

VCCIO

AM47

VCCIO

AN20

VCCIO

AN42

VCCIO

AN45

VCCIO

AN48

VCCIO

AA14

VCCIO

AA15

VCCIO

AB17

VCCIO

AB20

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

VCCIO VCCIO

VCCIO_SEL

VCCPQE VCCPQE

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

AM25 AN22

A44 B43 C44

F43 G43

AN16 AN17

H_VCCP_SEL

X00 1008

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

PEG AND DDR

SVID QUIET RAILS

VSS_SENSE_VCCIO

SENSE LINES

http://hobi-elektronika.net

2 x 330 uF (3 x 330 uF for 2012 capable designs) 5 x 22 uF & 5 x 0805 no-stuff at Bottom 7 x 22 uF & 2 x 0805 no-stuff at Top

12

C871

12

C872

SC10U6D3V3MX-GP

+V1.05S_VCCP_DDR_R

12

C865

C866

SC10U6D3V3MX-GP

PROCESSOR VCCIO: 8.5A

12

C869

C867

C868

SC10U6D3V3MX-GP

12

C870

SC10U6D3V3MX-GP

Layout Note: 10u Cap place during CPU & VR

No-stuff sites outside the socket may be removed. No-stuff sites inside the socket cavity need to remain.

+V1.05S_VCCP_DDR_R

12

VCCPQE

12

C877

C888

C892

SC1U10V2KX-1GP

Layout Note: 1u Cap place under CPU

12

C875

C876

C874

SC1U10V2KX-1GP

PROCESSOR 1.05V Quiet rail for DDR block (BGA only)

+V1.05S_VCCPQE should be short to +V1.05S_VCCP_DDR_R on board

R807 0R2J-2-GP

1 2

DY

+V1.05S_VCCP_DDR_R

R808

1 2

0R2J-2-GP

C927

SC1U10V2KX-1GP

R803 43R2J-GPR803 43R2J-GP

1 2

VCCIO_SENSE (45) VSSIO_SENSE (45)

12

C885

C890

SC1U10V2KX-1GP

12

C880

C878

SC1U10V2KX-1GP

12

C891

C873

C879

SC1U10V2KX-1GP

12

C883

C882

C881

SC1U10V2KX-1GP

X00 1011

+V1.05S_VCCP_DDR_R 1D05V_VTT

VR_SVID_ALERT# (42)

H_CPU_SVIDCLK (42)

H_CPU_SVIDDAT (42)

VCC_CORE

12

R801

R801 100R2F-L1-GP-U

100R2F-L1-GP-U

R802

R802 100R2F-L1-GP-U

100R2F-L1-GP-U

For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7 For CRB VIDALERT# need to pull high 75 ohm close to CPU

Place near processor

3

X00 1008

X00 1011

12

C887

C889

SC1U10V2KX-1GP

12

C886

C884

SC1U10V2KX-1GP

1 2

R809 D01RL0816F-L-GPR809 D01RL0816F- L-GP

1 2

R810 D01RL0816F-L-GPR810 D01RL0816F- L-GP

VCCSENSE (42) VSSSENSE (42)

These resistors need to close to power IC.

1D05V_VTT

X00 1125

2

VR_SVID_ALERT#

H_CPU_SVIDDAT

R805 75R2J-1-GPR805 75R2J-1-GP

1 2

R804 130R2F-1-GPR804 130R2F-1-GP

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

CPU 5/7(VCC_CORE)

DB13 DIS

1

8 105Friday, Novemb er 26, 2010

of

X00

5

SSID = CPU

D D

X00 1011

VCC_GFXCORE

12

C901

12

C906

X00 1011

VAXG Output Decoupling CAP Recommendation:

1. 3.9m ohm loadline design:(for GT2) 2 x 470 uF 6 x 22 uF (0805) 6 x 10 uF (0603) 11 x 1 uF (0402)

2. 4.6m ohm loadline design:(for GT1) 2 x 330 uF 5 x 22 uF (0805) 6 x 10 uF (0603) 6 x 1 uF (0402)

C C

12

C921

12

C920

SC1U10V2KX-1GP

X00 1011

Disabling Guidelines for External Graphics Designs: Can connect to GND if motherboard only supports external graphics and if GFX VR is not stuffed. Can be left floating (Gfx VR keeps VAXG rail from floating) if the VR is stuffed

VCC_AXG_SENSE(42)

B B

VCCPLL Output Decoupling Recommendation: 1 x 330 uF 2 x 1 uF 1 x 10 uF

A A

VCCSA Output Decoupling Recommendation: 1 x 330 uF 5 x 10 uF (0603) 5 x 1uF (0402)

5

VSS_AXG_SENSE(42)

X00 1011

1D8V_S0

0D85V_S0

12

C938

Layout Note: Place under CPU

12

C940

4

PROCESSOR VAXG: 33A (for GT2)

12

C902

SC10U6D3V5KX-1GP

12

C908

SC10U6D3V3MX-GP

12

C929

C928

SC1U10V2KX-1GP

VCC_AXG_SENSE VSS_AXG_SENSE

12

C931

VCC_GFXCORE

C903

SC10U6D3V5KX-1GP

12

C934

C935

SC10U6D3V3MX-GP

12

C930

SC1U10V2KX-1GP

12

R906

R906 10R2F-N1-GP

10R2F-N1-GP

12

R907

R907 10R2F-N1-GP

10R2F-N1-GP

C904

SC10U6D3V5KX-1GP

12

SC10U6D3V3MX-GP

12

C933

SC1U10V2KX-1GP

12

PROCESSOR VCCPLL: 1.2A

12

C923

SC10U6D3V5KX-1GP

12

C922

SC1U10V2KX-1GP

C924

SC1U10V2KX-1GP

PROCESSOR VCCSA: 6A

12

C937

SC10U6D3V3MX-GP

12

C942

SC1U10V2KX-1GP

4

12

C939

SC10U6D3V3MX-GP

12

C943

SC1U10V2KX-1GP

12

C941

SC10U6D3V3MX-GP

12

C944

SC1U10V2KX-1GP

C905

SC10U6D3V5KX-1GP

C936

SC10U6D3V3MX-GP

12

C932

SC1U10V2KX-1GP

3

CPU1G

AA46

VAXG

AB47

VAXG

AB50

VAXG

AB51

VAXG

AB52

VAXG

AB53

VAXG

AB55

VAXG

AB56

VAXG

AB58

VAXG

AB59

VAXG

AC61

VAXG

AD47

VAXG

AD48

VAXG

AD50

VAXG

AD51

VAXG

AD52

VAXG

AD53

VAXG

AD55

VAXG

AD56

VAXG

AD58

VAXG

AD59

VAXG

AE46

VAXG

N45

VAXG

P47

VAXG

P48

VAXG

P50

VAXG

P51

VAXG

P52

VAXG

P53

VAXG

P55

VAXG

P56

VAXG

P61

VAXG

T48

VAXG

T58

VAXG

T59

VAXG

T61

VAXG

U46

VAXG

V47

VAXG

V48

VAXG

V50

VAXG

V51

VAXG

V52

VAXG

V53

VAXG

V55

VAXG

V56

VAXG

V58

VAXG

V59

VAXG

W50

VAXG

W51

VAXG

W52

VAXG

W53

VAXG

W55

VAXG

W56

VAXG

W61

VAXG

Y48

VAXG

Y61

VAXG

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL

BC1

VCCPLL

BC4

VCCPLL

L17

VCCSA

L21

VCCSA

N16

VCCSA

N20

VCCSA

N22

VCCSA

P17

VCCSA

P20

VCCSA

R16

VCCSA

R18

VCCSA

R21

VCCSA

U15

VCCSA

V16

VCCSA

V17

VCCSA

V18

VCCSA

V21

VCCSA

W20

VCCSA

SANDYBRIDGE-1-GP-U-NF

http://hobi-elektronika.net

SANDYBRIDGE

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

3

POWER

SENSE LINES

SM_VREF

DDR3 - 1.5V RAILS

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

VCCSA_VID VCCSA_VID

EDS R1.5: rPGA988 PinC22 BGA1023 PinD48

2

Refer to the latest Huron River Mainstream PDG (Doc# 436735) for more details on S3 power

7 OF 9

reduction implementation.

+V_SM_VREF_CNT should have 20 mil trace width 20 mil spacing

X00 1008

+V_SM_VREF_CNT

12

C958

SC10U6D3V3MX-GP

Layout Note: Place during CPU & VR

Layout Note: Place under CPU

12

C952

SC1U10V2KX-1GP

TacomaFalls_Schm_Rev0p5

R901

1 2

0R2J-2-GP

12

C926

SC1U10V2KX-1GP

0R2J-2-GP

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCCDQ VCCDQ

AY43

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

AM28 AN26

PROCESSOR DDR 1.5V QUIET RAIL (BGA only)

+V1.5S_VCCD_Q should be short to +V1.5S_VCCDDQ on board

TP_VDDQ_SENSE

BC43

TP_VDDQ_VSS

BA43

U10

D48 D49

1 1

VCCUSA_SENSE

H_FC_C22 VCCSA_SEL

TP901 TPAD14-GPTP901 TPAD14-GP TP902 TPAD14-GPTP902 TPAD14-GP

1

23

RN901

RN901 SRN1KJ-7-GP

SRN1KJ-7-GP

4

H_FC_C22 (48) VCCSA_SEL (48)

2

+V_SM_VREF_CNT (37)

12

C954

C953

SC10U6D3V3MX-GP

12

C945

SC1U10V2KX-1GP

1D5V_S01D5V_VCCDQ

X00 1007

1

Routing Guideline: Power from DDR_VREF_S3 and +V_SM_VREF_CNT should have 10 mils trace width.

X00 1124

PROCESSOR VDDQ: 10A

12

C955

C956

SC10U6D3V3MX-GP

12

C946

SC1U10V2KX-1GP

C948

SC1U10V2KX-1GP

C947

S3 power reduction 1.5V power plan; stitching Cap

VCCUSA_SENSE (48)

Title

CPU 6/7(VCC_GFX_CORE)

Size Document Number Rev

Date: Sheet

CPU 6/7(VCC_GFX_CORE)

1D5V_S0

12

SC10U6D3V3MX-GP

12

SC1U10V2KX-1GP

VDDQ Output Decoupling Recommendation: 1 x 330 uF 6 x 10 uF

C907 SCD1U10V2KX-5GP

1 2

C918 SCD1U10V2KX-5GP

1 2

C919 SCD1U10V2KX-5GP

1 2

C925 SCD1U10V2KX-5GP

1 2

DB13 DIS

12

C957

TC901

TC901 ST330U2VDM-4-GP

ST330U2VDM-4-GP

SC10U6D3V3MX-GP

Layout Note: Place near SM_VREF pin

12

C950

SC1U10V2KX-1GP

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

C951

C949

SC1U10V2KX-1GP

1D5V_S31D5V_S0

1

SC1U10V2KX-1GP

9 105Friday, November 26, 2010

X00 1011

of

X00

5

4

3

2

1

SSID = CPU

D D

C C

B B

A A

5

CPU1H

A13

VSS

A17

VSS

A21

VSS

A25

VSS

A28

VSS

A33

VSS

A37

VSS

A40

VSS

A45

VSS

A49

VSS

A53

VSS

A9

VSS

AA1

VSS

AA13

VSS

AA50

VSS

AA51

VSS

AA52

VSS

AA53

VSS

AA55

VSS

AA56

VSS

AA8

VSS

AB16

VSS

AB18

VSS

AB21

VSS

AB48

VSS

AB61

VSS

AC10

VSS

AC14

VSS

AC46

VSS

AC6

VSS

AD17

VSS

AD20

VSS

AD4

VSS

AD61

VSS

AE13

VSS

AE8

VSS

AF1

VSS

AF17

VSS

AF21

VSS

AF47

VSS

AF48

VSS

AF50

VSS

AF51

VSS

AF52

VSS

AF53

VSS

AF55

VSS

AF56

VSS

AF58

VSS

AF59

VSS

AG10

VSS

AG14

VSS

AG18

VSS

AG47

VSS

AG52

VSS

AG61

VSS

AG7

VSS

AH4

VSS

AH58

VSS

AJ13

VSS

AJ16

VSS

AJ20

VSS

AJ22

VSS

AJ26

VSS

AJ30

VSS

AJ34

VSS

AJ38

VSS

AJ42

VSS

AJ45

VSS

AJ48

VSS

AJ7

VSS

AK1

VSS

AK52

VSS

AL10

VSS

AL13

VSS

AL17

VSS

AL21

VSS

AL25

VSS

AL28

VSS

AL33

VSS

AL36

VSS

AL40

VSS

AL43

VSS

AL47

VSS

AL61

VSS

AM13

VSS

AM20

VSS

AM22

VSS

AM26

VSS

AM30

VSS

AM34

VSS

SANDYBRIDGE-1-GP-U-NF

SANDYBRIDGE

VSS

4

8 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

http://hobi-elektronika.net

3

CPU1I

BG17

VSS

BG21

VSS

BG24

VSS

BG28

VSS

BG37

VSS

BG41

VSS

BG45

VSS

BG49

VSS

BG53

VSS

BG9

VSS

C29

VSS

C35

VSS

C40

VSS

D10

VSS

D14

VSS

D18

VSS

D22

VSS

D26

VSS

D29

VSS

D35

VSS

D4

VSS

D40

VSS

D43

VSS

D46

VSS

D50

VSS

D54

VSS

D58

VSS

D6

VSS

E25

VSS

E29

VSS

E3

VSS

E35

VSS

E40

VSS

F13

VSS

F15

VSS

F19

VSS

F29

VSS

F35

VSS

F40

VSS

F55

VSS

G48

VSS

G51

VSS

G6

VSS

G61

VSS

H10

VSS

H14

VSS

H17

VSS

H21

VSS

H4

VSS

H53

VSS

H58

VSS

J1

VSS

J49

VSS

J55

VSS

K11

VSS

K21

VSS

K51

VSS

K8

VSS

L16

VSS

L20

VSS

L22

VSS

L26

VSS

L30

VSS

L34

VSS

L38

VSS

L43

VSS

L48

VSS

L61

VSS

M11

VSS

M15

VSS

SANDYBRIDGE-1-GP-U-NF

SANDYBRIDGE

VSS

NCTF_VSS_NCTF#A5

NCTF_VSS_NCTF#A57

NCTF_VSS_NCTF#BC61

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

NCTF_VSS_NCTF#BG5

NCTF_VSS_NCTF#BG57

NCTF_VSS_NCTF#C3

NCTF

NCTF TEST PIN:

A5,A57,BC61,BG5,BG57,C3,E1,E61

NCTF TEST PIN:

A5,A57,BC61,BG5,BG57,C3,E1,E61

2

VSS_NCTF VSS_NCTF

NCTF_VSS_NCTF#E1

NCTF_VSS_NCTF#E61

9 OF 9

M4

VSS

M58

VSS

M6

VSS

N1

VSS

N17

VSS

N21

VSS

N25

VSS

N28

VSS

N33

VSS

N36

VSS

N40

VSS

N43

VSS

N47

VSS

N48

VSS

N51

VSS

N52

VSS

N56

VSS

N61

VSS

P14

VSS

P16

VSS

P18

VSS

P21

VSS

P58

VSS

P59

VSS

P9

VSS

R17

VSS

R20

VSS

R4

VSS

R46

VSS

T1

VSS

T47

VSS

T50

VSS

T51

VSS

T52

VSS

T53

VSS

T55

VSS

T56

VSS

U13

VSS

U8

VSS

V20

VSS

V61

VSS

W13

VSS

W15

VSS

W18

VSS

W21

VSS

W46

VSS

W8

VSS

Y4

VSS

Y47

VSS

Y58

VSS

Y59

VSS

TP_NCTP_A5

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

TP_NCTP_BC61

TP_NCTP_BG5

TP_NCTP_E61

1

TP1001 TPAD14-GPTP1001 TPAD14-GP

1

TP1002 TPAD14-GPTP1002 TPAD14-GP

1

TP1003 TPAD14-GPTP1003 TPAD14-GP

1

TP1004 TPAD14-GPTP1004 TPAD14-GP

Add NCTF test pin X00 1011

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU 7/7(VSS)

DB13 DIS

1

10 105Friday, November 26, 2010

X00

of

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, November 26, 2010

Date: Sheet

XDP

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

11 105

of

1

of

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

DB13 DIS

12 105Friday, November 26, 2010

of

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

13 105Friday, November 26, 2010

of

X00

5

4

3

2

1

SSID = MEMORY

X00 1111 Change to 62.10024.E21

DM1

H=4.0mm

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-135-GP

62.10024.E21

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM0

197

SA0

SA1_DIM0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

M_A_RAS# (6) M_A_WE# (6) M_A_CAS# (6)

M_A_DIM0_CS#0 (6) M_A_DIM0_CS#1 (6)

M_A_DIM0_CKE0 (6) M_A_DIM0_CKE1 (6)

M_A_DIM0_CLK_DDR0 (6) M_A_DIM0_CLK_DDR#0 (6)

M_A_DIM0_CLK_DDR1 (6) M_A_DIM0_CLK_DDR#1 (6)

PCH_SMBDATA (15,20,65,66,79) PCH_SMBCLK (15,20,65,66,79)

TS#_DIMM0_1 (15)

Layout Note: Place these Caps near SO-DIMMA.

PART NUMBER

62.10017.W01

SCD1U10V2KX-5GP

12

C1401

X00 1116 remove M3 circuit

DDR_VREF_S3

D D

12

C1423

SCD1U10V2KX-5GP

12

C1424

C1425

DY

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

M_A_BS2(6)

M_A_BS0(6) M_A_BS1(6)

M_A_DQ[63:0](6)

M_A_A[15:0] (6)

X00 1116 remove M3 circuit

DDR_VREF_S3

12

C1411

C C

SCD1U10V2KX-5GP

0D75V_S0

12

B B

C1412

DY

SC2D2U10V3KX-1GP

Place these caps close to VTT1 and VTT2.

12

C1419

DY

SC1U6D3V2KX-GP

12

C1413

12

C1420

SC1U6D3V2KX-GP

X00 1123

SCD1U10V2KX-5GP

C1421

12

C1422

C1418

DY

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

M_A_DQS#[7:0] (6)

M_A_DQS[7:0] (6)

M_A_DIM0_ODT0(6) M_A_DIM0_ODT1(6)

DDR_VREF_S3 DDR_VREF_S3

DDR3_DRAMRST#(15,37)

0D75V_S0

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

X00 1123

SA1_DIM0 SA0_DIM0

12

C1402

DY

1D5V_S3

SC2D2U10V3KX-1GP

Height TYPE

4.0mm

3D3V_S0

12

TC1401

DY

ST330U2VDM-4-GP

12

RN1401

2 3 1

SRN10KJ-5-GP

SODIMM A DECO UPLING

12

C1403

DY

SC10U6D3V5KX-1GP

12

C1415

C1414

SC1U6D3V2KX-GP

4

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

Thermal EVENT

TS#_DIMM0_1

12

C1405

C1404

DY

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

12

C1416

C1417

SC1U6D3V2KX-GP

C1406

12

C1407

DY

SC10U6D3V5KX-1GP

R1403

1 2

C1408

DY

SC10U10V5ZY-1GP

10KR2J-3-GP

12

C1409

SC10U6D3V5KX-1GP

3D3V_S0

12

DY

C1410

SC10U6D3V5KX-1GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

DDR3-DIMM1 SOCKET1

DB13 DIS

1

of

14 105Friday, November 26, 2010

of

14 105Friday, November 26, 2010

of

14 105Friday, November 26, 2010

X00

5

SSID = MEMORY

M_B_A[15:0] (6)

C1522

SCD1U10V2KX-5GP

12

M_B_BS2(6)

M_B_BS0(6) M_B_BS1(6)

M_B_DQ[63:0](6)

SCD1U10V2KX-5GP

C1521

SC1U6D3V2KX-GP

M_B_DQS#[7:0] (6)

M_B_DQS[7:0] (6)

M_B_DIM0_ODT0(6) M_B_DIM0_ODT1(6)

DDR_VREF_S3 DDR_VREF_S3

DDR3_DRAMRST#(14,37)

0D75V_S0

D D

C C

B B

X00 1116 remove M3 circuit

DDR_VREF_S3

12

C1523

SCD1U10V2KX-5GP

12

DY

DDR_VREF_S3

12

C1515

SCD1U10V2KX-5GP

Place these caps close to VTT1 and VTT2.

12

C1518

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

X00 1116 remove M3 circuit

0D75V_S0

DY

C1519

12

C1524

DY

SC2D2U10V3KX-1GP

12

C1517

C1516

SC2D2U10V3KX-1GP

12

C1520

DY

SC1U6D3V2KX-GP

X00 1123

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

H=5.2mm

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-108-GP

62.10017.X41

RAS#

CAS#

CS0#

CS1#

CKE0

CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1

NC#2

NC#/TEST

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM1

197

SA0

SA1_DIM1

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

M_B_RAS# (6) M_B_WE# (6) M_B_CAS# (6)

M_B_DIM0_CS#0 (6) M_B_DIM0_CS#1 (6)

M_B_DIM0_CKE0 (6) M_B_DIM0_CKE1 (6)

M_B_DIM0_CLK_DDR0 (6) M_B_DIM0_CLK_DDR#0 (6)

M_B_DIM0_CLK_DDR1 (6) M_B_DIM0_CLK_DDR#1 (6)

PCH_SMBDATA (14,20,65,66,79) PCH_SMBCLK (14,20,65,66,79)

TS#_DIMM0_1 (14)

PART NUMBER

20.F1207.204

12

C1501

C1502

DY

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

Layout Note: Place these Caps near SO-DIMMB.

Height TYPE

4.0mm

3D3V_S0

1D5V_S3

3D3V_S0

12

SA1_DIM1

SA0_DIM1

12

SODIMM B DECO UPLING

12

DY

12

R1501

R1501 10KR2J-3-GP

10KR2J-3-GP

R1502

R1502 10KR2J-3-GP

10KR2J-3-GP

12

C1503

DY

SC10U10V5ZY-1GP

12

C1511

SCD1U10V2KX-5GP

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

SO-DIMMB is pl aced farther from the Processor than SO-DIMM A

12

C1505

C1504

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

12

C1512

C1513

SC1U6D3V2KX-GP

C1506

C1514

2

12

C1507

DY

SC10U6D3V5KX-1GP

SC1U6D3V2KX-GP

C1508

12

C1509

C1510

DY

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

1

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

DDR3-DIMM2 SOCKET2

DB13 DIS

1

of

15 105Friday, November 26, 2010

of

15 105Friday, November 26, 2010

of

15 105Friday, November 26, 2010

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

DB13 DIS

16 105Friday, November 26, 2010

of

1

of

X00

5

3D3V_S0

RN1701

1 2 3

SRN2K2J-1-GP

D D

R1703

1 2

100KR2J-1-GP

4

L_CTRL_DATA L_CTRL_CLK

L_BKLT_EN

L_DDC_DATA(PAGE17): This signal is on the LVDS interface. This signal needs to be left NC if eDP is used for the local flat panel display

X00 1122

Place near PCH

Impedance:90 ohm

C C

X00 20101111

X00 1015

B B

12

R1701

R1701 2K37R2F-GP

2K37R2F-GP

Notes:

4

L_BKLT_EN(27)

LVDS_VDD_EN(49)

L_BKLT_CTRL(49)

LVDS_DDC_CLK_R(49) LVDS_DDC_DATA_R(49)

TP1701TPAD14-GP TP1701TPAD14-GP

RN1704

1 2 3

SRN0J-6-GP

LVDSA_CLK#(49)

LVDSA_CLK(49)

LVDSA_DATA0#(49)

LVDSA_DATA1#(49)

LVDSA_DATA2#(49)

LVDSA_DATA0(49)

LVDSA_DATA1(49)

LVDSA_DATA2(49)

LVDSB_CLK#(49)

LVDSB_CLK(49)

LVDSB_DATA0#(49)

LVDSB_DATA1#(49)

LVDSB_DATA2#(49)

LVDSB_DATA0(49)

LVDSB_DATA1(49)

LVDSB_DATA2(49)

SRN0J-6-GP

LVDS_DDC_CLK_R LVDS_DDC_DATA_R

L_CTRL_CLK L_CTRL_DATA

LVDS_IBG LVDS_VBG

1

LVDS_VREFH

4

LVDS_VREFL

X00 1015

DAC_IREF_R

12

R1702

1KR2D-1-GP

PCH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGAR-GP-U2-NF

3

4 OF 10

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

X00 1014

Cougar

Cougar Point

Point

LVDS

CRT

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

2

1103 Remove HDMI from PCH.

DP_PCH_DET_R

R5205 0R2J-2-GPR5205 0R2J-2-GP

1 2

1

PCH_DP_AUXN PCH_DP_AUXP

3D3V_S0

RN1702

1 2 3

SRN2K2J-1-GP

PCH_DP_AUXN (52) PCH_DP_AUXP (52) DP_PCH_DET (52)

PCH_DP_C0# (52) PCH_DP_C0 (52) PCH_DP_C1# (52) PCH_DP_C1 (52) PCH_DP_C2# (52) PCH_DP_C2 (52) PCH_DP_C3# (52) PCH_DP_C3 (52)

4

1K 0.5% 0402.

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PCH 1/9(LVDS/CRT/DDI)

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

of

17 105Friday, November 26, 2010

of

17 105Friday, November 26, 2010

of

17 105Friday, November 26, 2010

1

X00

5

4

3

2

1

SSID = PCH

RN1801

D D

3D3V_S0

INT_PIRQB# SATA_ODD_DA# INT_PIRQA#

R1801 4K7R2J-2-GP

A16 swap override Strap/Top-Block Swap Override jumper

PCI_GNT#3 Low = A16 swap

C C

GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19

0 0 LPC

0 1 Reserved

B B

A A

PLT_RST#7,31,32,35,65,66,71,83)

RN1801

1 2 3 4 5 6

SRN8K2J-2-GP-U

12

DY

override/Top-Block Swap Override enabled High = Default

R1802

1 2

DY

1KR2J-1-GP

R1803

1 2

DY

1KR2J-1-GP

BOOT BIOS Strap

11

12

R1816

DY

100KR2J-1-GP

5

10

INT_PIRQD#

9

HDD_FALL_INT1

8

INT_PIRQC#

7

USB30_SMI#

PCI_GNT3#

BBS_BIT1

BBS_BIT0

Reserved 01

SPI(Default)

R1807

1 2

0R2J-2-GP

12

C1801

DY

SC220P50V2KX-3GP

3D3V_S0

RN1803

DGPU_HOLD_RST# DGPU_PWR_EN#

BBS_BIT0 (21)

DGPU_HOLD_RST#(83)

DGPU_PWR_EN#(93)

TP1806TPAD14-GP TP1806TPAD14-GP

TP1807TPAD14-GP TP1807TPAD14-GP

DGPU_PWM_SELECT#

1

X00 1116 remove short pad

HDD_FALL_INT1(79)

SATA_ODD_DA#(56)

USB30_SMI#(35)

KB_LED_BL_DET(69)

20100923 X01 Modify: Change R1812,R1813,R1815,R1817 to 0R0402 short pad from 0ohm.

CLK_PCI_LPC(71) CLK_PCI_FB(20) CLK_PCI_KBC(27)

EC1802

1 2

DY

PCI_PLTRST#

4

R1804 22R2J-2-GPR1804 22R2J-2-GP

1 2

R1805 22R2J-2-GPR1805 22R2J-2-GP

1 2

R1806 22R2J-2-GPR1806 22R2J-2-GP

1 2

EC1801

1 2

DY

SC4D7P50V2CN-1GP

RN1803

1

4

2 3

SRN10KJ-5-GP

3D3V_S0

INT_PIRQA#

R1814

8K2R2J-3-GP

1 2

DGPU_HOLD_RST# DGPU_SELECT#

1

DGPU_PWR_EN#

TP1801TPAD14-GP TP1801TPAD14-GP

TP1802TPAD14-GP TP1802TPAD14-GP

INT_PIRQB# INT_PIRQC# INT_PIRQD#

BBS_BIT1

PCI_GNT3#

1

PCI_PME#

1

PCI_PLTRST#

CLK_PCI_LPC_R CLK_PCI_FB_R CLK_PCI_KBC_R

KBC CLK EMI

SC4D7P50V2CN-1GP

20100908 X01 Modify: Add R1818 10K PL on FFS_INT2_R(GPIO14)

R1818 10KR2J-3-GPR1818 10KR2J-3-GP

1 2

FFS_INT2_R

3D3V_S5

USB_OC#2_3

http://hobi-elektronika.net

PCH1E

Cougar

BG26

BJ26

BH25

BJ16 BG16 AH38 AH37 AK43 AK45

C18 N30

AH12

AM4 AM5

AB46 AB45

M20 AY16 BG46

BE28 BC30 BE32

BJ32 BC28 BE30

BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

Y13 K24 L24

B21

K40 K38 H38 G38

C46 C44 E40

D47 E42 F46

G42 G40 C42 D44

K10

H49 H43

K42 H40

H3

C6

J48

Cougar

TP1

Point

TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20

TP21 TP22 TP23 TP24

TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40

PIRQA# PIRQB# PIRQC# PIRQD#

REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54

GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO 5

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

COUGAR-GP-U2-NF

OC[3:0]# for Device 29 (Ports 0-7) OC[7:4]# for Device 26 (Ports 8-13)

RN1802

1 2 3 4 5 6

SRN8K2J-2-GP-U

3

RSVD

PCI

NVRAM

USB

10 9 8 7

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

USB_OC#12_13 USB_OC#8_9USB_OC#6_7 USB_OC#10_11USB_OC#0_1 USB_OC#4_5

5 OF 10

RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

RSVD

DF_TVS

RSVD

RSVD RSVD

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

NV_ALE

AV5

NV_CLE

AY1

NV_RCOMP

AV10

AT8

AY5 BA2

AT12

USB Ext. port 1 (HS)

BF3

External debug port use on Huron river platform

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

USB_RBIAS

C33

B33

USB_OC#0_1

A14

USB_OC#2_3

K20

USB_OC#4_5

B17

USB_OC#6_7

C16

USB_OC#8_9

L16

USB_OC#10_11

A16

USB_OC#12_13

D14 C14

3D3V_S5

TP1803 TPAD14-GPTP1803 TPAD14-GP

1

X00 1027

USB_PN4 (66) USB_PP4 (66)

USB_PN11 (65) USB_PP11 (65) USB_PN12 (49) USB_PP12 (49)

1 2

R1811

R1811 22D6R2F-L1-GP

22D6R2F-L1-GP

X00 1027

FFS_INT2_R (79)

2

Title

Size Document Number Rev

Date: Sheet

NV_CLE

DMI & FDI Termination Voltage

NV_CLE

Danbury Technology: Disabled when Low. Enable when High.

USB Table

Pair

X

0

X

1

X

2

X

3

Mini Card2 (WWAN)

4

X

5

X

6

X

7

X

8

X

9

X

10

Mini Card1 (WLAN)

11

CAMERA

12

X

13

PCH 2/9(PCI/USB/NVRAM)

DB13 DIS

1D8V_S0

12

R1808

R1808 2K2R2J-2-GP

2K2R2J-2-GP

R1809

1 2

1KR2J-1-GP

H_SNB_IVB# (5)

Set to Vss when LOW

Set to Vcc when HIGH

1D8V_S0

12

R1810

R1810 1KR2J-1-GP

1KR2J-1-GP

DY

NV_ALE

Device

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

18 105Friday, November 26, 2010

of

18 105Friday, November 26, 2010

of

18 105Friday, November 26, 2010

1

X00

5

4

3

2

1

SSID = PCH

Signal Routing Guideline:

D D

DMI_ZCOMP keep W=4 mils and routing length less than 500 mils. DMI_IRCOMP keep W=4 mils and routing length less than 500 mils.

1D05V_VTT

R1901 49D9R2F-GPR1901 49D9R2F-GP

R1902 750R2F-GPR1902 750R2F-GP

SYS_PWROK

R1926

1 2

10KR2J-3-GP

C C

S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

B B

A A

1 2

100KR2J-1-GP

PM_DRAM_PWRGD(5,37)

SUS_PWR_ACK(27)

AC_PRESENT(27,86)

R1926

DY

XDP_DBRESET#(5 )

SYS_PWROK(36)

X00 1116 remove short pad

S0_PWR_GOOD(27,36)

PM_PWRBTN#(27)

3D3V_S5

R1904

S0_PWR_GOOD

SUS_PWR_ACK

5

RN1901

8 7 6

SRN10KJ-6-GP

R1921

100KR2J-1-GP

R1922 10KR2J-3-GP

R1922 10KR2J-3-GP R1920 10KR2J-3-GP

R1920 10KR2J-3-GP

DY

DY DY

DY

R1908

10KR2J-3-GP

DMI_RXN[3:0](4)

DMI_RXP[3:0](4)

DMI_TXN[3:0](4)

DMI_TXP[3:0](4)

DMI_RXN0(4) DMI_RXN1(4) DMI_RXN2(4) DMI_RXN3(4)

DMI_RXP0(4) DMI_RXP1(4) DMI_RXP2(4) DMI_RXP3(4)

DMI_TXN0(4) DMI_TXN1(4) DMI_TXN2(4) DMI_TXN3(4)

DMI_TXP0(4) DMI_TXP1(4) DMI_TXP2(4) DMI_TXP3(4)

1 2

20100923 X01 Modify: Change R1903,R1906,R1924,R1925 to 0R0402 short pad from 0ohm.

DMI_COMP_R

RBIAS_CPY

X00 1116 remove short pad

X00 1123

RSMRST#_KBC

BATLOW#

PM_RI#

20100921 X01 Modify: Move PCH_WAKE# to RN1901 pin3 Change R1921 to 100k ohm PH on AC_PRESENT.

BATLOW#

1

PM_RI#

2

PCH_WAKE#

3

SUS_PWR_ACK

45

AC_PRESENT

12

12 12

12

PM_PWRBTN# PM_SLP_LAN#

RSMRST#_KBC

X00 1123

PCH1C

BC24

DMI0RXN

Cougar

BE20 BG18 BG20

BE24 BC20

BJ18 BJ20

AW24 AW20

BB18 AV18

AY24 AY20 AY18 AU18

BJ24

BG25

BH21

C12

K3

P12

L22

X00 1116 remove short pad

L10

B13

C21

K16

E20

H20

E10

A10

COUGAR-GP-U2-NF

4

Cougar

DMI1RXN

Point

DMI2RXN DMI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

DMI2RBIAS

SUSACK#

SYS_RESET#

SYS_PWROK

PWROK

APWROK

DRAMPWROK

RSMRST#

SUSWARN#/SUSPW RDNACK/GPIO30

PWRBTN#

ACPRESENT/GPIO31

BATLOW#/GPI O72

RI#

3 OF 10

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

DMI

System Power Management

FDI_RXP6

FDI

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_LAN#/GPIO29

http://hobi-elektronika.net

FDI_RXP7

FDI_INT

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWODVREN

PM_SUS_STAT#

PCH_SUSCLK_KBC_R

PM_SLP_S5#

PM_SLP_A#

PM_SLP_SUS#

H_PM_SYNC

PM_SLP_LAN#

3

FDI_TXN[7:0] (4) FDI_TXP[7:0] (4)

FDI_TXN0 (4) FDI_TXN1 (4) FDI_TXN2 (4) FDI_TXN3 (4) FDI_TXN4 (4) FDI_TXN5 (4) FDI_TXN6 (4) FDI_TXN7 (4)

FDI_TXP0 (4) FDI_TXP1 (4) FDI_TXP2 (4) FDI_TXP3 (4) FDI_TXP4 (4) FDI_TXP5 (4) FDI_TXP6 (4) FDI_TXP7 (4)

FDI_INT (4)

FDI_FSYNC0 (4)

FDI_FSYNC1 (4)

FDI_LSYNC0 (4)

FDI_LSYNC1 (4)

20100923 X01 Modify: Change R1910,R1912,R1913 to 0R0402 short pad from 0ohm.

PCH_WAKE# (27)

TP1901 TPAD14-GPTP1901 TPAD14-GP

1

TP1902 TPAD14-GPTP1902 TPAD14-GP

1

TP1903TPAD14-GPTP1903TPAD14-GP

1

TP1904TPAD14-GPTP1904TPAD14-GP

PM_CLKRUN# (27)

R1903

0R2J-2-GP

H_PM_SYNC (5)

For platforms not supporting Deep S4/S5

1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)

2.DPWROK and RSMRST# will rise at the same time (connected on board)

3.SLP_SUS# and SUSACK# are left as ‘no connect’

4.SUSWARN# used as SUSPWRDNACK/GPIO30

X00 1123

RSMRST#_KBC (27)

X00 1123 close to PCH

12

X00 1123

PCH_SUSCLK_KBC

EC1901

1 2

DY

SC4D7P50V2CN-1GP

PCH_SUSCLK_KBC (27)

PM_SLP_S4# (27,46)

PM_SLP_S3# (27,36,37,47)

2

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

LOW Disabled

R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2

DSWODVREN

PM_CLKRUN#

Title

Size Document Number Rev

Date: Sheet

R1918 330KR2J-L1-GP

1 2

DY

R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH 3/9(DM I/FDI/PM)

DB13 DIS

19 105Friday, November 26, 2010

1

RTC_AUX_S5

3D3V_S0

of

X00

5

SSID = PCH

X00 1118 remove 0ohm

D D

C C

::$1&/.

:/$1&/.

&$5'&/.

B B

86%&/.

A A

PCIE_RXN2(31)

PCIE_RXP2(31) PCIE_TXN2(31) PCIE_TXP2(31)

PCIE_RXN3(66)

PCIE_RXP3(66) PCIE_TXN3(66) PCIE_TXP3(66)

PCIE_RXN4(65)

PCIE_RXP4(65) PCIE_TXN4(65) PCIE_TXP4(65)

PCIE_RXN5(35)

PCIE_RXP5(35) PCIE_TXN5(35) PCIE_TXP5(35)

PCIE_RXN6(32)

PCIE_RXP6(32) PCIE_TXN6(32) PCIE_TXP6(32)

C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP

1 2

C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP

1 2

C2003 SCD1U10V2KX-5GPC2003 SCD1U10V2KX-5GP

1 2

C2004 SCD1U10V2KX-5GPC2004 SCD1U10V2KX-5GP

1 2

C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP

1 2

C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP

1 2

C2009 SCD1U10V2KX-5GPC2009 SCD1U10V2KX-5GP

1 2

C2010 SCD1U10V2KX-5GPC2010 SCD1U10V2KX-5GP

1 2

C2011 SCD1U10V2KX-5GPC2011 SCD1U10V2KX-5GP

1 2

C2012 SCD1U10V2KX-5GPC2012 SCD1U10V2KX-5GP

1 2

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

PCIE_TXN5_C PCIE_TXP5_C

PCIE_TXN6_C PCIE_TXP6_C

X00 1118

X00 1116 remove 0ohm

CLK_PCIE_WWAN#(66) CLK_PCIE_WWAN(66)

CLK_PCIE_WWAN_REQ#(66)

CLK_PCIE_WLAN#(65) CLK_PCIE_WLAN(65)

CLK_PCIE_WLAN_REQ#(65)

CLK_PCIE_CARD#(32) CLK_PCIE_CARD(32)

X00 1018

/$1&/.

3D3V_S0

PCIECLKRQ1# and PCIECLKRQ2# Support S0 power only

PCIE_CLK_CARD_REQ#(32)

CLK_PCIE_LAN#(31) CLK_PCIE_LAN(31)

PCIE_CLK_LAN_REQ#(31)

CLK_PCIE_USB3#(35)

RN2018

1 2 3

SRN10KJ-5-GP

CLK_PCIE_USB3(35)

USB3_PEGB_CLKREQ#(35)

X00 1018

PCIE_CLK_CARD_REQ#

4

CLK_PCIE_WLAN_REQ#

PCIE_CLK_REQ5#

PEG_B_CLKRQ#

PCIE_CLK_REQ6#

CLK_PCIE_NEW_REQ#

ITPXDP_N

1

TP2005TPAD14-GP TP2005TPAD14-GP TP2006TPAD14-GP TP2006TPAD14-GP

ITPXDP_P

1

Remove the XDP connector for space saving 6/28

5

4

PCH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0#/GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1#/GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2#/GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4#/GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5#/GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ#/GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6#/GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7#/GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

COUGAR-GP-U2-NF

4

3

2 OF 10

Cougar

Cougar Point

Point

LAN

WWAN/WLAN

WLAN

USB3.0

PCI-E*

Card Reader

Dock

SMBALERT#/GPIO11

SMBDATA

SML0ALERT#/GPIO60

SMBUSController

SML1ALERT#/PCHHOT#/GPI O74

Link

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_DATA1

CL_RST1#

SMBCLK

SML0CLK

CL_CLK1

EC_SWI#

E12

SMB_CLK

H14

SMB_DATA

C9

DRAMRST_CNTRL_PCH

A12

SML0_CLK

C8

SML0_DATA

G12

PCH_GPIO74

C13

SML1_CLK

E14

SML1_DATA

M16

CL_CLK

M7

CL_DATA

T11

CL_RST#

P10

1

TP2001 TPAD14-GPTP2001 TPAD14-GP

1

TP2002 TPAD14-GPTP2002 TPAD14-GP

1

TP2003 TPAD14-GPTP2003 TPAD14-GP

NEW CARD

For DIS_PX mode or MXM mode.

CLK_BUF_EXP_N CLK_BUF_EXP_P

CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P

CLK_BUF_DOT96_N CLK_BUF_DOT96_P

CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

R2007

XCLK_RCOMP

1 2

90D9R2F-1-GP

CLK_48_USB30

DGPU_PRSNT#

1 2

XTAL25_IN

M10

AB37 AB38

AV22 AU22

AM12 AM13

BF18 BE18

BJ30 BG30

G24 E24

AK7 AK5

K45

H45

V47 V49

Y47

K43

F47

H47

K49

3

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

FLEX CLOCKS

CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

XTAL25_OUT

XCLK_RCOMP

CLOCKS

– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3 – Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2 if more than 2 PCI clocks + PCI loopback are routed.

http://hobi-elektronika.net

2

1120

20100830 X01 Modify: R2004 dummy field set to for UMA only. R2005 dummy field set to for MUXLESS only.

EC_SWI# (27)

DRAMRST_CNTRL_PCH (37)

SML1_CLK (27,86)

SML1_DATA (27,86)

X00 1116 remove 0ohm

RN2008

2 3 1

SRN10KJ-5-GP

PL 10K FOR Integrated CLOCK GEN mode.

CLK_BUF_CKSSCD_N

CLK_PCI_FB (18)

+VCCDIFFCLKN

R2016

R2016 22R2J-2-GP

22R2J-2-GP

CLK_BUF_CKSSCD_P

CLK_BUF_EXP_N CLK_BUF_EXP_P

CLK_BUF_REF14

CLK_PCH_48M (97)

PEG_CLKREQ#

SMB_DATA

SMB_CLK

PEG_CLKREQ# (83)

CLK_PCIE_VGA# (83) CLK_PCIE_VGA (83)

CLK_EXP_N (5) CLK_EXP_P (5)

4

CLK_BUF_DOT96_N CLK_BUF_DOT96_P

RN2020 SRN10KJ-5-GPRN2020 SRN10KJ-5-GP

1 2 3

2 3 1

SRN10KJ-5-GP

RN2019 SRN10KJ-5-GPRN2019 SRN10KJ-5-GP

1 2 3

need very close to PCH

For RTS5138

2

3D3V_S5

1120

RN2021

R2008

1 2

10KR2J-3-GP

DY

4

1

12

R2004

R2004 10KR2J-3-GP

10KR2J-3-GP

12

R2005

R2005 10KR2J-3-GP

10KR2J-3-GP

3D3V_S0

RN2007

2 3 1

SRN2K2J-1-GP

2nd = 84.DM601.03F

84.2N702.A3F

2N7002KDW-GP

6

5

Q2001

XTAL25_IN

XTAL25_OUT

3D3V_S0 3D3V_S0

12

R2012

DY

12

R2010

Title

Size Document Number Rev

Date: Sheet

SMB_CLK SMB_DATA

SML0_DATA SML0_CLK

SML1_CLK SML1_DATA

PCIE_CLK_REQ6# PCH_GPIO74

DRAMRST_CNTRL_PCH

4

1

2

34

R2006

R2006 1M1R2J-GP

1M1R2J-GP

1 2

X00 1124

12

R2013

UMA_DIS# DGPU_PRSNT#

10KR2J-3-GP

12

R2011

DY

10KR2J-3-GP

3D3V_S5

PCH 4/9(PCI-E/SMBUS/CLOCK/CL)

DB13 DIS

4

2 3 1

1 2 3

R2009

1 2

1KR2J-1-GP

PCH_SMBDATA (14,15,65,66,79)

PCH_SMBCLK (14,15,65,66,79)

SC12P50V2JN-3GP

X2001

X2001 XTAL-25MHZ-102-GP

XTAL-25MHZ-102-GP

1 2

82.30020.851

2nd = 82.30020.791

SC12P50V2JN-3GP

UMA_DISCRETE# UMA: 1 1 DIS :0 1 SG(PX) : 0 0 ATI(Muxless) : 1 0

UMA_DIS# (22)

RN2001

1

8

2

7

3

6

4 5

SRN10KJ-6-GP

SRN10KJ-6-GP RN2002

RN2002

1

8

2

7

3

6

4 5

SRN10KJ-6-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

3D3V_S5

RN2003

1

SRN2K2J-1-GP

23

RN2004

23

SRN2K2J-1-GP

1

RN2005

RN2005 SRN2K2J-1-GP

SRN2K2J-1-GP

4

RN2006

4

SRN10KJ-5-GP

C2008

12

C2007

12

CLK_PCIE_WWAN_REQ#

PCIE_CLK_LAN_REQ# USB3_PEGB_CLKREQ#

EC_SWI# PCIE_CLK_REQ5# CLK_PCIE_NEW_REQ# PEG_B_CLKRQ#

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20 105Friday, November 26, 2010

of

20 105Friday, November 26, 2010

of

20 105Friday, November 26, 2010

X00

5

4

3

2

1

SSID = PCH

20100818 Sourcer suggest: Change X2101 as below.

RTC_X1

1 2

R2101 10MR2J-L-GPR2101 10MR2J-L-GP

D D

12

C2101

SC15P50V2JN-2-GP

C C

+3VS_+1.5VS_HDA_IO

3D3V_S0

+3VS_+1.5VS_HDA_IO

B B

This signal has a weak internal pull down. On Die PLL VR is supplied by 1.5V when sampled high, 1.8 V when sampled low. Needs to be pulled High for Huron River platform. co-operate with R2310

X2101

1 4

X-32D768KHZ-67-GP

82.30001.A81

2nd = 82.30001.691

3rd = 82.30001.861

HDA_CODEC_SYNC(29) HDA_CODEC_SDOUT(29)

HDA_CODEC_RST#(29) HDA_CODEC_BITCLK(29)

DY

R2102 1KR2J-1-GP

1 2

NO REBOOT STRAP

DY

R2106 1KR2J-1-GP

1 2

32

1 2

PLL ODVR VOLTAGE

HDA_SYNC

RUN_ENABLE

A A

1 2

Low = 1.8V (Default) High = 1.5V

2N7002K-2-GP

G

S

Q2101

R2117

84.2N702.J31

100KR2J-1-GP

2ND = 84.2N702.031

20100906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

RTC_X2

12

C2102

C2102 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

1 2 3

Flash Descriptor Security Overide

HDA_SDO UT

HDA_SDOUT

HDA_SPKR

R2103 1KR2J-1-GPR2103 1KR2J-1-GP

D

5

12

DY

12

RN2102

4

SRN33J-5-GP-U

No Reboot Strap

HDA_SYNC

33R2J-2-GP

RTC_AUX_S5

HDA_SYNC

R212233R2J-2-GP

HDA_SDOUT

R212333R2J-2-GP R212333R2J-2-GP

HDA_RST# HDA_BITCLK

Low = Default High = Enable

Low = Default High = No Reboot

R2124

HDA_SYNCHDA_SYNC_R

12

X00 1123

RN2115

1 2 3

SRN20KJ-GP-U

SC1U6D3V2KX-GP

4

C2104

12

C2103

C2103 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

21

G2101

12

GAP-OPEN

INTVRMEN- Integrated SUS

1.05V VRM Enable High - Enable internal VRs Low - Enable external VRs

RTC_AUX_S5

HDA_SPKR(29)

HDA_SDIN0(29)

1M1R2J-GP

R2104

1 2

R2105

330KR2F-L-GP

RTC_X1

RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

12

PCH_INTVRMEN

HDA_BITCLK

HDA_SYNC

HDA_RST#

Notes: ME_UNLOCK (HDA_SDO) connect to EC. Make sure EC drive this pin "low" all the time.

R2107 1KR2J-1-GPR2107 1KR2J-1-GP

ME_UNLOCK(27)

20100721 Modify: Remove TP2105 and change PCH_GPIO33 to CE.

HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this signal on the board. Signal may have leakage paths via powered off devices (Audio Codec) and hence contend with the external pull-up. A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device until after the Strap sampling is complete.

HDA_CODEC_BITCLK

EC2102

1 2

DY

SC4D7P50V2CN-1GP

HDA_CODEC_SDOUT

1 2

DY

4

EC2103

SC4D7P50V2CN-1GP

1 2

SPI_CLK_R(27,60)

SPI_CS0#_R(27,60)

SPI_SI_R(27,60)

SPI_SO_R(27,60)

SPI_CS0#_RHDA_CODEC_SYNC

EC2101

1 2

DY

HDA_SDOUT

CE(49)

TP2101TPAD14-GP TP2101TPAD14-GP

TP2102TPAD14-GP TP2102TPAD14-GP

TP2103TPAD14-GP TP2103TPAD14-GP

TP2104TPAD14-GP TP2104TPAD14-GP

1 2

R2108 33R2J-2-GPR2108 33R2J-2-GP

1 2

R2109 33R2J-2-GPR2109 33R2J-2-GP

1 2

R2110 33R2J-2-GPR2110 33R2J-2-GP

SC4D7P50V2CN-1GP

http://hobi-elektronika.net

PCH_JTAG_TCK_BUF

1

PCH_JTAG_TMS

1

PCH_JTAG_TDI

1

PCH_JTAG_TDO

1

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_SI

1 OF 10

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LPC

FWH4/LFRAME#

LDRQ1#/GPIO23

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

3D3V_S0

8 7 6

1 OF 10

LDRQ0#

SERIRQ

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

SATA_DET#0

BBS_BIT0

PCH1A

A20

C20

D20

G22

K22

C17

N34

L34

T10

K34

E34

G34

C34

A34

A36

CE

PSW_CLR#(22)

S_GPIO(22)

C36

N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

COUGAR-GP-U2-NF

Cougar

RTCX1

Point

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

20100917 X01: Add RN2104 10K instead of R2111 10K. Move EC_SCI#,DBC_EN to RN2201. Remove RN2202. Change RN2103 to 10k array resistor to follow the standard schematics. Move S_GPIO to RN2103. Move PSW_CLR# to RN2104. 20100921 X01: Swap SATA_DET#0 and INT_SERIRQ.

SATA_DET#0 INT_SERIRQ

RTCIHDA

JTAG

SPI

RN2103

1 2 3 4 5

SRN10KJ-6-GP

X00 1123

3

2

LPC_AD[0..3]

SATA_COMP

SATA3_COMP

RBIAS_SATA3

LPC_AD[0..3] (27,71)

LPC_FRAME# (27,71)

KB_DET# (69)

INT_SERIRQ (27)

SATA_RXN0 (56) SATA_RXP0 (56) SATA_TXN0 (56) SATA_TXP0 (56)

HDD1

HDD2

SATA_RXN4 (56) SATA_RXP4 (56) SATA_TXN4 (56) SATA_TXP4 (56)

1D05V_VTT

R2112 37D4R2F-GPR2112 37D4R2F-GP

1 2

R2113 49D9R2F-GPR2113 49D9R2F-GP

1 2

R2114 750R2F-GPR2114 750R2F-GP

1 2

BBS_BIT0 (18)

Title

PCH 5/9(SPI/RTC/LPC/SATA/IHDA)

Size Document Number Rev

Date: Sheet

1D05V_VTT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

1

ODD

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21 105Friday, November 26, 2010

of

21 105Friday, November 26, 2010

of

21 105Friday, November 26, 2010

X00

5

3D3V_S0

R2202

1 2

100KR2J-1-GP

3D3V_S0

RN2203

1

4

D D

GPIO27 has a weak[20K] internal pull up. To enable on-die PLL Voltage regurator, should not place external pull down.

C C

SRN10KJ-5-GP

3D3V_S0

R2220

1 2

10KR2J-3-GP

PCH_TEMP_ALERT#

MFG_MODE

X00 1123

EC_SCI# DGPU_HPD_INTR# FP_DET# EC_SMI#

DBC_EN

2 3

PCH_GPIO48

R2222 10KR2J-3-GPR2222 10KR2J-3-GP

1 2

R2223 10KR2J-3-GPR2223 10KR2J-3-GP

1 2

RN2201

1 2 3 4 5

SRN10KJ-6-GP

SRN10KJ-6-GP R2214 10KR2J-3-GP

R2214 10KR2J-3-GP

1 2

DY

20100923 X01: Separate DBC_EN from RN2201 to R2214, un-stuff R2214.

X00 1122

RTC_DET# USB3_PWR_ON

PCH_GPIO15

3G_EN

B B

A A

4

1 2

5

SATA_ODD_PRSNT#

H_A20GATE

H_RCIN#

20100908 X01 Modify: Change FFS_INT2_R from PCH GPIO48 to GPIO14 Keep PCH_GPIO15 PH R2201,PCH_GPIO48 PH R2220. 20100928 X01 modify: Change R2220 to 10k.

3D3V_S0

8 7 6

3D3V_S5

RN2204

1 23

SRN10KJ-5-GP

R2201

1KR2J-1-GP

R2221

10KR2J-3-GP

20100908 X01: Add R2201 PH for PCH_GPIO15.

Note: For PCH debug with XDP, need to NO STUFF R2218

20100908 X01: Add R2201 PH for PCH_GPIO15.

X00 1120

PSW_CLR#(21)

4

SSID = PCH

S_GPIO GPIO0_R

R2218

1 2

R2213 0R0402-PADR2213 0R0402-PAD

TP2203

1

PSW_CLR#

1

1 2

100R2J-2-GP

EC_SMI#

DGPU_HPD_INTR# VRAM_SIZE1

EC_SCI#

ICC_EN#

PCH_GPIO15

PCH_GPIO16

DGPU_PWROK

DBC_EN

3G_EN

PCH_GPIO27

PLL_ODVR_EN

FP_DET#

DMI_OVRVLTG

FDI_OVRVLTG

MFG_MODE

GFX_CRB_DET

PCH_GPIO48

PCH_TEMP_ALERT#

PCH_NCTF_1

PCH_NCTF_2

PCH_NCTF_3

PCH_NCTF_4

S_GPIO(21)

EC_SMI#(27)

EC_SCI#(27)

X00 1122

RTC_DET#(60)

SATA_ODD_PRSNT#(56)

DGPU_PWROK(83,87,92,93)

DBC_EN(49)

3G_EN(66)

TPAD14-GP

GAP-OPEN

21

G2201

USB3_PWR_ON(35,62)

TP2206TPAD14-GP TP2206TPAD14-GP

TP2207TPAD14-GP TP2207TPAD14-GP

TP2208TPAD14-GP TP2208TPAD14-GP

TP2209TPAD14-GP TP2209TPAD14-GP

[VRAM_SIZE1:VRAM_SIZE2] LL=512M / HL=1G / LH=2G

4

3

PCH1F

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/G PIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24/MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49

D6

GPIO57

A4

NCTF_VSS#A4

A44

NCTF_VSS#A44

A45

NCTF_VSS#A45

A46

NCTF_VSS#A46

A5

NCTF_VSS#A5

A6

NCTF_VSS#A6

B3

NCTF_VSS#B3

B47

NCTF_VSS#B47

BD1

NCTF_VSS#BD1

BD49

NCTF_VSS#BD49

BE1

NCTF_VSS#BE1

BE49

NCTF_VSS#BE49

BF1

NCTF_VSS#BF1

BF49

NCTF_VSS#BF49

COUGAR-GP-U2-NF

Cougar

Cougar Point

Point

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49

BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

PROCPWRGD

GPIO

CPU/MISC

NCTF_VSS#BG2

NCTF_VSS#BG48

NCTF_VSS#BH3

NCTF_VSS#BH47

NCTF_VSS#BJ4

NCTF_VSS#BJ44

NCTF_VSS#BJ45

NCTF_VSS#BJ46

NCTF_VSS#BJ5

NCTF

NCTF_VSS#BJ6

NCTF_VSS#C2

NCTF_VSS#C48

NCTF_VSS#D1

NCTF_VSS#D49

NCTF_VSS#E1

NCTF_VSS#E49

NCTF_VSS#F1

D1,D49,E1,E49,F1,F49

NCTF_VSS#F49

PLL ON DIE VR ENABLE



NOTE:This signal has a weak internal pull-up 20K ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT DISABLED -- LOW (R2212 STUFFED)

PLL_ODVR_EN

http://hobi-elektronika.net

3

6 OF 10

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

R2212

1 2

DY

UMA_DIS#

VRAM_SIZE2

H_PECI_R

PCH_THERMTRIP_R

INIT3_3V#

X00 1123

20100923 X01 Modify: Change R2219 to 0R0402 short pad from 0ohm.

3D3V_S0

12

DY

12

3D3V_S0

12

DY

12

ICC_EN#

1 2

1KR2J-1-GP

2

SATA_ODD_PWRGT (56)

UMA_DIS# (20)

TP2204

TPAD14-GP

1

R2207

R2207 10KR2J-3-GP

10KR2J-3-GP

FDI_OVRVLTG

R2208

R2208 10KR2J-3-GP

10KR2J-3-GP

R2209

R2209 10KR2J-3-GP

10KR2J-3-GP

DMI_OVRVLTG

R2210

R2210 10KR2J-3-GP

10KR2J-3-GP

R2211

TPAD14-GP

TP2205

TPAD14-GP

H_A20GATE (27)

1 2

DY

H_RCIN# (27)

H_CPUPWRGD (5,36)

R2204 390R2J-1-GPR2204 390R2J-1-GP

1 2

TP2201

1

1KR2J-1-GP

2

1

GSENSOR_ADI GSENSOR_ST

R2205 DY 10K

R2206 100K DY

3D3V_S0

12

GSENSOR_ST

GFX_CRB_DET

R2203

0R2J-2-GP

TPAD14-GP

TS Signal Disable Guideline: TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4 should not float on the motherboar d. They s hould be tied to GND directly.

H_PECI (5,27)

H_THERMTRIP# (5,36)

20100927 X01 Modify: Change R2205 dummy field for ADI-GSENSOR only Change R2206 dummy field for ST-GSENSOR only.

12

GSENSOR_ADI

FDI TERMINATION VOLTAGE OVERRIDE

GPIO37 (FDI_OVRVLTG)

LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)

DMI TERMINATION VOLTAGE OVERRIDE

GPIO36 (DMI_OVRVLTG)

Integrated Clock Enable functionality is achieved via soft-strap. The default is integrated clock enable.

LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)

Integrated Clock Chip Enable

ICC_EN#

HIGH (R2211 DY)- DISABLED [DEFAULT]

LOW (R2211)- ENABLED

GPIO8 has a weak[20K] internal pull up.

Integrated Clock Enable functionality is achieved via soft-strap. The default is integrated clock enable.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PCH 6/9(GPIO/CPU)

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

22 105Friday, November 26, 2010

of

22 105Friday, November 26, 2010

of

22 105Friday, November 26, 2010

1

R2205

10KR2J-3-GP

R2206

100KR2J-1-GP

X00

5

4

3

2

1

SSID = PCH

D D

C C

B B

VCCVRM(Internal PLL and VRMs): A.1.5V for Mobile B.1.8 V for Desktop

(1uFx3)

(10uFx1_0603)

(1uF x4)

0.159A(Totally current of VCCVRM)

6A

1D05V_VTT

2.925A(Total current of VCCIO)

12

C2305

0.266A (Totally VCC3_3 current)

0.042A (Totally current of VCCDMI)

1.3A

12

C2301

SC10U6D3V5KX-1GP

12

C2306

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

(0.1uF x1)

1D5V_S0

12

C2302

TP2301TPAD14-GP TP2301TPAD14-GP

12

C2307

TP2302TPAD14-GP TP2302TPAD14-GP

1D05V_VTT

12

C2303

SC1U6D3V2KX-GP

1D05V_VTT

1

(10uF x1)

12

C2308

SC1U6D3V2KX-GP

3D3V_S0

1

12

C2304

SC1U6D3V2KX-GP

VCCAPLLEXP

12

C2309

SC1U6D3V2KX-GP

12

C2310

C2310 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

VCCFDIPLL

+1.05VS_VCC_DMI

PCH1G

AA23

VCCCORE

AC23

VCCCORE

AD21

VCCCORE

AD23

VCCCORE

AF21

VCCCORE

AF23

VCCCORE

AG21

VCCCORE

AG23

VCCCORE

AG24

VCCCORE

AG26

VCCCORE

AG27

VCCCORE

AG29

VCCCORE

AJ23

VCCCORE

AJ26

VCCCORE

AJ27

VCCCORE

AJ29

VCCCORE

AJ31

VCCCORE

AN19

VCCIO

BJ22

VCCAPLLEXP

AN16

VCCIO

AN17

VCCIO

AN21

VCCIO

AN26

VCCIO

AN27

VCCIO

AP21

VCCIO

AP23

VCCIO

AP24

VCCIO

AP26

VCCIO

AT24

VCCIO

AN33

VCCIO

AN34

VCCIO

BH29

VCC3_3

AP16

VCCVRM

BG6

VCCAFDIPLL

AP17

VCCIO

AU20

VCCDMI

COUGAR-GP-U2-NF

POWER

Cougar

Cougar Point

Point

VCC CORE

VCCIO

FDI

CRTLVDS

DMI

NAND / SPI HVCMOS

7 OF 10

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCCLKDMI

VccDFTERM

VCCSPI

0.001A

U48

U47

0.001A

+3VS_VCCA_LVDS

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

0.16A

AT16

0.042A

+1.05VS_VCC_DMI

AT20

AB36

0.02A

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

(0.1uF/0.01uF x1) (10uF x1_0603)

+VCCA_DAC_1_2

12

C2313

0.06A

+1.8VS_VCCTX_LVDS

0.266A

12

0.19A

12

C2322

C2322 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

0.02A

12

C2314

SCD01U16V2KX-3GP

SCD1U10V2KX-5GP

12

C2316

SCD01U16V2KX-3GP

(0.1uFx1)

C2319

C2319 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

R2306

1 2

C2320

C2320 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.02A

R2307

1 2

C2321

C2321 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2323

C2323 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.06A

0R2J-2-GP

0.19A

0.02A

12

C2315

0.001A

SC10U6D3V5KX-1GP

12

C2317

SCD01U16V2KX-3GP

3D3V_S0

1D5V_S0

1D05V_VTT

(1uF x1)

1D05V_VTT

(1uFx1) (10uFx1)

1D8V_S0

(0.1uFx1)

3D3V_S5

(1uFx1)

X00 1015

12

C2318

SC10U6D3V5KX-1GP

R2308

R2308 0R3J-0-U-GP

0R3J-0-U-GP

R2304

R2305

1 2

3D3V_S0

12

3D3V_S0

12

0R3J-0-U-GP

1D8V_S0

0R5J-5-GP

(0.01uF x2) (22uF x1)

A A

5

4

0617 Modify: Joseph Removed R2311&R2310 1.5V and 1.8V co-lay. and rename all of 1D5V_S0_1D8V_S0 to 1D5V_S0 for VCCVRM.

http://hobi-elektronika.net

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

PCH 7/9(POWER1)

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

X00

of

23 105Friday, November 26, 2010

of

23 105Friday, November 26, 2010

of

23 105Friday, November 26, 2010

1

X00

5

4

3

2

1

SSID = PCH

1

TP2405TPAD14-GP TP2405TPAD14-GP

1

(10uFx1)

1

12

C2415

12

(1uFx1)

TP2406TPAD14-GP TP2406TPAD14-GP

VCCACLK

+VCCPDSW

DCPSUSBYP

1

+V3.3S_VCC_CLKF33

+VCCAPLL_CPY_PCH

+VCCSUS1

12

C2408

C2407

SC1U6D3V2KX-GP

1D5V_S0

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCDIFFCLK

0.095A

+V1.05S_SSCVCC

(1uFx1)

+VCCSST

12

DCPSUS

1

C2418

SCD1U10V2KX-5GP

12

C2421

C2422

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

TP2401TPAD14-GP TP2401TPAD14-GP

R2403

0.002A

3D3V_S0

20100906 X01 Modify: Add 2nd source 68.10090.10B on L2401,L2402,L2403 sync with Annie.

D D

C C

1D05V_VTT

B B

1D05V_VTT

A A

L2401

1 2

IND-10UH-218-GP

68.10050.10Y

2nd = 68.10090.10B

L2402

L2403

0.08A

R2404

12

0R2J-2-GP

R2405

12

0R2J-2-GP

1 2

IND-10UH-218-GP

68.10050.10Y

2nd = 68.10090.10B

1 2

IND-10UH-218-GP

68.10050.10Y

2nd = 68.10090.10B

+1.05VS_VCCA_A_DPL

12

C2443

DY

+1.05VS_VCCA_B_DPL

12

C2444

DY

+VCCDIFFCLK

12

SC1U6D3V2KX-GP

+V1.05S_SSCVCC

12

SC1U6D3V2KX-GP

5

(10uFx1) (1uFx1)

+V3.3S_VCC_CLKF33

C2401

12

(22uFx2_0603) (1uFx3)

(1uFx1) (220uFx1)

12

SC10U6D3V3MX-GP

12

SC10U6D3V3MX-GP

C2412

C2413

12

C2402

C2402 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V5KX-1GP

1D05V_VTT

C2409

C2409 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

(1uFx1) (220uFx1)

C2410

C2410 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

1D05V_VTT

(1uFx1)

3D3V_S5

(0.1uFx1)

C2403

12

DY

SC10U6D3V5KX-1GP

12

C2411

R2406

0R3J-0-U-GP

SC1U6D3V2KX-GP

(0.1uFx1)

(1uFx1)

1D05V_VTT

0.001A

(0.1uFx2) (4.7uFx1_0603)

SC4D7U6D3V3KX-GP

RTC_AUX_S5

6uA

(0.1uFx2) (1uFx1)

1.01A (Total current of VCCASW)

C2404

SC10U6D3V5KX-1GP

+VCCRTCEXT

(0.1uFx1)

12

C2414

C2417

R2403

1 2

0R3J-0-U-GP

TP2404TPAD14-GP TP2404TPAD14-GP

1D05V_VTT

TP2402TPAD14-GP TP2402TPAD14-GP

12

C2406

SC1U6D3V2KX-GP

0.16A (Totally current of VCCVRM

+VCCDIFFCLKN

0.055A

12

SCD1U10V2KX-5GP

12

4

PCH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3

BH23

VCCAPLLDMI2

AL29

VCCIO

AL24

DCPSUS

AA19

VCCASW

AA21

VCCASW

AA24

VCCASW

AA26

VCCASW

AA27

VCCASW

AA29

VCCASW

AA31

VCCASW

AC26

VCCASW

AC27

VCCASW

AC29

VCCASW

AC31

VCCASW

AD29

VCCASW

AD31

VCCASW

W21

VCCASW

W23

VCCASW

W24

VCCASW

W26

VCCASW

W29

VCCASW

W31

VCCASW

W33

VCCASW

N16

DCPRTC

Y49

VCCVRM

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO

AF33

VCCDIFFCLKN

AF34

VCCDIFFCLKN

AG34

VCCDIFFCLKN

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS

V19

DCPSUS

BJ8

V_PROC_IO

A22

VCCRTC

COUGAR-GP-U2-NF

http://hobi-elektronika.net

POWER

Cougar

Cougar Point

Point

Clock and Miscellaneous

PCI/GPIO/LPCMISC

SATA USB

CPURTC

HDA

3

10 OF 10

VCCIO

VCCSUS3_3

VCCIO

V5REF_SUS

DCPSUS

VCCSUS3_3

V5REF

VCCSUS3_3

VCC3_3

VCCIO

VCCAPLLSATA

VCCVRM

VCCIO

VCCASW

VCCSUSHDA

N26

P26

P28

T27

T29

0.097A (Totally current of VCCSUS3_3)

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

1D05V_VTT

+5VA_PCH_VCC5REFSUS

+VCCA_USBSUS

+5VS_PCH_VCC5REF

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

+V1.05S_VCCAPLL_SATA3

1D5V_S0

1D05V_VTT

SC1U6D3V2KX-GP

0.01A

C2433

SCD1U10V2KX-5GP

C2433

3D3V_S5

12

DY

12

C2428

12

C2430

12

C2429

12

C2432

12

C2435

+3VS_+1.5VS_HDA_IO

(0.1uFx1)

12

C2424

C2424 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2434

DY

C2423

C2423 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2425

C2425 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1

C2437

C2437 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V5KX-1GP

2

(1uFx1)

(0.1uFx1)

TP2403 TPAD14-GPTP2403 TPAD14-GP

0.001A

3D3V_S5

(1uFx1)

12

C2431

C2431 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

(0.1uFx1)

R2411

1 2

DY

0R3J-0-U-GP

1D05V_VTT

(1uFx1)

1D05V_VTT

3D3V_S5

2nd = 83.R2004.B8F

21

D2401

D2401 CH751H-40PT-GP

CH751H-40PT-GP

83.R0304.A8F

1 2

10R2J-2-GP

12

C2426

C2426 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

R2408

(0.1uFx1)

0.001A

3D3V_S0

21

D2402

D2402 CH751H-40PT-GP

CH751H-40PT-GP

83.R0304.A8F

2nd = 83.R2004.B8F

3D3V_S0

(0.1uFx2)

3D3V_S0

1D05V_VTT

(1uFx1)

1D05V_VTT

(10uFx1)

+3VS_+1.5VS_HDA_IO

Title

Size Document Number Rev

Date: Sheet

83.R0304.A8F

R2407

1 2

(1uFx1)

10R2J-2-GP

12

C2427

C2427 SC1U10V2KX-1GP

SC1U10V2KX-1GP

R2409

1 2

0R3J-0-U-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH 8/9(POWER2)

DB13 DIS

1

5V_S5

5V_S0

3D3V_S5

X00

of

24 105Friday, November 26, 2010

of

24 105Friday, November 26, 2010

of

24 105Friday, November 26, 2010

X00

5

4

3

2

1

SSID = PCHSSID = PCH

D D

C C

B B

A A

5

PCH1H

H5

VSS

AA17

VSS

AA2

VSS

AA3

VSS

AA33

VSS

AA34

VSS

AB11

VSS

AB14

VSS

AB39

VSS

AB4

VSS

AB43

VSS

AB5

VSS

AB7

VSS

AC19

VSS

AC2

VSS

AC21

VSS

AC24

VSS

AC33

VSS

AC34

VSS

AC48

VSS

AD10

VSS

AD11

VSS

AD12

VSS

AD13

VSS

AD19

VSS

AD24

VSS

AD26

VSS

AD27

VSS

AD33

VSS

AD34

VSS

AD36

VSS

AD37

VSS

AD38

VSS

AD39

VSS

AD4

VSS

AD40

VSS

AD42

VSS

AD43

VSS

AD45

VSS

AD46

VSS

AD8

VSS

AE2

VSS

AE3

VSS

AF10

VSS

AF12

VSS

AD14

VSS

AD16

VSS

AF16

VSS

AF19

VSS

AF24

VSS

AF26

VSS

AF27

VSS

AF29

VSS

AF31

VSS

AF38

VSS

AF4

VSS

AF42

VSS

AF46

VSS

AF5

VSS

AF7

VSS

AF8

VSS

AG19

VSS

AG2

VSS

AG31

VSS

AG48

VSS

AH11

VSS

AH3

VSS

AH36

VSS

AH39

VSS

AH40

VSS

AH42

VSS

AH46

VSS

AH7

VSS

AJ19

VSS

AJ21

VSS

AJ24

VSS

AJ33

VSS

AJ34

VSS

AK12

VSS

AK3

VSS

COUGAR-GP-U2-NF

Cougar

Cougar Point

Point

8 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

http://hobi-elektronika.net

PCH1I

AY4

VSS

AY42

VSS

AY46

VSS

AY8

VSS

B11

VSS

B15

VSS

B19

VSS

B23

VSS

B27

VSS

B31

VSS

B35

VSS

B39

VSS

B7

VSS

F45

VSS

BB12

VSS

BB16

VSS

BB20

VSS

BB22

VSS

BB24

VSS

BB28

VSS

BB30

VSS

BB38

VSS

BB4

VSS

BB46

VSS

BC14

VSS

BC18

VSS

BC2

VSS

BC22

VSS

BC26

VSS

BC32

VSS

BC34

VSS

BC36

VSS

BC40

VSS

BC42

VSS

BC48

VSS

BD46

VSS

BD5

VSS

BE22

VSS

BE26

VSS

BE40

VSS

BF10

VSS

BF12

VSS

BF16

VSS

BF20

VSS

BF22

VSS

BF24

VSS

BF26

VSS

BF28

VSS

BD3

VSS

BF30

VSS

BF38

VSS

BF40

VSS

BF8

VSS

BG17

VSS

BG21

VSS

BG33

VSS

BG44

VSS

BG8

VSS

BH11

VSS

BH15

VSS

BH17

VSS

BH19

VSS

H10

VSS

BH27

VSS

BH31

VSS

BH33

VSS

BH35

VSS

BH39

VSS

BH43

VSS

BH7

VSS

D3

VSS

D12

VSS

D16

VSS

D18

VSS

D22

VSS

D24

VSS

D26

VSS

D30

VSS

D32

VSS

D34

VSS

D38

VSS

D42

VSS

D8

VSS

E18

VSS

E26

VSS

G18

VSS

G20

VSS

G26

VSS

G28

VSS

G36

VSS

G48

VSS

H12

VSS

H18

VSS

H22

VSS

H24

VSS

H26

VSS

H30

VSS

H32

VSS

H34

VSS

F3

VSS

COUGAR-GP-U2-NF

3

Cougar

Cougar Point

Point

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH 9/9(VSS)

DB13 DIS

1

X00

of

25 105Friday, November 26, 2010

of

25 105Friday, November 26, 2010

of

25 105Friday, November 26, 2010

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

26 105Friday, November 26, 2010

of

X00

5

SSID = KBC

3D3V_AUX_KBC

1 2

12

D D

X00 20101111 Add VGA_THRM

C C

AFTP2703AFTP2703

20100909 X01: PSE suggest: Add AFTP2701~AFTP2703 at USB_PWR_EN#, AC_PRESENT, and E51_TxD.

R2771

R2771 2D2R3-1-U-GP

2D2R3-1-U-GP

12

C2701

SC2D2U10V3KX-1GP

R2702

1 2

0R0603-PAD

20100923 X01 Modify: Change R2702 to 0R0603 short pad from 0ohm.

12

C2704

C2705

C2706

DY

SCD1U10V2KX-5GP

EC_AGND

E51_TxD

1

12

C2708

C2707

SCD1U10V2KX-5GP

AD_IA(40)

C2714 SCD1U10V2KX-5GPC2714 SCD1U10V2KX-5GP

1 2

PSID_EC(38)

CPU_THRM(28)

PWM_FAN(28)

LCD_TST(49)

SUS_PWR_ACK(19)

SYS_THRM(28)

BATT_WHITE_LED#(68)

CAP_LED(69)

S5_ENABLE(36)

BAT_IN#(39)

LID_CLOSE#(70)

RSMRST#_KBC(19)

PM_SLP_S4#( 19,46)

ME_UNLOCK(21)

WIFI_RF_EN(65,66) BLUETOOTH_EN(65,66) S0_PWR_GOOD(19,36)

AC_PRESENT(19,86)

IMVP_PWRGD(36,42)

12

C2709

SC2D2U10V3KX-1GP

EC_AGND

KBC_VCORF

12

C2712

C2712 SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

12

C2710

SCD1U10V2KX-5GP

PCB_VER_AD

PSL_IN2 MODEL_ID_DET

ECSMI#_KBC

PSL_IN1 PSL_OUT EC_GPIO72

3D3V_AUX_KBC_VCC

U2701A

104

VREF

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2

100

GPIO93/AD3

101

GPIO94/DA0

105

GPIO95/DA1

106

GPIO96/DA2

79

GPIO2

95

GPIO3/AD6

96

GPIO4/AD5

108

GPIO5/AD4

93

PSL_IN2#_GPIO6

94

GPIO7/AD7

114

GPIO16

6

GPIO24

109

GPIO30

14

GPIO34/CIRRXL

15

GPIO36

80

GPIO41

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

23

GPIO46/CIRRXM/TRST#

26

GPIO51

73

PSL_IN1_GPIO70

74

PSL_OUT_GPIO71

75

VBKUP

82

GPIO75

83

GPO76/SHBM

84

GPIO77

91

GPIO81

110

GPO82/IOX_LDSH/TEST#

112

GPIO84/IOX_SCLK/XORTR#

107

GPIO97

44

VCORF

NPCE795PA0DX-GP-U

VCC19VCC46VCC76VCC88VCC

GND18GND45GND78GND89GND

115

GND

5

116

ROSA Multi GPIO setting

R2711 0R0402-PADR2711 0R0402-PAD

20100923 X01 Modify: Change R2711 to 0R0402

C2719 SCD1U10V2KX-5GP

CPU_THRM

SYS_THRM

B B

12

DY

C2721 SCD1U10V2KX-5GP

12

DY

EC_AGND

short pad from 0ohm.

VBAT

102

AVCC

GPIO11/CLKRUN#

GPIO67/PWUREQ#

GPIO52/PSDAT3/RDY#

GPIO50/PSCLK3/TDO

F_SDIO/F_SDIO0

1 2

4

20100824 X01 Modify: Change R2724 to 20K 0402 from 10K for X01 stage. 20100928 X01: Change R2739 to 100K 1% from 5% Resistor. Change R2726 to 100K 1% from 5% Resistor. Stuff C2717,C2718 to reduce noise.

3D3V_S0

12

C2702

SCD1U10V2KX-5GP

4

1 OF 2

VDD

LRESET#

LCLK

LFRAME#

LAD3 LAD2 LAD1 LAD0

SERIRQ

GPIO65/SMI#

ECSCI#/GPIO54

GPIO10/LPCPD#

GPIO85/GA20

KBRST#/GPIO86

GPIO27/PSDAT2

GPIO26/PSCLK2

GPIO35/PSDAT1

GPIO37/PSCLK1

GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3 GPIO47/SCL4 GPIO53/SDA4

F_CS0#

F_SCK

F_SDI/F_SDIO1

AGND

103

EC_AGND

C2702

7 2 3 1 128 127 126 125 8 9 29 124 123 121 122

27 25 11 10 71 72

70 69 67 68 119 120 24 28

90 92 86 87

C2703

DY

SC2D2U10V3KX-1GP

C2711

1 2

SC220P50V2KX-3GP

R2735

PLT_RST#_EC

1 2

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

ECSCI#_KBC

ECSWI#_KBC

AD_IA_HW2

EC_ENABLE#_1

PROCHOT_EC

EC_SPI_CS#_C EC_SPI_CLK_C EC_SPI_DI_C

EC_SPI_DO_C

NOTE: Locate resistors R2719 and R2722 close to the NPCE791L.

NOTE: Connect GND and AGND planes via either 0R resistor or one point layout connect ion.

EC_GPIO47 High Active

PROCHOT_EC

12

R2732

100KR2J-1-GP

PCB_VER_AD

SCD1U10V2KX-5GP

DY

0R2J-2-GP

CLK_PCI_KBC (18)

LPC_FRAME# (21,71)

LPC_AD[0..3] (21,71)

INT_S ERIRQ (21 ) PM_CLKRUN# (19) L_BKLT_EN (17)

HDMI_ IN# (51)

H_A20GATE ( 22) H_RCIN# (22)

BLON_OUT (49)

AD_IA_HW2 (40)

PCH_WAKE# (19)

TPDATA (69) TPCLK (69)

<------ TP

BAT_SCL (39,40) BAT_SDA (39,40) SML1_CLK (20,86) SML1_DATA (20,86)

PM_LAN_ENABLE (31)

LCD_TST_EN (49)

33R2J-2-GPR2736 33R2J-2-GPR2736

12

33R2J-2-GPR2719 33R2J-2-GPR2719

12

R2737 0R2J-2-GPR2737 0R2J-2-GP

12

R2722 33R2J-2-GPR2722 33R2J-2-GP

12

Q2702

G

S

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

3

3D3V_AUX_KBC

X00 1025

12

C2717

DY

1 2

EC_AGND

PLT_RST# (5,18,31,32,35,65,66,71,83)

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

R2724

R2724 10KR2F-2-GP

10KR2F-2-GP

R2726

R2726 100KR2F-L1-GP

100KR2F-L1-GP

NOTES: The NPCE795P GPIO/PWM outputs that are connected to LEDs have high drive buffers (20mA) and can be connected directly to the LEDs.

X00 1123

20100917 X01 Modify: Rename PCIEST# to AD_IA_HW2 on KBC GPIO50 for power Tom suggest.

<------ BATTERY / CHARGER <------PCH / eDP

SPI_CS0#_R (21,60) SPI_CLK_R (21,60) SPI_SO_R (21,60)

SPI_SI_R (21,60)

EC_SPI_DI_C

12

R2773

R2773 100KR2J-1-GP

100KR2J-1-GP

20100906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

20100923 X01 Modify: Change R2733 to 0R0402

D

short pad from 0ohm.

ECRST#

R2720

R2720 0R2J-2-GP

0R2J-2-GP

3D3V_AUX_S5

12

C2716

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

143.0K100.0K 1.358VReserved

174.0KReserved 100.0K

PECI

EC_VTT

12

SCD1U16V2KX-3GP

R2705

R2705 10KR2J-3-GP

10KR2J-3-GP

U2701B

31

GPIO56/TA1

117

GPIO20/TA2

63

GPIO14/TB1

64

GPIO01/TB2

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

81

GPIO66/G_PWM

66

GPIO33/H_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM

85

VCC_POR#

113

GPIO87/CIRRXM/SIN_CR

111

GPIO83/SOUT_CR/TRIST#

30

GPIO55/CLKOUT/IOX_DIN_DIO

77

GPIO00/EXTCLK

13

PECI

12

VTT

NPCE795PA0DX-GP-U

B

100.0KX00

X01

X02

A00

Reserved

Reserved 1.65V

100.0K

Reserved 100.0K 215.0K 1.048V

FAN_TACH1(28)

PM_PWRBTN#(19)

PCIE_WAKE#(31,35,66) PM_SLP_S3#(19,36,37,47)

CHG_AMBER_LED#(68)

KBC_BEEP(29)

KB_BL_CTRL(69)

AD_IA_HW(40)

PWRLED#(68)

E51_RxD(65,66)

E51_TxD(65,66)

AMP_MUTE#(29)

PCH_SUSCLK_KBC(19)

R2721 43R2J-GPR2721 43R2J- GP

H_PECI(5,22)

1D05V_VTT

1 2 1 2

Need very close to EC

PURE_HW_SHUTDOWN#(28,36,86)

H_PROCHOT # (5,40,42)

2

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.204V

KBSOUT15/GPIO61/XOR_OUT

ECRST#

12

E

C2715

MMBT3906-4-GP

DY

Q2701

C

84.T3906.A11

2nd = 84.03906.F11

MODEL_ID_DET

C2718

DY

1 2

SCD1U10V2KX-5GP

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7 KBSOUT8

KBSOUT9/SDP_VIS# KBSOUT10/P80_CLK KBSOUT11/P80_DAT

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

SC1U6D3V2KX-GP

3D3V_AUX_KBC

12

R2710

R2710 143KR2F-GP

143KR2F-GP

12

R2739

R2739 100KR2F-L1-GP

100KR2F-L1-GP

EC_AGND

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33

54 55 56 57 58 59 60 61

ECRST# (66)

1

MODEL_ID_DET(GPIO07)

DQ15_ATI

DQ15_NVIDIA

DN15_UMA

DN15_ATI

DQ13_UMA

DQ13_ATI

DN13_UMA

DN13_ATI

DQ15_Ventura

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0KDQ15_UMA 3.0V

100.0K

100.0K 215.0K 1.048V

10.0K

20.0K

33.0K

47.0K(63.47334.1DL)

64.9K(64.64925.6DL)

76.8K

100.0K

143.0K100.0K 1.358V

174.0K100.0K

Notes: The total SPI interface signal between EC and PCH can’t not exceed 6500mil. The mismatch between SPI signal must be within 500mil

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

KCOL[0..16] (69)

KROW[0..7] (69)

EC_SWI#(20)

EC_SCI#(22)

EC_SMI#(22)

X00 1111

ECSWI#_KBC

R2758

1 2

0R2J-2-GP

ECSCI#_KBC

R2759

1 2

0R2J-2-GP

ECSMI#_KBC

R2760

1 2

0R2J-2-GP

MEDIA BUTTON CONTROL

3D3V_AUX_KBC

2.75V100.0K

2.48V100.0K

2.24V

2.0V

1.87V

1.65V

1.204V

EC GPIO standard PH/PL

20100929 X01:

PSL_IN2

BAT54CPT-GP

KBC_PWRBTN#(68)

A A

3

D2702

2ND = 83.00054.Q81

83.R2003.E81

AC_IN#_KBC

20100906 X01 Modify: Add C2722 0.1uF between Q2703 G&S pin for fixed leakage voltage to 3D3V_AUX_KBC under DC mode. 20100917 X01: Add Q2706 2N7002 to avoid leakage loop from 3D3V_S5 to 3D3V_AUX_KBC issue when 10mW latched fail timing. Un-stuff C2713 to follow the standard schematics.

1 2

1

83.R2003.E81

2ND = 83.00054.Q81

2

KBC_ON#

D2703

2

10mW

1

BAT54CPT-GP

5

R2704

3

EC_GPIO72

330KR2J-L1-GP

KBC_ON#_R

AC_IN# (40)

3D3V_AUX_S5 3D 3V_AUX_S5

RN2706

1

4

KBC_ON#_GATE

23

SRN10KJ-5-GP

C2713

SCD1U10V2KX-5GP

G

S

C2722

1 2

SCD1U10V2KX-5GP

S

G

D

12

D

DY

3D3V_AUX_KBC

2N7002K-2-GP

S5_ENABLE

D

Q2706

84.2N702.J31

2ND = 84.2N702.031

Q2703

Q2703 DMP2130L-7-GP

DMP2130L-7-GP

2ND = 84.03413.A31

84.02130.031

Stuff R2756 and un-stuff R2734 to Keep KBC data under DC mode.

PWR_CHG_ACOK(40)

NOTES: Please make sure there's no pull-down resistor on USB_PWR_EN#,AC_PRESENT,E51_TXD.

4

PSL SOLUTION

1 2

PSL_OUT

G

S

2ND = 84.2N702.031

1 2

DY

R2767

PSL

2N7002K-2-GP

84.2N702.J31

R2756

EC_GPIO72

0R2J-2-GP

PSL_IN1

R2768

PSL

0R2J-2-GP

0R2J-2-GP Q2705

Q2705

12

PSL

KBC_ON#_R

D

http://hobi-elektronika.net

R2769

R2769 100KR2J-1-GP

100KR2J-1-GP

3D3V_AUX_KBC

3D3V_AUX_KBCRTC_AU X_S5

AC_IN#_KBC

EC_ENABLE#_1

10mW SOLUTION

VBACKUP

EC_GPIO72

R2734

1 2

0R2J-2-GP

DY

PSL_IN1

R2763

1 2

0R2J-2-GP

10mW

G

2ND = 84.2N702.031

R2766

1 2

10mW

3

10mW

S

2N7002K-2-GP

84.2N702.J31

Q2704

0R2J-2-GP

KBC_ON#_RKBC_ON#

PSL_IN1

PSL_OUT

D

KBC_ON#

FAN_TACH1(28)

BAT_SCL BAT_SDA

BAT_IN# AC_IN#_KBC

S5_ENABLE ECRST#

EC_ENABLE#_1

E51_RxD

BLUETOOTH_EN

FAN_TACH1

4

8 7 6

2

RN2701

SRN4K7J-8-GP

RN2703

SRN100KJ-6-GP

RN2705

SRN10KJ-6-GP

1 2

23 1

1 23

1 2 3 45

R2712 10KR 2J-3-GPR2712 10KR 2J-3-GP

DY

R2708 10KR 2J-3-GP

DY

R2709 10KR 2J-3-GP

3D3V_AUX_KBC

3D3V_S0

PCIE_WAKE#

Title

KBC Nuvoton NPCE785P

Size Document Number Rev

A2

Date: Sheet

1 2

R2776 100KR2J-1-GPR2776 100KR2J- 1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

DB13 DIS

1

27 105Frid ay, November 26, 2010

of

X00

5

4

3

2

1

SSID = Thermal

Thermal sensor P2800

3D3V_LDO_S0

X00 1123

12

R2803

ADJ

R2803 118KR2F-1-GP

118KR2F-1-GP

12

96.3 Degree

12

C2805

SCD1U10V2KX-5GP

P2800EA1-GP

5

VCC

6 7 8

1.H/W T8 Shutdown

TDR

DXP

TDL

DXN

GND

OTZ

ADJ

U2801

74.02800.A71

4 3 2

ADJ

1

20100906 X01 Modify: Change U2801,U2803 to 74.02800.A71 from

74.02800.071 from vender updated parts. Change R2803&R2817 to 107K from 499K, R2804&R2818 to 226K from 102K base on updated ADJ Table.

SYS_THRM (27) CPU_THRM (27)

5V_S0

THERM_SYS_SHDN# THERM_SYS_SHDN#_1

Layout note: 15 mil; at least

83.R5003.C8F

2ND = 83.R5003.H8H

3rd = 83.5R003.08F

R2812

12

DY

0R2J-2-GP

21

CH551H-30PT-GP

D2802

DY

12

waiting for confirm

PURE_HW_SHUTDOW N#(27,36,86)

R2806

24K3R2F-1-GP

1 2

THERM_SYS_SHDN#_1

20101019 X01: Reserve U2804 for PURE_HW_SHUTDOWN# test. 20101020 X01: Reserve R2810 to 3D3V_S0 and R2811 to GND for HYST.

X00 1123

FAN_TACH1(27)

PWM_FAN(27)

C2810

SC2200P50V2KX-2GP

20101110

U2804_1

PWM FAN CONN

AFTP2802AFTP2802 AFTP2801AFTP2801 AFTP2803AFTP2803

12

C2811

DY

U2804

1

SET

2

GND OUT#3HYST

G709T1UF-GP

74.00709.A7F

5V_S0

1

FAN_TACH1_C

1

PWM_FAN_R

1

Q2802

D

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

20100906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

SCD1U10V2KX-5GP

VCC

X00 1112 Remove R2802,change FAN_PWM1 to PWM_FAN FAN_TACH1 from FAN1 PIN3 change to PIN2 FAN3 change to GND

RN2807

1 2 3

5

4

4

SRN100J-3-GP

THERM_SYS_SHDN#_1

S

G

0629 Modify

U2804_5

12

C2817

C2817 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

U2804_4

R2811

0R2J-2-GP

FAN_TACH1_C

PWM_FAN_R

20.F0765.004

3D3V_S0

R2801

150R2F-1-GP

R2810

DY

0R2J-2-GP

12

X00 1118

AFTP2804AFTP2804

3D3V_S0

3D3V_LDO_S0

12

3D3V_LDO_S0

12

FAN1

4 3 2

1

ACES-CON4-4-GP

12

R2809

R2809 100KR2J-1-GP

100KR2J-1-GP

5V_S0

12

C2808

C2809

5 6

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

D D

C C

B B

3D3V_LDO_S0

Layout notice : Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

X00 1123

2ND = 84.03904.P11

3

84.03904.L06

Q2801

2.System Sensor, Put on palm rest

20100906 X01 Modify: Updated P2800 ADJ Table from data sheet.

1

PMBS3904-1-GP

2

12

C2802

C2802 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

P2800_DXP

12

C2806

C2806 SC470P50V3JN-2GP

SC470P50V3JN-2GP

P2800_DXN

R2804

R2804 226KR2F-GP

226KR2F-GP

12

C2807

C2807 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

THERM_SYS_SHDN#

X00 1123

3D3V_S05V_S5 3D3V_LDO_S0 3D3V_S0

U2802

1

VIN

2

GND EN3NC#4

G9091-330T11U-GP

74.09091.J3F

2nd = 74.09198.G7F

A A

20100621 V1.2

Current Limit=360mA

5

VOUT

4

R2813

DY

0R2J-2-GP

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

THERMAL P2800 / Fan control

Size Document Number Rev

A3

5

4

http://hobi-elektronika.net

3

2

A3

Date: Sheet

THERMAL P2800 / Fan control

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

X00

of

28 105Friday, November 26, 2010

1

X00

5

SSID = AUDIO

For EMI

AUD_DMIC_CLK AUD_DMIC_IN0

EC2901

EC2902

D D

3D3V_S0

1 2

DY

SC4D7P50V2CN-1GP

Close to codec

12

C2904

C2903

1 2

SC1U6D3V2KX-GP

C C

3D3V_S0

12

R2908

R2908 10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

AUD_VREFOUT_B

12

C2923

SC1U10V2KX-1GP

B B

C2902

1 2

SCD1U10V2KX-5GP

1123

EC2902

1 2

DY

SC4D7P50V2CN-1GP

0625 Modify: AUD_DMIC_CLK&AUD_DMIC_IN0 connector to LVDS pin define.

AUD_DMIC_CLK(49) AUD_DMIC_IN0(49)

HDA_CODEC_SDOUT(21) HDA_CODEC_BITCLK(21)

HDA_SDIN0(21)

HDA_CODEC_SYNC(21) HDA_CODEC_RST#(21)

R2920 0R2J-2-GPR2920 0R2J-2-GP R2921 0R2J-2-GPR2921 0R2J-2-GP

AUD_PC_BEEP Trace width>15 mils

4

AMP_MUTE#(27)

Close to codec

AUD_DVDDCORE

12

C2901

C2901 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2 1 2

R2901

1 2

33R2J-2-GP

0707 Modify: updated U2901 part number from data base.

AUD_DMIC_CLK_R

AUD_DMIC_IN0_R HDA_CODEC_SDOUT HDA_CODEC_BITCLK AUD_HP1_JACK_R HDA_CODEC_SDIN0

HDA_CODEC_SYNC HDA_CODEC_RST# AUD_PC_BEEP

2010/06/30 Change to 92HD87 (71.92H87.A03)

AUD_PC_BEEP

C2912 SCD1U10V2KX-5GPC2912 SCD1U10V2KX-5GP

C2913 SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GP

AMP_MUTE#

U2901

1

DVDD_LV

2

DMIC_CLK/GPIO_1

3

DMIC_0/GPIO_2

4

SDATA_OUT

5

BITCLK

6

SDATA_IN

7

DVDD

8

SYNC

9

RESET#

10

PCBEEP

92HD87B1A5NDGXTBX8-GP

SB_SPKR_R

12

G2903

DUMMY-C2

1 2

+PVDD

41

39

40

EAPD

PVDD

THERMAL_PAD

71.92H87.A03

SENSE_A11SENSE_B12PORTF_L13PORTF_R14PORTC_L15PORTC_R16VREFFILT17CAP218VREFOUT_A19VREFOUT_C

AUD_SENSE_A

AUD_SENSE_B

SB_SPKR_R

KBC_BEEP_R

G2902

DUMMY-C2

1 2

3

AUD_SPK_R+ AUD_SPK_RAUD_SPK_LAUD_SPK_L+

+AVDD

AUD_VREG

34

37

33

36

35

38

32

31

PVSS

PVDD

AVDD2

PORTD_-L

PORTD_-R

PORTD_+L

PORTD_+R

AUD_PC_BEEP

120KR2J-L-GP

R2910 470KR2J-2-GPR2910 470KR2J-2-GP

AUD_CAP2

AUD_VREFFLT

R2909

1 2

VREG/+2_5V

20

AUD_VREFOUT_B

AUD_AGND

CAP+

CAP-

AVSS2

PORTB_R

PORTB_L

AVSS2

PORTA_R

PORTA_L

AVDD1

From SB

From EC

AUD_SPK_R+ (58)

AUD_SPK_R- (58)

AUD_SPK_L- (58)

AUD_SPK_L+ (58)

30 29 28

V-

27 26 25 24 23 22 21

HDA_SPKR (21)

KBC_BEEP (27)

2

+AVDD

R2902

1 2

0R0603-PAD

C2906

SC1U10V2KX-1GP

12 12

0R0603-PAD

PUMP_CAPP

PUMP_CAPN AUD_V_B

AUD_HP1_JACK_L

AUD_EXT_MIC_R AUD_EXT_MIC_L

+AVDD

12

C2905

1 2

SCD1U10V2KX-5GP

AUD_AGND

CLOSE TO CODEC

C2914

C2914 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

R2906 60D4R2F-GPR2906 60D4R2F-GP

1 2

R2905 60D4R2F-GPR2905 60D4R2F-GP

1 2

C2922 SC1U10V3KX-3GPC2922 SC1U10V3KX-3GP C2921 SC1U10V3KX-3GPC2921 SC1U10V3KX-3GP

Put C2921 and C2922 close to codec

0707 Modify: Change R2911,R2914,R2917 change to 0ohm 0603 from short pad. 0726 Modify: Removed all of AUD_AGND and R2911,R2914,R2917.

R2911

0R3J-0-U-GP

12

R2914

0R3J-0-U-GP

12

R2917

0R3J-0-U-GP

12

1

5V_S0 +PVDD

R2903

1 2

0R0603-PAD

12

C2909

C2908

1 2

SCD1U10V2KX-5GP

AUD_HP1_JACK_R2 (58)

AUD_HP1_JACK_L2 (58)

AUD_AGND

MIC_IN_R (58) MIC_IN_L (58)

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

AUD_AGND AUD_AGNDAUD_AGND AUD_AGND

C2910

SC1U10V2KX-1GP

AUD_AGND

12

C2917

SC4D7U6D3V3KX-GP

R2904

1 2

0R0603-PAD

SC10U6D3V5MX-3GP

12

C2918

SC10U6D3V5MX-3GP

Close to codec

0719 Modify: Move RN2901 to closed AUDIO CODEC from speaker connector.

0,&,1

AUD_VREFOUT_B

1

23

RN2901

SRN4K7J-8-GP

4

5V_S0

12

C2915

C2916

SC10U6D3V5MX-3GP

SC1U6D3V2KX-GP

$]DOLD,)(0,

HDA_CODEC_BITCLK

12

R2912

R2912 47R2J-2-GP

47R2J-2-GP

DY

HDA_CODEC_BITCLK_R

A A

12

C2920

DY

SCD1U10V2KX-5GP

5

AUD_SENSE_A

+AVDD

12

AUD_AGND

R2915

R2915 2K49R2F-GP

2K49R2F-GP

C2919

C2919 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

Close to Pin13

4

R2913

1 2

20KR2F-L-GP

R2919

39K2R2F-L-GP

AUD_HP1_JD# (58)

12

EXT_MIC_JD# (58)

http://hobi-elektronika.net

3

AUD_SENSE_B

Close to Pin14

+AVDD

12

AUD_AGND

R2916

R2916 2K49R2F-GP

2K49R2F-GP

R2918

R2918 20KR2F-L-GP

20KR2F-L-GP

AUD_AGND

2

MIC_IN_L(58)

MIC_IN_R(58)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Audio Codec 92HD87B1

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

29 105Friday, November 26, 2010

of

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

30 105Friday, November 26, 2010

of

X00

5

SSID = LOM

4

3

2

3D3V_LAN_S5

1

L3101

IND-4D7UH-113-GP

D D

REGOUT

60 mils

IND-4D7UH-113-GP

1 2

MAIN:68.4R71B.10E

1D05V_LOM

C3108

SC4D7U6D3V3KX-GP

C3108

SC4D7U6D3V3KX-GP

12

40 mils

SCD1U16V2ZY-2GP

C3101

R3109

1 2

0R2J-2-GP

40 mils

SEC:68.4R71D.10B

Placed withing 200mils of the REGOUT

R3112

Keep Caps withing 200mils of L3501

1 2

0R2J-2-GP

X00 1122

3D3V_S0

12

R3134

R3134 10KR2J-3-GP

Q3104

Q3104_1

312

10KR2J-3-GP

CLKREQ#_LAN_R

C C

MMBT3904-7-F-GP

PCIE_CLK_LAN_REQ#(20)

MMBT3904-7-F-GP

3D3V_LAN_S5

12

R3135

R3135 10KR2J-3-GP

10KR2J-3-GP

X00 1006

1 2

DY

R3139 0R2J-2-GP

CLK_PCIE_LAN#(20) CLK_PCIE_LAN(20)

B B

PCIE_TXN2(20) PCIE_TXP2(20)

3D3V_S0

12

R3103

R3103 1KR2J-1-GP

1KR2J-1-GP

ISOLATE#_R

12

R3104

R3104 15KR2J-1-GP

15KR2J-1-GP

PCIE_RXN2(20)

PCIE_RXP2(20)

X00 1122

3D3V_LAN_S5

12

R3140

R3140 10KR2J-3-GP

10KR2J-3-GP

Q3140_1

Q3105

MMBT3904-7-F-GP

5

MMBT3904-7-F-GP

R3141 0R2J-2-GP

PCIE_WAKE#(27,35,66)

A A

312

1 2

DY

PCIE_WAKE#_LAN

3D3V_LAN_S5

12

R3142

R3142 10KR2J-3-GP

10KR2J-3-GP

Close to Lan IC

4

Close to U3101 pin3, 6, 9, 13, 29, 41, 45

40 mils

SCD1U16V2ZY-2GP

C3106

12

PLT_RST#(5,18,27,32,35,65,66,71,83)

C3126

SCD1U10V2KX-4GP

1 2

C3102

SCD1U10V2KX-4GP

Close to Lan IC

12

R31180R2J-2-GP R31180R2J-2-GP

12

PLT_RST#

CLKREQ#_LAN_R_1CLKREQ#_LAN_R

SCD1U16V2ZY-2GP

C3121

C3122

12

1 2

R3105 0R2J-2-GPR3105 0R2J-2-GP

EVDD10

VDD10

1 2

C3135

SC12P50V2JN-3GP

1 2

C3136

SC12P50V2JN-3GP

SCD1U16V2ZY-2GP

PCIE_RXN2_C PCIE_RXP2_C

http://hobi-elektronika.net

Close to U3101 pin21

SCD1U16V2ZY-2GP

C3114

C3124

12

PCIE_WAKE#_LAN

PLT_RST_LAN#

U3101

LON_I2C_GND

R313610KR2J-3-GP R313610KR2J-3-GP

12

U3101

3D3V_LAN_S5

X3101

X3101 XTAL-25MHZ-96GP

XTAL-25MHZ-96GP

RTL8111E-VB-GR-GP

12

EVDD10

SC1U10V2KX-1GP

C3109

12

VDD10

SCD1U16V2ZY-2GP

C3127

12

24

GND

23

HSON

22

HSOP

21

EVDD10

20

REFCLK_N

19

REFCLK_P

18

HSIN

17

HSIP

16

CLKREQ#

15

SMBDATA

14

SMBCLK

13

DVDD10

LAN_X1

LAN_X2

3

SCD1U16V2ZY-2GP

C3134

12

SCD1U16V2ZY-2GP

C3128

12

3D3V_LAN_S5

26

25

27

PERST#

ISOLATE#

AVDD3312MDIP310MDIN3

11

VDD10

28

LANWAKE#

AVDD109MDIP27MDIN2

8

PM_LAN_ENABLE(27)

LON_EEDI

LON_EECS

30

31

32

DVDD1029DVDD33

EECS/SCL

LED3/EEDO

AVDD106MDIP14MDIN1

5

3D3V_S5

12

35

34

33

VDDREG

EEDI/SDA

ENSWREG

GPO/SMBALERT

AVDD103MDIP01MDIN0

2

C3115

C3115 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

40 mils

10KR2J-3-GP

1 2

ENSWREGISOLATE#_R REGOUT

36

REGOUT

LED1/EESK

DVDD33

LED0 DVDD10 AVDD33

CKXTAL1 CKXTAL2

AVDD10

RSET AVDD33 AVDD33

GND

49

NB_LOM_TRD0 NB_LOM_TRD0#

NB_LOM_TRD1 NB_LOM_TRD1#

NB_LOM_TRD2 NB_LOM_TRD2#

NB_LOM_TRD3 NB_LOM_TRD3#

40 mils

12

R3114

R3114 10KR2J-3-GP

10KR2J-3-GP

PM_LAN_ENABLE_R

2N7002-7F-GP

Q3102

G

LON_VDDREG

R3137

R313810KR2J-3-GP R313810KR2J-3-GP

37 38 39 40 41 42 43 44 45 46 47 48

VDD10

2N7002-7F-GP

1ST: 84.27002.N31 2ND: 84.27002.L04

S D

SCD1U10V2KX-4GP

12

C3129

Close to U3101 pin34, 35

GPO_LOM

LAN_X1 LAN_X2

RSET

R3125 2K49R2F-GPR3125 2K49R2F-GP

NB_LOM_TRD0 (59) NB_LOM_TRD0# (59)

NB_LOM_TRD1 (59) NB_LOM_TRD1# (59)

NB_LOM_TRD2 (59) NB_LOM_TRD2# (59)

NB_LOM_TRD3 (59) NB_LOM_TRD3# (59)

2

Q3101

S

R3115

1 2

100KR2J-1-GP

R3107

C3113

SC4D7U6D3V3KX-GP

C3113

SC4D7U6D3V3KX-GP

12

0R2J-2-GP

1 2

R3108 1KR2J-1-GPR3108 1KR2J-1-GP

VDD10

1 2

3D3V_LAN_S5

Stuff R3117 if switching regulator is enabled. Stuff R3116 if external power 1.2V is used.

ENSWREG

Title

Size Document Number Rev

A3

Date: Sheet

G

AO3403-GP

G

LAN_EN_G

12

C3118

C3118 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

3D3V_LAN_S5

12

C3112

3D3V_LAN_S5

D

SCD1U10V2KX-4GP

D

12

R3117 0R2J-2-GPR3117 0R2J-2-GP

R3116 0R2J-2-GP

1ST: 84.03403.031 2ND: 84.00102.031

12

C3117

C3117 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C3123

SCD1U10V2KX-4GP

C3123

SCD1U10V2KX-4GP

1 2

DY

LOM Realtek-RTL8111E

DB13 DIS

C3131

C3130

SCD1U10V2KX-4GP

C3130

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

12

C3116

DY

SC10U6D3V5KX-2GP

12

C3132

SCD1U10V2KX-4GP

C3132

SCD1U10V2KX-4GP

3D3V_LAN_S5

31 105Friday, November 26, 2010

of

12

SCD1U10V2KX-4GP

12

C3133

SCD1U10V2KX-4GP

C3133

SCD1U10V2KX-4GP

X00

5

SSID = SDIO

4

3

2

1

D D

3D3V_CARD_S0

12

C3222

C3222 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Close to chip

AV12

12

C3221

SC4D7U6D3V3KX-GP

C C

3D3V_S0

MAX 1.2A 40mil min

12

C3218

C3206

SCD1U10V2KX-4GP

X00 1125 Realtek suggestion stuff Close to chip

B B

1 2

SP14

C3218 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2

R3124 0R2J-2-GPR3124 0R2J-2-GP

12

C3223

C3223 SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

DV12

X00 1125 Realtek suggestion stuff

C3220

C3220 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

X00 1118

PCIE_TXP6(20)

PCIE_TXN6(20) CLK_PCIE_CARD(20) CLK_PCIE_CARD#(20)

PCIE_RXP6(20) PCIE_RXN6(20)

X00 1125 Realtek suggestion stuff

SP14_R SD_CLK

12

EC7418

DY

SC10P50V2JN-4GP

EC7419

SC10P50V2JN-4GP

PLT_RST#(5,18,27,31,35,65,66,71,83)

PCIE_CLK_CARD_REQ#(20)

C3338 SCD1U10V2KX-4GPC3338 SCD1U10V2KX-4GP

1 2

C3304 SCD1U10V2KX-4GPC3304 SCD1U10V2KX-4GP

1 2

Close to IC

PCIE_RXP6_C PCIE_RXN6_C

3D3V_CARD_S0

Card_3V3 trace 40 mils min

AV12,DV12,DV12_S,DV33_18 trace 20 mils min

xD_CD#(74)

SP1(74)

SP2(74)

SP3(74)

SP4(74)

10mil min

AV12

DV12

X00 1125

PLT_RST_CARD#PLT_RST#

1 2

R3111 0R2J-2-GPR3111 0R2J-2-GP

R3203

12

6K2R2F-GP

U7910

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

10

CARD1_3V3

11

3V3_IN

12

CARD2_3V3

RTS5209-GR-GP

DV33_18

C3219

1 2

SCD1U10V2KX-4GP

xD_CD#

SP1

SP2

SP3

SP4

3D3V_S0

CARD_RREF

44

48

47

45

46

RREF

EEDO

3V3_IN

PERST#

CLK_REQ#

800mA

400mA

XD_CD#13DV33_1814GND15SP116SP217SP318SP419SD_D120SD_D021SD_CLK22SD_CMD23SD_D3

43

EECS

42

EESK

41

40

GPIO/EEDI

MS_INS#

SD_CD#

38

39

SP1437SP15

SD_CD#

MS_INS#

SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6 SP5

DV12_S

GND

SD_D2

24

SP15

SP14

36 35 34 33 32 31 30 29 28 27 26 25

MS_INS# (74)

SD_CD# (74)

SP15 (74)

SP14 (74)

DV12_S

SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5

SP13 (74) SP12 (74) SP11 (74) SP10 (74) SP9 (74) SP8 (74) SP7 (74) SP6 (74) SP5 (74)

C3216

1 2

SCD1U10V2KX-4GP

DY

12

C3217

SC4D7U6D3V3KX-GP

X00 1125 Realtek suggestion reserve

SD_D2_R

SD_D3

SD_CMD

SD_CLK

SD_D0

SD_D1

1 2

R3113 0R2J-2-GPR3113 0R2J-2-GP

1 2

R3119 0R2J-2-GPR3119 0R2J-2-GP

1 2

R3120 0R2J-2-GPR3120 0R2J-2-GP

1 2

R3121 0R2J-2-GPR3121 0R2J-2-GP

1 2

R3122 0R2J-2-GPR3122 0R2J-2-GP

1 2

R3123 0R2J-2-GPR3123 0R2J-2-GP

SD_D2 (74)

SD_D3 (74)

SD_CMD (74)

SD_CLK (74)

SD_D0 (74)

SD_D1 (74)

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Card Reader RTS5209

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

32 105Friday, November 26, 2010

of

1

of

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

33 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

34 105Friday, November 26, 2010

of

X00

5

4

3D3V_USB30

3

2

1

IF want to support S3 R6619 will pull high 3.3V

X00 1122

Del two 50-ohm,when used PG1.5 sample.

D D

C C

X00 1122

PCIE_WAKE#(27,31,66)

3D3V_USB30

12

Q3106_1

Q3106

MMBT3904-7-F-GP

312

1 2

DY

R3144 0R2J-2-GP

12

R3524

R3507

10KR2J-3-GP

12

C3518

R3523

DY

0R2J-2-GP

SCD22U10V2KX-1GP

USB3_PEGB_CLKREQ#(20)

12

R3508

R3509

10KR2J-3-GP

12

R3521

DY

10KR2J-3-GP

3D3V_USB30

R3143

R3143 10KR2J-3-GP

10KR2J-3-GP

PCIE_WAKE#_USB30

10KR2J-3-GP

R3520

10KR2J-3-GP

12

Please the AC coupling caps close to PCIE TX

12

R3510

10KR2J-3-GP

USB30_PONRST#

12

R3522

DY

10KR2J-3-GP

CSEL => LOW : 48MHz crystal

2N7002K-2-GP

S

D

G

Q3504

R3145

R3145 10KR2J-3-GP

10KR2J-3-GP

CLK_PCIE_USB3#(20) CLK_PCIE_USB3(20)

PCIE_TXN5(20) PCIE_TXP5(20)

PCIE_RXN5(20) PCIE_RXP5(20)

GPIO0 GPIO1 GPIO2 GPIO3

R6617 should be 10K-ohm,1% toleranc. and near by terminals.

R3515

R3515 10KR2J-3-GP

10KR2J-3-GP

12

USB3_PEGB_CLKREQ#_C

3D3V_USB30

C3519 SCD1U10V2KX-4GPC3519 SCD1U10V2KX-4GP

1 2

C3515 SCD1U 10V2KX-4GPC3515 SCD1U10V2KX-4GP

1 2

PLT_RST#(5,18,27,31,32,65,66,71,83)

USB30_SMI#(18)

3D3V_USB30

R6624

DY

10KR2F-2-GP

RN3504

SRN10KJ-5-GP

PCIE_WAKE#_USB30 USB3_PEGB_CLKREQ#_C

R6617

10KR2F-2-GP

12

USB30_VSS_OSC

48MHZ_OUT

48MHZ_IN

4

1

USB30_PONRST#

PCIE_RXN5_C PCIE_RXP5_C

R6616

FREQSEL

2 3

SCL SDA

GPIO0 GPIO1 GPIO2 GPIO3

R1EXT

R1EXTRTN

12

4K7R2J-2-GP

R6619

1 2

10KR2F-2-GP

USB3_AUX_DET

U6303

B2

SCL

A2

SDA

A49

GPIO0

B46

GPIO1

B47

GPIO2

B48

GPIO3

A15

GRST#

B41

PCIE_REFCLKN

A45

PCIE_REFCLKP

A42

PCIE_RXN

B39

PCIE_RXP

A41

PCIE_TXN

B38

PCIE_TXP

A40

PERST#

B35

WAKE#

B36

CLKREQ#

B3

SMI#

B32

JTAG_RST#

A32

JTAG_TCK

A35

JTAG_TDI

B31

JTAG_TDO

B30

JTAG_TMS

A24

R1EXT

B23

R1EXTRTN

B14

FREQSEL

B21

VSS_OSC

A22

XO

A23

XI

TUSB7320RKM-GP

A43 & B8 IS NC PIN

DY

R6618

1 2

10KR2F-2-GP

A52

A12

A16

A28

A31

A33

VDD11A1VDD11

VDD11

AUX_DET

VCC3_A_USB

3D3V_USB301V_USB30

X00 1122

A38

A4

A50

B17

B19

B24

B37

B40

B42

B44

A34

A39

A47

VDD11

NC#B8B8VDD33A3VDD33

VSS

B20

A53

A51

VDD33

VSS

A43

VDD11

VDD11A6VDD11A9VDD11B1VDD11

VDD11

NC#A43

VDD11

NC#A14

NC#A26

NC#B13

NC#B29

A14

A26

B13

B29

A19

A21

A44

B11

B22

B26

VDDA_3P3

USB_DM_DN1

USB_DP_DN1

USB_SSRXN_DN1 USB_SSRXP_DN1

USB_SSTXN_DN1 USB_SSTXP_DN1

PWRON1#

OVERCUR1#

USB_DM_DN2

USB_DP_DN2

USB_SSRXN_DN2 USB_SSRXP_DN2

USB_SSTXN_DN2 USB_SSTXP_DN2

PWRON2#

OVERCUR2#

USB_DM_DN3

USB_DP_DN3

USB_SSRXN_DN3 USB_SSRXP_DN3

USB_SSTXN_DN3 USB_SSTXP_DN3

PWRON3#

OVERCUR3#

USB_DM_DN4

USB_DP_DN4

USB_SSRXN_DN4 USB_SSRXP_DN4

USB_SSTXN_DN4 USB_SSTXP_DN4

PWRON4#

OVERCUR4#

A25

B4

VDDA_3P3

B18 A20

B16 A18

B15 A17

B33 A36

A13 B12

A10 B9

B10 A11

B34 A37

A27 B25

A29 B27

A30 B28

A46 B43

A5 B5

A7 B6

A8 B7

A48 B45

USB20_DM0 (62) USB20_DP0 (62)

USB30_RXDN0 (62) USB30_RXDP0 (62)

USB30_TXDN0 (62) USB30_TXDP0 (62)

USB30_ON0 (62) USB30_OC0# (62)

USB20_DM1 (62) USB20_DP1 (62)

USB30_RXDN1 (62) USB30_RXDP1 (62)

USB30_TXDN1 (62) USB30_TXDP1 (62)

USB30_ON1 (62) USB30_OC1# (62)

3D3V_USB30

12

C3501

SCD1U10V2KX-5GP

Close to pins - i deally about one caps for every two or three pi ns

10mA

12

C3502

C3507

SCD1U10V2KX-5GP

1 2

R3519 0R2J-2- GP

DY

Q3502

DMP2305U-7-GP

G

2N7002K-2-GP

BLM15BD121SN1D-GP

L3501

1 2

12

DS

R3505

1 2

10KR2J-3-GP

12

R3504

USB3_PWR_ON _Q_1 USB3_PW R_ON_Q

100KR2J-1-GP

USB3_PWR_ON(22,62)

12

C3508

SCD1U10V2KX-5GP

100mA

3D3V_USB303D3V_S5

Q3503

C3509

SCD1U10V2KX-5GP

D

S

G

VCC3_A_USB

12

C3510

SCD1U10V2KX-5GP

C3511

C3513

SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

HELE Recommended Conditions: Normal Frequency: 48MHz.

B B

USB30_VSS_OSC

X3501

XTAL-48MHZ-22-GP

12

+/-30ppm

DY

SC15P50V2JN-2-GP

C3516

1 2

C3517

SC15P50V2JN-2-GP

Frequency Tolerance: +/- 30ppm. Load Frequency: 12pF. Effective Series Resistance: 50-ohm. Effective Shunt Capacitancce: 2pF.

48MHZ_IN

12

R3525

R3525 1M1R2J-GP

1M1R2J-GP

48MHZ_OUT_C

R3506 100R2J-2-GPR3506 100R2J-2-GP

1 2

48MHZ_OUT

U6305

1

A0

2

A1

3

A2 GND4SDA

24C02-U

VCC3_A_USB

12

DY

C3514

8

VCC

7

TEST

6

DY

SCL

5

USB3_ROM SCL SDA

SC10U10V5ZY-1GP

USE 2K EEPROM

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

USB 3.0 Controller

DB13 DIS

1

35 105Fr iday, November 26, 2010

X00

of

5

SSID = Reset.Suspend

D D

S0_PWR_GOOD(19,27)

IMVP_PWRGD(27,42)

0628 Modify: Removed R3609,R3610,R3613,C3613 and Stuff R3614.

2

3

1

D3602

D3602 BAS16-6-GP

BAS16-6-GP

83.00016.K11

2ND = 83.00016.F11

4

C3612

SCD01U50V2KX-1GP

SYS_PWROK

12

DY

R3614

1 2

0R2J-2-GP

Power Sequence

SYS_PWROK (19)

0628 Modify: Utilize D3602 Diode instead of U3603 AND GATE for SYS_PWROK sequnece control.

3

H_CPUPWRGD(5,22)

3V_5V_EN(41)

20100723 Default stuff R3622 PH Resistor to fix Annie demo board SLP_S3 abnormal issue from Annie team updated.

1D05V_VTT

H_PWRGD_R

R3601

1 2

1KR2J-1-GP

DY

12

DY

R3602

200KR2J-L1-GP

R3622

12

56R2J-4-GP

B

12

C3602

DY

SCD1U10V2KX-5GP

2ND = 83.00016.F11

83.00016.K11

BAS16-6-GP

2

3

1

D3601

1 2

R3603 1KR2J-1-GPR3603 1KR2J-1-GP

0621 Modify: Change R3603 to 1K from 2K 0402.

E

DY

Q3601

Q3601 CHT2222APT-GP

CHT2222APT-GP

C

2

H_THERMTRIP# (5,22)

PURE_HW _SHUTDOWN # ( 27,28,86)

S5_ENABLE (27)

1

SSID = Reset.Suspend

Run Power

C C

3D3V_AUX_S5

PS_S3CNTRL

R3606

1 2

100KR2J-1-GP

2N7002KDW-G P

84.2N702.A3F

2nd = 84.DM601.03F

PM_SLP_S3#(19,27,37,47)

RUN_ENABLE

Q3602

5

6

123 4

GGDDSS

PS_S3CNTRL (37)

15V_S5

1 2

R3604

R3604 100KR2J-1-GP

100KR2J-1-GP

1 2

R3607

1 2

R3605

10KR2J-3-GP

5V_RUN_ENABLE

3.3V_RUN_ENABLE

FDMC8884 MAX 9A

Rds(on) = 19mOhm

5V_S5 5V_S0

FDMC8884-GP

6

D

7

D

8

D

U3601

12

C3608

C3608 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

3D3V_S5

12

C3605

C3605 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

U3601

84.08884.A37

Rds(on) = 19mOhm FDMC8884 MAX 9A

FDMC8884-GP

6

D

7

D

8

D

U3602

84.08884.A37

45

GD

3

S

2

S

1

S

12

3D3V_S0

45

GD

3

S

2

S

1

S

12

C3604

C3604 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

+5V_RUN

C3603

C3603 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

+3.3V_RUN

+3.3V_RUN Comsumption Peak current 8.14A

1

0615 Modify: Removed R3626,R3628 0ohm 0805 Resistor, they are unnecessary for this power rail.

+1.5V_RUN_CPU Comsumption Peak current 10A

B B

+1.5V_RUN for Mini-Card Comsumption Peak current 1A

R3630

1 2

10KR2J-3-GP

SCD01U50V2KX-1GP

Removed R3627,R3629 0ohm 0805 Resistor for 1D5V_DDR_S0.

1D5V_S3 1D5V_S0

TPCA8062-H-GP MAX 14A Rds(on) = 4.1~5.4m OHM

U3606

S

D

S

D

1

8

S

D

S

D

2

7

S

D

S

D

3

6

GD

45

TPCA8062-H-GP

1.5V_RUN_ENABLE

C3610

TPCA8062-H-GP

84.08062.037

12

2nd = 84.00460.037

3rd = 84.00312.037

2010/07/14 Modify: Change U3606 part number to 84.08062.037. 20100825 Sourcer/Sarah suggest: Add 2nd source 84.00460.037(VISHAY) and 3rd 84.00312.037(FAIRCHILD).

1D5V_S0

MAX Current ? mA Design Current ? mA

Total= 11.39A

12

C3609

C3609 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

DB13 DIS

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

Power Plane Enable

36 105Fr iday, November 26, 2010

1

36 105Fr iday, November 26, 2010

X00

of

5

Close to CPU

D D

S3 Power Reduction Circuit Processor VREF_DQ Implementation

DDR_VREF_S3

0906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

4

0921 X01 Modify: Change R3708 to 0R0402 short pad from 0ohm.

X00 1123

R3707

R3707 0R2J-2-GP

0R2J-2-GP

1 2

DY

Q3708

D

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

G

RUN_ENABLE

R3705

R3705 100KR2J-1-GP

100KR2J-1-GP

1 2

3

+V_SM_VREF_CNT (9)

2

Close to DIMM S3 Power Reduction Circuit SM_DRAMPWROK

1D5V_S00D75V_S0

G

12

DY

Q3702_D

D

DY

R3704

R3704 220R2J-L2-GP

220R2J-L2-GP

S

12

R3703

R3703 22R2J-2-GP

22R2J-2-GP

Q3701_D

D

S

G

PS_S3CNTRL(36)

0906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

2

Q3701

Q3701 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

PS_S3CNTRL

1

Q3702

Q3702 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

C C

0917 X01 Modify: Removed 1D5V_S0 reserved control circuit to release layout space.

B B

PM_DRAM_PWRGD(5,19)

0907 X01 Modify: Stuff Q3704,R3710; un-stuff R3716. U3701 pin2 change to 1.05VTT_PWRGD from RUNPWROK. 0921 X01 Modify: Removed R3701,C3701 and connect 0D75V_EN to U3701 pin2.

A A

PM_DRAM_PWRGD(5,19)

SM_DRAMPWROK must have a maximum of 15ns rise or fall time over VDDQ * 0.55± 200mV and the edge must be monotonic

5

R3717

1 2

DY

0R2J-2-GP

S3 Power Reduction X01 20091111

5

PS_S3CNTRL(36)

3D3V_S0

12

R3713

200R2F-L-GP

VDDPWRGOOD_R

0D75V_EN

2N7002K-2-GP

G

D

S

Q3704

84.2N702.J31

2ND = 84.2N702.031

PM_SLP_S3#(19,27,36,47)

Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK

U3701

1

B

2

A

3

GND

74LVC1G08GW-1-GP

73.01G08.L04

2nd = 73.7SZ08.DAH

3rd = 73.7SZ08.EAH

0824 X01 Modify: Change U3701 pin2 to RUNPWROK from 0D75V_EN Reserved R3717 0ohm between PM_DRAM_PWRGD and VDDPWRGOOD_R. 0903 X01 Modify: Add 2nd source 73.7SZ08.DAH on U3701 updated from DN13ATI

VCC

5

4

Y

4

0D75V_EN

R3716 22R2J-2-GP

1D5V_S03D3V_S0

12

DY

VDDPWRGOOD_R

1.05VTT_PWRGD (45,48)

1 2

DY

12

0907 X01 Modify: Stuff Q3704,R3710; un-stuff R3716.

R3710

U3701 pin2 change to 1.05VTT_PWRGD from

0R2J-2-GP

RUNPWROK.

0D75V_EN (46)

C3705

C3705 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

CEKLT V1.0: PCH to 1K,CUP to 200R

R3702

200R2F-L-GP

R3719

1 2

910R2F-GP

12

X00 1123

http://hobi-elektronika.net

R3720

R3720 750R2F-GP

750R2F-GP

3

SM_DRAMRST#(5)

VDDPWRGOOD (5)

Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK

R3709

1 2

DY

2ND = 84.2N702.031

84.2N702.J31

Q3703

S

G

2N7002K-2-GP

0906 X01 Modify: Change all of single 2N7002 to 84.2N702.J31 from 84.2N702.D31 due to 84.2N702.D31 will EOL.

SCD047U16V2KX-1-GP

2

1D5V_S3

12

R3706

R3706 1KR2J-1-GP

1KR2J-1-GP

0R2J-2-GP

C3703

DRAMRST_CNTRL_PCH

12

Title

Size Document Number Rev

A3

Date: Sheet

S3 Power Reduction Circuit SM_DRAMRST#

SM_DRAMRST#_D

D

1 2

12

C3702

C3702 SC100P50V2JN-3GP

SC100P50V2JN-3GP

S3 Power Reduction

XPS-Z 13

R3718

1KR2J-1-GP

DRAMRST_CNTRL_PCH (20)

DDR3_DRAMRST# (14,15)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

37 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

SSID = PWR.Support

DCin CONN

D D

5V_S5

PR3802

15KR2J-1-GP

1 2

PQ3802_B

PR3811

100KR2J-1-GP

1 2

FDV301N-NL-GP

R3801

JACK_PSID PS_ID_R

C C

R3801

1 2

0R3J-0-U-GP

X00 1122

FDV301N-NL-GP

D

PQ3801

2

1

3

PSID_DISABLE#_R_C

G

PMBS3904-1-GP

PMBS3904-1-GP PQ3802

PQ3802

12

PR3803

PR3803 10KR2J-3-GP

10KR2J-3-GP

PR3807

SD

PS_ID

PR3807

1 2

33R2J-2-GP

3D3V_S5

2

1

PD3803

PD3803 BAV99-4-GP

BAV99-4-GP

3

3D3V_S5

12

PR3806

PR3806 2K2R2J-2-GP

2K2R2J-2-GP

PSID_EC (27)

X00 11-12 Remove PD3804,PR3808,PQ3804,PQ3805 relation circuit.(RCID function,AD_OFF)

X00 1108

PL3801

PL3801 PAD-2P-4516-GP

PAD-2P-4516-GP

+DC_IN_L

1

2

+DC_IN

X00 1108

SCD1U25V2KX-GP

0722

DY

C6625

12

SCD1U25V2KX-GP

PD3801

PD3801 P6SBMJ27APT-GP

P6SBMJ27APT-GP

A K

X00 1122

DCIN1

6

GND

7

GND

8

GND

B B

9

GND

1

DATA

DC-JACK196-GP

22.10037.J51

DC_IN+#3 DC_IN+#2

DC_IN-#5 DC_IN-#4

3 2

1

25 mils

AFTP106AFTP106

5 4

DY

12

PC3808

PC3808 SCD1U50V3KX-GP

SCD1U50V3KX-GP

DY

C6626

12

This cap should be used only as last resort for EMI suppression.

12

PC3802

DY

SCD1U50V3KX-GP

+DC_IN

12

PC3801

PR3809

240KR3-GP

PU3801_G

SC1U25V5KX-1GP

PR3810

PR3810 47KR3J-L-GP

47KR3J-L-GP

1 2

PU3801

S

D

...

S

.

S

.

G

FDMC4435BZ-GP

D

.

D

.

1

2

3

4 5

Id= -10A Qg= -22nC Rdson=14~30mohm

AD+

8

7

6

DY

12

DY

PC3804

12

PC3806

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

12

PC3803

SCD01U50V2KX-1GP

12

PC3805

SCD01U50V2KX-1GP

+DC_IN

1

JACK_PSID

A A

AFTP3804AFTP3804

1

AFTP7802AFTP7802

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

5

4

http://hobi-elektronika.net

3

2

Custom

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DCIN_JACK

XPS-Z 13

1

X00

of

38 105Friday, November 26, 2010

5

4

3

2

1

SSID = BATT CONN

D D

BT+

12

C3902

SCD1U50V3KX-GP

C C

BAT_IN#(27) BAT_SDA(27,40) BAT_SCL(27,40)

12

C3901

C3901 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

KA

DY

RN3901

1 2 3 4 5

SRN100J-4-GP

PD3902

1SMA18AT3G-GP

8 7 6

EC3901

12

DY

SC10P50V2JN-4GP

EC3902

12

DY

SC10P50V2JN-4GP

AFTP3902AFTP3902 AFTP3903AFTP3903 AFTP3904AFTP3904 AFTP3905AFTP3905

PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1

PBAT_PRES1#

1

PBAT_SMBDAT1

1

PBAT_SMBCLK1

1

BT+

1

For actual location, need to be swap all pin

Batt Connecter

BATT1

NP1

1

2 3 4 5 6 7

NP2

ACES-CON7-3-GP-U

20.F1643.007

SYSTEM_PRESENT

AFTP3906AFTP3906

1

Close to Batt Connector

For actual location, need to be swap all pin

1

BAT_SDA

3

2

D3903

D3903 BAV99-4-GP

BAV99-4-GP

BAT_IN#

B B

3

D3902

D3902 BAV99-4-GP

BAV99-4-GP

1

2

1

BAT_SCL

3

2

D3901

D3901 BAV99-4-GP

BAV99-4-GP

3D3V_AUX_KBC

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

BATT CONN

XPS-Z 13

39 105Friday, November 26, 2010

1

of

X00

5

SSID = Charger

D

8

D

PR4004

PWR_CHG_ACOK

PWR_CHG_IO UT

PC4012

SCD01U50V2KX-1GP

DY

S D

CHG_AGND

100KR2J-1-GP

7

D

6

D

FDMC4435BZ-GP

Id= -10A Qg= -22nC Rdson=14~30mohm

1 2

10KR2J-3-GP

DC_IN_D

PQ4001

PQ4001 2N7002A-7-GP

2N7002A-7-GP

G

PWR_CHG_REGN

3D3V_AUX_S5

12

PR4062

AD+

D D

H_PROCHOT#(5,27,42)

EE reserve for system over power protection

C C

DY

ROSA

PWR_CHG_CMPI N

12

PR4029

PR4029 30K9R2F-GP

30K9R2F-GP

PWR_CHG_CMPIN_2

5

6

123 4

PWR_CHG_CMPI N_2

AD_IA_HW

PR4022

5

Adapter type

65W

90W

130W

12

B B

A A

PR4036

PR4036 15KR2F-GP

15KR2F-GP

PWR_CHG_CMPIN_1

PWR_CHG_CMPI N_1

PQ4004

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

CHG_AGND

EC code only BQ24707

H_PROCHOT# AD_IA_HW2

65W

90W

130W

PWR_CHG_REGN

12

PR4030

PR4030 100KR2J-1-GP

100KR2J-1-GP

DY

PQ4005

PQ4005 2N7002A-7-GP

2N7002A-7-GP

PWR_CHG_CMPOUT

G

PR4032

12

DY

Default

PR4007

316KR2F-GP

3D3V_AUX_S5

S D

120KR2F-L-GP

24K

33.2K

59K

CHG_AGND

X00 1123

AD_IA_HW (27)

CHG_AGND

AD_IA_HW2 (27)

00

10

01

AD+

PR403149K9R2F-L-GP PR403149K9R2F-L-GP

12

PR4017

PR4017 100KR2J-1-GP

100KR2J-1-GP

12

PR4022

PR4022 33K2R2F-GP

33K2R2F-GP

12

CHG_AGND

PWR_CHG_ACOK(27)

12

PU4002

S

...

S

.

S

.

G

.

PQ4002

3 4

2

1

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

12

PR4011

PR4011 19K1R2F-GP

19K1R2F-GP

12

PR4013

PR4013 100KR2F-L1-GP

100KR2F-L1-GP

CHG_AGND

BAT_SCL(27,39)

BAT_SDA(27,39)

3D3V_AUX_S5

AC_IN#(27)

12

PR4026

PR4026 100KR2J-1-GP

100KR2J-1-GP

DY

12

PR4034

DY

120KR2F-L-GP

4

1

2

3

45

5

6

PR4010 20R5J-GPPR4010 20R5J-GP

12

PR4023

DY

100KR2J-1-GP

PWR_CHG_CMPOUT

D

.....

2N7002E-1-GP

4

12

PR4003

AD+_G_2

PR4001

1 2

10KR2F-2-GP

AD+_G_1

PR4008

20R5J-GP

1 2

3D3V_AUX_S5

12

PR4063

PR4063 100KR2J-1-GP

100KR2J-1-GP

PG4007 GAP-CLOSE-PWR-3-GPPG4007 GAP-CLOSE-PWR-3-GP

PG4008 GAP-CLOSE-PWR-3-GPPG4008 GAP-CLOSE-PWR-3-GP

DY

3D3V_AUX_S5

PR4061

100KR2J-1-GP

DY

1 2

DY

PWR_CHG_REGN

X00 1118

DY

PC4001

SCD1U25V2KX-GP

PQ4003

G

S

100KR2J-1-GP

12

PWR_CHG_ACDE T

PWR_CHG_CMPOUT

12

PR4014

3D3MR2J-GP

PWR_CHG_BA T_SCL

12

PWR_CHG_BA T_SDA

12

PWR_CHG_IL IM

PWR_CHG_IFAULT_R

DY

PR4018

0R2J-2-GP

PR4035

10KR2F-2-GP

X00 1123

PWR_CHG_REGN

12

PR4025

PR4025 100KR2J-1-GP

100KR2J-1-GP

DY

12

DY

120KR2F-L-GP

3

PWR_CHG_ACP

DY

2

21

ACP

GND

DCBATOUT

12

PG4003

GAP-CLOSE-PWR-3-GP

12

PWR_CHG_ACN

CHG_AGND

1

ACN

BTST

REGN

HIDRV

PHASE

LODRV

SRP

SRN

IOUT

GND

14

1 2

GAP-CLOSE-PWR

3

PC4024

SC1U25V3KX-1-GP

17

16

18

19

15

13

12

7

PG4011

CHG_AGND

AD+_TO_SYS

1 2

PR4002

PR4002 D01R2512F-4-GP

D01R2512F-4-GP

12

PR4006

PG4002

0R2J-2-GP

GAP-CLOSE-PWR-3-GP

1 2

PC4002

SCD1U25V2KX-GP

12

PC4003

PC4004

DY

SC1U25V3KX-1-GP

CHG_AGND

PWR_CHG_VCC

PU4005

PC4010

CHG_AGND

SCD47U25V3KX-2GP

PWR_CHG_CMPIN

PWR_CHG_IF AULT

12

PR4033

PU4005

20

VCC

6

ACDET

3

CMPOUT

4

CMPIN

9

SCL

8

SDA

10

ILIM

11

IFAULT

5

ACOK#

BQ24707RGRRG4-GP

CHG_AGND

http://hobi-elektronika.net

PR4009

0R3J-0-U-GP

1 2

PWR_CHG_BTS T

PWR_CHG_HIDRV

PWR_CHG_PHA SE

PWR_CHG_LODRV

PWR_CHG_SRP

PWR_CHG_SRN

PWR_CHG_IO UT

PR4024

12

8K45R2F-2-GP

DY

PR4009_2

12

PC4022

SC220P50V2JN-3GP

CHG_AGND

12

PC4011

PR4019

PR4019 0R2J-2-GP

0R2J-2-GP

1 2

PWR_CHG_REGN

PD4001

SD103AWS-1-GP

K A

SCD047U25V2KX-GP

PR4027

1 2

10R2F-L-GP

PR4028

1 2

7D5R2F-GP

AD_IA (27)

1 2

PC4007

SC1U25V3KX-1-GP

1 2

DY

PC4020

12

CHG_AGND

2

1 2

PG4005

PG4004

GAP-CLOSE-PWR-3-GP

PU4004

FDMC8884-GP

PC4013

PC4013 SC3300P50V3KX-1GP

SC3300P50V3KX-1GP

PU4001

FDMC7692-GP

12

SCD1U25V2KX-GP

DY

CHG_AGND

12

PC4021

SCD1U25V2KX-GP

PC4023

PC4023 SCD1U25V2KX-GP

SCD1U25V2KX-GP

2

1

PU4003

S

1

...

S

2

.

S

.

3

.

G

AD+

12

PR4005

PR4005 470KR2J-2-GP

1 2

PG4006

PG4001

GAP-CLOSE-PWR-3-GP

678

DDD

SSS

GD

SSS

GD

123

4 5

470KR2J-2-GP

PWR_DCBAT OUT_CHG

12

PC4008

SC10U25V5KX-GP

PC4006

G

4 5

FDMC4435BZ-GP

Id= -10A Qg= -22nC Rdson=14~30mohm

12

PC4009

SC10U25V5KX-GP

BT+

D

8

D

7

.

D

6

.

D

.

12

EC4002

EC4001

DY

SC2200P50V2KX-2GP

SCD1U25V2ZY-1GP

Charger Current=1.4~3.6A

PL4001

678

DDD

GD

4 5

PL4001

1 2

IND-5D6UH-48-GP-U1

SSS

123

PWR_CHG_SRP _1

PWR_CHG_SRN_1

BT+_R

1 2

PR4016

PR4016 D01R2512F-4-GP

D01R2512F-4-GP

PG4010

1 2

PG4009

GAP-CLOSE-PWR-3-GP

Title

Size Document Num ber Rev

Custom

Date: Sheet

PG4010

GAP-CLOSE-PWR-3-GP

XPS-Z 13

BT+

12

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CHARGER BQ24707

12

PC4016

PC4015

SC10U25V5KX-GP

1

PC4017

SC10U25V5KX-GP

40 105Fri day, November 26, 2010

DY

12

PC4019

PC4018

SC10U25V5KX-GP

SCD1U50V3KX-GP

SC10U25V6KX-1GP

X00

of

5

5V_S5

D D

C C

Connect VFB1 to GND for fixe 5V opteration

B B

1 2

PG4110

PG4110 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4112

PG4112 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4114

PG4114 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4115

PG4115 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4116

PG4116 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4117

PG4117 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4119

PG4119 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4122

PG4122 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4124

PG4124 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4126

PG4126 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4129

PG4129 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4131

PG4131 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4133

PG4133 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4135

PG4135 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4136

PG4136 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4137

PG4137 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4138

PG4138 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4140

PG4140 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4142

PG4142 GAP-CLOSE-PWR

GAP-CLOSE-PWR

5V_PWR

Vout(5V)=VFB1*(1+R1/R2)

12

PC4113

SCD1U50V3KX-GP

12

PC4119

SCD1U10V2KX-4GP

PR4117

PR4117 0R2J-2-GP

0R2J-2-GP

PR4119

PR4119 0R2J-2-GP

0R2J-2-GP

PWR_5V3D3_AGN D

15V_S5

12

PC4114

SC10U25V5KX-GP

1 2

IND-1D5UH-34-GP

68.1R510.10J

PG4125

12

GAP-CLOSE-PWR-3-GP

PWR_5V_VOUT1

12

DY

12

PG4139

GAP-CLOSE-PWR

PG4141

GAP-CLOSE-PWR

12

PC4112

SC1KP50V2KX-1GP

Design Current = 16A

25.1A<OCP< 29.3A

5V_PWR

12

PTC4102

PTC4101

ST220U6D3VDM-20GP

PC4115

PL4102

12

SC10U25V5KX-GP

PWR_5V_SNU B

15V_PWR

12

PC4129

SC10U25V5KX-GP

FDMS3604S-GP

X00 1118

SCD1U25V2KX-GP

X00 1118

X00 1123

X001126 Power request

PC4116

SC10U25V5KX-GP

PU4102

12

DY

PC4120

12

SC680P50V2KX-2GP

DY

PR4113

2D2R6J-3-GP

PR4119_2

PC4126

1 2

PR4124

PR4124 24D9R3F-GP

24D9R3F-GP

45

D1D1D1

Q2

S2S2S2

45

D1D1D1

Q2

S2S2S2

12

G1

PHASE

G2

678

G1

PHASE

G2

678

1

2

10V_C

1

15V_C

2

1 2

PR4125

PR4125 200KR2J-L1-GP

200KR2J-L1-GP

12

PC4128

PC4128 SCD1U25V2KX-GP

SCD1U25V2KX-GP

4

PWR_DCB ATOUT_5V3D3V

123

Q1

S1/D2

9

123

Q1

S1/D2

9

FDMS3604S-GP

FDMS3604S-GP PU4108

PU4108

PD4102

3

BAT54SW-2-GP

PD4103

3

BAT54SW-2-GP

15V_C_1

PWR_5V3D3_AGN D

PC4102

SC4D7U10V5KX-1GP

DCBATOUT

X00 1118

12

PR4103

0R5J-6-GP

X00 1118

SCD1U25V2KX-GP

CLOSE TO PIN 10

1 2

PWR_5V3D3_AGN D

1 2

PR4111

PR4111 105KR2F-1-GP

105KR2F-1-GP

12

PWR_5V__VBST1_1 PWR_3D3V_VBST2

X00 1118

5V_C_1

1 2

PC4125

SCD1U25V2KX-GP

X00 1118

5V_C_2

1 2

PC4127

SCD1U25V2KX-GP

12

PR4127

PR4127 39KR2J-GP

39KR2J-GP

PR4104

PR4104 0R5J-6-GP

0R5J-6-GP

1 2

12

PC4104

PWR_5V3D3_AGN D

PU4103

X00 1118

PC4117

SCD1U25V2KX-GP

PWR_5V_TRIP1 3V/5V_POK PWR_5V3D3V_EN PWR_5V_DRVH1 PWR_5V_LL1

X00 1118 X00 1118

20100726 Power/Brian suggest:

PC4121

Change PR4111 to 64.10535.60L. Change PR4101 to 64.18735.6DL.

SCD1U50V3KX-GP

PR4115 0R3J-0-U-GPPR4115 0R3J-0-U-GP

123

SKIPSEL GND FLOAT/VREF 2 V5IN Mode Auto Skip OOA. PWM Only

PU4103

33

GND

9

VSW

10

VOUT1

11

VFB1

12

TRIP1

13

PGOOD1

14

EN1

15

DRVH1

16

LL1

PWR_5V__VBST1 PWR_3D3V_VBST2_1

1 2

5V_AUX_S5

PD4101

PD4101 BAT54-7-F-GP

BAT54-7-F-GP

5V_AUX_S5

PR4102 10R3J-3-GPPR4102 10R3J-3-GP

12

PC4103

SC1U10V2KX-1GP

PWR_5V3D3V_VIN

6

8

7

VIN

LDO

LDOREFIN

TPS51427RHBR-GP

VBST117DRVL118V5DRV19NC#2020GND21PGND22DRVL223VBST2

12

PC4101

PC4101 SC1U10V2KX-1GP

SC1U10V2KX-1GP

1 2

12

PR4107

PR4107 0R2J-2-GP

0R2J-2-GP

DY

1 2

PR4108 0R2J-2-GP

1 2

PWR_5V3D3V_TONSEL

X00 1118

3

2

4

1

5

VREF2

VREF3

V5FILT

TONSEL

EN_LDO

REFIN2

TRIP2

VOUT2

SKIPSEL

PGOOD2

DVRH2

24

PWR_3D3V_D RVL2

1 2

PG4143

PG4143 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PWR_5V3D3_AGN D

X00 1118

3

+5V_VCC1

X00 1118

SC1U10V2KX-1GP

DY

PC4106

SC1U10V2KX-1GP

32 31 30 29 28 27

EN2

26 25

LL2

PR4116

1 2

0R3J-0-U-GP

PWR_5V3D3V_EN

PR4122

200KR2J-L1-GP

PWR_5V3D3V_VR EF2

DY

12

1 2

PC4105

DY

1 2

PWR_5V3D3_AGN D

PWR_5V3D3V_R EFIN2 PWR_3D3V_TR IP2 PWR_3D3V_VOU T2 PWR_5V3D3V_SKIPSEL 3V/5V_POK PWR_5V3D3V_EN PWR_3D3V_D VRH2 PWR_3D3V_LL2

PC4122

SCD1U50V3KX-GP

12

3V/5V_POK

20100827 Power/Brian: Change PU4109 VIN to 5V_AUX_S5 for enough power supply.

X00 1118

+5V_VCC1PWR_5V3D3V_VR EF3

12

PR4106

PR4105

0R3J-0-U-GP

0R2J-2-GP

PR4109

0R2J-2-GP

PR4101 187KR2F-GPPR 4101 187KR2F-GP

1 2

DY

PR4110

0R2J-2-GP

12

X00 1118

PWR_5V3D3_AGN D

PR4120 2KR2J-1-GPPR4120 2KR2J-1-GP

3D3V_S5

12

PR4123

PR4123 100KR2J-1-GP

100KR2J-1-GP

5V_AUX_S5

X00 1117

PU4104

FDMC8884-GP

PU4107

FDMC7692-GP

X00 1117

12

1 2

12

PC4131

SC1U10V2KX-1GP

CLOSE TO PIN 30

PC4123

PC4123 SCD1U25V2KX-GP

SCD1U25V2KX-GP

1 2

PWR_DCB ATOUT_5V3D3V

678

DDD

84.08884.A37

SSS

GD

SSS

GD

123

4 5

678

DDD

84.07692.A37

SSS

GD

SSS

GD

123

4 5

PU4105

G9091-330T11U-GP

3V_5V_EN ( 36)

5

VIN

VOUT

GND

4

EN3NC#4

12

PC4108

PC4107

SC10U25V5KX-GP

SCD1U50V3KX-GP

20100910 X01: Power/Brian PL4101 change to 68.2R210.20B. PTC4103 change to 77.22271.27L.

PL4101

1 2

IND-2D2UH-46-GP-U

68.2R210.20B

12

DY

PC4118

PC4118 SC680P50V2KX-2GP

SC680P50V2KX-2GP

PWR_3D3V_SN UB

12

PR4112

DY

2D2R6J-3-GP

2

3D3V_AUX_S5

12

X00 1117 X00 1118

12

PG4121

PG4121_2

PR4114

PR4114 0R2J-2-GP

0R2J-2-GP

1 2

PR4118

DY

0R2J-2-GP

1 2

PWR_5V3D3_AGN D

V_REFIN2=VREF2*PR4109/(PR4109+PR4105) Vout(3.3V)=V_REFIN2*(1+R1/R2)

X00 1118

PC4132

PC4132 SC1U10V2KX-1GP

SC1U10V2KX-1GP

PC4110

SC1KP50V2KX-1GP

GAP-CLOSE-PWR-3-GP

DCBATOUT

PG4102

PG4102 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4103

PG4103 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4104

PG4104 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4105

PG4105 GAP-CLOSE-PWR

GAP-CLOSE-PWR

Design Current = 7.4A

11.6A<OCP< 13.7A

3D3V_PWR

12

PC4124

PTC4103

SCD1U10V2KX-4GP

ST220U6D3VDM-20GP

77.22271.27L

PWR_DCB ATOUT_5V3D3V

1 2

12

PG4106

12

PG4107

12

PG4108

12

PG4109

12

PG4111

12

PG4113

GAP-CLOSE-PWR

12

3D3V_S5

PG4118

PG4120

PG4123

PG4101

PG4127

PG4130

PG4132

PG4134

Connect REFIN2 to V5FILT for fixed 3.3V operation

1

TONSEL GND VREF2 or Float V5FILT Ch1 400 kHz 400 kHz 200 kHz Ch2 500 kHz 300 kHz 300 kHz

A A

5

1A= 40mils

0.5A= 20mils

0.375A= 15mils

Bom

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

TPS51427_5V/3D3V

XPS-Z 13

41 105Frid ay, November 26, 2010

1

41 105Frid ay, November 26, 2010

X00

of

5

SSID = CPU.Regulator

4

3

2

1

12

PR4204

PR4204 1R2F-GP

1R2F-GP

SCD1U25V3KX-GP

GND_1316

PWR_VCORE_DB0(43) PWR_VCORE_DB1(43) PWR_VCORE_DB2(43)

1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2

5V_S5

12

PR4205

PR4205 1R2F-GP

1R2F-GP

12

PC4213

SCD1U25V3KX-GP

GND_1316

PWR_VCORE_VDD5

PWR_VCORE_VDD3 PWR_VCORE_VDD3

PWR_VCORE_IMON1 PWR_VCORE_IMON2

DB0_GFX(44) DB1_GFX(44) DB2_GFX(44)

PWR_VCORE_R_OSC PWR_VCORE_R_REF1 PWR_VCORE_R_REF2

PWR_VCORE_R_SEL0 PWR_VCORE_R_SEL1 PWR_VCORE_R_SEL2 PWR_VCORE_R_SEL3 PWR_VCORE_R_SEL4 PWR_VCORE_R_SEL5 PWR_VCORE_R_SEL6

3D3V_S01D05V_VTT

1 2

5K76R2F-2-GP

12

PC4219

PR421210KR2F-2-GP PR421210KR2F-2-GP

PR420910KR2F-2-GP PR420910KR2F-2-GP

12

PWR_VCORE_DCMDRP1 PWR_VCORE_DCMDRP2

PR4217 0R2J-2-GPPR4217 0R2J-2-GP

1 2

PR4218 0R2J-2-GPPR4218 0R2J-2-GP

1 2

PR4219 0R2J-2-GPPR4219 0R2J-2-GP

1 2

PR4220 0R2J-2-GPPR4220 0R2J-2-GP

1 2

TEMP_SENSE_GFX

PWR_VCORE_SPHASE_0 PWR_VCORE_SPHASE_1

PR4233

PWR_VCORE_TEMP_SENSE1_R

12

PR4238

43K2R2F-L-GP

1 2

PR4223 100KR2F-L1-GPPR4223 100KR2F-L1-GP

12

NTCG104QH224HT

PR4239

PR4239 NTC-220K-2-GP

NTC-220K-2-GP

VSSSENSE (8) VCCSENSE (8) VSS_AXG_SENSE (9) VCC_AXG_SENSE (9)

PR4254

1 2

0R2J-2-GP

PWR_VCORE_SPHASE_0 (43) PWR_VCORE_SPHASE_1 (43)

1D05V_VTT

12

0R2J-2-GP

SPHASE_GFX (44)

H_CPU_SVIDCLK (8)

H_CPU_SVIDDAT (8)

D85V_PWRGD (48)

H_PROCHOT# (5,27,40)

IMVP_PWRGD (27,36)

VR_SVID_ALERT# (8)

H_PROCHOT#

PWR_VCORE_DB1

PR4243

PR4243 48K7R3F-1-GP

48K7R3F-1-GP

12

TEMP_SENSE_GFX_R

12

PR4255

61K9R2F-GP

PR4244

PR4244 221KR2F-GP

221KR2F-GP

12

PR4256

PR4256 NTC-220K-2-GP

NTC-220K-2-GP

NTCG104QH224HT

1D05V_VTT

20101012

12

H_PROCHOT#

1 2

PR4224 100KR2F-L1-GPPR4224 100KR2F-L1-GP

PR4245

PR4245 158KR2F-GP

158KR2F-GP

12

PR4246

PR4246 475KR3F-GP

475KR3F-GP

DB1_GFX

PR4210130R2F-1-GP PR4210130R2F-1-GP

PR420854D9R2F-L1-GP PR420854D9R2F-L1-GP

12

PC4201

PU4201

12

VDD5

43

VDD3

42

VDD3

21

IMON1

25

IMON2

37

DB10

36

DB11

35

DB12

33

DB20

32

DB21

31

DB22

24

IDES1_N

23

IDES1_P

27

IDES2_N

28

IDES2_P

41

R_OSC

22

R_REF1

26

R_REF2

2

R_SEL0

1

R_SEL1

48

R_SEL2

47

R_SEL3

46

R_SEL4

45

R_SEL5

44

R_SEL6

VT1316MAFQX-001-GP

74.01316.E33

TEMP_SENSE1 TEMP_SENSE2

SPHASE1_0 SPHASE1_1 SPHASE1_2

VR_ENABLE

VR1_READY VR2_READY

X00 2010 1113

DCMDRP1 DCMDRP2

SENSE1-

SENSE1+

SENSE2-

SENSE2+

SPHASE2

VCLK VDIO

VR_TT#

ALERT#

NC#17 NC#20

GND GND GND

18 19

PWR_VCORE_SENSE1-

14

PWR_VCORE_SENSE1+

13

PWR_VCORE_SENSE2-

15

PWR_VCORE_SENSE2+

16

PWR_VCORE_TEMP_SENSE1

29 30

40 39 38 34

5 4

6 10 8

PWR_VCORE_VR2_DELAY

9

7

17 20

49 11 3

GND_1316

12

PC4218

SCD047U25V2KX-GP

3D3V_S5

D D

1D05V_VTT

12

PR4215

DY

100R2F-L1-GP-U

20101012

12

C C

B B

PR4221

PR4221 7K87R2F-GP

7K87R2F-GP

PC4214

SCD022U16V2KX-3GP

GND_1316

12

PR4216

DY

100R2F-L1-GP-U

12

PC4231

SCD022U16V2KX-3GP

1 2

PG4203

PG4203 GAP-CLOSE-PWR

GAP-CLOSE-PWR

GND_1316

12

PR4222

PR4222 8K87R2F-2-GP

8K87R2F-2-GP

GND_1316

PWR_VCORE_IDES1_N PWR_VCORE_IDES1_P

PR4225130KR2F-GP PR4225130KR2F-GP PR422644K2R2D-GP PR422644K2R2D-GP PR422944K2R2D-GP PR422944K2R2D-GP

PR423123K7R2F-GP PR423123K7R2F-GP PR423249K9R2F-L-GP PR423249K9R2F-L-GP PR423439K2R2F-L-GP PR423439K2R2F-L-GP PR423532K4R2F-1-GP PR423532K4R2F-1-GP PR423627K4R2F-GP PR423627K4R2F-GP PR423739K2R2F-L-GP PR423739K2R2F-L-GP PR42013K74R2F-GP PR42013K74R2F-GP

PWR_VCORE_IDES1_N(43) PWR_VCORE_IDES1_P(43)

IDES_N_GFX(44) IDES_P_GFX(44)

42 105Friday, November 26, 2010

1

PWR_VCORE_DCMDRP2

12

PC4229

PC4229 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

X00

of

X00

PWR_VCORE_DCMDRP1

12

PR4249

PR4249 1K54R2F-GP

1K54R2F-GP

GND_1316

A A

5

4

http://hobi-elektronika.net

3

2

12

PC4228

PC4228 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

Title

VT1316+1314_CPU_CORE(1/3)

Size Document Number Rev

Date: Sheet

VT1316+1314_CPU_CORE(1/3)

A3

XPS-Z 13

12

PR4250

PR4250 5K11R2F-L1-GP

5K11R2F-L1-GP

GND_1316

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

5

PR4202

20101012

D D

1 2

6K19R2F-GP

PWR_VCORE_IDES1_N_2

1 2

PC4202 SC1KP50V2KX-1GPPC4202 SC1KP50V2KX-1GP

4

PR4203

1 2

9K31R2F-GP

PWR_VCORE0_IDES_P_1

PR4206

3K09R2F-1-GP

12

PC4203

PC4203 SC4700P50V2KX-1GP

SC4700P50V2KX-1GP

12

5V_S5

12

PR4211

PR4211 10R2J-2-GP

10R2J-2-GP

3

400mils or Copper Shape

5V_S5

12

PC4204

PC4208

SC10U6D3V3MX-GP

12

PC4205

SC10U6D3V3MX-GP

12

PC4209

12

SC10U6D3V3MX-GP

12

PC4206

SC1U10V2KX-1GP

12

PC4207

PC4210

SC1U10V2KX-1GP

2

X00 1117

1 2

SCD1U10V2KX-4GP

1

G4

VDDHG6VDDHG5VDDH

VDDHE6VDDHE5VDDH

GNDG1GNDG2GND

E3

G3

12

PC4224

SC1U10V2KX-1GP

AGND

A2

B2

GND_1317S_2

E4

VDDHC6VDDHC5VDDH

GNDE1GNDE2GND

C3

12

G4

VDDHG6VDDHG5VDDH

VDDHE6VDDHE5VDDH

GNDG1GNDG2GND

G3

PC4225

PU4202

PR4213

20101012

C C

PWR_VCORE_IDES1_N(42)

PWR_VCORE_IDES1_P(42)

B B

A A

PWR_VCORE_IDES1_N

PWR_VCORE_IDES1_P

20101012

PWR_VCORE_SPHASE_1(42)

1 2

6K19R2F-GP

PC4212

1 2

SC1KP50V2KX-1GP

20101012

PC4216 SC1KP50V2KX-1GPPC4216 SC1KP50V2KX-1GP

1 2

SC1KP50V2KX-1GP

PWR_VCORE_IDES0_P_1

PR4230

1 2

6K19R2F-GP

1 2

PR4247

PC4227

6K19R2F-GP

1 2

PR4214

1 2

9K31R2F-GP

PWR_VCORE_SPHASE_0(42)

20100929 X01: Power/Brian: change PU4202,PU4203,PU4401 B3, B4, B5 pins from AVDD to AGND.

PWR_VCORE0_IDES_N PWR_VCORE0_IDES_P

PWR_VCORE_DB0(42) PWR_VCORE_DB1(42) PWR_VCORE_DB2(42)

X00 1118

PR4227

1 2

9K31R2F-GP

PWR_VCORE_IDES1_N_1

PWR_VCORE1_IDES_P_1

PR4241

3K09R2F-1-GP

20101006 Change PU4203.B3~PU4203.B5 to GND_1317S_2.

PR4248

1 2

9K31R2F-GP

PWR_VCORE_IDES1_P_1

20100929 X01: Power/Brian: change PU4202,PU4203,PU4401 B3, B4, B5 pins from AVDD to AGND.

GND_1317S_1

12

PC4217

PC4217 SC4700P50V2KX-1GP

SC4700P50V2KX-1GP

10R2J-2-GP

12

PWR_VCORE1_IDES_N PWR_VCORE1_IDES_P

PU4202_AVDD

12

PR4242

PC4215

PC4215 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

5V_S5

12

PC4220

SC10U6D3V3MX-GP

PWR_VCORE_DB0(42) PWR_VCORE_DB1(42) PWR_VCORE_DB2(42)

PU4203_AVDD

GND_1317S_1

PG4201

GAP-CLOSE-PWR

PC4221

GND_1317S_2

X00 1118

12

PC4230

PC4230 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

5

4

GND_1317S_2

http://hobi-elektronika.net

PU4202

A5

IDES_N

A4

IDES_P

A6

DB0

A1

DB1

B1

DB2

B6

SPHASE

A3

AVDD

B3

AVDD

B4

AVDD

B5

AVDD

AGND

VT1314SFCX-GP-U

A2

B2

GND_1317S_1

1 2

400mils or Copper Shape

12

PC4223

PC4222

SC10U6D3V3MX-GP

1 2

PG4202

PG4202 GAP-CLOSE-PWR

GAP-CLOSE-PWR

SC10U6D3V3MX-GP

PU4203

A5

IDES_N

A4

IDES_P

A6

DB0

A1

DB1

B1

DB2

B6

SPHASE

A3

AVDD

B3

AVDD

B4

AVDD

B5

AVDD

VT1314SFCX-GP-U

3

X00 1119 modify symbol

C4

D1

VX#D1

D2

VX#D2

D3

VX#D3

D4

VX#D4

D5

VX#D5

D6

VX#D6

F1

VX#F1

F2

VX#F2

F3

VX#F3

F4

VX#F4

F5

VX#F5

F6

VX#F6

GNDC1GNDC2GND

74.01314.03Z

X00 1117

12

PC4226

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

2120mils or Copper Shape

12

X00 1119 modify symbol

E4

C4

E3

VDDHC6VDDHC5VDDH

GNDC1GNDC2GND

GNDE1GNDE2GND

C3

74.01314.03Z

VX#D1 VX#D2 VX#D3 VX#D4 VX#D5 VX#D6 VX#F1 VX#F2 VX#F3 VX#F4 VX#F5 VX#F6

D1 D2 D3 D4 D5 D6 F1 F2 F3 F4 F5 F6

PWR_VCORE_VX0

4

3

PL4201

PL4201 IND-100NH-15-GP

IND-100NH-15-GP

1

2

PWR_VCORE_VX1

53A=2120mils or Copper Shape

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

VCC_CORE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

VT1316+1314_CPU_CORE(2/3)

XPS-Z 13

43 105Friday, November 26, 2010

of

1

of

X00

5

D D

PR4403

PR4402

20101012

IDES_N_GFX(42)

C C

IDES_P_GFX(42)

1 2

3K24R2F-GP

PC4413

1 2

SC2700P50V2KX-1-GP

PC4422

1 2

SC2700P50V2KX-1-GP

PR4406

1 2

20101012

3K24R2F-GP

PR4403

1 2

11KR2F-L-GP

IDES_N_GFX_1

IDES_P_GFX_1

PR4405

1 2

11KR2F-L-GP

SPHASE_GFX(42)

PWR_AXG_IDES_P_1

PR4404

3K09R2F-1-GP

DB0_GFX(42) DB1_GFX(42) DB2_GFX(42)

4

PC4414

12

SC4700P50V2KX-1GP

12

PWR_AXG_IDES_P

X00 1118

5V_S5

12

PR4401

PR4401 10R2J-2-GP

10R2J-2-GP

PWR_AXG_AVDD

12

PC4427

PC4427 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3

320mils or Copper Shape

5V_S5

12

PC4415

PC4416

SC10U6D3V3MX-GP

C6

E6

G6

VDDHG4VDDHG5VDDH

GNDJ1GNDJ2GND

J3

J6

VDDHJ4VDDHJ5VDDH

GNDG1GNDG2GND

G3

PWR_AXG_VXPWR_AXG_IDES_N

H1

VX

H2

VX

H3

VX

H4

VX

H5

VX

H6

VX

D1

VX

D2

VX

D3

VX

D4

VX

D5

VX

D6

VX

F6

VX

F5

VX

F4

VX

F3

VX

F2

VX

F1

VX

PU4401

A5

IDES_N

A4

IDES_P

A6

DB0

A1

DB1

B1

DB2

B6

SPHASE

A3

AVDD

B3

AVDD

B4

AVDD

B5

AVDD

74.01317.03Z

VT1317SFCX-GP

AGND

A2

B2

E3

VDDHC4VDDHC5VDDH

VDDHE4VDDHE5VDDH

GNDC1GNDC2GND

GNDE1GNDE2GND

C3

12

PC4417

SC10U6D3V3MX-GP

68.R1010.10T

20100802 Power: Change PL4401 to 68.R1010.10T.

12

PC4418

SC10U6D3V3MX-GP

PL4401

1 2

IND-D1UH-26-GP

12

PC4420

PC4419

SC1U10V2KX-1GP

8+a8+

8+a8+8+a8+

PC4423

12

PC4402

PC4403

DY

X00 1117

12

PC4421

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

12

PC4401

SC22U6D3V5MX-2GP

2120mils or Copper Shape

12

PC4404

2

12

2120mils or Copper Shape

12

PC4425

PC4424

SC22U6D3V5MX-2GP

12

PC4405

PC4406

12

PC4426

SC22U6D3V5MX-2GP

12

PC4408

PC4407

12

PC4410

12

PC4409

VCC_GFXCORE

12

PC4411

PC4412

1

12

1 2

PG4401

B B

A A

5

4

PG4401 GAP-CLOSE-PWR

GAP-CLOSE-PWR

GND_1317S_3

http://hobi-elektronika.net

3

SC22U6D3V5MX-2GP

2

SC22U6D3V5MX-2GP

Title

Size Document Number Rev

A3

Date: Sheet

SC22U6D3V5MX-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

VT1316+1317_AXG_CORE(3/3)

XPS-Z 13

44 105Friday, November 26, 2010

of

1

of

X00

5

D D

3D3V_S0

PR4711

10KR2J-3-GP

PQ4501

5V_S5

PR4710_2

1 2

PR4710

10KR2J-3-GP

C C

2K74R2F-GP

1 2

PR4703

PC4704

1 2

PR4708

PC4704

1 2

VCCIO_SENSE_1

SC3300P50V2KX-1GP

150R2F-1-GP

B B

5

6

2N7002KDW-GP

6K81R2F-1-GP

PR4704

34

2

1

12

X00 1118

1 2

1.05VTT_PWRGD_R

DY

0R2J-2-GP

1 2

PR4521

PR4522

PR4522 0R2J-2-GP

0R2J-2-GP

1 2

PR4524

PR4524 0R2J-2-GP

0R2J-2-GP

1 2

PR4509

1 2

37K4R3F-2-GP

Diff pair

PWR_1D05V_STAT_2

RUNPWROK(46,47)

PC4522

PC4522 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1 2

PR4519

PR4519 0R2J-2-GP

0R2J-2-GP

1 2

0R2J-2-GP

0R2J-2-GP PR4518

PR4518

4

1.05VTT_PWRGD (37,48)

5V_S5

PWR_1D05V_VSENSE+ PWR_1D05V_VSENSE-

PWR_1D05V_STAT

PWR_1D05V_OE

12

PC4639

DY

SCD1U10V2KX-4GP

1 2

PG4505

PG4505 GAP-CLOSE-PWR

GAP-CLOSE-PWR

AGND_384

140mils or Copper Shape

B5 C5

A2 A3

A4

A5

5V_S5

12

PC4504

SCD1U10V2KX-4GP

PU4502

VDD VDD

SENSE+ SENSE-

STAT

OE

VT384FCX-ADJ-GP

12

PC4503

PC4505

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP

B2

VX#B2

B3

VX#B3

B4

VX#B4

C2

VX#C2

C3

VX#C3

C4

VX#C4

A1

AGND

B1

GND

C1

GND

12

PC4502

DY

SC22U6D3V5MX-2GP

PWR_1D05V_VX

AGND_384

PL4502

1 2

COIL-D20UH-GP

X00 1118 ADD PC4639

1D05V_PWR

12

PR4515

PR4515 10R2F-L-GP

10R2F-L-GP

3

400mils or Copper Shape

12

PC4506

PC4523

SCD1U10V2KX-4GP

PC4518

12

PC4509

PC4510

SC22U6D3V5MX-2GP

12

PC4519

PC4525

SC22U6D3V5MX-2GP

12

DY

SC22U6D3V5MX-2GP

12

PC4511

SC22U6D3V5MX-2GP

12

PC4520

DY

SC22U6D3V5MX-2GP

12

PC4512

PC4513

SC22U6D3V5MX-2GP

12

PC4526

PC4521

DY

SC22U6D3V5MX-2GP

2

1D05V_PWR

12

PC4516

SC22U6D3V5MX-2GP

12

PC4527

DY

SC22U6D3V5MX-2GP

X00 1122

12

PC4517

PC4530

SC22U6D3V5MX-2GP

12

PC4528

DY

SC22U6D3V5MX-2GP

12

PC4529

SC22U6D3V5MX-2GP

X00 1122

1D05V_PWR

PG4516

PG4516 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4512

PG4512 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4520

PG4520 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4515

PG4515 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4521

PG4521 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4517

PG4517 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4514

PG4514 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4513

PG4513 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4519

PG4519 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4518

PG4518 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4523

PG4523 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4522

PG4522 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1

1D05V_VTT

1 2

VCCIO_SENSE_R

close output MLCC

1 2

PR4510 0R2J-2-GPPR4510 0R2J-2-GP

VCCIO_SENSE (8)

VSENSE-TRACE ROUTED DIFFERENTIALLY PARALLEL TO VSENSE+

1 2

close output MLCC

12

PR4520

PR4520 10R2F-L-GP

10R2F-L-GP

A A

5

4

http://hobi-elektronika.net

PR4517 0R2J-2-GPPR4517 0R2J-2-GP

3

VSSIO_SENSE (8)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VT384_+1.05V_VTT

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

XPS-Z 13

X00

45 105Friday, November 26, 2010

of

1

of

X00

5

SSID = PWR.Plane.Regulator_1p5v0p75v

3D3V_S0

PR4616

10KR2J-3-GP

X00 1118

1 2

34

2

1

PQ4602_2

PR4627

0R2J-2-GP

PQ4602_1

1 2

PR4625

D D

PQ4602

5V_S5

PR4617

PR4617_1

12

10KR2J-3-GP

PR4609

12

4K02R2F-GP

C C

4K02R2F-GP

X00 1122

SC220P50V2JN-3GP

PM_SLP_S4#(19,27)

B B

5

6

2N7002KDW-GP

PR4612

4K02R2F-GP

PC4618

1 2

PWR_1D5V_VSENSE-_R

DY

12

PR4614

1 2

DY

6K34R2F-GP

PR4623

PR4623 0R2J-2-GP

0R2J-2-GP

1 2

0R2J-2-GP

0R2J-2-GP PR4626

PR4626

DY

1 2

PWR_1D5V_STAT_R

12

PC4524

SC2200P50V2KX-2GP

PR4615

1 2

15K8R2F-GP

PWR_1D5V_VSENSE+

PWR_1D5V_VSENSE-

PR4624

PR4624 0R2J-2-GP

0R2J-2-GP

1 2

PWR_1D5V_STAT

X00 1118 ADD PC4638

AGND_385

12

PC4638

DY

SCD1U10V2KX-4GP

PWR_1D5V_VSENSE-_R_1

RUNPWROK (45,47)

PWR_1D5V_OE

4

5V_S5

12

PC4611

SC1U10V2KX-1GP

A2

SENSE+

A3

SENSE-

A4

STAT

A5

OE

A1

AGND

B1

GND

C1

GND

D1

GND

VT385FCX-ADJ-GP

180mils or Copper Shape

12

VDD VDD VDD

B5 C5 D5

B2 B3 B4 C2 C3 C4 D2 D3 D4

12

PC4607

PC4628

SC22U6D3V5MX-2GP

PWR_1D5V_VX

PR4621

PR4621 0R2J-2-GP

0R2J-2-GP

1 2

PR4622

PR4622 0R2J-2-GP

0R2J-2-GP

1 2

AGND_385

PL4601

1 2

COIL-D20UH-GP

12

PC4617

SCD1U10V2KX-4GP

PU4602

VX#B2 VX#B3

VX#B4 VX#C2 VX#C3 VX#C4 VX#D2 VX#D3 VX#D4

PG4620

GAP-CLOSE-PWR

3

720mils or Copper Shape

12

PC4633

PC4610

SCD1U10V2KX-4GP

PC4622

PC4623

SC22U6D3V5MX-2GP

12

PC4620

SC22U6D3V5MX-2GP

PC4619

12

PC4613

12

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

12

PC4621

PC4608

SC22U6D3V5MX-2GP

12

PC4615

PC4616

SC22U6D3V5MX-2GP

DY

12

2

Design Current = 13.7A

21.6A<OCP< 25.4A

12

PC4624

PC4627

SC22U6D3V5MX-2GP

SC6800P25V2KX-1GP

12

DY

PC4634

PC4612

SC22U6D3V5MX-2GP

1D5V_PWR

12

PC4631

PC4609

SCD1U10V2KX-4GP

12

DY

PC4635

PC4636

SC22U6D3V5MX-2GP

12

PC4632

12

PC4637

12

SCD1U10V2KX-4GP

12

DY

SC22U6D3V5MX-2GP

1

1D5V_PWR

PG4617

PG4617 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4604

PG4604 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4606

PG4606 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4605

PG4605 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4608

PG4608 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4607

PG4607 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4614

PG4614 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4609

PG4609 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4611

PG4611 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4610

PG4610 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4613

PG4613 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4612

PG4612 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4616

PG4616 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4615

PG4615 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1D5V_S3

1 2

RT9026 for 0D75V_S0

1 2

0D75V_PWR

12

PC4604

SC10U6D3V3MX-GP

3

1D5V_S3

12

PC4601

SC10U6D3V3MX-GP

1 2

PG4601

PG4601 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

PG4602

PG4602 GAP-CLOSE-PWR

GAP-CLOSE-PWR

0.75V_PWR Design Current: 0.7A

0D75V_S0

2A=80mils

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VT385_+1.5V_SUS/+0.75V_SUS

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

XPS-Z 13

46 105Friday, November 26, 2010

of

1

of

X00

5V_S5

12

PC4606

SC10U6D3V3MX-GP

VDDQSNS

VLDOIN

PGND

VTTSNS

GND

RT9026PFP-GP

11

0D75V_PWR_VLDOIN

12

1 2 3

VTT

4 5

PG4603

PG4603 GAP-CLOSE-PWR

GAP-CLOSE-PWR

PC4605

SCD1U10V2KX-4GP

http://hobi-elektronika.net

Please near U34/Pin10

SC4D7U10V5KX-1GP

05/31

A A

0D75V_EN(37)

PM_SLP_S4#(19,27)

1 2

PR4602 0R2J-2-GPPR4602 0R2J-2-GP

X00 1118 DEL PR4613

5

1 2

PR4611 0R2J-2-GPPR4611 0R2J-2-GP

12

PC4630

PC4629

DY

SCD1U10V2KX-4GP

DDR_VREF_S3

12

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

PC4603

0D75V_PWR_S5

0D75V_PWR_S3

PC4602

4

12

PU4601

10

VIN

9

S5

8

GND

7

S3

6

12

VTTREF

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p8v

20100819 Power/Brian update.

D D

3D3V_S5

X00 1118

1A= 40mils

1.5A= 60mils

0.5A= 20mils

12

PC4707

SCD1U25V2KX-GP

PU4701

12

C C

12

DY

PR4717

PR4717 57K6R2F-GP

57K6R2F-GP

B B

PC4702 SC100P50V2JN-3GPPC4702 SC100P50V2JN-3GP

1 2

PR4705

PWR_1D8V_FB_1

1 2

5K9R2F-GP

3D3V_S0

RUNPWROK(45,46)

PM_SLP_S3#(19,27,36,37)

1 2

PC4718 SC2200P50V2KX-2GPPC4718 SC2200P50V2KX-2GP

PWR_1D8V_PS

PR4707 20KR2J-L2-GPPR4707 20KR2J-L2-GP

1 2

PR4715 10KR2J-3-GPPR4715 10KR2J-3-GP

PWR_1D8V_FB

PWR_1D8V_COMP

1 2

12

1D8V_EN

PC4703

PC4703 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VDD

11

AGND

17

PGND

10

FB

9

COMP

2

RES

8

MODE

3

PGOOD

1

EN

TPS51311RGTR-GP

74.51311.073

PGND PGND

VBST

SW#5 SW#6 SW#7

13

VIN

14

VIN

15 16

PWR_1D8V_VBST PWR_1D8V_VBST_1

4

PWR_1D8V_SW

5 6 7

1 2

PR4706 0R3J-0-U-GPPR4706 0R3J-0-U-GP

SCD1U25V2KX-GP

X00 1118

PC4708

SCD1U25V2KX-GP

X00 1118

12

PC4716

PWR_1D8V_VIN

12

PC4715

SC10U6D3V3MX-GP

PL4701

IND-D2UH-14-GP

1 2

68.R2010.10Q

SC2200P50V2KX-2GP

PR4718

PR4718 40D2R2F-GP

40D2R2F-GP

X00 1117

PC4717

X00 1118

12

PR4702

20KR2F-L-GP

PWR_1D8V_FB_2

12

PWR_1D8V_FB

X00 1118

12

PC4721

SC10U6D3V3MX-GP

X00 1118

12

PR4716

PR4716 10KR2F-2-GP

10KR2F-2-GP

1 2

12

PC4719

PG4701

GAP-CLOSE-PWR

PG4702

GAP-CLOSE-PWR

PWR_1D8V_RUN 1D8V_S0

12

PC4722

SC10U6D3V3MX-GP

3D3V_S5

PG4704

1 2

GAP-CLOSE-PWR

PG4705

1 2

GAP-CLOSE-PWR

PG4706

1 2

SC10U6D3V3MX-GP

GAP-CLOSE-PWR

X00 1123 remove

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51311_ +1.8V_RUN

Size Document Number Rev

A3

Date: Sheet

TPS51311_ +1.8V_RUN

Taipei Hsien 221, Taiwan, R.O.C.

XPS-Z 13

47 105Friday, November 26, 2010

of

1

of

X00

5

TPS51461 for VCCSA

4

3

2

1

D D

C C

B B

X00 1118

5V_S5

12

PC4803

SCD1U25V2KX-GP

VID0 VCCSA

L

PC4813

PC4815

SC10U10V5KX-2GP

VID1

L

H

SC10U10V5KX-2GP

H

5V_S5

12

PC4816

SC2D2U10V3KX-1GP

12

PWR_VCCSA_V5DRV

0.9V

0.8V

0.725VL

0.675V

PC4814

SC1U10V2KX-1GP

3D3V_S0

12

PR4809

PR4809 4K7R2J-2-GP

4K7R2J-2-GP

12

0R2J-2-GP

PWR_VCCSA_VID1

PWR_VCCSA_VID0

PWR_VCCSA_EN

13

17

18

15

16

EN

VID014VID1

V5FILT

V5DRV PGND PGND PGND VIN VIN VIN GND

PGOOD

SW#11 SW#10

SW#9 SW#8 SW#7

GND1VREF2COMP3SLEW4VOUT5MODE

6

PWR_VCCSA_COMPPWR_VCCSA_PGOOD

PWR_VCCSA_VREF

PWR_VCCSA_VOUT

PWR_VCCSA_SLEW

12

PR4802

PR4802 4K99R2F-L-GP

4K99R2F-L-GP

PWR_VCCSA_COMP_1

12

PC4817

PC4817 SC3300P50V3KX-1GP

SC3300P50V3KX-1GP

19 20 21 22 23 24 25

PR4808

PU4801

TPS51461RGER-GP

12

BST

11 10 9 8 7

74.51461.043

D85V_PWRGD (42)

PR4804

1 2

0R2J-2-GP

1 2

PR4805

PR4805 0R2J-2-GP

0R2J-2-GP

12

DY

PC4804

SC1U6D3V2KX-GP

PWR_VCCSA_BST

PWR_VCCSA_SW

PC4806

PC4806 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

1 2

PR4812

1 2

DY

1KR2F-3-GP

12

PR4801

PR4807

0R3J-0-U-GP

1 2

PR4811

1 2

100R2F-L1-GP-U

PR4810

1 2

0R2J-2-GP

VCCSA_SEL (9)

H_FC_C22 (9)

PWR_VCCSA_BST_R

0D85V_S0

VCCUSA_SENSE (9)

1.05VTT_PWRGD (37,45)

X00 1118

PC4805

1 2

SCD1U25V2KX-GP

PL4801

1 2

12

IND-D47UH-22-GP

PR4803

PR4803 2D2R5F-2-GP

2D2R5F-2-GP

DY

PWR_VCCSA_SNUB

12

PC4818

PC4818 SC560P50V-GP

SC560P50V-GP

DY

X00 1123

PC4810

PC4807

SC22U6D3V5MX-2GP

12

Design Current = 4.2A

6.6A<OCP< 7.8A

0D85V_S0

PC4811

PC4801

SC22U6D3V5MX-2GP

12

DY

PC4812

SCD1U10V2KX-4GP

PC4802

PC4802 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

1 2

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

TPS51461_VCCSA

Taipei Hsien 221, Taiwan, R.O.C.

XPS-Z 13

48 105Friday, November 26, 2010

of

1

of

X00

SSID = VIDEO

20100927 X01: Change LCD1 to 20.F1816.030 (30 pins), reassign pin definition and remove CE_C. Add PD4901 to protect EC.

LVDS CONNECTOR

LCD1

48

41

42

43

44

45

46

47

49

50 1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 51

IPEX-CONN40-2R-GP-U

20.F1093.040

DCBATOUT_LCD

CE_C

USB_CAMERA#

USB_CAMERA LVDSB_CLK LVDSB_CLK#

LVDSB_DATA2 LVDSB_DATA2#

LVDSB_DATA1 LVDSB_DATA1#

BLON_OUT_C LVDSB_DATA0 LVDSB_DATA0# DBC_EN_C LVDSA_CLK LVDSA_CLK# LCD_TST_C LVDSA_DATA2 LVDSA_DATA2#

LVDSA_DATA1 LVDSA_DATA1#

LVDSA_DATA0 LVDSA_DATA0#

LCD_BRIGHTNESS

CAMERA and DIGITAL MIC PIN DEFINE!

DBC_EN_C

X00 1122

3D3V_S0

R4901

12

DY

33R2J-2-GP

12

R4906

DY

10KR2J-3-GP

AUD_DMIC_IN0 (29)

AUD_DMIC_CLK (29)

3D3V_CAMERA_S0

12

R4908 0R2J-2-GPR4908 0R2J-2-GP

12

R4909 0R2J-2-GPR4909 0R2J-2-GP

LVDSB_CLK (17) LVDSB_CLK# (17)

LVDSB_DATA2 (17) LVDSB_DATA2# (17)

LVDSB_DATA1 (17) LVDSB_DATA1# (17)

LVDSB_DATA0 (17) LVDSB_DATA0# (17)

LVDSA_CLK (17) LVDSA_CLK# (17)

LVDSA_DATA2 (17) LVDSA_DATA2# (17)

LVDSA_DATA1 (17) LVDSA_DATA1# (17)

LVDSA_DATA0 (17)

LVDSA_DATA0# (17)

LVDS_DDC_DATA_R (17) LVDS_DDC_CLK_R (17) SDA_DLS SCL_DLS

R4902 33R2J-2-GPR4902 33R2J-2-GP

12

C4901

SCD1U10V2KX-5GP

DBC_EN (22)

USB_PN12 (18) USB_PP12 (18)

BLON_OUT_C LCD_TST_C

LCDVDD

C4902

SC1U6D3V2KX-GP

1 2

20100721 Modify: Add CE_C control circuit and connect to PCH GPIO33. 20100927 X01: Connect CE_C to LCD1.15.

CE_C

12

DY

R4907

1 2

100KR2J-1-GP

1 2 3

L_BKLT_CTRL (17)

20100927 X01: Change RN4901 to 4-pin 100 ohm array resistor.

83.1R504.A8F

2nd = 83.1R504.B8F

PD4902

K A

SD103AWS-1-GP

DY

R4912

R4912 10KR2J-3-GP

10KR2J-3-GP

SRN2K2J-1-GP

RN9403

LVDS_DDC_CLK_R LVDS_DDC_DATA_R

RN4901

4

SRN100J-3-GP

3D3V_S0

1

4

CE (21)

23

BLON_OUT (27)

LCD_TST (27)

SSID = VIDEO

LCD POWER for ROSA

BAT54CPT-GP

LVDS_VDD_EN(17)

LCD_TST_EN(27)

1

2

D4901

83.R2003.E81

2ND = 83.00054.Q81

3

X00 1122

12

0R2J-2-GP

1 2

R4905

100KR2J-1-GP

R4904

ENVDDLCDVDD_EN

SCD1U10V2KX-5GP

12

DY

USB_PN12(18)

20100906 X01 Modify: Add 2nd source 74.09724.09F on U4901 sync with Annie.

20101012

U4901

1

EN

IN#5

2

GND

C4908

OUT3IN#4

G5285T11U-GP

74.05285.07F

2nd = 74.09724.09F

2

5

4

DY

34

FILTER-130-GP

FILTER-130-GP TR4902

TR4902

3D3V_S0LCDVDD

12

C4907

SC1U10V3KX-3GP

USB_CAMERA# USB_CAMERA

DCBATOUT_LCD DCBATOUT

2010/07/21 Change F4901 to 69.50007.A31

12

C4904

1 2

SC1KP50V2KX-1GP

Camera Power

F4902 0R3J-0-U-GPF4902 0R3J-0-U-GP

F4901

POLYSW-1D1A24V-GP-U

C4905

69.50007.A31

2nd = 69.50007.A41

SCD1U50V3KX-GP

3D3V_CAMERA_S03D3V_S0

12

X00 1122

12

C4903

SC10U6D3V5KX-1GP

20100920 X01 EMI/Simon request: LVDSA_DATA0#, LVDSA_DATA0, LVDSA_DATA1#, LVDSA_DATA1,LVDSA_DATA2#,LVDSA_DATA2 add series 0 ohm resistor and grounding 10p capacitance. Add 0 ohm series 0 ohm resistors at LVDSA_CLK# and LVDSA_CLK.

For EMI request

Close to LVDS connector

LCD_BRIGHTNESS

X00 1122

LVDSB_CLK# LVDSB_CLK

EC4906

DY

SC5D6P50V2CN-1GP

12

EC4907

DY

SC5D6P50V2CN-1GP

LVDSA_CLK# LVDSA_CLK

EC4904

DY

SC5D6P50V2CN-1GP

12

EC4905

12

DY

SC5D6P50V2CN-1GP

http://hobi-elektronika.net

12

EC4902

DY

SC33P50V2JN-3GP

1

USB_PP12(18)

Title

Size Document Number Rev

A3

Date: Sheet

2010/07/16 Modify: Reserved TR4902 common choke for CAMERA USB.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

LCD/Inverter Connector

DB13 DIS

49 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserve

DB13 DIS

50 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

SSID = VIDEO

D D

C C

X00 1015

B B

2ND = 83.R5003.H8H

3rd = 83.5R003.08F

Removed LEVEL SHIFTER base on DELL feedback spec. (No support 220MHZ deep color mode, so can be removed HDMI LEVEL SHIFTER circuit.

2010/07/21 Delete RN5112, RN5113, RN5114, and RN5115 and short these traces. 20100902 Add 0R(R5101~R5108) for HDMI tunning.

500mA

5V_S0

83.R5003.C8F

5V_HDMI_S0_R 5V_HDMI_S0

D5005

21

CH551H-30PT-GP

HDMI Level Shifter & CONNECTOR

HDMI_PLL_GND

D

G

HDMI_CLK_R#(84) HDMI_CLK_R(84)

HDMI_DATA0_R#(84) HDMI_DATA0_R(84)

HDMI_DATA1_R#(84) HDMI_DATA1_R(84)

HDMI_DATA2_R#(84) HDMI_DATA2_R(84)

Place closer

F5002

1 2

DY

FUSE-1D1A6V-4GP-U

69.50007.691

69.50007.691 2nd = 69.50007.771

2nd = 69.50007.771

R5007

1 2

0R3J-0-U-GP

2ND = 84.2N702.031

X00 1122

C5103 SCD1U10V2KX-5GPC5103 SCD1U10V2KX-5GP

1 2

C5104 SCD1U10V2KX-5GPC5104 SCD1U10V2KX-5GP

1 2

C5105 SCD1U10V2KX-5GPC5105 SCD1U10V2KX-5GP

1 2

C5106 SCD1U10V2KX-5GPC5106 SCD1U10V2KX-5GP

1 2

C5110 SCD1U10V2KX-5GPC5110 SCD1U10V2KX-5GP

1 2

C5107 SCD1U10V2KX-5GPC5107 SCD1U10V2KX-5GP

1 2

C5108 SCD1U10V2KX-5GPC5108 SCD1U10V2KX-5GP

1 2

C5109 SCD1U10V2KX-5GPC5109 SCD1U10V2KX-5GP

1 2

Close to HDMI Connector

HDMI_PLL_GND

20100723 Swap RN5106 and RN5107 base in the swap report.

suggestion to stuff 470-ohm for NV.

2N7002K-2-GP

84.2N702.J31

3D3V_VGA_S0

12

R5113

R5113 100KR2J-1-GP

100KR2J-1-GP

DY

678

123

4 5

Q5103

RN5106

RN5106 SRN470J-5-GP

SRN470J-5-GP

123

S

678

HDMI_CLK_R_C# HDMI_CLK_R_C

HDMI_DATA0_R_C# HDMI_DATA0_R_C

HDMI_DATA1_R_C# HDMI_DATA1_R_C

HDMI_DATA2_R_C# HDMI_DATA2_R_C

RN5107

RN5107 SRN470J-5-GP

SRN470J-5-GP

4 5

R5123

0R2J-2-GP

DY

1 2

0622 Modify: Combin R5114~R5121 499 ohm 0402 Resistor to RN5106,RN5107 470 ohm for GPU passive Level shifter

X00 1122

HDMI CONN

X00 1108

HDMI1

22

23

SKT-HDMI19P-76-GP

GPU_HDMI_CLK(84)

GPU_HDMI_DATA(84)

20 1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21

1MR2F-GP

3D3V_VGA_S0

R5110

Removed HDMI_IN# CIRCUIT connect to KBC GPIO.

HDMI_DATA2_R_C

HDMI_DATA2_R_C# HDMI_DATA1_R_C

HDMI_DATA1_R_C# HDMI_DATA0_R_C

HDMI_DATA0_R_C# HDMI_CLK_R_C

HDMI_CLK_R_C#

DDC_CLK_HDMI DDC_DATA_HDMI

12

HPD_HDMI_CON

R5111 1KR2F-L-GPR5111 1KR2F-L-GP

12

0629 Modify: Utilize Q5104 2N7002 instead of PCA9509 Level shifter base on Intel DG recommand on HDMI DDC.

4

RN5102

RN5102 SRN2K2J-1-GP

SRN2K2J-1-GP

1

2 3

X00 1015

HDM I_IN#(27)

C5102

SCD1U10V2KX-5GP

1 2

3D3V_S0

5V_HDMI_S0

HDMI_HPD_B

5

6

12

R5112

R5112 10KR2J-3-GP

10KR2J-3-GP

5

6

Q5105

Q5105 2N7002KDW-GP

2N7002KDW-GP

123 4

3D3V_VGA_S0

Q5104

34

2

1

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

R5116 1KR2F-L-GPR5116 1KR2F-L-GP

DDC_CLK_HDMI

DDC_DATA_HDMI

12

5V_HDMI_S0

4

1

2 3

RN5101

RN5101 SRN2K2J-1-GP

SRN2K2J-1-GP

X00 1015

GPU_HDMI_HPD (84)

PEX_RST# (83,86)

Routing Guidelines: CTRLDATA must be routed longer than CTRLCLK within 1000 mils (25.4 mm). The total delay on CTRLDATA should be longer than CTRLCLK.

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Connector

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

51 105Friday, November 26, 2010

of

1

of

X00

5

4

3

Q5205

2SK3541-2-GP

5V_S0

G

2

3D3V_S0

12

DY

R5215

R5215 1MR2J-1-GP

1MR2J-1-GP

1

HPD_DP_CON

D

D D

12

R5214

DP1

21

PCH_DP_C0(17) PCH_DP_C0#(17)

PCH_DP_C1(17) PCH_DP_C1#(17)

PCH_DP_C2(17) PCH_DP_C2#(17)

C C

B B

1 2 1 2

C5214SCD1U10V2KX-5GP C5214SCD1U10V2KX-5GP

C5216SCD1U10V2KX-5GP C5216SCD1U10V2KX-5GP C5212SCD1U10V2KX-5GP C5212SCD1U10V2KX-5GP

C5215SCD1U10V2KX-5GP C5215SCD1U10V2KX-5GP C5217SCD1U10V2KX-5GP C5217SCD1U10V2KX-5GP

DP_C0#_CON

DP_C1_CON DP_C1#_CON

DP_C2_CON DP_C2#_CON

DP_C0_CON

C5211SCD1U10V2KX-5GP C5211SCD1U10V2KX-5GP

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

22

SKT-DISPLAY20P-1-GP

23 NP1

NP2 24

DP_PN13 DP_CEC

R5214

100KR2J-1-GP

DP_C3_CON DP_C3#_CON

S

C5218 SCD1U10V2KX-5GPC5218 SCD1U10V2KX-5GP

1 2

C5213 SCD1U10V2KX-5GPC5213 SCD1U10V2KX-5GP

1 2

PCH_DP_AUXP_Q

R5212

R5212 100KR2J-1-GP

100KR2J-1-GP

1 2

3D3V_S0

R5211

R5211 100KR2J-1-GP

100KR2J-1-GP

1 2

PCH_DP_AUXN_Q

DP_PCH_DET (17)

PCH_DP_C3 (17) PCH_DP_C3# (17)

Already PH on PCH side.(RN1706)

RN5218

PCH_DP_AUXN(17)

PCH_DP_AUXP(17)

2 3 1

SRN0J-6-GP

PCH_DP_AUXN_Q PCH_DP_AUXP_Q

4

5V_HDMI_S0

12

C5231

SCD022U16V2KX-3GP

A A

5

4

http://hobi-elektronika.net

12

C5219

1 2

SCD1U10V2KX-5GP

R5221

1M1R2J-GP

12

R5220

1MR2F-GP

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Display Port

1

X00

52 105Friday, November 26, 2010

of

X00

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

LVDS_Switch

53 105Friday, November 26, 2010

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

54 105Friday, November 26, 2010

of

X00

5

SSID = User.Interface

4

3

2

1

ITP Connector

D D

TCK(PIN AC5)

C C

B B

H_CPURST# use pull-up Resistor close ITP connector 500 mil ( max ), others place near CPU side.

CPU

ITP Connector

TCK(PIN 5)

FBO(PIN 11)

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP

Size Document Number Rev

A3

Date: Sheet

ITP

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

55 105Friday, November 26, 2010

of

1

of

X00

SSID = SATA

3D3V_S0 5V_S0

EC5601

20100907 X01 RF/Anderson request.

20100625 V1.2

SATA_TXP0(21)

SATA_TXN0(21)

SATA_RXN0(21)

SATA_RXP0(21)

X00 1124

12

DY

EC5604

SC56P50V2JN-2GP

0629 Modify: Move All of 0.01uF cap closed to HDD connector base on Layout guideline.

C5616 SCD01U16V2KX-3GPC5616 SCD01U16V2KX-3GP C5615 SCD01U16V2KX-3GPC5615 SCD01U16V2KX-3GP

12

C5605

SC10U10V5ZY-1GP

1 2 1 2

12

C5606

SCD1U10V2KX-5GP

C5614SCD01U16V2KX-3GP C5614SCD01U16V2KX-3GP

12

C5613SCD01U16V2KX-3GP C5613SCD01U16V2KX-3GP

12

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0_C SATA_RXP0_C

SATA HDD Connector

FFS_INT2(79)

SATA_RXP0_C SATA_RXN0_C

SATA_TXN0_C SATA_TXP0_C

X00 1122

HDDB1

21

1

2 3 4 5 6 7 8

9 10 11 22

NP2

ACES-CONN20E-GP

20.F1007.020

26NP1 25 20

19 18 17 16 15 14 13 12

24 23

5V_S0 3D3V_S0

ODD Connector

X00 20101113

SKT-SATA7P-6P-50-GP-U

8 NP1 S1

SATA_TXP4_C

S2

SATA_TXN4_C

S3 S4

SATA_RX4-_C

S5

SATA_RX4+_C

S6 S7

P1 P2 P3 P4 P5 P6 NP2 9

ODD1

22.10300.241

20100831 ME: Change ODD1 to 62.10065.221 and 2nd: 62.10065.651 to follow 20100831 connector list. 20100902 ME: Change ODD1 to 62.10065.651 to follow emn file.

SATA_RX- and SATA_RX+ Trace Length match within 20 mil

Mars: Exchange ODD and ESATA differential pair each other.

C5612 SCD01U16V2KX-3GPC5612 SCD01U16V2KX-3GP C5611 SCD01U16V2KX-3GPC5611 SCD01U16V2KX-3GP

SATA_ODD_DA#_C

20100625 V1.2

1 2 1 2

C5607 SCD01U16V2KX-3GPC5607 SCD01U16V2KX-3GP

1 2

C5608 SCD01U16V2KX-3GPC5608 SCD01U16V2KX-3GP

1 2

SATA_ODD_PRSNT# (22)

12

R5604

R5604 10KR2J-3-GP

10KR2J-3-GP

DY

ODD_PWR_5V

0629 Modify: Move R5601 PH 10K to RN5601 PH.

20100625 V1.2

SATA_ODD_PWRGT SATA_ODD_DA#

4

SUPPORT ZERO SATA ODD

SATA_TXP4 (21) SATA_TXN4 (21)

SATA_RXN4 (21)

SATA_RXP4 (21)

12

DY

RN5601

1 23

SRN10KJ-5-GP

R56020R2J-2-GP

3D3V_S0

SATA_ODD_DA# (18)

AFTP5601AFTP5601

FFS_INT2

1

When the drive is powered on, the FET to the MD/DA pin drive is OFF. When the drive is powered off, the FET to the MD/DA pin is ON

5V_S0

R5605

R5605 100KR2J-1-GP

100KR2J-1-GP

1 2

ODD_PWRGT#

5

6

Q5601

123 4

0707 Modify: Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD.

SATA_ODD_PWRGT SATA_ODD_DA#

20100928 X01 Modify: Change R5605 to 100K from 10K and PH to 5V_S0 from 3D3V_S0 to meet Vgs>2V turn on.

SATA_ODD_DA#_C

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

http://hobi-elektronika.net

X00 1122

SATA Zero Power ODD

SATA_ODD_PWRGT(22)

ODD_PWR_5V

100 mil

ODD_PWR_5V

X00 1122

of

12

C5610

SC10U6D3V5KX-1GP

X00

5V_S0

12

C5609

C5609 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

U5601

U5601 G547F1P81U-GP

G547F1P81U-GP

OUT#6 OUT#7 OUT#8

5 6 7 8

EN/EN#4OC#

3

IN#3

2

IN#2

1

GND

74.00547.C79

2ND =

ƵƌƌĞŶƚ ůŝŵŝƚĐƚŝǀĞ ,ŝŐŚ ƚǇƉсхϮ

1 2

DY

R5603

X00 1122

0R3J-0-U-GP

Title

Size Document Number Rev

A3

Date: Sheet

DB13

0R3J-0-U-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD

56 105Friday, November 26, 2010

5

4

3

2

1

SSID = ESATA

D D

C C

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reaserved

DB13 DIS

57 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

SSID = AUDIO

/,1( 287

D D

BLM18BD601SN1D-GP

AUD_HP1_JD#(29)

AUD_HP1_JACK_L2(29)

AUD_HP1_JACK_R2(29)

C C

AUD_HP1_JACK_R2

EC301

SC1KP50V2KX-1GP

12

600ohm 100MHz 200mA 0.5ohm DC

BLM18BD601SN1D-GP

L301

1 2

L302 BLM18BD601SN1D-GPL302 BLM18BD601SN1D-GP

EC302

EC302 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

X00 1123

AFTP5805AFTP5805 AFTP5806AFTP5806 AFTP5807AFTP5807

1 1 1

AUD_HP1_JD# AUD_HP1_JACK_L1 AUD_HP1_JACK_R1

AUD_HP1_JD#

AUD_HP1_JACK_L1AUD_HP1_JACK_L2

AUD_HP1_JACK_R1

12

EC303

SCD01U16V2KX-3GP

12

EC304

EC307

DY

AUD_AGNDAUD_AGNDAUD_AGNDAUD_AGNDAUD_AGND

SCD01U16V2KX-3GP

AUD_AGND

1 2 6 3 4 5 7

8 NP1 NP2

PHONE-JK312-GP

22.10207.421

LINEOUT1

X00 2010 1113

Need check pin define

6SHDNHU

FKDQJHWR $*1'

0,&,1

MICIN1

R302

0R2J-2-GP

0R2J-2-GP R303

R303

0R2J-2-GP

SC100P50V2JN-3GP

MIC_IN_L_C

EC305

MIC_IN_R_C

12

EC306

DY

SC100P50V2JN-3GP

EC308

SCD01U16V2KX-3GP

AUD_AGNDAUD_AGNDAUD_AGND

B B

MIC_IN_L(29)

MIC_IN_R(29)

EXT_MIC_JD#(29)

1 2

1 2 6 3 4 5 7

8 NP1 NP2

PHONE-JK312-GP

22.10207.421

AUD_SPK_L-(29) AUD_SPK_L+(29) AUD_SPK_R-(29)

AUD_SPK_R+(29)

1 2

R5801 0R2J-2-GPR5801 0R2J-2-GP

1 2

R5802 0R2J-2-GPR5802 0R2J-2-GP

1 2

R5803 0R2J-2-GPR5803 0R2J-2-GP

1 2

R5804 0R2J-2-GPR5804 0R2J-2-GP

&RQQHFWRU

12

DY

EC5801

EC5802

SC100P50V2JN-3GP

AUD_SPK_L-_C AUD_SPK_L+_C AUD_SPK_R-_C

AUD_SPK_R+_C

12

DY

EC5803

SC100P50V2JN-3GP

X00 1123

AFTP5801AFTP5801 AFTP5802AFTP5802 AFTP5803AFTP5803 AFTP5804AFTP5804

EC5804

SC100P50V2JN-3GP

1 1 1 1

SPK1

4 3 2

1

ACES-CON4-7-GP-U

20.F0772.004

X00 20101111

AUD_SPK_L-_C AUD_SPK_L+_C AUD_SPK_R-_C AUD_SPK_R+_C

6

5

A A

5

AFTP5808AFTP5808 AFTP5809AFTP5809 AFTP5810AFTP5810

4

MIC_IN_L_C

1

MIC_IN_R_C

1

EXT_MIC_JD#

1

X00 1123

Need check pin define

X00 2010 1113

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13

Taipei Hsien 221, Taiwan, R.O.C.

Audio Jack

58 105Friday, November 26, 2010

of

1

X00

5

SSID = LOM

4

3

2

1

D D

C C

B B

RJ45

RJ45-8P-55-GP

22.10177.I61

X00 20101115

AFTP5901AFTP5901 AFTP5902AFTP5902 AFTP5903AFTP5903 AFTP5904AFTP5904 AFTP5905AFTP5905 AFTP5906AFTP5906

AFTP5907AFTP5907 AFTP5908AFTP5908

10 NP1 1

2 3 4 5 6 7 8 NP2 9

1 1 1 1 1 1

1 1

RJ45_LOM_TRD0+

RJ45_LOM_TRD0RJ45_LOM_TRD1+ RJ45_LOM_TRD2+ RJ45_LOM_TRD2RJ45_LOM_TRD1RJ45_LOM_TRD3+ RJ45_LOM_TRD3-

RJ45_LOM_TRD0+ RJ45_LOM_TRD0RJ45_LOM_TRD1+ RJ45_LOM_TRD2+ RJ45_LOM_TRD2RJ45_LOM_TRD1-

RJ45_LOM_TRD3+ RJ45_LOM_TRD3-

1

AFTP30AFTP30

RJ45_LOM_TRD0+

RJ45_LOM_TRD0-

XFR_MCT1

XFR_MCT2

RJ45_LOM_TRD1+

RJ45_LOM_TRD1-

RJ45_LOM_TRD2+

RJ45_LOM_TRD2-

XFR_MCT4

XFR_MCT3

RJ45_LOM_TRD3+

RJ45_LOM_TRD3-

10/100/1000M Lan Transformer

XF2

1

2 3

4 5

6

7

8 9

10 11

12 13

XFORM-24P-38-GP

1st: TAIMAG 68.IH115.30A 2nd:NETSWAP 68.69241.30C

1:1

24

23 22

21 20

19

18

17 16

15 14

NB_LOM_TCT

NB_LOM_TRD0 (31)

NB_LOM_TRD0# (31)

NB_LOM_TRD1 (31)

NB_LOM_TRD1# (31)

NB_LOM_TRD2 (31)

NB_LOM_TRD2# (31)

NB_LOM_TRD3 (31)

NB_LOM_TRD3# (31)

RN5901

LAN_TERMINAL

12

EC5901

SC1KP3KV8KX-GP-U

A A

5

4

http://hobi-elektronika.net

EC5901

3

RN5901

8 7 6

SRN75J-1-GP

XFR_MCT3

1

XFR_MCT4

2

XFR_MCT2

3

XFR_MCT1

45

2

C5901

1 2

SCD01U16V2KX-3GP

Title

Size Document Number Rev

A3

Date: Sheet

RJ45+Transformer

DB13

NB_LOM_TCT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

59 105Friday, November 26, 2010

of

1

of

X00

5

SSID = Flash.ROM

4

3

2

1

SPI FLASH ROM (4M byte) for PCH

EC6002

DY

3D3V_S5

12

678

RN6001

RN6001 SRN4K7J-10-GP

SRN4K7J-10-GP

123

4 5

SPI_SO

SPI_WP#

SPI_HOLD_0#

U6001

1

CS#

2

DO

3

WP#

4

VSS

W25Q32BVSSIG-1-GP

72.25Q32.A01

2nd = 72.25320.C01

2nd = 72.25320.C01 3rd = 72.25032.D01

3rd = 72.25032.D01

20100927 X01 Modify: Change U6001 main source to 72.25Q32.A01; 2nd to 72.25320.C01;3rd to 72.25P32.C01 From Sourcer Carrie updated. 20100929 X01 Modify: Change U6001 main source to 72.25Q32.A01; 2nd to 72.25320.C01;3rd to 72.25032.D01 From Sourcer Carrie updated.

VCC

HOLD#

CLK

3D3V_S5

8 7 6 5

DI

EC6003

12

DY

SC4D7P50V2CN-1GP

DY

12

EC6001

SC4D7P50V2CN-1GP

D D

SPI_CS0#_R(21,27)

SPI_SO_R(21,27)

C C

1 2

R6001 33R2J-2-GPR6001 33R2J-2-GP

SC4D7P50V2CN-1GP

DY

12

C6001

3D3V_S5

12

C6002

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SPI_CLK_R (21,27) SPI_SI_R (21,27)

X01

B B

SSID = RBATT

3D3V_AUX_S5

X00 1019

R6004

1 2

DY

100R2J-2-GP

2N7002K-2-GP

RTC_PWRRTC_PWR

A A

5

12

R6003

R6003 10MR2J-L-GP

10MR2J-L-GP

2N7002K-2-GP

G

D

S

Q6002

84.2N702.J31

2ND = 84.2N702.031

RTC_DET# (22)

4

RTC_AUX_S5

C6003

SC1U6D3V2KX-GP

1 2

http://hobi-elektronika.net

Q6001

2

3

1

CH715FPT-GP

83.R0304.B81

2nd = 83.00040.E81

Width=20mils

3

RTC_PWR

1 2

11.12 modify pin define +RTC_VCC move to PIN1 PIN2 hang

+RTC_VCC

R6002

R6002 1KR2J-1-GP

1KR2J-1-GP

AFTP6001AFTP6001

1

AFTP6002AFTP6002

4 1

2 3 5

MLX-CON3-9-GP

+RTC_VCC

1

RTC1

20.D0198.103

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Flash/RTC

DB13 DIS

60 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

SSID = USB

D D

C C

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

of

61 105Friday, November 26, 2010

of

61 105Friday, November 26, 2010

of

61 105Friday, November 26, 2010

1

X00

5

4

3

2

1

1V_USB30 LDO

X00 1122 USB Charger remove

DY

D6211

MS04A03T2V2-GP-U

1 2

USB20_DM1 (35)

USB20_DP1 (35)

1

2

34

0701

RT (R6202) RB (R6203)USB3.0 Hos t

D6212

MS04A03T2V2-GP-U

SCD1U10V2KX-4GP

USB30_TXDN1_C_C

USB30_TXDP1_C_CUSB30_TXDP1_C

SCD1U10V2KX-4GP

C6627

1 2

C6628

1 2

USB30_RXDN1 (35)

USB30_RXDP1 (35)

USB30_TXDN1 (35)

USB30_TXDP1 (35)

http://hobi-elektronika.net

3

2010/07/13 Move USB3.0 LDO to MB side for layout space concern

D D

SC1U10V2KX-1GP

USB3_PWR_ON(22,35)

1.If need support USB3.0 wake up from S3, then U3501 VIN should be connected to 1D5V_S3 power rail.

2.If not support USB3.0 wake up function, then short G3501,G3502,R3516.

3.If need support USB3.0 wake up from S3,S4,S5, then U3501 VIN should be connected to 3D3V_S5 power rail.

USB30_TXDP0_C USB30_TXDN0_C USB30_RXDP0_C USB30_RXDN0_C USB20_DM0_C

C C

B B

A A

USB20_DP0_C

R6311

1 2

0R3J-0-U-GP

TR6301

USB30_TXDN0_C

USB30_TXDP0_C

USB30_RXDN0_C

USB30_RXDP0_C

0R3J-0-U-GP

1

DY

4

R6310

1 2

0R3J-0-U-GP

FILTER-4P-13-GP

2

3

R6313

1 2

0R3J-0-U-GP

2

3 4

R6312

1 2

0R3J-0-U-GP

R6317

1 2

0R3J-0-U-GP

FILTER-4P-13-GP

1

TR6305

R6316

1 2

0R3J-0-U-GP

5

USB20_DM0_C

DLW21HN900SQ 2LGP-U

USB20_DP0_C USB20_DP0

5V_S5

12

C6203

RT9018_EN

12

0R2J-2-GP

R6204

DY

D6201

D6202

MS04A03T2V2-GP-U

1 2

D6203

12

DY

MS04A03T2V2-GP-U

1 2

U6201

6 7 8 9

APL5930KAI-TRG-GP

C6202

74.05930.03D

SC10U10V5ZY-1GP

DY

D6204

MS04A03T2V2-GP-U

1 2

0.6A

VCNTL POK EN VIN#9

SO-8-P

D6205

X00 1122

USB20_DM0

C6629

SCD1U10V2KX-4GP

USB30_TXDN0_C_C

TR6303

1

DY

USB30_TXDP0_C_C

34

DY

2

1 2

C6630

1 2

SCD1U10V2KX-4GP

USB30_RXDN0 (35)

USB30_RXDP0 (35)

VIN#5 VOUT#4 VOUT#3

FB

GND

DY

D6206

MS04A03T2V2-GP-U

1 2

USB20_DM0 (35)

USB20_DP0 (35)

3D3V_S5

5

X00 1122

4 3 2 1

1V_USB30_LDO_FB

USB30_TXDP1_C USB30_TXDN1_C USB30_RXDP1_C USB30_RXDN1_C USB20_DM1_C USB20_DP1_C

USB20_DM1_C

DLW21HN900SQ 2LGP-U

USB20_DP1_C

USB30_TXDN0 (35)

USB30_TXDP0 (35)

2010/07/17 Remove R6201

Vo = 0.8 * ( 1 + ( RT / RB ) )

1V_USB30

R6202

12

11K8R2F-GP

12

C6201

RT

12

R6203

R6203 30K9R2F-GP

30K9R2F-GP

SC10U10V5ZY-1GP

RB

DY

D6207

MS04A03T2V2-GP-U

1 2

R6309

1 2

0R3J-0-U-GP

4

TR6302

DY

1

R6308

1 2

0R3J-0-U-GP

USB30_TXDN1_C

USB30_RXDN1_C

USB30_RXDP1_C

TI 11.8k ohm (64.11825.6DL) 30.9k ohm (64.30925.6DL)

20100923 X01

X00 1125 For TI add

DY

MS04A03T2V2-GP-U

1 2

D6209

D6210

MS04A03T2V2-GP-U

1 2

R6315

1 2

0R3J-0-U-GP

FILTER-4P-13-GP

3 4

DY

2

R6314

1 2

0R3J-0-U-GP

R6319

1 2

0R3J-0-U-GP

TR6306

1

DY

FILTER-4P-13-GP

R6318

1 2

0R3J-0-U-GP

DY

1 2

TR6304

4

D6208

3

2

SC1U10V3ZY-6GP

USB30_ON0(35)

USB30_ON1(35)

VOUT

1.1V

U6304

5V_S5 USB30_VCCA

12

C6204

USB30_ON0

USB30_ON1

U6304

1

GND

2

IN

3

EN1/EN1# EN2/EN2#4OC2#

G546A2P1UF-GP

Low active

0720

OC1# OUT1 OUT2

8 7 6 5

USB30_OC1#

USB30_OC0# (35)

USB30_OC1# (35)

USB30_VCCB

12

C6207

12

0708

C6208

TC6202

SC10U10V5ZY-1GP

SCD1U16V2KX-3GP

ST100U6D3VAM-3-GP

USB3.0 CONNECTOR

USB30_TXDP0_C

USB30_TXDN0_C USB20_DM0_C

USB20_DP0_C USB30_RXDP0_C

USB30_RXDN0_C

USB30_TXDP1_C

USB30_TXDN1_C USB20_DM1_C

USB20_DP1_C USB30_RXDP1_C

USB30_RXDN1_C

X00 1125

USB30_VCCA

USB30_VCCB

USB6201

10 11

9 1

8 2 7 3 6 4 5

SKT-USB15-1-GP

22.10339.031

USB6202

10 11

9 1

8 2 7 3 6 4 5

SKT-USB15-1-GP

22.10339.031

2

NP1

NP2

1213

X00 1103

NP1

NP2

1213

X00 1103

USB 3.0 Connector Pin definition

POWER

1

2

USB 2.0 D-

USB 2.0 D+

3

GND4

5

StdA_SSRX-

StdA_SSRX+

6

GND

7

StdA_SSTX-

8

StdA_SSTX+

9

Title

Size Document Number Rev

A2

Date: Sheet

12

C6205

12

SCD1U16V2KX-3GP

12

C6206

USB 3.0 Port

DB13 DIS

0708

TC6205

SC10U10V5ZY-1GP

ST100U6D3VAM-3-GP

SuperSpeed TX

SuperSpeed RX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

1

X00

62 105Frid ay, November 26, 2010

X00

of

5

4

3

2

1

SSID = User.Interface

D D

C C

(Blanking)

B B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

A A

Title

Size Document Number Rev

A4

Date: Sheet

http://hobi-elektronika.net

5

4

3

Date: Sheet

2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

DB13 DIS

63 105Friday, November 26, 2010

X00

of

1

5

D D

C C

4

3

2

1

B B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

A A

Title

Size Document Number Rev

A4

Date: Sheet

http://hobi-elektronika.net

5

4

3

Date: Sheet

2

Reserved

DB13 DIS

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

64 105Friday, November 26, 2010

of

1

X00

5

4

3

2

1

SSID = Wireless

D D

C C

3D3V_S01D5V_S0

::$160%86

:/$13&,(

:/$1&/.

B B

CLK_PCIE_WLAN_REQ#(20)

PCH_SMBCLK(14,15,20,66,79) PCH_SMBDATA(14,15,20,66,79)

PLT_RST#(5,18,27,31,32,35,66,71,83)

WIFI_RF_EN(27,66)

BLUETOOTH_EN(27,66)

WLAN_DET#

X00 20101119

WLANB1

33 34

29 27 25 23 21 19 17 15 13 11

9 7 5 3

1

31 32

MLX-CONN30A-7-GP

20.F1405.030

30 28 26 24 22 20 18 16 14 12 10 8 6 4

2

E51_RXD (27,66) E51_TXD (27,66)

USB_PN11 (18) USB_PP11 (18)

PCIE_TXN4 (20) PCIE_TXP4 (20)

PCIE_RXN4 (20) PCIE_RXP4 (20)

CLK_PCIE_WLAN (20)

CLK_PCIE_WLAN# (20)

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)/ITP CONN

Size Document Number Rev

Date: Sheet

MINICARD(WLAN)/ITP CONN

A3

DB13

Taipei Hsien 221, Taiwan, R.O.C.

65 105Friday, November 26, 2010

of

1

of

X00

5

D D

4

3

2

1

1D5V_S05V_S5 3D3V_S0

WIFI_RF_EN(27,65) CLK_PCIE_WWAN_REQ#(20)

E51_TXD(27,65) E51_RXD(27,65)

C C

B B

X00 1119

WW ANB1

39 40 37 38 35 36 33 34 31 32 29 27 25 23 21 19 17 15 13 11

20.F0192.040

30 28 26 24 22 20 18 16 14 12

9

10

7

8

5

6

3

4

1

2

MLX-CONN40A-14GP

USB_PN4 (18) USB_PP4 (18)

PCIE_TXN3 (20) PCIE_TXP3 (20)

PCIE_RXN3 (20) PCIE_RXP3 (20)

CLK_PCIE_WWAN (20) CLK_PCIE_WWAN# (20)

PCH_SMBDATA (14,15,20,65,79) PCH_SMBCLK (14,15,20,65,79)

BLUETOOTH_EN (27,65) PLT_RST# (5,18,27,31,32,35,65,71,83)

3G_EN (22)

PCIE_WAKE# (27,31,35)

X00 1120

ECRST# (27)

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved

Size Document Number Rev

A3

Date: Sheet

Reserved

DB13

Taipei Hsien 221, Taiwan, R.O.C.

66 105Friday, November 26, 2010

of

1

of

X00

5

D D

4

3

2

1

(Blanking)

C C

B B

Wistron Corporation

A A

Title

Size Document Number Rev

A4

http://hobi-elektronika.net

5

4

3

A4

Date: Sheet

2

DB13 DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

67 105Friday, November 26, 2010

of

1

X00

5

SSID = User.Interface

20100927 X01 Sync with the std Rename R6601 to R6804, rename R6604 to R6806, rename R6602 to R6808, rename R6606 to R6809, rename R6607 to R6810 Change R6804, R6801, R6806, R6808, R6809, R6810, R6811 to 390 ohm to fine tune all of MB LED for 5mA spec. Change R6802 to 15k ohm.

D D

PWRLED#(27)

4

R6812

1 2

15KR2J-1-GP

Power LED(White)

Q6801

PWRLED#_C

Q6801

B

R1

PDTA143ET-GP

84.00143.M11

5V_S5

R2

E

LED_PWR

C

12

EC6801

DY

SC220P50V2KX-3GP

3

1 2

R6801 390R2J-1-GPR6801 390R 2J-1-GP

X00-20101111

POWER_SW_LED_B

2

1

Battery LED1(White)

Q6805

R2

R6813

BATT_WHITE_LED#(27)

1 2

15KR2J-1-GP

WHITE_LED_BAT#

R2

B

R1

PDTA143ET-GP

84.00143.M11

X00 20101111

Battery LED2(Amber)

Q6604

R2

R6814

C C

CHG_AMBER_LED#(27)

R6814

1 2

15KR2J-1-GP

AMBER_LED_BAT#

R2

E

B

R1

C

PDTA143ET-GP

84.00143.M11

E

C

5V_AUX_S5

WHITE_LED_BAT

5V_AUX_S5

DY

12

EC6604

SC220P50V2KX-3GP

R6809 390R2J-1-GPR6809 390R 2J-1-GP

12

EC6802

DY

SC220P50V2KX-3GP

1 2

R6808 390R2J-1-GPR6808 390R 2J-1-GP

1 2

Charger_Whi te#

Charger_Amber#AMBER_LED_BAT

X00 1116 remove

B B

A A

5

X00 1116 Remove

Power button LED(White)

KBC_PWRBTN#(27)

4

POWER_SW_LED_B

1 2

R6803 100R2J-2-GPR6803 100R2J-2-GP

LED1

X00 20101111

KBC_PWRBTN#_R

http://hobi-elektronika.net

LED1

3 2

1

ACES-CON3-11-GP

20.F0772.003

3

5

4

Charger_Amber#

Charger_Whi te#

PWR1

5 3 2

1

4

ACES-CON3-11-GP

20.F0772.003

X00 20101112

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

LED Bord/Power Button

Size Document Number Rev

A2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

DB13

1

68 105Frid ay, November 26, 2010

of

X00

5

4

3

2

1

SSID = KBC

KB1

33

CAP_LED_R

1

2 3 4 5

D D

C C

B B

6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 34

PTWO-CON32-2-GP

KCOL10 KCOL11 KCOL9 KCOL14 KCOL13 KCOL15 KCOL16 KCOL12 KCOL0 KCOL2 KCOL1 KCOL3 KCOL8 KCOL6 KCOL7 KCOL4 KCOL5 KROW0 KROW3 KROW1 KROW5 KROW2 KROW4 KROW6 KROW7

1

AFTP7803AFTP7803

X00 1116

CAP_LED_R

KROW[0..7] (27)

KCOL[0..16] (27)

1

AFTP6935AFTP6935

1

AFTP6932AFTP6932

1

AFTP6931AFTP6931

1

AFTP6934AFTP6934

1

AFTP6933AFTP6933

1

AFTP6928AFTP6928

1

AFTP6927AFTP6927

1

AFTP6930AFTP6930

1

AFTP6929AFTP6929

1

AFTP6924AFTP6924

1

AFTP6923AFTP6923

1

AFTP6926AFTP6926

1

AFTP6925AFTP6925

1

AFTP6920AFTP6920

1

AFTP6919AFTP6919

1

AFTP6922AFTP6922

1

AFTP6921AFTP6921

1

AFTP6916AFTP6916

1

AFTP6915AFTP6915

1

AFTP6918AFTP6918

1

AFTP6917AFTP6917

1

AFTP6914AFTP6914

1

AFTP6913AFTP6913

1

AFTP6912AFTP6912

1

AFTP6911AFTP6911

1

AFTP6936AFTP6936

DY

1 2

EC6922

EC6924

SC220P25V1KX-GP

DY

1 2

DY

1 2

EC6914

KB_DET# (21)

DY

1 2

EC6923

SC220P25V1KX-GP

DY

1 2

EC6904

EC6907

SC220P25V1KX-GP

DY

1 2

EC6915

SC220P25V1KX-GP

KCOL8 KCOL6 KCOL7 KCOL4

EC6925

SC220P25V1KX-GP

EC6908

DY

EC6916

SC220P25V1KX-GP

DY

1 2

Internal KeyBoard Connector

KCOL10 KCOL11 KCOL9 KCOL14

DY

1 2

EC6909

SC220P25V1KX-GP

KCOL13 KCOL15 KCOL16

KCOL12

1 2

EC6917

SC220P25V1KX-GP

DY

1 2

EC6926

SC220P25V1KX-GP

DY

1 2

DY

1 2

EC6928

EC6927

SC220P25V1KX-GP

DY

1 2

EC6910

SC220P25V1KX-GP

DY

1 2

EC6918

SC220P25V1KX-GP

KCOL5 KROW0 KROW3 KROW1

1 2

EC6929

SC220P25V1KX-GP

DY

1 2

EC6911

SC220P25V1KX-GP

DY

1 2

EC6919

EC6920

SC220P25V1KX-GP

KROW5 KROW2 KROW4 KROW6

DY

1 2

EC6912

EC6913

SC220P25V1KX-GP

KCOL0 KCOL2 KCOL1

KCOL3

DY

1 2

EC6921

SC220P25V1KX-GP

KROW7

DY

1 2

EC6930

SC220P25V1KX-GP

KB Backlight Connector

R6902

R6902 0R2J-2-GP

0R2J-2-GP

100KR2J-1-GP

+5V_KB_BL

12

C6905

C6905 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

KB_LED_DET_C

12

C6906

SCD1U10V2KX-5GP

12

R6901

R6901 100KR2J-1-GP

100KR2J-1-GP

G

X00 1117

KB_BL_CTRL#

HRS-CON6-3-GP

20.K0267.006

DS

Q6901

Q6901 P8503BMG-GP

P8503BMG-GP

KBLT1

7

1

2 3 4 5 6

4

20100721 Modify: Re-assign KBLIT1 pin define. 20100927 X01: ME/Lawrence change KBLIT1 to 20.K0589.004 to meet emn file.

8

1

AFTP79AFTP79

+5V_KB_BL KB_LED_BL_DET KB_BL_CTRL#

1 1 1

http://hobi-elektronika.net

AFTP76AFTP76 AFTP77AFTP77 AFTP78AFTP78

3

5V_S0

1 2

R6904

KB_BL_CTRL(27)

5

1 2

51KR2J-1-GP

12

R6903

KB_LED_BL_DET(18)

A A

CAP LED CONTROL

20100917 X01 Modify: Un-stuff R6907 and stuff Q6902,R6906 for 5V drive CAP LED. 20100927 X01: Change R6906 to 390 ohm.

Q6902

Q6902_B

B

84.00143.M11

2nd = 84.02143.011

3rd = 84.00143.N11

RN6901

12

DY

3D3V_S0

1

TPCLK

1

TPDATA

1

Q6902

PDTA143ET-GP

EC6903

SCD1U10V2KX-5GP

R6905

CAP_LED(27)

CAP_LED:(X01 Low actived) Connect to KB driving internal LED directly.(MAX 25mA)

1 2

15KR2J-1-GP

X00 1120

3D3V_S0

1

23

SRN10KJ-5-GP

4

TPDATA(27)

TPCLK(27)

X00 1124

20100930 X01: EMI/Simon: Change C6902 and C6903 to 0.1uF and default stuff.

AFTP73AFTP73 AFTP74AFTP74 AFTP75AFTP75

DY

EC6902

SCD1U10V2KX-5GP

5V_S5

R2

E

R1

C

R6906

1 2

390R2J-1-GP

CAP_LED_RCAP_LED_Q

X00 1120

CAP_LED_R

X00 1120

3D3V_S0

TouchPad Connector

12

C6901

C6901 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

X00 1025

TPAD1

6

4B

4A

3B

3A

2B

2A

1B

1A

5

ACES-CONN8G-GP

AFTP71AFTP71

2

1

20.K0464.004

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad/Media Board

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

69 105Friday, November 26, 2010

of

1

of

X00

5

D D

4

3

2

1

AFTP80 AFTE14P-GPAFTP80 AFTE14P-GP AFTP81 AFTE14P-GPAFTP81 AFTE14P-GP

C C

LID_CLOSE#(27)

B B

3D3V_S5

1

LID_CLOSE#_1

1

3D3V_S5

12

R7004

R7004 100KR2J-1-GP

100KR2J-1-GP

LID_CLOSE# LID_CLOSE#_1

12

C7003

DY

SCD047U16V2KX-1-GP

AFTE14P-GP

R7003

1 2

0R2J-2-GP

3D3V_S5

C7004

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP AFTP83

AFTP83

C7004

1

12

X00 1120

HALLCON1

6

4 3 2

1

5

PTWO-CON4-5-GP

20.K0326.004

Wistron Corporation

A A

Title

Size Document Number Rev

A4

http://hobi-elektronika.net

5

4

3

A4

Date: Sheet

2

DB13 DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Hall Sensor

70 105Friday, November 26, 2010

1

X00

of

5

D D

C C

4

3D3V_S0

LPC_AD0(21,27) LPC_AD1(21,27) LPC_AD2(21,27) LPC_AD3(21,27)

LPC_FRAME#(21,27)

PLT_RST#(5,18,27,31,32,35,65,66,83)

CLK_PCI_LPC(18)

3

DB1

1 2 3 4 5 6 7 8

9 10 11 12

MLX-CON10-7-GP

20.D0183.110

2

1

B B

Wistron Corporation

A A

Title

Size Document Number Rev

A4

http://hobi-elektronika.net

5

4

3

A4

Date: Sheet

2

Dubug CONN

DB13 DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X00

71 105Friday, November 26, 2010

of

1

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

72 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

73 105Friday, November 26, 2010

of

X00

5

SSID = SDIO

4

3

2

1

3D3V_CARD_S0

D D

C C

B B

12

Close to CARD1

12

C7401

C7402

SCD1U10V2KX-5GP

X00 1025 FAE

12

SCD1U10V2KX-5GP

suggestion 0.1u*2 10u*1

C7405

SC10U6D3V5MX-3GP

SD/XD/MS/MMC+ Card Reader

CARD1

SD_D3(32) SD_CMD(32)

SD_CLK(32)

SD_D0(32) SD_D1(32) SD_D2(32)

SD_CD#(32) SP15(32)

SP5(32) SP7(32) SP9(32) SP10(32) MS_INS#(32) SP12(32) SP14(32)

SP4(32) SP3(32) SP2(32) SP1(32)

2

SD#1

4

SD#2

6

SD#3

7

SD#4

18

SD#5

20

SD#6

22

SD#7

23

SD#8

1

SD#9

24

SD_SW_COM

25

SD_SW_CD

45

SD_SW_WP

17

MEMORYSTICK#1

16

MEMORYSTICK#2

15

MEMORYSTICK#3

14

MEMORYSTICK#4

13

MEMORYSTICK#5

12

MEMORYSTICK#6

11

MEMORYSTICK#7

10

MEMORYSTICK#8

9

MEMORYSTICK#9

8

MEMORYSTICK#10

3

MMC_PLUS#10

5

MMC_PLUS#11

19

MMC_PLUS#12

21

MMC_PLUS#13

CARDBUS45P-SKT-1-GP

62.10051.931

XD#0/CD

XD#1 XD#2 XD#3 XD#4 XD#5 XD#6 XD#7 XD#8

XD#9 XD#10 XD#11 XD#12 XD#13 XD#14 XD#15 XD#16 XD#17 XD#18

GND GND GND GND

NP1 NP2

27 26 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

46 47 48 49

NP1 NP2

3D3V_CARD_S0

XD_CD# (32)

SP1 (32) SP2 (32) SP3 (32) SP5 (32) SP6 (32) SP4 (32) SP7 (32)

SP8 (32) SP9 (32) SP10 (32) SP11 (32) SP12 (32) SP13 (32) SP14 (32) SP15 (32)

For EMI Reserved

SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13

SP15 XD_CD#

A A

12

EC7411

EC7412

DY

SC10P50V2JN-4GP

http://hobi-elektronika.net

DY

12

EC7405

DY

SC10P50V2JN-4GP

12

EC7406

DY

SC10P50V2JN-4GP

12

EC7407

DY

SC10P50V2JN-4GP

4

12

EC7408

DY

SC10P50V2JN-4GP

12

EC7409

DY

SC10P50V2JN-4GP

12

EC7410

DY

SC10P50V2JN-4GP

12

EC7403

EC7402

DY

SC10P50V2JN-4GP

5

12

EC7413

DY

SC10P50V2JN-4GP

12

EC7414

DY

SC10P50V2JN-4GP

3

12

EC7415

DY

SC10P50V2JN-4GP

12

X00 1020

12

EC7416

EC7417

DY

SC10P50V2JN-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader CONN

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

CARD Reader CONN

DB13

Taipei Hsien 221, Taiwan, R.O.C.

74 105Friday, November 26, 2010

of

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

75 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

76 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

77 105Friday, November 26, 2010

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

78 105Friday, November 26, 2010

of

X00

5

SSID = User.Interface

4

3

2

1

D D

PCH_SMBCLK(14,15,20,65,66) PCH_SMBDATA(14,15,20,65,66)

20100729 Pop R7901 for I2C.

3D3V_S0

C C

For ADI G-sensor : R7901 is required. For ST G-sensor : R7901 need DY

09/0422 (#1) Just pull +3.3V_RUN ~ Ref. Rothschild (#2) FAE/ DY is ok, chip internal pull-up resistors (#3) From spec, Slave ADdress(SAD) is 001110xb Pull HIGH SAD is 0011101b Pull GND SAD is 0011100b

Free Fall Sensor

3D3V_S0

12

SC10U6D3V5MX-3GP

GSENSOR_ADI

1 2

C7901

PCH_SMBDATA

R7901

HDD_FALL_SDO

100KR2J-1-GP

12

DY

C7902

C7902 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

U7901

14

SCL/SPC

13

SDA/SDI/SDO

12

SDO

7

CS

3

RESERVED#3

11

RESERVED#11

DE351DLTR8-GP

74.00351.0B3

2nd = 74.00345.0BZ

20100902 X01 Modify: U7901 G-SENSOR MAIN SOURCE change to ST(74.00351.0B3),2nd change to ADI(74.00345.0BZ).

6

VDD

Note

- no via, trace, under the sensor (keep out area around 2mm)

- stay away from the screw hole or metal shield soldering joints

- design PCB pad based on our sensor LGA pad size (add 0.1mm)

- solder stencil opening to 90% of the PCB pad size

- mount the sensor near the center of mass of the NB as possible as you can

3D3V_S0

1

VDD_IO

INT1

INT2

GND GND GND GND

12

R7902

R7902 100KR2J-1-GP

100KR2J-1-GP

DY

HDD_FALL_INT1PCH_SMBCLK

8

9

2 4 5 10

HDD_FALL_INT1 (18)

12

2nd = 84.DM601.03F

R7904

DY

100KR2J-1-GP

FFS_INT2_R

Q7901

2N7002KDW-GP

84.2N702.A3F

3D3V_S0

12

R7903

R7903 100KR2J-1-GP

100KR2J-1-GP

FALL_INT2

2

34

5

1 2

DY

1

6

R7905

0R2J-2-GP

5V_S03D3V_S0

12

R7906

R7906 10KR2J-3-GP

10KR2J-3-GP

DY

FFS_INT2 (56)

FFS_INT2_R (18)

B B

Note (1) Keep all signals are the same trace width. (included VDD, GND). (2) No VIA under IC bottom.

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Free Fall Sensor

DB13 DIS

79 105Friday, November 26, 2010

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

DB13 DIS

80 105Friday, November 26, 2010

of

1

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

81 105Friday, November 26, 2010

of

X00

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector

Size Document Number Rev

A3

Date: Sheet

IO Board Connector

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

82 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

X00 1120

R8328

12

DY

0R2J-2-GP

U8302

DGPU_HOLD_RST#(18)

PLT_RST#(5,18,27,31,32,35,65,66,71)

D D

C C

PEG_TXP[0..15](4)

PEG_TXN[0..15](4)

PEG_RXP[0..15](4)

PEG_RXN[0..15](4)

Differentail trace impedance 90 ohm Min trace Width 4-6mil Max trace Length 8000 mils Max trace Length 8000 mils

B B

A A

1

PLT_RST#

2

3

74LVC1G08GW-1- GP

73.01G08.L04

2nd = 73.7SZ08.DAH

R8314 100KR2J-1- GP

1 2

PEX_RST#(51,86)

5

3D3V_S5

B

5

VCC

A

GND

PEX_RST#

4

Y

0927

NV_PEG_CLKREQ#

R8305

1 2

DY

200R2F-L-GP

DY

CLK_PCIE_VGA(20) CLK_PCIE_VGA#(20)

PEG_RXP0 PEG_C_R XP0 PEG_RXN0

PEG_RXP1 PEG_RXN1

PEG_RXP2 PEG_RXN2

PEG_RXP3 PEG_RXN3

PEG_RXP4 PEG_RXN4

PEG_RXP5 PEG_RXN5

PEG_RXP6 PEG_RXN6

PEG_RXP7 PEG_RXN7

PEG_RXP8 PEG_RXN8

PEG_RXP9 PEG_RXN9

PEG_RXP10 PEG_RXN10

PEG_RXP11 PEG_RXN11

PEG_RXP12 PEG_RXN12

PEG_RXP13 PEG_RXN13

PEG_RXP14 PEG_RXN14

PEG_RXP15 PEG_RXN15

200R2F-L-GP

12 12

close to the GPU

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

C8301SCD1U10V2K X-5GP C8301SCD1U10V2K X-5GP

PEG_C_RXN0

C8302SCD1U10V2K X-5GP C8302SCD1U10V2K X-5GP

PEG_TXP0 PEG_TXN0

PEG_C_RXP1

C8303SCD1U10V2K X-5GP C8303SCD1U10V2K X-5GP

PEG_C_RXN1

C8304SCD1U10V2K X-5GP C8304SCD1U10V2K X-5GP

PEG_TXP1 PEG_TXN1

PEG_C_RXP2

C8305SCD1U10V2K X-5GP C8305SCD1U10V2K X-5GP

PEG_C_RXN2

C8306SCD1U10V2K X-5GP C8306SCD1U10V2K X-5GP

PEG_TXP2 PEG_TXN2

PEG_C_RXP3

C8308SCD1U10V2K X-5GP C8308SCD1U10V2K X-5GP

PEG_C_RXN3

C8307SCD1U10V2K X-5GP C8307SCD1U10V2K X-5GP

PEG_TXP3 PEG_TXN3

PEG_C_RXP4

C8309SCD1U10V2K X-5GP C8309SCD1U10V2K X-5GP

PEG_C_RXN4

C8310SCD1U10V2K X-5GP C8310SCD1U10V2K X-5GP

PEG_TXP4 PEG_TXN4

PEG_C_RXP5

C8311SCD1U10V2K X-5GP C8311SCD1U10V2K X-5GP

PEG_C_RXN5

C8312SCD1U10V2K X-5GP C8312SCD1U10V2K X-5GP

PEG_TXP5 PEG_TXN5

PEG_C_RXP6

C8313SCD1U10V2K X-5GP C8313SCD1U10V2K X-5GP

PEG_C_RXN6

C8314SCD1U10V2K X-5GP C8314SCD1U10V2K X-5GP

PEG_TXP6 PEG_TXN6

PEG_C_RXP7

C8316SCD1U10V2K X-5GP C8316SCD1U10V2K X-5GP

PEG_C_RXN7

C8315SCD1U10V2K X-5GP C8315SCD1U10V2K X-5GP

PEG_TXP7 PEG_TXN7

PEG_C_RXP8

C8318SCD1U10V2K X-5GP C8318SCD1U10V2K X-5GP

PEG_C_RXN8

C8317SCD1U10V2K X-5GP C8317SCD1U10V2K X-5GP

PEG_TXP8 PEG_TXN8

PEG_C_RXP9

C8320SCD1U10V2K X-5GP C8320SCD1U10V2K X-5GP

PEG_C_RXN9

C8319SCD1U10V2K X-5GP C8319SCD1U10V2K X-5GP

PEG_TXP9 PEG_TXN9

PEG_C_RXP10

C8321SCD1U10V2K X-5GP C8321SCD1U10V2K X-5GP

PEG_C_RXN10

C8322SCD1U10V2K X-5GP C8322SCD1U10V2K X-5GP

PEG_TXP10 PEG_TXN10

PEG_C_RXP11

C8323SCD1U10V2K X-5GP C8323SCD1U10V2K X-5GP

PEG_C_RXN11

C8324SCD1U10V2K X-5GP C8324SCD1U10V2K X-5GP

PEG_TXP11 PEG_TXN11

PEG_C_RXP12

C8325SCD1U10V2K X-5GP C8325SCD1U10V2K X-5GP

PEG_C_RXN12

C8326SCD1U10V2K X-5GP C8326SCD1U10V2K X-5GP

PEG_TXP12 PEG_TXN12

PEG_C_RXP13

C8328SCD1U10V2K X-5GP C8328SCD1U10V2K X-5GP

PEG_C_RXN13

C8327SCD1U10V2K X-5GP C8327SCD1U10V2K X-5GP

PEG_TXP13 PEG_TXN13

PEG_C_RXP14

C8330SCD1U10V2K X-5GP C8330SCD1U10V2K X-5GP

PEG_C_RXN14

C8329SCD1U10V2K X-5GP C8329SCD1U10V2K X-5GP

PEG_TXP14 PEG_TXN14

PEG_C_RXP15

C8332SCD1U10V2K X-5GP C8332SCD1U10V2K X-5GP

PEG_C_RXN15

C8331SCD1U10V2K X-5GP C8331SCD1U10V2K X-5GP

PEG_TXP15 PEG_TXN15

1/12 PCI_EXPRESS

AE9

PEX_CLKREQ#

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT#

AD9

PEX_RST#

AB10

PEX_REFCLK

AC10

PEX_REFCLK#

AD10

PEX_TX0

AD11

PEX_TX0#

AE12

PEX_RX0

AF12

PEX_RX0#

AD12

PEX_TX1

AC12

PEX_TX1#

AG12

PEX_RX1

AG13

PEX_RX1#

AB11

PEX_TX2

AB12

PEX_TX2#

AF13

PEX_RX2

AE13

PEX_RX2#

AD13

PEX_TX3

AD14

PEX_TX3#

AE15

PEX_RX3

AF15

PEX_RX3#

AD15

PEX_TX4

AC15

PEX_TX4#

AG15

PEX_RX4

AG16

PEX_RX4#

AB14

PEX_TX5

AB15

PEX_TX5#

AF16

PEX_RX5

AE16

PEX_RX5#

AC16

PEX_TX6

AD16

PEX_TX6#

AE18

PEX_RX6

AF18

PEX_RX6#

AD17

PEX_TX7

AD18

PEX_TX7#

AG18

PEX_RX7

AG19

PEX_RX7#

AC18

PEX_TX8

AB18

PEX_TX8#

AF19

PEX_RX8

AE19

PEX_RX8#

AB19

PEX_TX9

AB20

PEX_TX9#

AE21

PEX_RX9

AF21

PEX_RX9#

AD19

PEX_TX10

AD20

PEX_TX10#

AG21

PEX_RX10

AG22

PEX_RX10#

AD21

PEX_TX11

AC21

PEX_TX11#

AF22

PEX_RX11

AE22

PEX_RX11#

AB21

PEX_TX12

AB22

PEX_TX12#

AE24

PEX_RX12

AF24

PEX_RX12#

AC22

PEX_TX13

AD22

PEX_TX13#

AG24

PEX_RX13

AF25

PEX_RX13#

AD23

PEX_TX14

AD24

PEX_TX14#

AG25

PEX_RX14

AG26

PEX_RX14#

AE25

PEX_TX15

AE26

PEX_TX15#

AF27

PEX_RX15

AE27

PEX_RX15#

N12M-GE-S-B1-GP

N12P-GV: 71.0N12P.F0U

4

1 OF 12GPU1A

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

VDD_SENSE#W15 GND_SENSE#W16

VDD_SENSE#E15 GND_SENSE#E14

VDD33 VDD33 VDD33 VDD33 VDD33 VDD33

PEX_SVDD_3V3

PEX_PLLVDD

PEX_TERMP

1.05V +/- 3% 2,200mA (See NV DG)

X7R

AC9 AD7 AD8 AE7 AF7 AG7

AB13 AB16 AB17 AB7 AB8 AB9 AC13 AC7 AD6 AE6 AF6 AG6

12

C8334

C8333

SCD1U10V2KX-5GP

X7R, Under GPU.

X7R

12

C8344

SCD1U10V2KX-5GP

X7R

12

C8339

12

C8335

SC1U6D3V2KX-GP

12

C8340

SC1U6D3V2KX-GP

X7R, Under GPU.

J10

VDD

J12

VDD

J13

VDD

J9

VDD

L9

VDD

M11

VDD

M17

VDD

M9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

N9

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

R9

VDD

T11

VDD

T17

VDD

T9

VDD

U19

VDD

U9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

W9

VDD

W15 W16

E15 E14

A12 B12 C12 D12 E12 F12

AG9

AF9

AG10

16.82A

SCD1U10V2KX-5GP

12

C8360

SC10U6D3V5KX-1GP

12

C8372

SCD1U10V2KX-5GP

12

C8361

NEAR GPU

SC10U6D3V5KX-1GP

12

C8376

SCD1U10V2KX-5GP

12

C8362

Under GPU

X7R

12

SCD1U10V2KX-5GP

VGA_CORE

X7R

12

C8353

3

C8377

SCD1U10V2KX-5GP

12

X7R

C8345

SCD1U10V2KX-5GP

12

C8354

SC4D7U6D3V3KX-GP

G

S

X7R

12

C8378

1D05V_VGA_S0

12

SC4D7U6D3V3KX-GP

PQ8310

PQ8310 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

12

C8373

SCD1U10V2KX-5GP

R8308

1 2

100R2F-L1-GP-U

VGACORE_VDD_SENSE (92) VGACORE_GND_SENSE (92)

R8309

1 2

100R2F-L1-GP-U

LA46: Test point LKN3: connect to VGA core PWR IC

120mA

Under GPU.

PEX_TERMP

X00 1120

X7R, Under GPU.

VCC1R05VIDEO_PEX_PLLVDD

SC1U6D3V3KX-2GP

Near GPU.

R8304

1 2

2K49R2F-GP

DGPU_PWROK(22,87,92,93)

http://hobi-elektronika.net

1D05V_VGA_S0

12

C8337

C8336

C8338

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SB

12

C8341

DY

SC1U10V2KX-1GP

12

C8343

C8342

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

Under GPU

SCD1U10V2KX-5GP

12

C8364

C8363

X7R

12

C8374

C8375

SCD1U10V2KX-5GP

240mA

X7R

12

C8350

SCD1U10V2KX-5GP

X7R

12

C8347

C8348

SCD1U10V2KX-5GP

X7R, Under GPU.

C8346

1D05V_VGA_S0

L8301

12

BLM11A121S-GP

68.00082.001

120ohm@100MHz ESR=0.18

NV_PEG_CLKREQ#

R8329

1 2

0R2J-2-GP

D

X7R

12

SC1U6D3V3KX-2GP

SC1U10V2KX-1GP

1D05V_VGA_S0

C8369

SC1U6D3V3KX-2GP

12

C8349

PEG_CLKREQ# (20)

X7R

12

C8370

3D3V_VGA_S0

12

C8351

SC4D7U6D3V3KX-GP

VGA_CORE

SC1U6D3V3KX-2GP

X7R

12

C8371

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, Novemb er 26, 2010

Friday, Novemb er 26, 2010 Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

GPU_PCIE/STRAPPING(1/5)

DB13 DIS

1

83 105

of

X00

If a DAC interface is not required, it should be disabled by:

1. Adding a pull-down to the DACx_VDD with a 10 kilohm resistor to GND.

2. All other DAC I/O pins can be left floating.

D D

In Optimus mode the GPU does not drive certain interfaces. These interfaces should be treated as unused and appropriate terminations per the GPU design guide should be applied th the signal or the power supply block.

The following guidelines only apply to a fully unused IFP macro:

1. Pull down IFPxy_IOVDD with 10 kilohm resistor.

2. Pull down IFPxy_PLLVDD with 10 kilohm resistor.

3. The other IO pins can be NC; this includes unused data lines.

C C

300ohm@100MHz ESR=0.25

3D3V_VGA_S0

SC1U10V2KX-1GP

1D05V_VGA_S0

L8403

1 2

MPZ1608S221AT-GP

68.00212.041

12

C8411

B B

A A

C8411

SC1U10V2KX-1GP

5

L8405

1 2

MPZ1608S331A-GP

68.00212.071

12

C8418

68.00212.071

X7R

12

C8420

SC1U6D3V3KX-2GP

Near GPU.

220ohm@100MHz ESR=0.05

12

C8409

C8408

SC1U10V2KX-1GP

SC4D7U6D3V3KX-GP

X7R, Under GPU.

SC4D7U6D3V3KX-GP

12

C8417

X7R

12

SCD1U10V2KX-5GP

IFPCD_PLLVDD

SCD1U10V2KX-5GP

Under GPU.

IFPCD _IOVD D

C8410

SCD1U10V2KX-5GP

IFPAB_PLLVDD

12

IFPAB_IOVDD

12

X7R

12

C8402

X7R

12

C8421

R8516

R8516 10KR2J-3-GP

10KR2J-3-GP

R8517

R8517 10KR2J-3-GP

10KR2J-3-GP

220mA

IFPC_RSET

12

285mA

R8402

R8402 1KR2F-3-GP

1KR2F-3-GP

5/12 IFPAB

AD5

IFPAB_PLLVDD

AB6

IFPAB_RSET

V3

IFPA_IOVDD

V2

IFPB_IOVDD

N12M-GE-S-B1-GP

GPU1H

6/12 IFPC

P6

IFPC_PLLVDD

R5

IFPC_RSET

SB

J6

IFPC_IOVDD

N12M-GE-S-B1-GP

If either IFPC or IFPD is used, then the whole IFPCD interface is considered as being used. This is because IFPC and IFPD share one macro design so one IO interface cannot be independently disabled.

DACA_VDD

12

Optimus

R8521

R8521 10KR2J-3-GP

10KR2J-3-GP

4

DATA

CLOCK

IFPAB_HPD

AG2

AF1

AE1

A

B

A

B

DIS

3/12 DACA

DACA_VDD

DACA_VREF

DACA_RSET

N12M-GE-S-B1-GP

IFPA_TXD0#

IFPA_TXD1#

IFPA_TXD2#

IFPA_TXD3#

IFPB_TXD4#

IFPB_TXD5#

IFPB_TXD6#

IFPB_TXD7#

IFPE_HPD

5 OF 12GPU1E

IFPA_TXD0

IFPA_TXD1

IFPA_TXD2

IFPA_TXD3

IFPB_TXD4

IFPB_TXD5

IFPB_TXD6

IFPB_TXD7

IFPA_TXC#

IFPA_TXC

IFPB_TXC#

IFPB_TXC

GPIO0

6 OF 12

IFPC_AUX#

IFPC_AUX

IFPC_L3#

IFPC_L3

IFPC_L2#

IFPC_L2

IFPC_L1#

IFPC_L1

IFPC_L0#

IFPC_L0

GPIO1

DIS

3

V4 V5

AA4 AA5

Y4 W4

AB5 AB4

V1 W1

W2 W3

AA3 AA2

AA1 AB1

AD4 AC4

AB2 AB3

N1

3 OF 12GPU1C

DACA_RED

DACA_BLUE

3.3V

GPU_HDMI_DATA (51) GPU_HDMI_CLK (51)

HDMI_CLK_R# (51) HDMI_CLK_R (51)

HDMI_DATA0_R# (51) HDMI_DATA0_R ( 51)

HDMI_DATA1_R# (51) HDMI_DATA1_R ( 51)

HDMI_DATA2_R# (51) HDMI_DATA2_R ( 51)

GPU_HDMI_HPD (51)

AD2 AD1

AE2

AE3

AD3

If either IFPC or IFPD is used, then the whole IFPCD interface is considered as being used. This is because IFPC and IFPD share one macro design so one IO interface cannot be independently disabled.

G5 G4

J4 H4

K4 L4

M4 M5

N4 P4

G1

DACA_HSYNC

DACA_VSYNC

DACA_GREEN

IFPEF_PLLVDD

12

DACB_VDD

12

R8520

R8520 10KR2J-3-GP

10KR2J-3-GP

2

IFPCD_PLLVDD IFPD_RSET

12

R8519

R8519 1KR2F-3-GP

1KR2F-3-GP

IFPCD _IOVD D

R8523

R8523 10KR2J-3-GP

10KR2J-3-GP

N6

M6

H6

GPU1G

D7

F8

N12M-GE-S-B1-GP

W5

R6

V6

N12M-GE-S-B1-GP

GPU1F

7/12 IFPD

IFPD_PLLVDD IFPD_RSET

IFPDE_IOVDD

N12M-GE-S-B1-GP

8/12 IFPE

IFPE_PLLVDD IFPE_RSET

4/12 DACB

DACB_VDD

DACB_VREF

DACB_RSET

1

7 OF 12

D4

IFPD_AUX#

D3

IFPD_AUX

B4

IFPD_L3#

B3

IFPD_L3

C4

IFPD_L2#

C3

IFPD_L2

D5

IFPD_L1#

E4

IFPD_L1

F4

IFPD_L0#

F5

IFPD_L0

8 OF 12

IFPE_AUX#

IFPE_AUX

IFPE_L3#

IFPE_L3

IFPE_L2#

IFPE_L2

IFPE_L1#

IFPE_L1

IFPE_L0#

IFPE_L0

GPIO15

4 OF 12GPU1D

DACB_RED

GPIO19

F2

G6 F7

E7 E6

B7 B6

A7 A6

C6 D6

F3

U6 U4

T5

T4

R4

IFPE_HPD

DIS

DACB_HSYNC DACB_VSYNC

DACB_GREEN

DACB_BLUE

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, Novemb er 26, 2010

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

GPU HDMI/LVDS/CRT(2/5)

DB13 DIS

1

84 105

of

X00

5

2 OF 12GPU1B

2/12 FRAME_BUFFER

MDA[0..7](88)

MDA[8..15](88)

D D

MDA[16..23](88)

MDA[24..31](88)

MDA[32..39](89)

MDA[40..47](89)

MDA[48..55](89)

C C

MDA[56..63](89)

DQMA0(88) DQMA1(88) DQMA2(88) DQMA3(88) DQMA4(89) DQMA5(89) DQMA6(89) DQMA7(89)

QSAP_0(88) QSAP_1(88) QSAP_2(88) QSAP_3(88) QSAP_4(89) QSAP_5(89) QSAP_6(89) QSAP_7(89)

QSAN_0(88) QSAN_1(88) QSAN_2(88) QSAN_3(88) QSAN_4(89) QSAN_5(89)

B B

QSAN_6(89) QSAN_7(89)

FBA_VREF_TP

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

AC24

AD26 AD27

D22

D24 D26 D27 C27

C21 C19 C18 D18

C16

D20

D17

D16

C24 D21

C22

U24

R24

R23

AB23 AB24

W24

AA22

W23 W22

AA25

W27 W26

W25 AB25 AB26

R25

R26

N25 N26

C26

D19 D23

AA23 AB27

C25

AA24 AA26

D25

R22

AA27

R27

E24 E22

B27 A21 B21

B18

E21 F21

F20

F18

E16 A22

B22

A25 B25 A26

V24 V23

T23

P24 P22

V22

V25

V26 V27

T25

B19

T24

T26

A19 E19 A24 T22

T27

A18 E18 B24

Y24

A16

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FB_VREF

N12M-GE-S-B1-GP

A4

DIS

2 OF 12GPU1B

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBA_DEBUG

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

FB_PLLAVDD

FB_DLLAVDD

FB_PLLAVDD

A13 B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

GB1B-64GB1-64

FBA_CMD3

F26

FBA_CMD8

J24

FBA_CMD2

F25

FBA_CMD21

M23

FBA_CMD24

N27

FBA_CMD23

M27

FBA_CMD26

K26

FBA_CMD7

J25

FBA_CMD15

J27

FBA_CMD13

G23

FBA_CMD4

G26

FBA_CMD18

J23

FBA_CMD29

M25

FBA_CMD27

K27

FBA_CMD6

G25

FBA_CMD17

L24

FBA_CMD19

K23

FBA_CMD22

K24

FBA_CMD12

G22

FBA_CMD28

K25

FBA_CMD10

H22

FBA_CMD25

M26

FBA_CMD9

H24

FBA_CMD1

F27

FBA_CMD11

J26

FBA_CMD0

G24

FBA_CMD5

G27

FBA_CMD16

M24

FBA_CMD20

K22

FBA_CMD14

J22

FBA_CMD30

L22

F24 F23 N24 N23

FBA_DEBUG

M22

FB_CAL_PD_VDDQ

B15

FB_CAL_PU_GND

A15

FB_CAL_TERM_GND

B16

R19

T19

AC19

4

1.72A

DC tolerance +/- 75mV AC tolerance +/- 50mV < 100MHz

X7R

12

C8501

C8502

DIS

SCD1U10V2KX-5GP

X7R

12

C8508

C8512

DIS

SC1U6D3V3KX-2GP

SCD1U10V2KX-5GP

X7R, Near GPU.

FBA_CMD3 (88) FBA_CMD8 (88,89) FBA_CMD2 (88) FBA_CMD21 (88,89) FBA_CMD24 (88,89) FBA_CMD23 (88,89) FBA_CMD26 (88,89) FBA_CMD7 (88,89) FBA_CMD15 (88,89) FBA_CMD13 (88,89) FBA_CMD4 (88,89) FBA_CMD18 (89) FBA_CMD29 (88,89) FBA_CMD27 (88,89) FBA_CMD6 (88,89)

FBA_CMD19 (89) FBA_CMD22 (88,89) FBA_CMD12 (88,89) FBA_CMD28 (88,89) FBA_CMD10 (88,89) FBA_CMD25 (88,89) FBA_CMD9 (88,89)

FBA_CMD11 (88,89) FBA_CMD0 (88) FBA_CMD5 (88,89) FBA_CMD16 (89) FBA_CMD20 (88,89) FBA_CMD14 (88,89) FBA_CMD30 (88,89)

CLKA0 (88) CLKA0# (88) CLKA1 (89) CLKA1# (89)

1D5V_VGA_S0

R8518

1 2

DY

60D4R2F-GP

1D5V_VGA_S0

R8501

12

DIS

40D2R2F-GP

40D2R2F-GP R8522

R8522

12

DIS

40D2R2F-GP

40D2R2F-GP R8502

R8502

12

DIS

60D4R2F-GP

30ohm@100MHz ESR=0.01

100mA

FB_PLLVDD_16mil

X7R

12

C8513

DIS

SCD1U10V2KX-5GP

Under GPU.

1D5V_VGA_S0

X7R

12

C8503

DIS

SCD1U10V2KX-5GP

X7R

12

C8505

C8504

DIS

SCD1U10V2KX-5GP

X7R

12

C8507

C8506

DIS

SCD1U10V2KX-5GP

X7R, Under GPU.

X7R

12

SC4D7U6D3V3KX-GP

CLKA1

CLKA1#

C8510

DIS

12

SC4D7U6D3V3KX-GP

1 2

C8511

DIS

R8504

R8504 243R2F-2-GP

243R2F-2-GP

DIS

12

C8509

DIS

SC1U6D3V3KX-2GP

FBCLK Termination place on VRAM side

1D05V_VGA_S0

DIS

L8501

1 2

MPZ1608S300AT-GP

68.00212.051

X7R

12

C8515

DIS

SC1U6D3V3KX-2GP

Near GPU.

12

C8516

DIS

SC4D7U6D3V3KX-GP

68.00212.051

12

C8517

DIS

SC4D7U6D3V3KX-GP

FBA_CMD1

FBA_CMD17

FBA_VREF_TP

CLKA0

CLKA0#

1 2

3

CKE0

CKE1

Reset

ODT0

ODT1

R8505

R8505 243R2F-2-GP

243R2F-2-GP

DIS

1

FBA_CMD3

FBA_CMD16

FBA_CMD20

FBA_CMD0

FBA_CMD19

Group A

12

10KR2J-3-GP

TP25 TPAD14-GPTP25 TPAD 14-GP

TP26 TPAD14-GPTP26 TPAD 14-GP

TP27 TPAD14-GPTP27 TPAD 14-GP

R8508

DIS

2

12

R8509

DIS

10KR2J-3-GP

12

R8510

DIS

10KR2J-3-GP

12

R8511

R8512

DIS

10KR2J-3-GP

1

A A

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, Novemb er 26, 2010

Friday, Novemb er 26, 2010 Date: Sheet

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

Memory(3/5)

DB13 DIS

1

85 105

of

X00

5

USER[0]=1

STRAP0

USER[1]=1 USER[2]=1 USER[3]=1

D D

3GIO_PADCFG[0]=0

STRAP1

3GIO_PADCFG[1]=1 3GIO_PADCFG[2]=1 3GIO_PADCFG[3]=0

PCI_DEVID[0]=1

STRAP2

PCI_DEVID[1]=1 PCI_DEVID[2]=1 PCI_DEVID[3]=1

3D3V_VGA_S0

C C

AC_PRESENT_GPIO12

SML1_CLK(20,27)

SML1_DATA(20,27)

B B

3D3V_VGA_S0

X00 1120

12

R8609

R8609 10KR2J-3-GP

10KR2J-3-GP

DIS

A A

R8615

10KR2J-3-GP

GPU_JTAG_TCK

12

R8608

R8608 10KR2J-3-GP

10KR2J-3-GP

DIS

5

12

DIS

GPU_JTAG_TRST#

GPU_Therm_SMBC GPU_Therm_SMBD

STRAP_REF2_GND

12

R8614

R8614 40K2R2F-GP

40K2R2F-GP

DIS

G

Q8645

Q8645 2N7002A-7-GP

2N7002A-7-GP

S D

84.2N702.E31

2ND = 84.2N702.J31

R8620

1 2

0R2J-2-GP

DY

Q8602

2345

1

6

2N7002KDW-GP

84.2N702.A3F

2ND = 84.DM601.03F

9/12 I2C_GPIO_THERM_JTAG

D8

THERMDN

D9

THERMDP

AF3

JTAG_TCK

AF4

JTAG_TMS

AG4

JTAG_TDI

AE4

JTAG_TDO

AG3

JTAG_TRST#

T1

I2CS_SCL

T2

I2CS_SDA

GB1b-64

T6

RFU#T6

W6

RFU#W6

Y6

RFU#Y6

AA6

RFU#AA6

N3

RFU#N3

N12M-GE-S-B1-GP

Default

PURE_HW_SHUTDOWN#(27,28,36)

SB 1001

AC_PRESENT (19,27)

3D3V_VGA_S0

1

23

RN8602

RN8602 SRN2K2J-1-GP

SRN2K2J-1-GP

4

GPU_Therm_SMBC

GPU_Therm_SMBD

Temperature Sensor

Multi_STRAP_REF2_GND

X00 1120

D

DY

Q8603

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

G

S

3D3V_VGA_S0

9 OF 12GPU1L

I2CA_SCL I2CA_SDA

I2CB_SCL I2CB_SDA

I2CC_SCL I2CC_SDA

GPIO2

BL PWM

GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14

GPIO16 GPIO17 GPIO18

Q8602_G

GPU_OVERTEMP#

4

12

R8636

R8636 45K3R2F-L-GP

45K3R2F-L-GP

DY

12

R8639

R8639 15KR2F-GP

15KR2F-GP

DIS

SB 0929

R1 T3

R2 R3

A2 B1

C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1

G3 G2 F1

12

C8603

DY

4

3D3V_VGA_S0

12

GPU_I2CB_SCL GPU_I2CB_SDA

NVVDD_ALTV2 GPU_OVERTEMP# GPU_ALERT#

AC_PRESENT_GPIO12

R8610

SCD1U10V2KX-4GP

R8630

R8630 45K3R2F-L-GP

45K3R2F-L-GP

DIS

R8629

R8629 2KR2F-3-GP

2KR2F-3-GP

DY

STRAP3

3D3V_VGA_S0

45

I2CA_SCL

DY

12

0R2J-2-GP

678

I2CA_SDA

12

R8632

R8632 34K8R2F-1-GP

34K8R2F-1-GP

DIS

12

R8633

R8633 34K8R2F-1-GP

34K8R2F-1-GP

DY

X00 1120

123

RN8601

RN8601 SRN2K2J-4-GP

SRN2K2J-4-GP

PEX_RST# (51,83)

12

R8634

R8634 45K3R2F-L-GP

45K3R2F-L-GP

DIS

12

R8635

R8635 24K9R2F-L-GP

24K9R2F-L-GP

DY

I2CC_SCL

I2CC_SDA

PWRCNTL_0 (92) PWRCNTL_1 (92)

PWRCNTL_0

PWRCNTL_1

PWRCNTL_0

PWRCNTL_1

3

GPU_I2CH_SCL GPU_I2CH_SDA

10/12 MISC

STRAP0 STRAP1 STRAP2

12

R8612

R8612 40K2R2F-GP

40K2R2F-GP

DIS

STRAP_REF0_GND

STRAP_REF1_GND

12

R8613

R8613 40K2R2F-GP

40K2R2F-GP

DIS

C7

STRAP0

B9

STRAP1

A9

STRAP2

F11

MULTI_STRAP_REF0_GND

F10

MULTI_STRAP_REF1_GND

Multi-Level Strapping

F9

SPDIF

N12M-GE-S-B1-GP

GB1b-64

STRAP3

TABLEVIDEO MEMORY

SAMSUNG 128Mx16 0111

45.3Kohm

64.45325.6DL

RO M_SIPD R8627

HYNIX 128Mx16 0110

34.8Kohm 15Kohm 20Kohm

64.34825.6DL

TABLENVIDIA

N12P-GV ES DEV ID: 0x107F (1-1111)

STRAP2 R8629, R8630

3D3V_VGA_S0

4

1

2 3

GPU_OVERTEMP#

GPU_ALERT#

1

DY

DIS

RN8606

RN8606 SRN2K2J-1-GP

SRN2K2J-1-GP

DIS

TP11 TPAD14-GPTP11 TPAD 14-GP

TP23 TPAD14-GPTP23 TPAD 14-GP

R8640

1 2

10KR2J-3-GP

R8637

1 2

10KR2J-3-GP

R8643

1 2

10KR2J-3-GP

R8644

1 2

10KR2J-3-GP

PH 45Kohm

64.45325.6DL

R8641

1 2

DIS

10KR2J-3-GP

R8642

1 2

DIS

10KR2J-3-GP

3D3V_VGA_S0

http://hobi-elektronika.net

N12M-GS ES DEV ID: 0x107F (1-1111)

PH 45Kohm

64.45325.6DL

GPIO I/O ACTIVE USAGE

GPIO0 IN N/A NVGEM HOTPLUG DETECT GPIO1 IN HIGH IFPC HOTPLUG DETECT(HDMI) GPIO2 OUT HIGH PANEL BACKLIGHT PWM GPIO3 OUT HIGH PANEL POWER ENABLE GPIO4 OUT HIGH PANEL BACKLIGHT ENABLE GPIO5 OUT HIGH NVVDD ALV0(GPU VID0) GPIO6 OUT HIGH NVVDD ALV1(GPU VID1) GPIO7 OUT HIGH FBVDD VIDO(GPU VID2) GPIO8 IN/OUT LOW OVERTEMP(Thermal Catastrophic Overtemp) GPIO9 OUT LOW ALERT(Thermal Alert) GPIO10 OUT HIGH Memery VREF switch GPIO11 IN HIGH NOT USED GPIO12 IN N/A AC DETECT GPIO13 OUT LOW Load STEP DOWN GPIO14 OUT HIGH Load STEP UP GPIO15 IN N/A IFPE HOTPLUG DETECT GPIO16 OUT HIGH FAN PWM OUT GPIO17 IN N/A FAN TACH IN GPIO18 OUT HIGH SRVC_HDR GPIO19 IN N/A IFPD HOTPLUG DETECT GPIO20 OUT LOW 3D Vision GPIO21 IN N/A Reserved

3

3D3V_VGA_S0

RN8605

1

4

2 3

DY

SRN2K2J-1-GP

10 OF 12GPU1K

ROM_CS#

ROM_SI

GB1b-64

DIS

GPIO20 GPIO21

ROM_SCLK

STRAP4

TESTMODE

ROM_SO

I2CH_SCL I2CH_SDA

GB1-64

BUFRST#

CEC

GND

HYNIX 64Mx16 0010

64.15025.6DL 64.20025.6DL

220ohm@100MHz ESR=0.05

L8601

1 2

DIS

MPZ1608S221AT-GP

68.00212.041

X7R

12

SCD1U10V2KX-5GP

GPIO TABLE

3D3V_VGA_S0

ROM_CS#

B10

GPU_ROM_SI

A10

GPU_ROM_SO

C10

GPU_ROM_SCLK

C9

GPU_I2CH_SCL

A3

GPU_I2CH_SDA

A4

GPU_I2CH_BUFRST#

1

N5

STRAP4

N2

TESTMODE

AD25

F6

AC6

X7R

12

C8607

C8608

DIS

SCD1U10V2KX-5GP

Under GPU.

2

12

TP2004 TPAD14- GPTP2004 TPAD14-GP

12

R8638

R8638 10KR2J-3-GP

10KR2J-3-GP

DIS

1 2

DIS

10KR2J-3-GP

R8624

R8624 2KR2F-3-GP

2KR2F-3-GP

DY

12

R8627

R8627 45K3R2F-L-GP

45K3R2F-L-GP

SAM1G->20K,2G->45K;HYN1G->15K,2G->35K

R8601

SB 0929

Samsung 64Mx16 0011

PLLVDD_PWR1D05V_VGA_S0

145mA

X7R

12

C8605

C8604

DIS

SCD1U10V2KX-5GP

2

SB 1006

12

R8625

R8625 10KR2F-2-GP

10KR2F-2-GP

DIS

12

R8617

R8617 10KR2F-2-GP

10KR2F-2-GP

DY

R8628

1 2

DY

10KR2J-3-GP

R8619

R8619 4K99R2F-L-GP

4K99R2F-L-GP

DIS

1 2

Near GPU.

12

C8601

SC22U6D3V5MX-2GP

12

3D3V_VGA_S0

12

R8626

R8626 15KR2F-GP

15KR2F-GP

DIS

12

R8618

R8618 15KR2F-GP

15KR2F-GP

DY

3D3V_VGA_S0

60mA 45mA 45mA

DIS

VIDEO_CLK_XTAL_SS

R8604

R8604 10KR2J-3-GP

10KR2J-3-GP

DIS

SC18P50V2JN-1-GP

GPU_ROM_SI

GPU_ROM_SO

GPU_ROM_SCLK

11/12 XTAL_PLL

K5

PLLVDD

K6

VID_PLLVDD

L6

SP_PLLVDD

D11

XTAL_SSIN

D10

XTAL_IN

N12M-GE-S-B1-GP

Default

20PF 5% 50V +/-0.25PF 0402

27MHZ_IN 27MHZ_OUT

R8606

1 2

DY

1MR2J-1-GP

X8601

DIS

2 3

12

C8610

DIS

XTAL-27MHZ-85-GP

82.30034.641

2ND = 82.30034.651

SB 1001

1

41

for 1Gbit Hynix VRAM RAM_CFG[0]=0 RAM_CFG[1]=1 RAM_CFG[2]=0 RAM_CFG[3]=0

27MHZ_OUT1

for 2Gbit Hynix VRAM RAM_CFG[0]=0 RAM_CFG[1]=1 RAM_CFG[2]=1 RAM_CFG[3]=0

VGA_DEVICE =1 (low bit) SMB_ALT_ADDR =0 FB_0_BAR_SIZE =0 XCLK_417 =1 (High bit)

PEX_PLL_EN_TERM =0 SLOT_CLK_CFG =1 SUB_VENDOR =0 PCI_DEVID[4] =1

12

R8607

R8607 100R2J-2-GP

100R2J-2-GP

DIS

SC18P50V2JN-1-GP

12

C8611

DIS

Z40-HR

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, Novemb er 26, 2010

Friday, Novemb er 26, 2010 Date: Sheet

Date: Sheet

Date: Sheet of

for 1Gbit Samsung VRAM RAM_CFG[0]=1 RAM_CFG[1]=1 RAM_CFG[2]=0 RAM_CFG[3]=0

11 OF 12GPU1J

N12P_XTAL_OUTBUF F

E9

XTAL_OUTBUFF

E10

XTAL_OUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

GPU_GPIO/MIC(4/5)

DB13 DIS

1

for 2Gbit Samsung VRAM RAM_CFG[0]=1 RAM_CFG[1]=1 RAM_CFG[2]=1 RAM_CFG[3]=0

12

R8605

R8605 10KR2J-3-GP

10KR2J-3-GP

DIS

86 105

of

X00

5

GPU1I

12/12 GND_NC

AC11

GND

AC14

GND

AC17

GND

AC2

GND

AC20

GND

AC23

GND

AC26

GND

AC5

GND

AC8

GND

AF11

GND

D D

C C

B B

AF14 AF17

AF2 AF20 AF23 AF26

AF5

AF8

B11

B14

B17

B20

B23

B26

E11

E17

E20

E23

E26

J11

J14

J17

K19

L11

L12

L13

L14

L15

L16

L17

M12 M13 M14 M15 M16

P19

P23

P26

T12

T13

T14

T15

T16

U11

U12

U13

U14

U15

U16

U17

U23

U26

V19

W11 W14 W17

Y23

Y26

GND GND GND GND GND GND GND GND GND GND

GND

B2

GND GND GND GND

B5

GND

B8

GND GND GND

E2

GND GND GND GND

E5

GND

E8

GND

H2

GND

H5

GND GND GND GND

GND

K9

GND GND GND GND GND GND GND GND

L2

GND

L5

GND GND GND GND GND GND GND

P2

GND GND GND

P5

GND

P9

GND GND GND GND GND GND GND GND GND GND GND GND GND

U2

GND GND GND

U5

GND GND

V9

GND

GND GND GND

Y2

GND GND GND

Y5

GND

4

12 OF 12

NC#C15 NC#D15

GB1b-64 PGOOD

NC#J5

C15 D15 J5

GPU_PWROK1

12

R8702

R8702 10KR2J-3-GP

10KR2J-3-GP

DIS

X00 1120

R8703

1 2

DY

0R2J-2-GP

3

DGPU_PWROK (22,83,92,93)

2

1

Z40-HR

A A

N12M-GE-S-B1-GP

5

4

http://hobi-elektronika.net

3

2

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, November 26, 2010

Date: Sheet

GPU_GND(5/5)

Taipei Hsien 221, Taiwan, R.O.C.

DB13 DIS

87 105

1

of

X00

5

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

12

C8807

DIS

SC1U6D3V2KX-GP

D D

SC1U6D3V2KX-GP

12

C8811

DIS

SCD1U10V2KX-5GP

SB

C C

CLKA0(85) CLKA0#(85)

B B

X7R

12

C8806

C8809

DIS

SCD1U10V2KX-5GP

X7R

12

C8813

C8810

DIS

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

12

VRAM1_VREF VRAM1_VREF VRAM2_VREF

1 2

R8801 243R2F-2-GP

FBA_CMD9(85,89) FBA_CMD11(85,89) FBA_CMD8(85,89) FBA_CMD25(85,89) FBA_CMD10(85,89) FBA_CMD24(85,89) FBA_CMD22(85,89) FBA_CMD7(85,89) FBA_CMD21(85,89) FBA_CMD6(85,89) FBA_CMD29(85,89) FBA_CMD23(85,89) FBA_CMD28(85,89) FBA_CMD20(85,89) FBA_CMD14(85,89)

FBA_CMD12(85,89) FBA_CMD27(85,89) FBA_CMD26(85,89)

FBA_CMD3(85)

DQMA2(85) DQMA3(85)

FBA_CMD13(85,89) FBA_CMD15(85,89) FBA_CMD30(85,89)

1D5V_VGA_S0 1D5V_VGA_S0

SC1U6D3V2KX-GP

12

C8808

DIS

SC1U6D3V2KX-GP

12

C8812

DIS

SC10U6D3V5KX-1GP

12

C8804

C8801

DIS

VRAM_ZQ1

4

VRAM1

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ2G63BFR-11C-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#T7 NC#L9 NC#L1 NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

3

SCD1U10V2KX-5GP

12

C8817

DIS

C8822

DIS

SCD1U10V2KX-5GP

12

C8818

DY

X7R

12

C8814

DIS

SCD1U10V2KX-5GP

SB

VRAM2_VREF

FBA_CMD9(85,89) FBA_CMD11(85,89) FBA_CMD8(85,89) FBA_CMD25(85,89) FBA_CMD10(85,89) FBA_CMD24(85,89) FBA_CMD22(85,89) FBA_CMD7(85,89) FBA_CMD21(85,89) FBA_CMD6(85,89) FBA_CMD25(85,89) FBA_CMD29(85,89) FBA_CMD28(85,89) FBA_CMD20(85,89) FBA_CMD14(85,89)

FBA_CMD12(85,89) FBA_CMD27(85,89) FBA_CMD26(85,89)

CLKA0(85) CLKA0#(85)

FBA_CMD3(85)

DQMA1(85) DQMA0(85)

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

12

SC10U6D3V5KX-1GP

R8802 243R2F-2-GP

FBA_CMD13(85,89) FBA_CMD15(85,89) FBA_CMD30(85,89)

C8819

DIS

C8821

DIS

12

C8823

DIS

1 2

DIS

C8820

DIS

SC1U6D3V2KX-GP

12

C8815

DIS

SC10U6D3V5KX-1GP

12

SC1U6D3V2KX-GP

MDA29

E3

MDA28

F7

MDA31

F2

MDA27

F8

MDA25

H3

MDA26

H8

MDA30

G2

MDA24

H7

MDA20

D7

MDA19

C3

MDA23

C8

MDA17

C2

MDA22

A7

MDA16

A2

MDA21

B8

MDA18

A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA[24..31] (85)

MDA[16..23] (85)

QSAP_2 (85) QSAN_2 (85)

QSAP_3 (85) QSAN_3 (85)

FBA_CMD2 (85)

FBA_CMD0 (85) FBA_CMD5 (85,89)

FBA_CMD4 (85,89)

SC1U6D3V2KX-GP

C8816

DIS

VRAM_ZQ2

2

VRAM2

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ2G63BFR-11C-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#T7 NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

MDA7

E3

MDA6

F7

MDA1

F2

MDA5

F8

MDA0

H3

MDA2

H8

MDA3

G2

MDA4

H7

MDA8

D7

MDA12

C3

MDA11

C8

MDA14

C2

MDA9

A7

MDA15

A2

MDA10

B8

MDA13

A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA[0..7] (85)

MDA[8..15] (85)

QSAP_1 (85) QSAN_1 (85)

QSAP_0 (85) QSAN_0 (85)

FBA_CMD2 (85)

FBA_CMD0 (85) FBA_CMD5 (85,89)

FBA_CMD4 (85,89)

72.41646.Q0U K4W1G1646G-BC11 Samsung 1Gb

72.42164.D0U K4W2G1646C-HC11 Samsung 2Gb

72.51G63.H0U H5TQ1G63DFR-11C Hynix 1Gb

72.52G63.A0U H5TQ2G63BFR-11C Hynix 2Gb

A A

http://hobi-elektronika.net

5

4

1D5V_VGA_S0 1D5V_VGA_S0

12

R8805

R8805 2K1R2F-GP

2K1R2F-GP

DIS

12

R8806

R8806 2K1R2F-GP

2K1R2F-GP

DIS

VRAM1_VREF

SCD1U10V2KX-5GP

12

C8803

DIS

3

12

R8808

R8808 2K1R2F-GP

2K1R2F-GP

DIS

12

R8807

R8807 2K1R2F-GP

2K1R2F-GP

DIS

VRAM2_VREF

SCD1U10V2KX-5GP

12

2

C8805

DIS

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Friday, November 26, 2010

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GPU-VRAM1,2 (1/2)

DB13 DIS

88 105

1

of

X00

5

SC1U6D3V2KX-GP

D D

SCD1U10V2KX-5GP

12

C8904

DIS

X7R

12

C8910

DIS

SCD1U10V2KX-5GP

12

X7R

12

C8905

DIS

C8901

DIS

SB SB

VRAM4_VREF

FBA_CMD9(85,88) FBA_CMD11(85,88) FBA_CMD8(85,88) FBA_CMD25(85,88)

C C

CLKA1(85) CLKA1#(85)

B B

FBA_CMD10(85,88) FBA_CMD24(85,88) FBA_CMD22(85,88) FBA_CMD7(85,88) FBA_CMD21(85,88) FBA_CMD6(85,88) FBA_CMD29(85,88) FBA_CMD23(85,88) FBA_CMD28(85,88) FBA_CMD20(85,88) FBA_CMD14(85,88)

FBA_CMD12(85,88) FBA_CMD27(85,88) FBA_CMD26(85,88)

SC1U6D3V2KX-GP

X7R

12

C8906

C8907

DIS

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

X7R

12

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

R8903 243R2F-2-GP

FBA_CMD19(85)

FBA_CMD13(85,88) FBA_CMD15(85,88) FBA_CMD30(85,88)

C8908

DIS

12

C8909

DIS

1 2

DIS

DQMA7(85) DQMA4(85)

C8902

DIS

SC10U6D3V5KX-1GP

12

C8923

DIS

VRAM_ZQ3

VRAM3

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ2G63BFR-11C-GP

4

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

RESET#

NC#T7

NC#L9 NC#L1 NC#J9 NC#J1

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

ODT

CS#

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3

SC1U6D3V2KX-GP

MDA37

E3

MDA32

F7

MDA38

F2

MDA33

F8

MDA39

H3

MDA34

H8

MDA35

G2

MDA36

H7

MDA59

D7

MDA60

C3

MDA56

C8

MDA63

C2

MDA61

A7

MDA62

A2

MDA58

B8

MDA57

A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA[32..39] (85)

MDA[56..63] (85)

QSAP_7 (85) QSAN_7 (85)

QSAP_4 (85) QSAN_4 (85)

FBA_CMD18 (85)

FBA_CMD16 (85) FBA_CMD5 (85,88)

FBA_CMD4 (85,88)

SC1U6D3V2KX-GP

12

C8914

DIS

12

C8920

DIS

VRAM4_VREF VRAM3_VREF

SCD1U10V2KX-5GP

12

C8915

DIS

SC1U6D3V2KX-GP

X7R

12

C8911

DIS

SCD1U10V2KX-5GP

12

C8916

DIS

X7R

12

C8918

DIS

SC10U6D3V5KX-1GP

12

R8904 243R2F-2-GP

FBA_CMD9(85,88) FBA_CMD24(85,88) FBA_CMD10(85,88) FBA_CMD13(85,88) FBA_CMD26(85,88) FBA_CMD22(85,88) FBA_CMD21(85,88) FBA_CMD5(85,88) FBA_CMD8(85,88) FBA_CMD23(85,88) FBA_CMD28(85,88) FBA_CMD4(85,88) FBA_CMD7(85,88) FBA_CMD14(85,88) FBA_CMD27(85,88)

FBA_CMD29(85,88) FBA_CMD6(85,88) FBA_CMD30(85,88)

FBA_CMD25(85,88) FBA_CMD15(85,88) FBA_CMD11(85,88)

C8919

DIS

1 2

DIS

CLKA1(85) CLKA1#(85)

DQMA6(85) DQMA5(85)

SC1U6D3V2KX-GP

1D5V_VGA_S01D5V_VGA_S0

X7R

12

C8917

DIS

SCD1U10V2KX-5GP

12

C8912

DIS

SC10U6D3V5KX-1GP

12

C8913

DIS

VRAM_ZQ4VRAM3_VREF

FBA_CMD16

2

VRAM4

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ2G63BFR-11C-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#T7 NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA40 MDA46 MDA44 MDA45 MDA42 MDA47 MDA41 MDA43

MDA50 MDA53 MDA49 MDA52 MDA48 MDA54 MDA51 MDA55

FBA_CMD19

FBA_CMD18

1

MDA[40..47] (85)

MDA[48..55] (85)

QSAP_6 (85) QSAN_6 (85)

QSAP_5 (85) QSAN_5 (85)

FBA_CMD20 (85,88)

FBA_CMD12 (85,88)

1D5V_VGA_S01D5V_VGA_S0

12

R8905

R8905 2K1R2F-GP

2K1R2F-GP

DIS

72.41646.Q0U K4W1G1646G-BC11 Samsung 1Gb

72.42164.D0U K4W2G1646C-HC11 Samsung 2Gb

72.51G63.H0U H5TQ1G63DFR-11C Hynix 1Gb

72.52G63.A0U H5TQ2G63BFR-11C Hynix 2Gb

A A

DIS

12

R8906

R8906 2K1R2F-GP

2K1R2F-GP

DIS

SCD1U10V2KX-5GP

12

C8922

DIS

http://hobi-elektronika.net

5

4

3

12

R8901

R8901 2K1R2F-GP

2K1R2F-GP

DIS

12

R8902

R8902 2K1R2F-GP

2K1R2F-GP

DIS

2

VRAM4_VREFVRAM3_VREF

SCD1U10V2KX-5GP

12

C8921

DIS

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

DB13 DIS

Friday, November 26, 2010

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GPU-VRAM3,4 (2/2)

1

of

89 105

of

89 105

of

89 105

X00

5

D D

C C

4

3

2

1

B B

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

5

4

http://hobi-elektronika.net

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

Reserved

DB13 DIS

1

X00

90 105Frid ay, November 26, 2010

X00

of

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

DB13 DIS

91 105Friday, November 26, 2010

of

1

of

X00

5

DCBATOUT DCBATOUT_VGA_CORE

PG9201

1 2

GAP-CLOSE-PWR

PG9202

D D

79.47612.3FL OSCON Lelon 47uF, 25V ESR<440mȍ, Iripple=230mA

C C

B B

1 2

GAP-CLOSE-PWR

PG9203

1 2

GAP-CLOSE-PWR

PG9204

1 2

GAP-CLOSE-PWR

PC9207

SC1U10V2KX-1GP

3D3V_VGA_S0

DGPU_PWR_EN(93)

X00 1120

5V_S5

SC1U10V2KX-1GP

PR9201

12

10R2F-L-GP

DIS

1 2

PR9204 11K5R2F-GP

12

DIS

X00 1120

PR9206 10KR2J-3-GPPR9206 10KR2J-3-GP

1 2

PD9201

2 1

DY

CH551H-30PT-GP

83.R5003.C8F

2ND = 83.5R003.08F

3D3V_VGA_S0

12

PR9212

DIS

10KR2J-3-GP

SSID = PWR.Plane.Regulator_GFX

12

DIS

PC9201

PWR_VGA_ CORE_VDD

DGPU_PWROK PWR_VGA_CORE_CS

8209A_EN/DEM_VGA

PWR_VGA_CORE_TON

PU9201

16

9

2

4

10

15

17

RT8208AGQW-GP

74.08208.073

RT8208A:74.08208.073

8209A_EN/DEM_VGA

12

PC9211

PC9211 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DIS

TON VDDP

VDD

PGOOD CS

EM/DEM

GND

DIS

BOOT

UGATE

PHASE LGATE

VOUT

4

DIS

PR9202 249KR2F-GP

1 2

PWR_VGA_CORE_BOOT

13

PWR_VGA_CORE_UGATE

12

PWR_VGA_CORE_PHASE

11

PWR_VGA_CORE_LGATE

8

7

G0

PWR_VGA_CORE_FB

3

FB

14

G1

PWR_VGA_CORE_D1

5

D1

PWR_VGA_CORE_D0

6

D0

PWR_VGA_CORE_VOUT

1

N12M-GS2/N12P-GV ES

P-State

PWR_VGA_CORE_D1

P8

Memory clock: 324MHz Engine clock: 405MHz

DIS

PR9205

1 2

2D2R3J-2-GP

PWRCNTL_0 (86)

PWRCNTL_1 (86)

L

SIR172DP-T1-GE3-GP

84.00172.037

2nd = 84.08030.037 DIS

DIS

PC9206

PWR_VGA_CORE_BOOT_C

PC9206

SCD1U25V3KX-GP

1 2

PWR_VGA_CORE_D0 VGA_CORE_PWR

PU9202

PU9204

0.925VL

SIR164DP-T1-GE3-GP

3

DCBATOUT_VGA_CORE

12

PC9204

678

DDD

SSS

GD

SSS

GD

123

4 5

20100929

678

DDD

SSS

GD

SSS

GD

123

4 5

VGACORE_VDD_SENSE(83)

PC9204

DIS

SCD1U25V3KX-GP

DIS

SCD1U25V3KX-GP

DIS

PL9201

1 2

DIS

L-D36UH-1-GP

68.R3610.20A

PWR_VGA_CORE_VOUT

VGACORE_VDD_SENSE

PWR_VGA_CORE_FB

12

PR9209

DY

105KR2F-1-GP

PWR_VGA_CORE_D0

1 2

PC9202

SC4D7U25V5KX-GP

DIS

10R2J-2-GP

PR9211

0R2J-2-GP

DIS

17K8R2F-GP

75KR2F-GP

12

PC9205

PR9203

PR9208

PR9210

12

SC4D7U25V5KX-GP

DIS

12

DIS

12

DIS

12

2

PC9203

SC4D7U25V5KX-GP

Vout=0.75V*(R1+R2)/R2

Design Current = 16A

24.14A<OCP<24A

VGA_CORE_PWR

PG9205

GAP-CLOSE-PWR-3-GP

SB 0930

VGACORE_VDD_SENSE_R

PC9209

12

DY

SC10P50V2JN-4GP

DIS

PC9210

12

SE330U2VDM-L-GP

12

PTC9202

DIS

SC10P50V2JN-4GP

DIS

PC9208

SCD1U10V2KX-4GP

12

PR9213

PR9213 75KR2F-GP

75KR2F-GP

DY

PWR_VGA_CORE_D1

79.33719.L01

SE330U2VDM-L-GP

12

PTC9204

DY

79.33719.L01 Panasonic cap 330uF 2V, ESR=9mohm

3D3V_AUX_S5

PR9217

DY

100KR2J-1-GP

1 2

PWR_VGA_ CORE_EN_R#

PQ9201

PQ9201 DMN66D0LDW-7-GP

DMN66D0LDW-7-GP

8209A_EN/DEM_VGA PQ9206_3

1

20100719

VGA_CORE VGA_CORE_PWR VGA_CORE

PG9206

1 2

GAP-CLOSE-PWR

PG9207

1 2

GAP-CLOSE-PWR

PG9208

1 2

GAP-CLOSE-PWR

PG9209

1 2

GAP-CLOSE-PWR

PG9210

1 2

GAP-CLOSE-PWR

PG9211

1 2

GAP-CLOSE-PWR

PG9212

1 2

GAP-CLOSE-PWR

PG9213

1 2

GAP-CLOSE-PWR

PG9214

1 2

GAP-CLOSE-PWR

PG9215

1 2

GAP-CLOSE-PWR

5

6

DY

123 4

PG9216

1 2

GAP-CLOSE-PWR

PG9217

1 2

GAP-CLOSE-PWR

PG9218

1 2

GAP-CLOSE-PWR

PG9219

1 2

GAP-CLOSE-PWR

PG9220

1 2

GAP-CLOSE-PWR

VGA_CORE_PWR

PR9215

PR9215 100R2J-2-GP

100R2J-2-GP

DY

1 2

DGPU_PWROK

12

PC9212

SC100P50V2JN-3GP

A A

DIS

5

DGPU_PWROK (22,83,87,93)

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01 H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037 L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037

Switching freq-->350KHz

Frequency setting 470K -->165KHz 200K -->323KHz 100K -->500KHz

4

3

DIS

PR9216

1 2

GND_SENSE_1

0R2J-2-GP

12

PR9207

PR9207 10R2J-2-GP

10R2J-2-GP

VGACORE_GND_SENSE

DIS

2

VGACORE_GND_SENSE (83)

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Size Document Num ber Rev Custom

Custom

Friday, November 26, 2010

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

RT8208A_+VGA_CORE

DB13 DIS

1

92 105

X00

of

http://hobi-elektronika.net

5

4

3

2

1

3D3V_S0 to 3D3V_VGA_S0 Transfer

84.08884.A37

MUXLESS

PC9326

1D5V_ENABLE

3D3V_VGA_S0

DIS

D

8

D

7

D

6

FDMC8884-GP

12

20KR2F-L-GP

MUXLESS

15V_S5

MUXLESS

1 2

3D3V_VGA discharge

PR9314

PR9314 470R2J-2-GP

470R2J-2-GP

MUXLESS

1 2

0628 Modify: Change PU9305 part number to 84.04468.037 same as U3601&U3602.

U9301

S

S S

S GD

GD

PR9330

1 2

PR9331

PR9331 100KR2J-1-GP

100KR2J-1-GP

1 2 3 45

1D5V_ENABLE_RC

0629 Modify: Add PC9332 10uF 0603.

12

PC9332

SC10U6D3V3MX-GP

MUXLESS

Discharge Circuit

1D5V_VGA_S03D3V_AUX_S5

12

PR9336

PR9336 470R2J-2-GP

470R2J-2-GP

MUXLESS

2ND = 84.2N702.031

84.2N702.J31

2N7002K-2-GP

DIS_1D5V_VGA_S0

D

MUXLESS

PQ9307

G

S

1D5V_VGA_EN#

DY

PR9301

3D3V_S0

PR9316

PR9316 10KR2F-2-GP

10KR2F-2-GP

MUXLESS

D D

dGPU mode

1 2

DGPU_PWR_EN#

IGPU

IGPU with BACO

DGPU_PWR _EN#(18)

C C

L

H

L

SCD1U10V2KX-5GP

PR9319

1 2

10KR2F-2-GP

MUXLESS

3D3V_S0

PC9324

MUXLESS

2nd = 84.DM601.03F

0906

PR9321

1 2

10KR2J-3-GP

G

S

1D5V_VGA_S0

Park_Madison Does Not Support BACO, So follow Old Sequence Seymour_Whistler_Robson Support BACO, So Change Sequence

0629 Modify: Reserved PD9301 connect DGPU_PWR_EN to PWR_1D5V_EN for power down sequence.

B B

DGPU_PWR _EN(92)

DGPU_PWROK(22,83,87,92)

PD9301

2 1

DY

CH551H-30PT-GP

1 2

0R2J-2-GP

MUXLESS

0628 Modify: Simplify 1D5V_ENABLE control circuit. Rmoved PQ9305,PR9327,PR9328 PQ9306.

MUXLESS

1 2

0R2J-2-GP

DMP2130L-7-GP

S

12

PR9319_1

PQ9303

PQ9303 2N7002KDW-G P

2N7002KDW-G P

84.2N702.A3F

MUXLESS

2N7002K-2-GP

MUXLESS

PQ9304

84.2N702.J31

2ND = 84.2N702.031

PQ9302_G

G

2ND = 84.03413.A31

MUXLESS

G

5

6

123 4

DGPU_PWR_EN

D

3.3V_RUN_VGA_1

change low Rds(on) MOSFET

AO4468, SO-8 Id=?A, Qg=9~12nC Rdson=17.4~22m ohm

1D5V_VGA_EN#

1 2

100KR2J-1-GP

PR9332

MUXLESS

PQ9305

2N7002KDW-G P

84.2N702.A3F

2nd = 84.DM601.03F

MUXLESS

PR9326

1D5V_VGA_EN

0630 Modify:

Rename PWR_1D8V_EN to 1D8V_VGA_EN.

Rename PWR_1D5V_EN to 1D5V_VGA_EN.

PQ9302

D

84.02130.031

MUXLESS

DGPU_PWR _EN (92)

1D5V_S3 1D5V_VGA_S0

12

PC9327

MUXLESS

SC10U6D3V3MX-GP

SCD01U50V2KX-1GP

5

6

123 4

GGDDSS

NV do not need 1.8V

G9731F11U-GP for 1V_S0

3D3V_VGA_S0 should ramp-up before VGA_Core

VGA_Core should ramp-up before 1V_VGA_S0

1V_VGA_S0 should ramp up before 1D8V_VGA_S0

so 1V_VGA_S0 EN have to fine tune RC delay after VGA_Core

3D3V_VGA_S0

0629 Modify: Reserved PD9302 connect DGPU_PWR_EN to PWR_1V_EN for power down sequence.

DGPU_PWR _EN(92)

5V_S5

PR9312

1 2

1KR2F-3-GP

PD9302

2 1

CH551H-30PT-GP

1 2

MUXLESS

DY

PR9313

0R2J-2-GP

0927

MUXLESS

0630 Modify Change PR9312 to 10K 0402 from 0ohm and stuff PC9318.

3D3V_VGA_S0

12

PR9324

PR9324 2K2R2J-2-GP

2K2R2J-2-GP

DY

PWR_1V_PGOOD

PWR_1V_VDD

12

PC9313

SC1U6D3V2KX-GP

MUXLESS

SC1U6D3V2KX-GP

MUXLESS

1D5V_S3

PC9314

SC10U6D3V5MX-3GP

higih-side R + low-side R

Vout = 0.8 x

PWR_1V_EN

PC9318

SCD1U10V2KX-5GP

12

MUXLESS

12

low-side R

0714 Modify: Change LDO to Max 4A.

PU9303

9 8

6 5

1

GND

2

VEN

ADJ

3

POK7VO#3

4

VO#4

VPP VIN

G9731F11U-GP

MUXLESS

74.G9731.03D

2nd = 74.05930.03D

PR9315

PR9315 15KR2F-GP

15KR2F-GP

MUXLESS

1 2

PR9322 4K7R2F-GP

1 2

PWR_1V_ADJ

1 2

Vo(cal.)=1.05V

MUXLESS

PC9315

DY

SC100P50V2JN-3GP

12

MUXLESS

Iomax<4A

0806

PG9308

1 2

GAP-CLOSE-PWR

PG9307

1 2

GAP-CLOSE-PWR

PG9305

1 2

1V_PWR 1D05V_VGA_S0

GAP-CLOSE-PWR

PG9306

1 2

GAP-CLOSE-PWR

12

PC9316

PC9317

SC10U6D3V5MX-3GP

DY

SC10U6D3V5MX-3GP

DY

SC10U6D3V5MX-3GP

PR9318

PWR_1V_EN#

1 2

DY

3D3V_S5

A A

5

4

http://hobi-elektronika.net

3

DY

100KR2J-1-GP

PQ9311

2N7002KDW-G P

84.2N702.A3F

2nd = 84.DM601.03F

PWR_1V_EN

5

6

DY

123 4

PQ9308_3

PR9317

DY

470R2J-2-GP

12

1D05V_VGA_S0

Z40-HR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

DISCRETE VGA POWER

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, Novemb er 26, 2010

Friday, Novemb er 26, 2010 Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

DB13 DIS

1

93 105

of

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Reserved

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

94 105Friday, November 26, 2010

of

94 105Friday, November 26, 2010

of

94 105Friday, November 26, 2010

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

http://hobi-elektronika.net

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

95 105Friday, November 26, 2010

of

X00

5

D D

4

3

2

1

C C

B B

A A

(Blanking)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved

Size Document Number Rev

A3

5

4

http://hobi-elektronika.net

3

2

A3

Date: Sheet

Reserved

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

96 105Friday, November 26, 2010

of

1

of

X00

5

4

3

2

1

X00 1111 Change to ZZ.00PAD.H91

D D

ODDH1

H5

H5 HOLE276R150-GP

HOLE276R150-GP

1

ZZ.00PAD.H91

20100913 Change H11~H13 to ZZ.00PAD.V71 from ME/Lawrence updated latest DXF&EMN on X01.

C C

H1

H1 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

H6

H6 HOLE276R150-GP

HOLE276R150-GP

1

ZZ.00PAD.H91

H2

H2 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

ODDH1 STF237R117H83-1-GP

STF237R117H83-1-GP

1

34.4CK01.001

H3

H3 HOLE197R166-1-GP

HOLE197R166-1-GP

1

H4

H4 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

H7

H7 HOLE276R150-GP

HOLE276R150-GP

1

ZZ.00PAD.H91

H8

H8 HOLE276R150-GP

HOLE276R150-GP

1

ZZ.00PAD.H91

H9

H9 HOLE276R150-GP

HOLE276R150-GP

1

ZZ.00PAD.H91

EMI Request

20100723 EMI request:

EC9738 SCD1U10V2KX-5GP

3D3V_S0 5V_S5

B B

2010/07/14 EMI request 2010/07/21 rename C3205 to EC9723

CLK_PCH_48M

A A

12

DY

EC9723

SCD1U10V2KX-5GP

CLK_PCH_48M(20)

5

5V_S0 3D3V_S0

5V_S5 +DC_IN

5V_S5 DCBATOUT

5V_S5 5V_S0

1D05V_VTT 3D3V_S0

5V_S0 3D3V_S0

1D05V_VTT 3D3V_S0

3D3V_S0 5V_S0

1D5V_S3 5V_S5

4

12

DY

EC9739 SCD1U10V2KX-5GP

12

DY

EC9740 SCD1U10V2KX-5GP

12

DY

EC9741 SCD1U10V2KX-5GP

12

DY

EC9742 SCD1U10V2KX-5GP

12

DY

EC9743 SCD1U10V2KX-5GP

12

DY

EC9744 SCD1U10V2KX-5GP

12

DY

EC9745 SCD1U10V2KX-5GP

12

DY

EC9746 SCD1U10V2KX-5GP

12

DY

EC9747 SCD1U10V2KX-5GP

12

DY

1. Reserve 3D3V_S0 to 5V_S5 EC9738.

2. Reserve 5V_S0 to 3D3V_S0 EC9739.

3. Reserve 5V_S5 to +DC_IN EC9740.

4. Reserve 5V_S5 to DCBATOUT EC9741.

5. Reserve 5V_S5 to 5V_S0 EC9742.

6. Reserve 1D05V_VTT to 3D3V_S0 EC9743.

7. Reserve 5V_S0 to 3D3V_S0 EC9744.

8. Reserve 1D05V_VTT to 3D3V_S0 EC9745.

9. Reserve 3D3V_S0 to 5V_S0 EC9746.

10.Reserve 1D5V_S3 to 5V_S5 EC9747.

http://hobi-elektronika.net

X00 1111 Add 34.4CK01.001

HTH1

HTH1 STF237R117H83-1-GP

STF237R117H83-1-GP

1

34.4CK01.001

3

RF Request

1D05V_VTT

12

DY

EC9725

EC9724

SCD1U10V2KX-5GP

3D3V_S0

3D3V_S0 5V_S0

12

DY

EC9726

SCD1U10V2KX-5GP

EC9727 SCD1U10V2KX-5GP

12

1D05V_VTT

DY

EC9734 SCD1U10V2KX-5GP

12

DY

EC9733 SCD1U10V2KX-5GP

12

DY

2

5V_S5

12

DY

EC9728

SCD1U10V2KX-5GP

Title

Size Document Number Rev

A3

Date: Sheet

5V_S05V_S5

12

DY

EC9729

20100723 RF request:

1. Reserve EC9724~EC9726 at 1D05V_VTT.

2. Reserve EC9727 and EC9734 between 3D3V_S0 and 1D05V_VTT.

3. Reserve EC9728 and EC9729 at 5V_S5.

4. Reserve EC9730~EC9732 at 5V_S0.

5. Reserve EC9735~EC9737 at 3D3V_S0.

UNUSED PARTS/EMI Capacitors

12

DY

EC9730

SCD1U10V2KX-5GP

DB13 DIS

5V_S0

12

DY

EC9731

EC9732

SCD1U10V2KX-5GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

3D3V_S01D05V_VTT

12

DY

EC9735

97 105Friday, November 26, 2010

3D3V_S0

12

DY

EC9736

SCD1U10V2KX-5GP

of

3D3V_S0

12

DY

EC9737

SCD1U10V2KX-5GP

X00

5

4

3

2

1

Huron River Platform Power Sequence

(AC mode)

+RTC_VCC

RTC_RST#

Within logic high level and disable if it is less than the logic low level.

D D

V5REF_Sus must be powered up before VccSus3_3, or after VccSus3_3 within

0.7 V. Also, V5REF_Sus must power down after VccSus3_3, or before VccSus3_3 within 0.7 V.

Not floating.

Sense the power button status

This signal has an internal pull-up resistor and has an internal 16 ms de-bounce on the input.

C C

V5REF must be powered up before Vcc3_3, or after Vcc3_3 within 0.7 V. Also, V5REF must power down after Vcc3_3, or before Vcc3_3 within 0.7 V.

B B

This signal represents the Power Good for all the non-CORE and non-graphics power rails.

DCBATOUT

3D3V_AUX_S5

S5_ENABLE

5V_S5

3D3V_S5

+5VA_PCH_VCC5REFSUS

PM_RSMRST#(EC Delay 40ms)

PCH_SUSCLK_KBC

AC_PRESENT

KBC_PWRBTN#

AC

PM_PWRBTN#

AC

PM_SLP_S4#

PM_SLP_S3#

PM_LAN_ENABLE

1D5V_S3

DDR_VREF_S3(0.75V)

5V_S0

3D3V_S0

+5VS_PCH_VCC5REF

1D5V_S0

1D8V_S0

0D75V_S0

RUNPWROK

1D05V_VTT

1.05VTT_PWRGD

0D85V_S0

D85V_PWRGD

CPU SVID BUS

VCC_CORE

VCC_GFXCORE

IMVP_PWRGD

CLK_EXP_P

PWROK

VDDPWRGOOD

H_CPUPWRGD

SYS_PWROK

PLT_RST#

DMI

AC

T1

PM_PWRBTN#

>9ms

T2

T3

T4

3D3V_AUX_KBC

T10

0D85V_S0

ALL_SYS_PWRGD=D85V_PWRGD

D85V_PWRGD

1D8V_S0

T5

T6

>10ms

Press Power button

T11

>30us

T12

T13

T14

T15

T17

T18

T19

T24

>99ms

T27

2ms< <650ms

T29

red word: KBC GPIO

KBC GPIO34 control power on by 3V_5V_EN

>5ms

<90msT7T8

0ms<

>16ms

T9

+5V_RUN & +3.3V_RUN need meet 0.7V difference

T16

T20

>0us

T28

>1ms

T30

>2ms

T31

5ms< <650ms

T32

KBC GPIO43 to PCH

PCH to KBC GPIO00

KBC GPO84 to PCH

Platform to KBC PSL_IN2

KBC GPIO20 to PCH

PCH to KBC GPIO44

PCH to KBC GPIO01

KBC GPIO23 to LAN

Enable by PM_SLP_S4#

T21

T22

SetVID ACK

T33

1ms<

T35

1D8V_S0 & 1D5V_S3 power ready

VT357FCX PGOOD

T23

TPS51461RGER PGOOD

<2000us50us<

T25

T26

ISL95831 PGOOD to system

<5ms

KBC GPIO77 to PCH

>0ms

<100ms

T34

>1ms+60us

T36

PCH to all system

<200us

PCH to CPU

(DC mode)

Sense the power button status

V5REF_Sus must be powered up before VccSus3_3, or after VccSus3_3 within

0.7 V. Also, V5REF_Sus must power down after VccSus3_3, or before VccSus3_3 within 0.7 V.

V5REF must be powered up before Vcc3_3, or after Vcc3_3 within 0.7 V. Also, V5REF must power down after Vcc3_3, or before Vcc3_3 within 0.7 V.

This signal represents the Power Good for all the non-CORE and non-graphics power rails.

+RTC_VCC

RTC_RST#

DCBATOUT

3D3V_AUX_S5

KBC_PWRBTN#

3D3V_AUX_KBC

S5_ENABLE

5V_S5

3D3V_S5

+5VA_PCH_VCC5REFSUS

PM_PWRBTN#

PM_RSMRST#

PCH_SUSCLK_KBC

DC

PM_SLP_S4#

PM_SLP_S3#

PM_LAN_ENABLE

1D5V_S3

DDR_VREF_S3(0.75V)

5V_S0

3D3V_S0

+5VS_PCH_VCC5REF

1D5V_S0

1D8V_S0

0D75V_S0

RUNPWROK

1D05V_VTT T21

1.05VTT_PWRGD

0D85V_S0

D85V_PWRGD

CPU SVID BUS

VCC_CORE

VCC_GFXCORE

IMVP_PWRGD

CLK_EXP_P

PWROK

VDDPWRGOOD

H_CPUPWRGD

SYS_PWROK

PLT_RST#

DMI

T1

PCH_RSMRST#

red word: KBC GPIO

>9ms

T2

Press Power button

T10

>30us

0D85V_S0

ALL_SYS_PWRGD=D85V_PWRGD

T27

D85V_PWRGD

2ms< <650ms

1D8V_S0

Platform to KBC PSL_IN2

T3

T4

T5

T6

T11

T12

T13

T14

T15

T17

T18

T19

T24

>99ms

T28

T29

EC_ENABLE#_1(GPIO31) keep low

KBC GPIO34 control power on by 3V_5V_EN

+5V_ALW & +3.3V_ALW need meet 0.7V difference

T7

T8

T16

>0us

>16ms

>10ms

T30 T31

5ms< <650ms

T32

KBC GPIO20 to PCH

KBC GPIO43 to PCH

PCH to KBC GPIO00

>5ms

T9

+5V_RUN & +3.3V_RUN need meet 0.7V difference

T20

SetVID ACK

>1ms

>2ms

PCH to KBC GPIO44

PCH to KBC GPIO01

KBC GPIO23 to LAN

Enable by PM_SLP_S4#

1D8V_S0 & 1D5V_S3 power ready

T22

T23

<2000us50us<

T25

T26

<5ms

>0ms

T33

<100ms

1ms<

T35

VT357FCX PGOOD

TPS51461RGER PGOOD

ISL95831 PGOOD to system

KBC GPIO77 to PCH

PCH to CPU

>1ms+60us

T34

PCH to all system

<200us

T36

N12P-GV Power-Up/Down Sequence

DGPU_PWR_EN#(Discrete only)

3D3V_VGA_S0(VDD33)

8209A_EN/DEM_VGA(Discrete only)

VGA_CORE(NVVDD)

A A

DGPU_PWROK(Discrete only)

1D5V_VGA_S0(FBVDDQ)

First rail to power down

Last rail to power down

3D3V_S0

tPOWER-OFF

<10ms

tNVVDD

>0ms

tNV-FBVDDQ

>0ms

For power-down, reversing the ramp-up sequence is recommended.

5

4

PCH GPIO54 output

RT8208 PGOOD

VGA_CORE,1V_VGA_S0 1D5V_VGA_S0,3D3V_VGA_S0

http://hobi-elektronika.net

3

Title

Size Document Number Rev

A1

Friday, November 26, 2010

Date: Sheet

2

Date: Sheet of

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Power Sequence

DB13 DIS

X00

98

of

105

5

4

3

2

1

Wistron HURON RIVER POWER UP SEQUENCE DIAGRAM

AC

Adapter in

D D

PWR_CHG_ACOK

DC

Battery

C C

BT+

Page39

Page38

SWITCH

BQ24745 Charger

Page40

-1

Power Button

AD+

Page40

DCBATOUT

ACOK

5V_S5 DCBATOUT

-6.1

-4

AC_IN#

KBC_PWRBTN#

PM_SLP_S4#

PM_SLP_S3#

-3.1 -3.1 -3.1

3V_5V_EN

-3.3

15V_S5

PUMP

-5

-2

BJT

SLP_S4# SLP_S3#

RSMRST#

PWRBTN#

Cougar Point PCH

APWROK

PWROK

SYS_PWROK

3

PM_SLP_S4#

4

PM_SLP_S3#

DRAMPWRGD

PROCPWRGD

PLTRST#

1

PWR_5V3D3V_ENC

ENC

RT8223MGQW DC/DC (3V/5V)

VIN

-3

3D3V_AUX_KBC

GPIO70

KBC NPCE795P

GPIO6

GPIO44

GPIO01

GPIO34

GPIO43

GPIO20

Page27

GPIO77

LL1

LL2

VREG5

VREG3

PGOOD

Page41

-3.2

5V_S5

3D3V_S5

5V_AUX_S5

3D3V_AUX_S5

3V_5V_POK

-3.1

S5_ENABLE

-2.1

PM_RSMRST#

PM_PWRBTN#

S0_PWR_GOOD

SYS_PWROK

2

10

S5_ENABLE

11

12

13

PLT_RST#

SWITCH

Page37

SWITCH

Page37

SWITCH

Page37

5V_S0

3D3V_S0

1D5V_S0

0D75V_EN

PM_DRAM_PWRGD

H_CPUPWRGD

AND GATE

B

A

Y

VDDPWRGOOD

H_CPUPWRGD_R

BUF_CPU_RST#

SM_DRAMPWROK

UNCOREPWRGOOD

Sandy Bridge CPU

RSTIN#

SVID

3

PM_SLP_S4#

4

PM_SLP_S3#

SVID

8

-6

DCBATOUT5V_S5

VDDP VIN

EN

TPS51116RGER

Page46

5V_S5 3D3V_S5

VIN

VDD

TPS53311RGTR

EN

Page47

VOUT

REF

VTT

PGD

VOUT

PGD

1D5V_S3

DDR_VREF_S3

0D75V_S0

RUNPWROK

5

1D8V_S0

RUNPWROK

5

B B

5

RUNPWROK

5a

1.05VTT_PWRGD

8

SVID

A A

6

D85V_PWRGD

7

IMVP_VR_ON

5

V5IN VIN

TPS51218DSCR

EN

Page45

DCBATOUT

5V_S5

VDDP

VIN

RT8208BGQW

EN

Page48

DCBATOUT

VIN

SVID

VR

ISL95831HRTZ

VR_ON

Page42 & 43 & 44

OUTPUT

PGOOD

VOUT

PGOOD

VOUT

PGOOD

1D05_VTT

1.05VTT_PWRGD

5a

0D85_S0

D85V_PWRGD

6

VCC_CORE

VCC_GFXCORE

IMVP_PWRGD

S0_PWR_GOOD

IMVP_PWRGD

AND GATE

A

B

Y

10

SYS_PWROK

-7

RTC_AUX_S5

-5

3D3V_AUX_S5

-8

+RTC_VCC

RTC battery

9

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

DB13 DIS

1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

99

of

X00

105

Power Up Sequence: -8 ~ 13

4

http://hobi-elektronika.net

3

2

Title

Power Up Sequence Diagram

Size Document Number Rev

A2

Friday, Novemb er 26, 2010

Date: Sheet

5

4

3

2

1

Adapter

D D

AO4407A

DCBATOUT

1D5V_S3

TPS51216

TPS51218

POLYSW

DCBATOUT_LCD

Charger

TPCA8062

1D5V_S0

0D75V_S0DDR_VREF_S3

1D05V_VTT

Battery

BQ24745

+PBATT

TPS51427

C C

15V_S5

3D3V_AUX_S5

5V_AUX_S5

VCC_CORE

VT1317VT1317

VCC_GFXCORE

5V_S5

G547F2P81

5V_USB1_S3

TPCA8062

5V_S0

TPS51461

0D85V_S0

AO4468

3D3V_S0

3D3V_S5

TPS51311

1D8V_S0

AO3403

3D3V_LAN_S5

B B

G5285T11

LCDVDD

RTS5138

3D3V_CARD_S0

Power Shape

A A

5

4

Regulator LDO Switch

http://hobi-elektronika.net

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Power Block Diagram

DB13 DIS

Taipei Hsien 221, Taiwan, R.O.C.

100 105Friday, November 26, 2010

of

1

of

X00

Dell DB13 DIS Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual