A
B
C
D
E
MODEL NAME : ZAP00
PROJECT CODE : ANRZAP0000
1 1
PCB NO : DA8000WL000 LA-A301P M/B
DA4001XN000 LS-A301P LOGO/B
DA4001XO000 LS-A302P IND/B
DA4001XP000 LS-A303P BTN/B
DA4001XQ000 LS-A304P NGFF/B
FPC NO : LF-A301P HEAD/B
LF-A302P SLIT_R/B
LF-A303P SLIT_L/B
LF-A304P KB/B
Compal Confidential
2 2
Schematic Document
Crescent Bay Platform
Intel Broadwell ULT
2014-09-23 Rev: 1.0
3 3
X76@ : 76 level
46@ : 46 level
@ : Nopop component
CONN@ : Connector component
XDP@ : XDP function
EMI@ : EMI parts
@EMI@ : Reserve EMI parts
ESD@ : ESD parts
@ESD@ : Reserve ESD parts
RF@ : RF parts
BDWI5@ : CPU BDW I5
H@:Haswell
4 4
B@:Broadwell
sualaptop365.edu.vn
A
B
DAX
PCB
DAZ16C00100
R1@
DAX
PCB
DAZ16C00101
R3@
C
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Title
Title
Title
Cover page
Cover page
Cover page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
1 56Thursday, September 25, 2014
1 56Thursday, September 25, 2014
1 56Thursday, September 25, 2014
1.0
1.0
1.0
A
B
C
D
E
eDP
P.19
eDP 1.3
panel
1 1
HDMI
P.21
connector
P.20
mini DP
PS8407A
re-driver
P.21
HDMI 1.4a (DDI1)
DP 1.2 (DDI2)
P.06~16
FFS
P.36 P.40 P.06
LNG3DMTR
Memory Bus Dual Channel
1.35V,DDR3L,1600 MHz
Fan control
NCT7718W
W83L771AWG-2
204pin SO-DIMM x2
XDP connector
P.17,18
connector
USB3.0 port2
P.22~29
dGPU
nVIDIA
N15P-GX,50W
4pcs GDDR5
PCI-E x4
PCIE MUX
PERICOM
P.34
PCI-E(GEN2)x4
port5(L0~L3)
Crescent Bay Platform
Broadwell ULT
PI3PCIE3415
2 2
Video
docking
P.34
PCI-E x4
CDR_I2C
USB3.0 port4
USB2.0 port3
Broadwell U Processor
+
Wildcat Point-LP PCH
NGFF (M.2)WLAN+BT
P.32
QCA killer 1525(E Key)
RJ45
connector
3 3
LAN(Gigabit)
Killer E2201
P.30P.30
PCI-E2.0 port3
USB2.0 port7
PCI-E2.0 port4
15W , BGA 1168 balls
USB2.0 port1
USB3.0 port2
USB2.0 port0
USB3.0 port3
USB2.0 port2
USB2.0 port4
USB2.0 port5
USB2.0 port6
CDR_I2C
SATA3.0 port0 ; option1
SATA3.0 port0 ; option2
SATA3.0 port1 ; option2
USB connector 1 , Right side
USB power share
USB connector 2 , Left side 1
USB connector 3 , Left side 2
Touch screen
Digital camera(with digital MIC)
AlienFX / ELC , C8051F383-GQ
ELC PWM expander , TLC59116F
2.5”HDD or SSD
Dual 2280 M.2 SATA support via
a 7mm drive caddy(with redriver IC)
P.38,39
P.38,39
LED SET
P.33
P.33
P.33
P.19
P.19
P.37
P.36
P.36
P.31
SPI ROM
P.09
8MB
DC in
1.05V
Battery
3V/5V
System
4 4
1.35V
1.5V
CPU
Vcore
A
dGPU
Core
Charger
dGPU
1.35V
sualaptop365.edu.vn
SPI
Int. KBD
ENE KC3810
B
P.41
P.41
LPC Bus
ENE KB9022
P.41
HD Audio
I2C(400KHz)
PS2
C
Touch pad
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
P.38
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Audio codec
Realtek
ALC3234
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
digital MIC
Speaker
Headphone/MIC Global headset
combo JACK
Headphone/MIC Retaskable
combo JACK
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block diagram
Block diagram
Block diagram
LA-A301P
LA-A301P
LA-A301P
E
P.31
P.31
P.31
1.0
1.0
2 56Friday, September 19, 2014
2 56Friday, September 19, 2014
2 56Friday, September 19, 2014
1.0
A
Board ID Table for AD channel
Vcc 3.3V +/- 1%
Board ID
10
11
12
13
14
15 330K +/- 1%
16
17
18
19 NC
100K +/- 1%Ra
Rb V min
0
1
2
3
4
5
6
0 0.000V
12K +/- 1%
15K +/- 1%
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
7 56K +/- 1%
8
75K +/- 1% 1.398V
9
100K +/- 1%
160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%
430K +/- 1%
560K +/- 1%
750K +/- 1%
AD_BID
V typ
AD_BID
0.000V 0.300V
0.347V
0.354V
0.423V 0.430V
0.541V
0.691V
0.807V
0.550V
0.702V
0.819V
0.978V 0.992V
1.169V
1.185V
1.414V 1.430V
1.634V
1.650V
1.849V 1.865V
2.015V
2.185V
2.316V
2.031V
2.200V
2.329V
2.395V 2.408V
2.521V
2.667V
2.791V
2.533V
2.677V 0xCA - 0xD3
2.800V
2.905V 2.912V
3.300V
V
AD_BID
0.360V
0.438V
0.559V
0.713V
0.831V
1.006V
1.200V
1.667V
1.881V130K +/- 1%
2.046V
2.215V
2.343V
2.421V
2.544V
2.687V
2.808V
2.919V
3.300V
max
EC AD3
0x00 - 0x0B
0x0C - 0x1C
0x1D - 0x26
0x27 - 0x30
0x31 - 0x3B
0x3C - 0x46
0x47 - 0x54
0x55 - 0x64
0x65 - 0x76
0x77 - 0x87
0x88 - 0x96
0x97 - 0xA3
0xA4 - 0xAD
0xAE - 0xB7
0xB8 - 0xC0
0xC1 - 0xC9
0xD4 - 0xDC
0xDD - 0xE6
0xE7 - 0xFF3.000V
NVIDIA
Graphic
AMD
Graphic
ULT
1 1
Board ID table and PCB version
Rb
ID
0
1
2
3
4
5 33K
6 43K
HSW(Haswell)
0
EVT-1(R0.1) , EVT-2(R0.1)
12K
EVT-3(R0.2)
15K
DVT-1(R0.3) , DVT1.1(R0.4)
20K
DVT-2(R0.5)
27K
Not use
Pilot(R1.0) Pilot(R1.0)
BDW(Broadwell)
EVT-1(R0.1)
EVT-2(R0.2)
DVT-1(R0.5)
Not use
DVT-1.1(N16P,R0.6)
DVT-2(R1.0)Not use
Port1
Port2
Port3
Port4
Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Lane 1
Lane 2
Lane 3
Lane 4
USB3.0
Left side 1
Right side (power share)
Left side 2
Caldera
USB2.0
Left side 1
Right side (power share)
Left side 2
Caldera
Touch screen
Camera
ELC
BT
PCI EXPRESS
WLAN(M.2 Card)
10/100/1000 LAN
Symbol Note :
: means Digital Ground
: means Analog Ground
sualaptop365.edu.vn
CLOCK SIGNAL
CLKOUT_PCIE0
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE4
CLKOUT_PCIE5
Lane 5
PCIE 4x MUX
Lane 6
SATA
M.2 Card WLAN
10/100/1000 LAN
N15P-GX , Video docking
SATA1
SATA2
HDD or NGFF SSD1SATA0
NGFF SSD2
SATA3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes list
Notes list
Notes list
LA-A301P
LA-A301P
LA-A301P
4 56Friday, September 19, 2014
4 56Friday, September 19, 2014
4 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
D D
C C
SMBUS Address [0x90]
ULT
Broadwell
AP2
AH1
AN1
AK1
AU3
AH3
79
80
MEM_SMBCLK
MEM_SMBDATA
SML0CLK
SML0DATA
SML1_SMBCLK
EC_SMB_CK2
EC_SMB_DA2
2.2K
2.2K
1K
1K
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
N-MOS
N-MOS
+3.3V_ALW_PCH
+3.3V_ALW_PCH
N-MOS
N-MOS
+3VALW_EC
EC_SMB_CK2
EC_SMB_DA2SML1_SMBDATA
10K
10K
+3VS
DDR_XDP_WLAN_TP_SMBCLK
DDR_XDP_WLAN_TP_SMBDAT
N-MOS
N-MOS
UF1,FAN8
7
SMBUS Address [0x98]
0 ohm
0 ohm
1.8K
1.8K
+3VS_VGA
VGA_SMB_CK2
VGA_SMB_DA2T4T3
DDR_XDP_SMBCLK_R1
DDR_XDP_SMBDAT_R1
UV1
GPU
SMBUS Address [0x9E]
202
200
202
200
DIMMA
DIMMB
XDP
53
51
FFS
4
6
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
KBC
B B
KB9012A4
77
78
EC_SMB_CK1
EC_SMB_DA1
2.2K
2.2K
+3VALW_EC
UF2,FAN8
7
0 ohm
0 ohm
SMBUS Address [0x9A]
SCL
SDA
PU700
12
Charger
11
SMBUS Address [0x12]
100 ohm
100 ohm
I2C switch
CLK_SMB
DAT_SMB
CDR_I2C_CLK 7
CDR_I2C_DAT
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
PBATT1
7
6
Video
docking
6
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SMBUS Address [0x16]
SMBUS Address [TBD]
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SMBus block diagram
SMBus block diagram
SMBus block diagram
LA-A301P
LA-A301P
LA-A301P
1
5 56Friday, September 19, 2014
5 56Friday, September 19, 2014
5 56Friday, September 19, 2014
1.0
1.0
1.0
5
UC1
UC1
UC1
4
3
2
1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA00007LO2L
R1HSWI5@
UC1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA00007LO1L
D D
R3HSWI5@
PCH_JTAG_TDO<8>
C C
PCH_JTAG_TDI<8>
PCH_JTAG_TMS<8>
RUNPWROK
@ESD@
CC5
0.1U_0402_10V7K
Place CC5
close to UC4
+1.05VS
RC16 49.9_0402_1%@
RC18 62_0402_5%
B B
A A
DDR3 COMPENSATION SIGNALS
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
S IC A31 FH8065801620203 QH17 E0 2G
SA00008991L
R1BDWI5@
UC1
S IC A31 FH8065801620203 QH17 E0 2G
SA00008992L
R3BDWI5@
1 2
TDI_XDP TDI_XDP_R
@
RC4 0_0402_1%
1
2
1 2
1 2
5
H_CATERR#
H_PROCHOT#
12
RC25
10K_0402_5%
RUNPWROK<41>
S IC A31 FH8065801620004 QH3E F0 2.4G
SA000089A1L
R1BDWI7@
UC1
S IC A31 FH8065801620004 QH3E F0 2.4G
SA000089A2L
R3BDWI7@
HDMI
mini DP
+3VS
CC1
12
0.1U_0402_10V7K
1 2
TDO_XDP
@
RC3 0_0402_1%
RUNPWROK
1 2
@
RC5 0_0402_1%
RUNPWROK
1 2
TMS_XDP
@
RC6 0_0402_1%
RUNPWROK
TRST#_XDP XDP_TRST#
RUNPWROK
PCH_JTAG_JTAGX<8>
PCH_JTAG_TCK<8>
H_CPUPWRGD
1
CC8
100P_0402_50V8J
ESD@
2
12
SM_RCOMP0
RC29200_0402_1%
12
SM_RCOMP1
RC30120_0402_1%
12
SM_RCOMP2
RC31100_0402_1%
@
UC3
14
VCC
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
13
4OE
74CBTLV3126BQ_DHVQFN14_2P5X3
PCH_JTAG_RST#
PCH_JTAG_TDO TDI_XDP_R
PCH_JTAG_TCK
H_PROCHOT#<41,47,48>
sualaptop365.edu.vn
DDR3_DRAMRST#_CPU<17,18>
@
1 2
@
DDR_PG_CTRL<17>
Place CC9
on BOT
DDI1_LANE_N0<21>
DDI1_LANE_P0<21>
DDI1_LANE_N1<21>
DDI1_LANE_P1<21>
DDI1_LANE_N2<21>
DDI1_LANE_P2<21>
DDI1_LANE_N3<21>
DDI1_LANE_P3<21>
DDI2_LANE_N0<20>
DDI2_LANE_P0<20>
DDI2_LANE_N1<20>
DDI2_LANE_P1<20>
DDI2_LANE_N2<20>
DDI2_LANE_P2<20>
DDI2_LANE_N3<20>
DDI2_LANE_P3<20>
3
XDP_TDOPCH_JTAG_TDO
1B
6
XDP_TDI
2B
8
XDP_TMS
3B
11
4B
7
GND
15
GND PAD
12
XDP_TRST#
RC170_0402_1%
XDP_TCLK
RC190_0402_1%
12
TDO_XDP
RC200_0402_5% XDP@
12
RC230_0402_5% XDP@
12
XDP_TCLK
RC240_0402_5% XDP@
H_CATERR#
1 2
@ESD@
CC9
0.047U_0402_16V4Z
PECI_EC
H_PROCHOT#_R
H_CPUPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PECI_EC<41>
RC26 56_0402_5%
DDR3_DRAMRST#_CPU
4
CC3
XDP@
RC7 1K_0402_5%XDP@
RC9 0_0402_5%XDP @
RC11 0_0402_5%XDP@
RC12 0_0402_5%XDP@
PCH_JTAG_TCK
3
HASWELL_MCP_E
C45
EDP_TXN0
B46
EDP_TXP0
A47
EDP_TXN1
B47
EDP_TXP1
C47
EDP_TXN2
C46
EDP_TXP2
A49
DDI EDP
1 OF 19
1 2
1 2
1 2
1 2
1 8
2 7
3 6
4 5
RPC1
0_8P4R_5%
XDP@
J62
PRDY
K62
PREQ
E60
PROC_TCK
E61
PROC_TMS
E59
PROC_TRST
F63
PROC_TDI
F62
PROC_TDO
J60
BPM#0
H60
BPM#1
H61
BPM#2
H62
BPM#3
K59
BPM#4
H63
BPM#5
K60
BPM#6
J61
BPM#7
Rev1p2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EDP_TXN3
B49
EDP_TXP3
A45
EDP_AUXN
B45
EDP_AUXP
D20
Rev1p2
CFG0
CFG1
CFG2
CFG4
CFG5
CFG6
CFG7
RC28 0_0402_1%@
T1@
T2@
T3@
T4@
T5@
T6@
EDP_COMP
A43
EDP_DISP_UTIL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1 2
@
RC27
0_0402_5%
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
JXDP
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
SAMTE_BSH-030-01-L-D-A
CONN@
EDP_RCOMP
EDP_DISP_UTIL
XDP_PREQ#
XDP_PRDY#
CFG0<16>
CFG1<16>
CFG2<16>
CFG3<16>
XDP_OBS0_R
XDP_OBS1_R
CFG4<16>
CFG5<16>
CFG6<16>
CFG7<16>
CFD_PWRBTN#_XDP
CPU_PWR_DEBUG#_R PLT_RST#
SYS_PWROK_XDP
DDR_XDP_SMBDAT_R1
DDR_XDP_SMBCLK_R1
XDP_TCLK
+3VALW_PCH
@
RC21
1K_0402_5%
1 2
SYS_PWROK_XDP
1
@ESD@
CC7
0.1U_0402_10V7K
2
Place near JXDP pin47
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_OBS0_R
XDP_OBS1_R
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
1 2
@
RC1
0_0402_5%
PCH_JTAG_RST#
Deciphered Date
Deciphered Date
Deciphered Date
2
EDP_TX0# <19>
EDP_TX0 <19>
EDP_TX1# <19>
EDP_TX1 <19>
EDP_TX2# <19>
EDP_TX2 <19>
EDP_TX3# <19>
EDP_TX3 <19>
EDP_AUX# <19>
EDP_AUX <19>
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
XDP_DBRESET#
EDP_BIA_PWM <10,19>
+1.05VS+1.05VS
2
GND1
4
6
8
GND3
10
12
14
GND5
16
18
20
GND7
22
24
26
GND9
28
30
32
GND11
34
36
38
GND13
40
42
44
46
48
50
GND15
52
TD0
54
TRST#
56
TDI
58
TMS
60
GND17
1 2
RC22
0_0402_1%
PCH_JTAG_RST# <8>
TDO_XDP
TRST#_XDP
TDI_XDP
TMS_XDP
CFG3_R
@
+VCCIOA_OUT
12
RC224.9_0402_1%~D
COMPENSATION PU FOR eDP
CAD Note:
Trace width=20mils
Spacing=25mils
Max length=100mils
CFG17
CFG16
CFG8
CFG9
CFG10
CFG11CFG3
CFG19
CFG18
CFG12
CFG13
CFG14
CFG15
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
RC8 0_0402_5%XDP@
RC10 0_0402_5%XDP@
SYS_RESET#
1 2
1 2
RC13
1K_0402_5%
XDP@
1 2
RC15
1K_0402_5%
XDP@
CFG17 <16>
CFG16 <16>
CFG8 <16>
CFG9 <16>
CFG10 <16>
CFG11 <16>
CFG19 <16>
CFG18 <16>
CFG12 <16>
CFG13 <16>
CFG14 <16>
CFG15 <16>
12
CFG3
SYS_RESET# <10>
RC14
1K_0402_1%
1 2
12
CC6
0.1U_0402_10V7K
PLT_RST#
ESD@
CC4
0.047U_0402_16V4Z
Place CC4
close to RC13.1
PU/PD for JTAG signals
@
XDP_TMS
XDP_TDI
XDP_PREQ#
TDO_XDP
XDP_TDO
XDP_TCK
XDP_TRST#
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 8
2 7
3 6
4 5
RPC2
51_8P4R_5%
@
1 8
2 7
3 6
4 5
RPC3
51_8P4R_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
MCP(1,2/19) eDP,XDP,MISC
MCP(1,2/19) eDP,XDP,MISC
MCP(1,2/19) eDP,XDP,MISC
LA-A301P
LA-A301P
LA-A301P
1
1
2
CLK_CPU_ITP <9>
CLK_CPU_ITP# <9>
PLT_RST# <10,30,32,41>
+3VS
+1.05VS
6 56Wednesday, Septem ber 24, 2014
6 56Wednesday, Septem ber 24, 2014
6 56Wednesday, Septem ber 24, 2014
1.0
1.0
1.0
UC1A
+1.05VS
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
C51
DDI2_TXN0
C50
DDI2_TXP0
C53
DDI2_TXN1
B54
DDI2_TXP1
C49
DDI2_TXN2
B50
DDI2_TXP2
A53
DDI2_TXN3
B53
DDI2_TXP3
@
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CC2
XDP@
2
2
DDI1_LANE_N0
DDI1_LANE_P0
DDI1_LANE_N1
DDI1_LANE_P1
DDI1_LANE_N2
DDI1_LANE_P2
DDI1_LANE_N3
DDI1_LANE_P3
DDI2_LANE_N0
DDI2_LANE_P0
DDI2_LANE_N1
DDI2_LANE_P1
DDI2_LANE_N2
DDI2_LANE_P2
DDI2_LANE_N3
DDI2_LANE_P3
Place near JXDP
PBTN_OUT#<10,41>
CPU_PWR_DEBUG#<13>
SYS_PWROK<10,41>
DDR_XDP_WLAN_TP_SMBDAT<9,17,18,36>
DDR_XDP_WLAN_TP_SMBCLK<9,17,18,36>
UC1B
D61
PROC_DETECT
K61
CATERR
N62
PECI
K63
PROCHOT
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST
AV61
SM_PG_CNTL1
1
2
H_CPUPWRGD H_VCCST_PWRGD_XDP
SYS_PWROK
HASWELL_MCP_E
MISC
JTAG
THERMAL
PWR
DDR3
2 OF 19
5
4
3
2
1
Non-Interleaved memory
HASWELL_MCP_E
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
M_CLK_DDR#2
M_CLK_DDR2
M_CLK_DDR#3
M_CLK_DDR3
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
M_CLK_DDR#2 <18>
M_CLK_DDR2 <18>
M_CLK_DDR#3 <18>
M_CLK_DDR3 <18>
DDR_CKE2_DIMMB <18>
DDR_CKE3_DIMMB <18>
DDR_CS2_DIMMB# <18>
DDR_CS3_DIMMB# <18>
DDR_B_RAS# <18>
DDR_B_WE# <18>
DDR_B_CAS# <18>
DDR_B_BS0 <18>
DDR_B_BS1 <18>
DDR_B_BS2 <18>
DDR_B_DQS#[0..7] <18>
DDR_B_DQS[0..7] <18>
AY31
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
UC1D
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
HASWELL_MCP_E
DDR CHANNEL A
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
M_CLK_DDR#0
M_CLK_DDR0
M_CLK_DDR#1
M_CLK_DDR1
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
M_CLK_DDR#0 <17>
M_CLK_DDR0 <17>
M_CLK_DDR#1 <17>
M_CLK_DDR1 <17>
DDR_CKE0_DIMMA <17>
DDR_CKE1_DIMMA <17>
DDR_CS0_DIMMA# <17>
DDR_CS1_DIMMA# <17>
DDR_A_RAS# <17>
DDR_A_WE# <17>
DDR_A_CAS# <17>
DDR_A_BS0 <17>
DDR_A_BS1 <17>
DDR_A_BS2 <17>
DDR_A_MA[0..15] <17> DDR_B_MA[0..15] <18>
DDR_A_DQS#[0..7] <17>
DDR_A_DQS[0..7] <17>
+SM_VREF_CA
+SM_VREF_DQ0
+SM_VREF_DQ1
DDR_B_D[0..15]<18>
DDR_B_D[16..31]<18>
DDR_B_D[32..47]<18>
DDR_B_D[48..63]<18>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AH63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
UC1C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
D D
C C
DDR_A_D[0..15]<17>
DDR_A_D[16..31]<17>
DDR_A_D[32..47]<17>
DDR_A_D[48..63]<17>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
B B
1
CC12
0.022U_0402_16V7K
2
12
RC41
24.9_0402_1%~D
Rev1p2
+1.35V
12
RC33
1.82K_0402_1%
12
RC39
1.82K_0402_1%
1 2
RC36
2.2_0402_1%
1
CC10
0.022U_0402_16V7K
2
12
RC42
24.9_0402_1%~D
3
+1.35V
12
RC34
+SM_VREF_DQ0_DIMM1+SM_VREF_CA_DIMM +SM_VREF_DQ1_DIMM2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1.82K_0402_1%
1 2
RC37
2.2_0402_1%
12
RC40
1.82K_0402_1%
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
+SM_VREF_DQ0
Compal Secret Data
Compal Secret Data
Compal Secret Data
3 OF 19
+1.35V
12
RC32
1.82K_0402_1%
12
RC38
1.82K_0402_1%
A A
+SM_VREF_CA +SM_VREF_DQ1
1 2
RC35
2.2_0402_1%
sualaptop365.edu.vn
5
4
1
CC11
0.022U_0402_16V7K
2
12
RC43
24.9_0402_1%~D
Deciphered Date
Deciphered Date
Deciphered Date
2
4 OF 19
Rev1p2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(3,4/19) DDR3L
MCP(3,4/19) DDR3L
MCP(3,4/19) DDR3L
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
7 56Friday, September 19, 2014
7 56Friday, September 19, 2014
7 56Friday, September 19, 2014
1.0
5
4
3
2
1
D D
JP1
2
+RTC_CELL
CC14
1 2
15P_0402_50V8J
CC15
15P_0402_50V8J
2
2
1U_0402_6.3V6K
1 2
1 2
RC50 1M_0402_5%
C C
+RTCVCC
1 2
1 2
RC49 20K_0402_5%
RC51 20K_0402_5%
1
1
@
CMOS1 SHORT PADS~D
1 2
CC17
12
32.768KHZ_12.5PF_1TJF125DP1A000D
2
CC16
1U_0402_6.3V6K
1
PCH_AZ_CODEC_SDIN0<31>
YC1
ME_EN<41>
CMOS place near DIMM connector
Shunt
Open
Shunt
Open
B B
+1.05VS
RC56 1K_0402_1%@
RC57 51_0402_1%@
+1.05VS
1 8
2 7
3 6
4 5
RPC5
51_8P4R_5%
12
12
CMOS settingCMOS_CLR1
Clear CMOS
Keep CMOS
TPM settingME_CLR1
Clear ME RTC Registers
Keep ME RTC Registers
PCH_JTAG_JTAGX
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
112
JUMP_43X39
1 2
RC52 1K_0402_5%
PCH_JTAG_RST#<6>
PCH_JTAG_TCK<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
PCH_JTAG_TMS<6>
PCH_JTAG_JTAGX<6>
12
+RTCVCC
PCH_RTCX1
RC48
10M_0402_5%
PCH_RTCX2
INTRUDER#
PCH_INTVRMEN
SRTCRST#
PCH_RTCRST#
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_JTAGX
UC1E
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
HASWELL_MCP_E
SATAAUDIO
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
RTC
JTAG
5 OF 19
HDA for Codec
1 2
@EMI@
1
CC18
27P_0402_50V8J
2
RC58 33_0402_5%EMI@
1 2
RC59 33_0402_5%EMI@
1 2
RC60 33_0402_5%EMI@
1 2
RC61 33_0402_5%EMI@
PCH_AZ_CODEC_SDOUT<31>
PCH_AZ_CODEC_SYNC<31>
PCH_AZ_CODEC_RST#<31>
PCH_AZ_CODEC_BITCLK<31>
+RTCVCC
12
RC44
330K_0402_1%
PCH_INTVRMEN
INTVRMEN - INTEGRATED SUS 1.05V VRM ENABLE
High - Enable Internal VRs
Low - Enable External VRs
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED
Rev1p2
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
EC_SMI#
U1
PCH_GPIO35
V6
PCH_GPIO36
AC1
PCH_GPIO37
A12
SATA_IREF
L11
K10
C12
SATA_RCOMP
U3
SATALED#
PCH_AZ_SDOUT
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_BITCLK
SATA_PRX_DTX_N0 <36>
SATA_PRX_DTX_P0 <36>
SATA_PTX_DRX_N0 <36>
SATA_PTX_DRX_P0 <36>
SATA_PRX_DTX_N1 <36>
SATA_PRX_DTX_P1 <36>
SATA_PTX_DRX_N1 <36>
SATA_PTX_DRX_P1 <36>
1 2
RC53
10K_0402_5%
1 2
RC54 0_0603_1%@
1 2
RC55 3.01K_0402_1%
SATALED# <38>
PCH_GPIO36
PCH_GPIO35
PCH_GPIO37
+3VS
12
@
RC46
1K_0402_5%
PCH_AZ_SDOUT
FLASH DESCRIPTOR SECURITY OVERRIDE
LOW = DESABLED (DEFAULT)
HIGH = ENABLED
SATA HDD or NGFF SSD1
NGFF SSD2
+3VS
EC_SMI# <41>
+1.05VS_ASATA3PLL
SATA Impedance Compensation
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
reference FFRD schematics 0.5
+3VS
1 8
2 7
3 6
4 5
RPC4
10K_8P4R_5%
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(5/19) RTC,SATA,HDA,JTAG
MCP(5/19) RTC,SATA,HDA,JTAG
MCP(5/19) RTC,SATA,HDA,JTAG
LA-A301P
LA-A301P
LA-A301P
1
8 56Friday, September 19, 2014
8 56Friday, September 19, 2014
8 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
+3VALW_PCH
D D
UC1G
+3VS
PCH_SPI_HOLD1#
PCH_SPI_CLK_R
PCH_SPI_MOSI_1
AU14
AW12
AY12
AW11
AV12
AA3
Y7
Y4
AC2
AA2
AA4
Y6
AF1
CC20
0.1U_0402_10V7K
1 2
LAD0
LAD1
LAD2
LAD3
LFRAME
SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
DI(IO0)
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LFRAME#
PCH_SPI_CLKPCH_SPI_CLK_R
PCH_SPI_CS0#
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_WP#
PCH_SPI_HOLD#
8
VCC
7
6
CLK
5
LPC_LAD0<41>
LPC_LAD1<41>
LPC_LAD2<41>
LPC_LAD3<41>
LPC_LFRAME#<41>
EMI@
RC66
1 2
15_0402_1%
RPC6
1 8
2 7
3 6
4 5
15_8P4R_5%
UC4
1
CS#
2
DO(IO1)
HOLD#(IO3)
3
WP#(IO2)
4
GND
64M EN25QH64-104HIP SOP 8P
+3VS
1
2
PCH_SPI_HOLD1#
PCH_SPI_MISO_1
PCH_SPI_WP1#
PCH_SPI_MOSI_1
1 2
RC67 1K_0402_1%
1 2
RC68 1K_0402_1%
PCH_SPI_CS0#
PCH_SPI_MISO_1
PCH_SPI_WP1#
@EMI@
CC19
68P_0402_50V8J
C C
HASWELL_MCP_E
LPC
SPI C-LINK
SMBUS
7 OF 19
SMBALERT/GPIO11
SMBCLK
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML1ALERT/PCHHOT/GPIO73
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_CLK
CL_DATA
CL_RST
Rev1p2
SML0DATA<34>
SML0CLK<34>
AN2
PCH_SMB_ALERT#
AP2
MEM_SMBCLK
AH1
MEM_SMBDATA
AL2
AN1
SML0CLK
AK1
SML0DATA
AU4
PCH_HOT#
AU3
SML1_SMBCLK
AH3
SML1_SMBDATA
AF2
AD2
AF4
SML1_SMBCLK
SML1_SMBDATA
MEM_SMBCLK
MEM_SMBDATA
SML0DATA
SML0CLK
10K_0402_5%
T7@
T8@
T9@
RPC7
1 8
2 7
3 6
4 5
2.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RPC8
1K_0804_8P4R_5%
@
RC62
12
12
RC63
10K_0402_5%
+3VALW_PCH
MEM_SMBCLKLPC_LAD3
MEM_SMBDATA
MEM Bus : DDR/XDP/WLAN/TP
+3VS
+3VS
2
G
6 1
D
5
DMN66D0LDW-7_SOT363-6
3 4
SGD
QC1A
DMN66D0LDW-7_SOT363-6
RC64
10K_0402_5%
S
QC1B
12
12
RC65
10K_0402_5%
SML1 Bus : EC/Sensors
+3VALW_PCH
2
QC2B
G
SML1_SMBCLK
SML1_SMBDATA
DMN66D0LDW-7_SOT363-6
61
S
D
DMN66D0LDW-7_SOT363-6
QC2A
5
34
SGD
DDR_XDP_WLAN_TP_SMBCLK <6,17,18,36>
DDR_XDP_WLAN_TP_SMBDAT <6,17,18,36>
EC_SMB_CK2 <22,40,41>
EC_SMB_DA2 <22,40,41>
CC21
15P_0402_50V8J
CC22
15P_0402_50V8J
+1.05VS_AXCK_LCPLL
12
RC7122_0402_5% EMI@
12
12
CLK_PCI_LPC <41>
CLK_CPU_ITP# <6>
CLK_CPU_ITP <6>
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(6,7/19) CLK,SMB,SPI,LPC
MCP(6,7/19) CLK,SMB,SPI,LPC
MCP(6,7/19) CLK,SMB,SPI,LPC
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
9 56Friday, September 19, 2014
9 56Friday, September 19, 2014
9 56Friday, September 19, 2014
1.0
1 2
1 2
1 2
1 2
2
1M_0402_5%
RC69
1 2
RC70
3.01K_0402_1%
1 2
3
4
YC2
24MHZ_12PF_X3G024000DC1H
1
2
B B
UC1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
CLK_PCIE_WLAN#<32>
WLAN(M2 card)
10/100/1000 LAN
GPU (N15P-GX and Caldera)
DII-DMN65D8LW-7~D
1 3
D
CLKREQ#_WLAN<32>
A A
CLKREQ#_WLAN WLAN_CLKREQ#_R
S
QC3
G
2
+3VS
CLK_PCIE_WLAN<32>
WLAN_CLKREQ#_R<11>
CLK_PCIE_LAN#<30>
CLK_PCIE_LAN<30>
CLKREQ#_LAN<30>
CLK_PEG_GPU#<34>
CLK_PEG_GPU<34>
CLKREQ#_GPU<22,34>
+3VS
WLAN_CLKREQ#_R
RPC10
1 8
2 7
3 6
4 5
10K_8P4R_5%
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
sualaptop365.edu.vn
5
4
3
HASWELL_MCP_E
A25
RSVD
RSVD
Rev1p2
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
XTAL24_IN
XTAL24_OUT
CLK_BIASREF
RC157 10K_0402_5%
RC158 10K_0402_5%
RC159 10K_0402_5%
RC160 10K_0402_5%
CLKOUT_LPC0
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
XTAL24_IN
XTAL24_OUT
DIFFCLK_BIASREF
CLOCK
SIGNALS
6 OF 19
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
5
D D
C C
+3VALW_PCH
+3V_DSW
1 2
RC72 10K_0402_5%
1 2
RC73 10K_0402_5%@
1 2
RC74 10K_0402_5%@
1 2
RC77 8.2K_0402_5%
1 2
RC79 10K_0402_5%
1 2
RC80 1K_0402_5%
1 2
RC161 10K_0402_5%
+3VS
1 2
RC81 8.2K_0402_5%
SYS_PWROK
@ESD@
CC25
0.047U_0402_16V4Z
ME_SUS_PWR_ACK
SUSACK#
SUS_STAT#/LPCPD#
PCH_BATLOW#
AC_PRESENT
PCIE_WAKE#_R
PCH_SLP_WLAN#
CLKRUN#
1
2
Note: SUSACK# and SUSWARN# can be tied together if
EC does not want to involve in the handshake mechanism
for the deep sleep state entry and exit can be NC ,if not support deep Sx
SYS_PWROK<6,41>
PCH_PWROK<41>
Place CC25 on BOT
PCH_PWROK
@ESD@
CC26
0.047U_0402_16V4Z
1
2
PCH_BATLOW# need pull high to VCCDSW3_3
(If no deep Sx , connect to VCCSUS3_3)
Place CC26
close to RP50.2&RP50.3
+3VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
GPIO77
PCH_TP_INT#
EDP_BIA_PWM
PRODUCT_ID1
DGPU_HOLD_RST#
FFS_INT1
ENVDD_PCH
PRODUCT_ID1
TP_INT#<38,41>
RC88 10K_0402_5%
RC90 10K_0402_5%
B B
RC91 10K_0402_5%@
RC96 10K_0402_5%H@
RC93 10K_0402_5%@
RC94 10K_0402_5%
RC95 100K_0402_5%@
RC97 10K_0402_5%B@
4
PCH_DPWROK
ME_SUS_PWR_ACK_R SUSACK#
1 2
RC75 0_0402_5%@
1 2
RC76 0_0402_5%@
PCH_RSMRST#_R
3
Place CC23
close to UC5.1 &
UC5.2
PCH_PLTRST#<22,34>
PCH_PLTRST#
ESD@
CC23
0.047U_0402_16V4Z
1
2
+3VS
5
1
IN1
2
IN2
3
2
CC24
@
1 2
0.1U_0402_10V7K
VCC
4
PLT_RST#
OUT
GND
UC5
MC74VHC1G08DFT2G_SC70-5
12
RC78
100K_0402_5%
1
PLT_RST# <6,30,32,41>
DPWROK: Tired toghter with RSMRST#
that do not support Deep Sx
DSWODVREN - On Die DSW VR Enable
DPWROK
WAKE
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
Rev1p2
Rev1p2
AW7
AV5
AJ5
V5
AG4
AE6
AP5
AJ6
AT4
AL5
AP4
AJ7
B9
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
HIGH = ENABLED (DEFAULT)
LOW = DISABLED
DSWODVREN
PCH_DPWROK
CLKRUN#
SUS_STAT#/LPCPD#
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
CPU_DPB_CTRLCLK
CPU_DPB_CTRLDAT
CPU_DPC_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPB_AUX#
CPU_DPC_AUX#
CPU_DPB_AUX
CPU_DPC_AUX
DPB_HPD
DPC_HPD
CPU_EDP_HPD#
100K_0402_5%
1 2
RC82 330K_0402_5%
1 2
@
RC85
0_0402_5%
T12@
T14@
CPU_DPB_CTRLCLK <21>
CPU_DPB_CTRLDAT <21>
CPU_DPC_CTRLCLK <20>
CPU_DPC_CTRLDAT <20>
CPU_DPC_AUX# <20>
CPU_DPC_AUX <20>
12
RC99
PCIE_WAKE#PCIE_WAKE#_R
SUSCLK <32>
SIO_SLP_S5# <37>
SIO_SLP_S4# <37,41>
SIO_SLP_S3# <37,41>
SLP_SUS# <41>
RC98
100K_0402_5%
1 2
+RTCVCC
PCH_DPWROK <41>
PCIE_WAKE# <30,41>
DPB_HPD <21>
DPC_HPD <20>
CPU_EDP_HPD# <19>
CPU_DPB_CTRLCLK
CPU_DPB_CTRLDAT
CPU_DPC_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPB_AUX#
CPU_DPB_AUX
1 8
2 7
3 6
4 5
RPC12
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
RPC13
100K_8P4R_5%
+3VS
UC1H
SUSACK#<41>
ME_SUS_PWR_ACK<41>
SUSACK#
SYS_PWROK
EC_RSMRST#<41>
PBTN_OUT#<6,41>
ACIN<22,37,41,47,48>
SIO_SLP_S0#<41>
EDP_BIA_PWM<6,19>
PANEL_BKLEN<41>
+3VS
1 3
D
QC4
2N7002K_SOT23-3
1 2
RC100
0_0402_5%
@
1 2
RC84 0_0402_1%@
4 5
3 6
2 7
1 8
1 2
DC2 RB751V-40_SOD323-2
2
G
S
RPC11
0_8P4R_5%
1 2
RC86 0_0402_1%@
1 2
RC87 0_0402_1%@
DGPU_HOLD_RST#<22,41>
SYS_RESET#<6>
@
RC89
0_0402_1%
ENVDD_PCH<19>
DGPU_PWR_EN<24>
FFS_INT1<36>
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
PBTN_OUT#
AC_PRESENT
PCH_BATLOW#
SIO_SLP_S0#
PCH_SLP_WLAN#
12
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK_R
PM_APWROK_R
PCH_PLTRST#
EDP_BKLCTLEDP_BIA_PWM
PANEL_BKLEN
ENVDD_PCH
GPIO77
DGPU_PWR_EN
DGPU_HOLD_RST#
T15 @
PCH_TP_INT#
PRODUCT_ID1
FFS_INT1
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
UC1I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
U6
PIRQA/GPIO77
P4
PIRQB/GPIO78
N4
PIRQC/GPIO79
N2
PIRQD/GPIO80
AD4
PME
U7
GPIO55
L1
GPIO52
L3
GPIO54
R5
GPIO51
L4
GPIO53
HASWELL_MCP_E
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
eDP SIDEBAND
GPIO
8 OF 19
9 OF 19
DISPLAY
DSWVRMEN
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
PRODUCT_ID1:
Haswell---H
Broadwell---L
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(8,9/19) DDI,EDP,GPIO
MCP(8,9/19) DDI,EDP,GPIO
MCP(8,9/19) DDI,EDP,GPIO
LA-A301P
LA-A301P
LA-A301P
1
10 56Friday, September 19, 2014
10 56Friday, September 19, 2014
10 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
+3VS
1 2
1 2
PRODUCT_ID2
12
DEVSLP0
12
DEVSLP1
12
SIO_EXT_SCI#
12
HDD_DET#
12
GPIO27
12
SLATE_MODE_R
12
PCH_AUDIO_EN
PRODUCT_ID2
C C
RC163 10K_0402_5%
RC108 10K_0402_5%
RC162 10K_0402_5%
RC110 100K_0402_5%
RC114 100K_0402_5%
+3V_DSW
RC115 10K_0402_5%
+3VALW_PCH
RC117 10K_0402_5%
RC118 10K_0402_5%
RC164 10K_0402_5%@
WAKE_PCH#<41>
PRODUCT_ID2:
NV GPU---H
AMD GPU---L
B B
+3VALW_PCH
+3VS
RPC18
18
27
36
45
10K_8P4R_5%
RPC16
18
27
36
45
8.2K_8P4R_5%
PCH_GPIO9
PCH_GPIO44
PCH_GPIO46
ODD_DA#
BT_OFF#
WL_OFF#
SERIRQ
4
T16 PAD~D@
EC_LID_OUT#<41>
CAB_DET_SINK<20>
BT_OFF#<32>
1 2
@
RC153 0_0402_1%
PCIE_MUX<34>
HDD_DET#<36>
WL_OFF#<32>
T20 PAD~D@
T21 PAD~D@
T23 PAD~D@
T26 PAD~D@
T27 PAD~D@
EC_SCI#<41>
DEVSLP0<36>
DEVSLP1<36>
HDA_SPKR<31>
PCH_AUDIO_EN
PCH_GPIO12
EC_LID_OUT#
ODD_DA#
CAB_DET_SINK
BT_OFF#
GPIO27
HDD_DET#
SLATE_MODE_R
WL_OFF#
PCH_GPIO44
PCH_GPIO47
PCH_GPIO48
PCH_GPIO49
PRODUCT_ID2
PCH_GPIO14
PCH_GPIO25
PCH_GPIO46
PCH_GPIO9
EC_SCI#
DEVSLP0
DEVSLP1
SIO_EXT_SCI#
HDA_SPKR
UC1J
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
3
HASWELL_MCP_E
CPU/
MISC
GPIO
LPIO
10 OF 19
BBS_BIT
12
RC124
1K_0402_5%
GPIO86
BOOT BIOS STRAP BIT BBS
HIGH(LPC)
LOW(DEFAULT) (SPI)
THERMTRIP
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
Rev1p2
D60
V4
T4
AW15
AF20
AB21
R6
PCH_GPIO83
L6
PCH_GPIO84
N6
PCH_GPIO85
L8
BBS_BIT
R7
GC6_EVENT#
L5
GPU_GC6_FB_EN
N7
K2
PCH_GPIO90
J1
CPPE#
K3
CPUSB#
J2
PCH_GPIO93
G1
PCH_GPIO94
K4
G2
FFS_INT2
J3
LCD_CBL_DET#
J4
F2
I2C0_SDA
F3
I2C0_SCL
G4
I2C1_SDA_TP
F1
I2C1_SCL_TP
E3
F4
D3
E4
C3
E2
H_THERMTRIP#
KB_RST#
SERIRQ
PCH_OPI_COMP
+1.05VS
1 2
RC102
49.9_0402_1%
T17PAD~D @
T18PAD~D @
T19PAD~D @
GC6_EVENT# <22,41>
GPU_GC6_FB_EN <22,25,41>
T22PAD~D @
T24PAD~D @
T25PAD~D @
FFS_INT2 <36>
I2C1_SDA_TP <38>
I2C1_SCL_TP <38>
12
RC101
1K_0402_5%
2
+1.05VS
1
ESD@
CC27
100P_0402_50V8J
2
Close to RC101
KB_RST# <41>
SERIRQ <41>
WLAN_CLKREQ#_R<9>
LCD_CBL_DET#
FFS_INT2
CPPE#
CPUSB#
I2C1_SDA_TP
I2C1_SCL_TP
I2C0_SDA
I2C0_SCL
KB_RST#
WLAN_CLKREQ#_R
RC106
10K_0402_5%
12
RPC19
4 5
3 6
2 7
1 8
100K_8P4R_5%
RPC14
1 8
2 7
3 6
4 5
2.2K_0804_8P4R_5%
RPC15
18
27
36
45
10K_8P4R_5%
1
+3VS
+3VS_WLAN_NGFF
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(10/19) GPIO,LPIO,MISC
MCP(10/19) GPIO,LPIO,MISC
MCP(10/19) GPIO,LPIO,MISC
LA-A301P
LA-A301P
LA-A301P
1
11 56Friday, September 19, 2014
11 56Friday, September 19, 2014
11 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
PCIe
HASWELL_MCP_E
11 OF 19
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_CALDERA_N3
USB20_CALDERA_P3
USB20_TOUCH_N4
USB20_TOUCH_P4
USB20_CAM_N5
USB20_CAM_P5
USB20_ELC_N6
USB20_ELC_P6
USB20_BT_N7
USB20_BT_P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB3RN1
USB3RP1
USB
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
RSVD
RSVD
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
Rev1p2
USB20_N0 <33>
USB20_P0 <33>
USB20_N1 <33>
USB20_P1 <33>
USB20_N2 <33>
USB20_P2 <33>
USB20_CALDERA_N3 <34>
USB20_CALDERA_P3 <34>
USB20_TOUCH_N4 <19>
USB20_TOUCH_P4 <19>
USB20_CAM_N5 <19>
USB20_CAM_P5 <19>
USB20_ELC_N6 <37>
USB20_ELC_P6 <37>
USB20_BT_N7 <32>
USB20_BT_P7 <32>
USB3RN1 <33>
USB3RP1 <33>
USB3TN1 <33>
USB3TP1 <33>
USB3RN2 <33>
USB3RP2 <33>
USB3TN2 <33>
USB3TP2 <33>
USB_OC0# <33>
USB_OC1# <33>
USB_OC2# <33>
Left side 1
Right side (power share)
Left side 2
Caldera
Touch screen
Camera
ELC
Bluetooth
Left side 1
Right side (power share)
12
RC127
22.6_0402_1%~D
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
UC1K
PEG_CRX_GTX_N0<34>
PEG_CRX_GTX_P0<34>
PEG_CTX_GRX_N0<34>
PEG_CTX_GRX_P0<34>
PEG_CRX_GTX_N1<34>
PEG_CRX_GTX_P1<34>
PEG_CTX_GRX_N1<34>
PCIE 4X MUX
C C
WLAN (M.2 Card)
10/100/1000 LAN
B B
PEG_CTX_GRX_P1<34>
PEG_CRX_GTX_N2<34>
PEG_CRX_GTX_P2<34>
PEG_CTX_GRX_N2<34>
PEG_CTX_GRX_P2<34>
PEG_CRX_GTX_N3<34>
PEG_CRX_GTX_P3<34>
PEG_CTX_GRX_N3<34>
PEG_CTX_GRX_P3<34>
PCIE_PRX_WLANTX_N3<32>
PCIE_PRX_WLANTX_P3<32>
PCIE_PTX_WLANRX_N3<32>
PCIE_PTX_WLANRX_P3<32>
PCIE_PRX_LANTX_N4<30>
PCIE_PRX_LANTX_P4<30>
PCIE_PTX_LANRX_N4<30>
PCIE_PTX_LANRX_P4<30>
PEG_CRX_GTX_N0
PEG_CRX_GTX_P0
PEG_CTX_GRX_N0
PEG_CTX_GRX_P0
PEG_CRX_GTX_N1
PEG_CRX_GTX_P1
PEG_CRX_GTX_N2
PEG_CRX_GTX_P2
PEG_CRX_GTX_N3
PEG_CRX_GTX_P3
Left side 2
Caldera
+1.05VS_AUSB3PLL
12
CC28 0.22U_0402_10V6K
12
CC29 0.22U_0402_10V6K
12
CC31 0.22U_0402_10V6K
12
CC30 0.22U_0402_10V6K
12
CC32 0.22U_0402_10V6K
12
CC33 0.22U_0402_10V6K
12
CC34 0.22U_0402_10V6K
12
CC35 0.22U_0402_10V6K
1 2
CC90 0.1U_0402_10V7K
1 2
CC89 0.1U_0402_10V7K
1 2
CC36 0.1U_0402_10V7K
1 2
CC37 0.1U_0402_10V7K
USB3RN3<33>
USB3RP3<33>
USB3TN3<33>
USB3TP3<33>
USB3RN4<34>
USB3RP4<34>
USB3TN4<34>
USB3TP4<34>
RC128
3.01K_0402_1%
1 2
PCH_PCIE_RCOMP
PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N1PEG_CTX_GRX_N1
PEG_CTX_GRX_C_P1PEG_CTX_GRX_P1
PEG_CTX_GRX_C_N2PEG_CTX_GRX_N2
PEG_CTX_GRX_C_P2PEG_CTX_GRX_P2
PEG_CTX_GRX_C_N3PEG_CTX_GRX_N3
PEG_CTX_GRX_C_P3PEG_CTX_GRX_P3
PCIE_PTX_WLANRX_N3_C
PCIE_PTX_WLANRX_P3_C
PCIE_PTX_LANRX_N4_C
PCIE_PTX_LANRX_P4_C
F10
E10
C23
C22
F8
E8
B23
A23
H10
G10
B21
C21
E6
F6
B22
A21
G11
F11
C29
B30
F13
G13
B29
A29
G17
F17
C30
C31
F15
G15
B31
A31
E15
E13
A27
B27
PERN5_L0
PERP5_L0
PETN5_L0
PETP5_L0
PERN5_L1
PERP5_L1
PETN5_L1
PETP5_L1
PERN5_L2
PERP5_L2
PETN5_L2
PETP5_L2
PERN5_L3
PERP5_L3
PETN5_L3
PETP5_L3
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3
PETP1/USB3TP3
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4
PETP2/USB3TP4
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
+3VALW_PCH
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1 8
2 7
3 6
4 5
RPC17
10K_8P4R_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
MCP(11/19) PCIE,USB
MCP(11/19) PCIE,USB
MCP(11/19) PCIE,USB
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
12 56Friday, September 19, 2014
12 56Friday, September 19, 2014
12 56Friday, September 19, 2014
1.0
5
4
3
2
1
VR_ONVCCST_PG_EC
Place CC40
close to RC133.1
H_CPU_SVIDALRT#
RC135 close to CPU
VR_SVID_DAT
12
RC137
10K_0402_5%
@ESD@
CC40
0.1U_0402_10V7K
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Rev1p2
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
+CPU_CORE
1
2
+VCCIO_OUT
@
RC129
0_0603_5%
1 2
VR_SVID_CLK<53>
RF@
CC41
68P_0402_50V8J
1
2
H_VR_READY<53>
CPU_PWR_DEBUG#<6>
+CPU_CORE
+VCCIO_OUT_R
+VCCIOA_OUT
VR_ON<41,53>
+CPU_CORE
+1.35V
+1.05VS
VCCSENSE
H_CPU_SVIDALRT#
VR_SVID_DAT
VCCST_PG_EC
CPU_PWR_DEBUG#
T33 @
T34 @
T35 @
T36 @
T37 @
T38 @
T39 @
T40 @
T41 @
T42 @
T43 @
T44 @
T45 @
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
AC58
AB23
AD23
AA23
AE59
AD60
AD59
AA59
AE60
AC59
AG58
AC22
AE22
AE23
AB57
AD57
AG57
L59
J58
F59
N58
E63
A59
E20
L62
N63
L63
B59
F60
C59
D63
H59
P62
P60
P61
N59
N61
T59
U59
V59
C24
C28
C32
UC1L
RSVD
RSVD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCC
RSVD
RSVD
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCST
VCCST
VCCST
VCC
VCC
VCC
VCC
VCC
VCC
HASWELL_MCP_E
12 OF 19
HSW ULT POWER
1 2
ESD@
CC39
22U_0603_6.3V6M
ESD solutionPlace C38
RC130
75_0402_5%
RC131
43_0402_1%
+1.05VS
+1.35V
RC130 close to CPU
12
12
RC135
130_0402_1%
+1.05VS
D D
@ESD@
CC38
220P_0402_50V8J
1
2
+CPU_CORE
between RC137 and UC1
+1.05VS
12
SVID ALERT
VR_SVID_ALRT#<53>
SVID DATA
C C
need to pull-up double side
( PWR_VR & CPU )
VR_SVID_DAT<53>
VCCST_PG_EC<41>
VCCST_PG_EC
Define EC OD pin
need double confirm.
B B
VCCSENSE<53>
VSSSENSE<15,53>
VCCSENSE
VSSSENSE
+CPU_CORE
12
RC138
100_0402_1%
12
RC141
100_0402_1%
CAD Note: PU resistor on HW side
CAD Note: PD resistor on HW side
+1.05VS
1 2
1 2
RC139
@
RC139
150_0402_1%
Intel check list , XDP use only
CPU_PWR_DEBUG#
@
RC140
10K_0402_5%
+1.35V
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CC42
1
2
2.2U_0402_6.3V6M
CC43
CC44
1
1
2
2
VDDQ DECOUPLING
2.2U_0402_6.3V6M
CC45
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC46
2
10U_0603_6.3V6M
1
CC47
2
10U_0603_6.3V6M
1
1
CC48
CC49
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC51
CC50
2
2
+1.35V : 470UF/2V/7343 *2 (PWR)
10UF/6.3V/0603 * 6
A A
2.2UF/6.3V/0402 * 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(12/19) Power
MCP(12/19) Power
MCP(12/19) Power
LA-A301P
LA-A301P
LA-A301P
1
13 56Friday, September 19, 2014
13 56Friday, September 19, 2014
13 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
+1.05VS +1.05VS_AUSB3PLL
1 2
LC1
2.2UH_LQM2MPN2R2NG0L_30%
+1.05VS_ASATA3PLL
1 2
LC2
2.2UH_LQM2MPN2R2NG0L_30%
LC3
2.2UH_LQM2MPN2R2NG0L_30%
LC4
C C
2.2UH_LQM2MPN2R2NG0L_30%
LC5
2.2UH_LQM2MPN2R2NG0L_30%
+1.5VS +3VS
+VCCHDA
RC142
0_0805_1%
1 2
@
1 2
@
1 2
1 2
+1.05VS_APLLOPI
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
RC145 0_0402_1%@
RC146 0_0402_5%@
RC147 0_0402_5%@
CC79 0.1U_0402_10V7K
Reserve for HDA issue, C79 close to UC1M.AH14
+1.05VS
B B
+3V_DSW
+3VALW_PCH
+3VS
+1.05VS
+1.05VS
+3VALW_PCH
+1.05VS
1 2
CC53 1U_0402_6.3V6K
1 2
CC54 100U_A1_6.3VM_R70M
1 2
CC59 1U_0402_6.3V6K
1 2
CC55 100U_A1_6.3VM_R70M
1 2
CC63 1U_0402_6.3V6K
1 2
CC64 100U_A1_6.3VM_R70M@
1 2
CC68 1U_0402_6.3V6K
1 2
CC70 100U_A1_6.3VM_R70M
1 2
CC73 1U_0402_6.3V6K
1 2
CC75 100U_A1_6.3VM_R70M
1 2
1 2
1 2
1 2
1 2
CC81 1U_0402_6.3V6K
1 2
CC82 1U_0402_6.3V6K
1 2
CC83 1U_0402_6.3V6K
1 2
CC84 22U_0603_6.3V6M
1 2
CC85 22U_0603_6.3V6M
1 2
CC86 1U_0402_6.3V6K
1 2
CC87 1U_0402_6.3V6K
CC88 0.1U_0402_10V7K
1 2
CC52 1U_0402_6.3V6K@
+VCCHDA+3VALW_PCH
12
HASWELL_MCP_E
mPHY
OPI
USB3
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
LPT LP POWER
+1.05VS
+1.05VS
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
T46 @
+VCCHDA
T47 @
+3VALW_PCH
+3V_DSW
+3VS
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+1.05VS
+1.05VS
+3VALW_PCH
AH14
AH13
AH10
AA21
W21
AC9
M20
AE20
AE21
K9
L10
M9
N8
P9
B18
B11
Y20
J13
AA9
V8
W9
J18
K19
A20
J17
R21
T21
K18
V21
UC1M
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
RSVD
VCCAPLL
VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
Close to UC1M.K9/UC1M.M9
Close to UC1M.AH10
Close to UC1M.AC9/UC1M.AA9/UC1M.AE20/UC1M.AE21
Close to UC1M.V8
Close to UC1M.J17
Close to UC1M.R21
Close to UC1M.AH14
Close to UC1M.N8
13 OF 19
RTC
SPI
CORE
THERMAL SENSOR
SDIO/PLSS
SUS OSCILLATOR
USB2
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
Rev1p2
+3VALW_PCH
AH11
AG10
AE7
+VCCRTCEXT
Y8
AG14
AG13
J11
CC67 10U_0603_6.3V6M
H11
CC69 1U_0402_6.3V6K
H15
CC71 1U_0402_6.3V6K
AE8
+PCH_VCCDSW
AF22
AG19
AG20
CC72 1U_0402_6.3V6K
AE9
AF9
CC74 22U_0603_6.3V6M@
AG8
CC76 1U_0402_6.3V6K
AD10
AD8
T48 @
T49 @
J15
K14
K16
CC77 0.1U_0402_10V7K
U8
T9
CC78 1U_0402_6.3V6K
AB8
T50 @
AC20
AG16
AG17
+1.05VS
1 2
CC80 1U_0402_6.3V6K
CC60 close to UC1M.AH11
1 2
CC60 1U_0402_6.3V6K
+RTCVCC
1 2
CC61 0.1U_0402_10V7K
+3VS
1 2
CC62 0.1U_0402_10V7K@
+1.05VS
+1.05VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+1.5VS
+3VS
+3VS
+1.05VS
+RTCVCC
CC56
1U_0402_6.3V6K
+1.05VS
1
CC57
2
0.1U_0402_10V7K
1 2
ESD@
CC65
22U_0603_6.3V6M
1
CC58
2
0.1U_0402_10V7K
+3VS
ESD solution
1
2
1 2
ESD@
CC66
22U_0603_6.3V6M
+1.35V+1.05VS
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(13/19) Power
MCP(13/19) Power
MCP(13/19) Power
LA-A301P
LA-A301P
LA-A301P
1
14 56Friday, September 19, 2014
14 56Friday, September 19, 2014
14 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
HASWELL_MCP_E
UC1N
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
C C
B B
AB22
AC61
AD21
AD63
AE10
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
VSS
AB7
VSS
VSS
VSS
AD3
VSS
VSS
VSS
AE5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Rev1p2
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
HASWELL_MCP_E
UC1O
VSS
VSS
VSS
VSS
AP3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AU1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
15 OF 19
Rev1p2
AV59
VSS
AV8
VSS
AW16
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW40
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AW60
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C11
VSS
C14
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D23
VSS
D25
VSS
D26
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
UC1P
HASWELL_MCP_E
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
16 OF 19
VSS_SENSE
Rev1p2
H17
VSS
H57
VSS
J10
VSS
J22
VSS
J59
VSS
J63
VSS
K1
VSS
K12
VSS
L13
VSS
L15
VSS
L17
VSS
L18
VSS
L20
VSS
L58
VSS
L61
VSS
L7
VSS
M22
VSS
N10
VSS
N3
VSS
P59
VSS
P63
VSS
R10
VSS
R22
VSS
R8
VSS
T1
VSS
T58
VSS
U20
VSS
U22
VSS
U61
VSS
U9
VSS
V10
VSS
V3
VSS
V7
VSS
W20
VSS
W22
VSS
Y10
VSS
Y59
VSS
Y63
VSS
V58
VSS
AH46
VSS
V23
VSS
E62
AH16
VSS
12
@
RC148
100_0402_1%
VSSSENSE <13,53>
RC148 SHOULD BE PLACED CLOSE TO CPU
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(14,15,16/19) VSS
MCP(14,15,16/19) VSS
MCP(14,15,16/19) VSS
LA-A301P
LA-A301P
LA-A301P
1
15 56Friday, September 19, 2014
15 56Friday, September 19, 2014
15 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
UC1S
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
CFG_RCOMP
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
HASWELL_MCP_E
17 OF 19
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_A61
DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
Rev1p2
HASWELL_MCP_E
RESERVED
19 OF 19
A3
A4
A60
A61
A62
AV1
AW1
AW2
AW3
AW61
AW62
AW63
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
PROC_OPI_RCOMP
RSVD
RSVD
RSVD
RSVD
Rev1p2
DC_TEST_A3_B3
DC_TEST_A4
DC_TEST_A60
DC_TEST_A61_B61
DC_TEST_A62
DC_TEST_AV1
DC_TEST_AW1
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61
DC_TEST_AW63
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
VSS
N21
VSS
P20
R20
T77PAD~D @
T78PAD~D @
T79PAD~D @
T80PAD~D @
T81PAD~D @
T82PAD~D @
T83PAD~D @
T84PAD~D @
T85PAD~D @
T86PAD~D @
T87PAD~D @
T88PAD~D @
T89PAD~D @
T91PAD~D @
T93PAD~D @
T51PAD~D @
T53PAD~D @
T61PAD~D @
T63PAD~D @
T66PAD~D @
T75PAD~D @
PROC_OPI_RCOMP
UC1R
@
T54 PAD~D
@
T58 PAD~D
@
T62 PAD~D
@
T64 PAD~D
@
T68 PAD~D
@
T70 PAD~D
@ T73PAD~D
T72 PAD~D
1 2
RC152
49.9_0402_1%
RSVD_AT2
RSVD_AU44
RSVD_AV44
RSVD_D15
RSVD_F22
RSVD_H22
RSVD_J21
AU44
AV44
AT2
RSVD
RSVD
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
UC1Q
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
T52 PAD~D@
T60 PAD~D@
C C
B B
RC150
49.9_0402_1%
1 2
RC151
8.2K_0402_1%
DC_TEST_AY60
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_B2
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2 DC_TEST_AY62_AW62
CFG0<6>
CFG1<6>
CFG2<6>
CFG3<6>
CFG4<6>
CFG5<6>
CFG6<6>
CFG7<6>
CFG8<6>
CFG9<6>
CFG10<6>
CFG11<6>
CFG12<6>
CFG13<6>
CFG14<6>
CFG15<6>
CFG16<6>
CFG18<6>
CFG17<6>
CFG19<6>
12
CFG_RCOMP
T90 PAD~D@
T92 PAD~D@
T94 PAD~D@
T95 PAD~D@
T96 PAD~D@
TDI_IREF
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG18
CFG17
CFG19
AC60
AC62
AC63
AA63
AA60
AA62
AA61
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
U63
U62
V63
A5
E1
D1
J20
H18
B12
CFG4
HASWELL_MCP_E
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
RSVD_N23
RSVD_R23
RSVD_T23
RSVD_U10
RSVD_AL1
RSVD_AM11
RSVD_AP7
RSVD_AU10
RSVD_AU15
RSVD_AW14
RSVD_AY14
18 OF 19
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Rev1p2
CFG STRAPS for CPU
CFG4
12
RC149
1K_0402_1%
Display Port Presence Strap
1: Disabled; No Physical Display Port
attached to Embedded Display Port
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
@
T55PAD~D
@
T56PAD~D
@
T57PAD~D
@
T59PAD~D
@
T65PAD~D
@
T67PAD~D
@
T69PAD~D
@
T71PAD~D
@
@
T74PAD~D
@
T76PAD~D
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MCP(17,18,19/19) CFG,RSVD
MCP(17,18,19/19) CFG,RSVD
MCP(17,18,19/19) CFG,RSVD
LA-A301P
LA-A301P
LA-A301P
1
16 56Friday, September 19, 2014
16 56Friday, September 19, 2014
16 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
2-3A to 1 DIMMs/channel
+SM_VREF_DQ0_DIMM1
2.2U_0402_6.3V6M
0.1U_0402_10V7K
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
DDR_A_DQS#[0..7]<7>
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_MA[0..15]<7>
+1.35V
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C C
B B
A A
1
CD5
CD4
2
2
+1.35V
10U_0603_6.3V6M
+0.675VS
10U_0603_6.3V6M
10U_0603_6.3V6M
@
CD12
CD13
1
2
Layout Note:
Place near JDIMM1
1
2
Layout Note:
Place near JDIMM1.203,204
1
1
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
CD25
CD24
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD6
2
10U_0603_6.3V6M
CD15
CD14
1
2
0.1U_0402_10V7K
CD26
1
2
1U_0402_6.3V6K
1
1
CD7
CD8
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@
CD16
CD17
1
1
2
2
10U_0603_6.3V6M
0.1U_0402_10V7K
CD28
CD27
1
1
2
2
All VREF traces should
have 10 mil trace width
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
1U_0402_6.3V6K
1
CD9
2
10U_0603_6.3V6M
CD18
1
1
2
2
10U_0603_6.3V6M
CD29
1
2
1U_0402_6.3V6K
1
CD10
2
330U_D3_2.5VY_R6M
1
CD19
+
2
1U_0402_6.3V6K
1
CD11
2
CD20
1 2
RD11 10K_0402_5%
1 2
RD12 10K_0402_5%
+3VS
ESD@
CD33
22U_0603_6.3V6M
ESD solution
1 2
DDR_CKE0_DIMMA<7>
DDR_CS1_DIMMA#<7>
+3VS
M_CLK_DDR0<7>
M_CLK_DDR#0<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
+1.35V
CD1
1
2
DDR_A_BS2<7>
2.2U_0402_6.3V6M
1
2
DDR_A_D13
DDR_A_D8
CD2
1
DDR_A_D14
2
DDR_A_D10
DDR_A_D29
DDR_A_D28 DDR_A_D24
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_D41
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D43
DDR_A_D47
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D6
DDR_A_D21
DDR_A_D20
DDR_A_D17
DDR_A_D16
DDR_A_D36
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D38
DDR_A_D62
DDR_A_D58
DDR_A_D60
DDR_A_D61
0.1U_0402_10V7K
1
@
CD31
CD32
+0.675VS
2
JDIMM1
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
FOX_AS0A621-J4RB-7H
CONN@
RESET#
VREF_CA
EVENT#
sualaptop365.edu.vn
5
4
DQS0#
DQS0
DQ12
DQ13
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
CKE1
CK1#
RAS#
ODT0
ODT1
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
GND2
BOSS2
+1.35V+1.35V
2
VSS
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
3
DDR_A_D9
DDR_A_D12
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D15
DDR_A_D11
DDR_A_D25
DDR3_DRAMRST#_CPU
DDR_A_D27
DDR_A_D26
DDR_A_D45DDR_A_D44
DDR_A_D40
DDR_A_D42
DDR_A_D46
DDR_A_D52
DDR_A_D53
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D55
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D7
DDR_A_D18
DDR_A_D19
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D23
DDR_A_D37
DDR_A_D32
DDR_A_D35
DDR_A_D39
DDR_A_D63
DDR_A_D59
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D56
DDR_A_D57
+0.675VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.35V
12
RD2
470_0402_5%
@ESD@
1
CD3
0.1U_0402_10V7K
2
CAD NOTE
PLACE THE CAP NEAR TO
DIMM RESET PIN
DDR_CKE1_DIMMA <7>
M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>
DDR_A_BS1 <7>
DDR_A_RAS# <7>
DDR_CS0_DIMMA# <7>
+SM_VREF_CA_DIMM
2.2U_0402_6.3V6M
CD22
1
2
DDR_PG_CTRL<6>
DDR3_DRAMRST#_CPU <6,18>
0.1U_0402_10V7K
CD23
1
2
UD1
NC1VCC
2
A
3
GND
74AUP1G07GW_TSSOP5
M_THERMAL# <18,41>
DDR_XDP_WLAN_TP_SMBDAT <6,9,18,36>
DDR_XDP_WLAN_TP_SMBCLK <6,9,18,36>
Compal Secret Data
Compal Secret Data
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+5VALW +1.35V
+1.35V
5
4
Y
DDR3L SODIMM ODT GENERATION
QD1
12
RD4
220K_0402_5%~D
@
RD10
2M_0402_5%
1 2
@
CD30
0.1U_0402_10V7K
1 2
BSS138-G_SOT23-3
1 3
D
S
G
2
0.675V_DDR_VTT_ON
M_ODT
1 2
RD5 66.5_0402_1%
1 2
RD6 66.5_0402_1%
1 2
RD7 66.5_0402_1%
1 2
RD8 66.5_0402_1%
1
@ESD@
CD21
0.1U_0402_10V7K
2
Place CD21
between QD1 and RD6
Title
Title
Title
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
M_ODT0
M_ODT1
M_ODT2 <18>
M_ODT3 <18>
0.675V_DDR_VTT_ON <50>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
17 56Friday, September 19, 2014
17 56Friday, September 19, 2014
1
17 56Friday, September 19, 2014
1.0
1.0
1.0
DQ4
DQ5
VSS
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
VDD
BA1
VDD
S0#
VDD
NC
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SDA
SCL
VTT
5
4
3
2
1
2-3A to 1 DIMMs/channel
+SM_VREF_DQ1_DIMM2
2.2U_0402_6.3V6M
0.1U_0402_10V7K
CD34
D D
C C
B B
Populate RD13, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD13 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<7>
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
+1.35V
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CD37
2
+1.35V
10U_0603_6.3V6M
CD45
1
2
Layout Note:
Place near JDIMM2
+0.675VS
0.1U_0402_10V7K
CD56
1
2
Layout Note:
Place near JDIMM2.203,204
1U_0402_6.3V6K
1
1
CD38
CD39
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
1
2
10U_0603_6.3V6M
@
CD46
0.1U_0402_10V7K
@
CD47
CD48
1
1
2
2
0.1U_0402_10V7K
CD57
CD58
1
2
1U_0402_6.3V6K
1
CD40
2
10U_0603_6.3V6M
CD49
1
2
0.1U_0402_10V7K
CD59
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD42
CD41
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD50
CD51
1
2
1
2
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CD61
CD60
1
2
All VREF traces should
have 10 mil trace width
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
CD43
CD44
2
2
10U_0603_6.3V6M
330U_D3_2.5VY_R6M
1
CD52
CD53
+
2
+3VS
1
2
12
RD15 10K_0402_5%
CD35
1
2
DDR_CKE2_DIMMB<7>
DDR_B_BS2<7>
M_CLK_DDR2<7>
M_CLK_DDR#2<7>
DDR_B_BS0<7>
DDR_B_WE#<7>
DDR_B_CAS#<7>
DDR_CS3_DIMMB#<7>
+3VS
10K_0402_5%
12
RD16
+1.35V +1.35V
JDIMM2
1
VREF_DQ
3
VSS
0.1U_0402_10V7K
CD63
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
FOX_AS0A621-J4RB-7H
CONN@
DDR_B_D8
DDR_B_D14
DDR_B_D10
DDR_B_D11
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26
DDR_B_D27
DDR_B_D40
DDR_B_D41
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D42
DDR_B_D56
DDR_B_D57
DDR_B_D59
DDR_B_D58
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D4
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D3
DDR_B_D7
DDR_B_D21
DDR_B_D20
DDR_B_D22
DDR_B_D23
DDR_B_D36
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D35
DDR_B_D39
DDR_B_D52
DDR_B_D49
DDR_B_D48
DDR_B_D53
+0.675VS
2.2U_0402_6.3V6M
1
@
CD62
2
1
2
DQS0#
DQS0
DQ12
DQ13
RESET#
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
CKE1
CK1#
RAS#
ODT0
ODT1
VREF_CA
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
EVENT#
GND2
BOSS2
2
VSS
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
DDR_B_D12
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D13
DDR_B_D15
DDR_B_D25
DDR_B_D24
DDR3_DRAMRST#_CPU
DDR_B_D30
DDR_B_D31
DDR_B_D45
DDR_B_D44
DDR_B_D47
DDR_B_D43
DDR_B_D61
DDR_B_D60
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D63
DDR_B_D62
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D5
DDR_B_D0
DDR_B_D2
DDR_B_D6
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D19
DDR_B_D18
DDR_B_D37
DDR_B_D32
DDR_B_D34
DDR_B_D38
DDR_B_D51
DDR_B_D55
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D50
+0.675VS
1
2
CAD NOTE
PLACE THE CAP NEAR TO
DIMM RESET PIN
DDR3_DRAMRST#_CPU <6,17>
@ESD@
CD36
0.1U_0402_10V7K
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>
M_ODT2 <17>
M_ODT3 <17>
M_THERMAL# <17,41>
DDR_XDP_WLAN_TP_SMBDAT <6,9,17,36>
DDR_XDP_WLAN_TP_SMBCLK <6,9,17,36>
+SM_VREF_CA_DIMM
2.2U_0402_6.3V6M
1
CD54
2
0.1U_0402_10V7K
CD55
1
2
DQ4
DQ5
VSS
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
VDD
BA1
VDD
S0#
VDD
NC
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SDA
SCL
VTT
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
LA-A301P
LA-A301P
LA-A301P
1
18 56Friday, September 19, 2014
18 56Friday, September 19, 2014
18 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
LCD power control
CV19
@
+3VS
12
UV3
5
OUT
IN
1
ENVDD_R
2
GND
4
OC
EN
SY6288C20AAC_SOT23-5
D D
4.7U_0805_10V4Z
ENVDD_PCH<10>
C C
RV6 0_0402_1%
LV1
FBMA-L11-201209-221LMA30T_0805
1
+LCDVDD
2
3
1 2
RV28
10K_0402_5%
1 2
+3VS
LCD backlight power control
QV6
SI3457CDV-T1-GE3_TSOP6
B+
W=60mils
RV12
100K_0402_5%
CV22
1000P_0402_50V7K
12
1
2
PWR_SRC_ON
12
RV15
100K_0402_5%
13
D
2
EN_INVPWR<41>
B B
100K_0402_5%
RV29
12
G
QV7
2N7002KW_SOT323-3
S
6
5
2
S
D
1
4
G
3
1
CV23
0.1U_0603_25V7K
2
W=60mils
Webcam power control
+3VS_CAM+3VS
1 2
@
RV18
0_0603_1%
TS_EN<41>
W=60milsW=60mils
+INV_PWR_SRC
4.7U_0805_10V4Z
+LCDVDD_CONN
CV21
4.7U_0805_10V4Z
CV14
0.1U_0402_10V7K
1
1
2
2
BKOFF#<41>
USB20_CAM_P5<12>
USB20_CAM_N5<12>
USB20_TOUCH_N4<12>
USB20_TOUCH_P4<12>
DV1
RB751V-40_SOD323-2
RV9 0_0402_5%
@EMI@
RV10 0_0402_5%
@EMI@
2
1
Touch screen panel power control
+5VS +VDD_TOUCH
1 2
RV536 0_0603_1%@
CV27
TS_EN
UV4
5
1
4
2
SY6288C20AAC_SOT23-5
@
1
OUT
IN
2
GND
3
1 2
OC
EN
@
RV533
10K_0402_5%
12
WCM-2012HS-900T_4P
4
4
1
1
LV2
EMI@
1 2
1 2
USB20_TOUCH_N4
USB20_TOUCH_P4
3
@ESD@
DV2
PESD5V0U2BT_SOT23-3
CV28
0.1U_0402_10V7K
1
+3VS
2
DISPOFF#
12
10K_0402_5%
RV5
3
3
2
2
CV29
4.7U_0805_10V4Z
1
2
USB20_CAM_P5_R
USB20_CAM_N5_R
@
EDP_TX0<6>
EDP_TX0#<6>
EDP_TX1<6>
EDP_TX1#<6>
EDP_TX2<6>
EDP_TX2#<6>
EDP_TX3<6>
EDP_TX3#<6>
EDP_AUX<6>
EDP_AUX#<6>
EDP_BIA_PWM<6,10>
DBC_EN<41>
CPU_EDP_HPD#<10>
+LCDVDD_CONN
RV11
100K_0402_5%
DBC_EN DBC_EN_R
MIC_CLK<31>
MIC_CLK MIC_CLK_R
+VDD_TOUCH
W=60mils
+3VS_CAM
MIC_DATA<31>
LCD_TEST<41>
12
+INV_PWR_SRC
1 2
@
RV172
0_0402_1%
1 2
12
CV120.1U_0402_16V7K
12
CV150.1U_0402_16V7K
12
CV160.1U_0402_16V7K
12
CV170.1U_0402_16V7K
12
CV1990.1U_0402_16V7K
12
CV1980.1U_0402_16V7K
12
CV2010.1U_0402_16V7K
12
CV2000.1U_0402_16V7K
12
CV180.1U_0402_16V7K
12
CV130.1U_0402_16V7K
0_0402_1%
@
RV531
0_0402_1%
CPU_EDP_HPD#
CE_EN_R
DBC_EN_R
USB20_CAM_P5_R
USB20_CAM_N5_R
TS_EN
MIC_CLK_R
MIC_GND
MIC_DATA
LCD_TEST
USB20_TOUCH_N4
USB20_TOUCH_P4
DISPOFF#
W=60mils
@
RV16
eDP connector
EDP_TX0_C
EDP_TX0#_C
EDP_TX1_C
EDP_TX1#_C
EDP_TX2_C
EDP_TX2#_C
EDP_TX3_C
EDP_TX3#_C
EDP_AUX_C
EDP_AUX#_C
+3VS +LCDVDD_CONN
0.1U_0402_10V7K
CV25
CV24
1
2
Place close to JEDP
CE_EN_R
12
12
@
RV17
0_0402_5%
1
CV420
15P_0402_50V8J
2
JEDP
1
1
2
2
G1
3
3
G2
4
4
G3
5
5
G4
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
ACES_50473-0400M-P01
CONN@
0.1U_0402_10V7K
10U_0805_10V6K
1
1
2
2
41
42
43
44
CV26
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
eDP/webcam/touch
eDP/webcam/touch
eDP/webcam/touch
LA-A301P
LA-A301P
LA-A301P
1
19 56Sunday, September 21, 2014
19 56Sunday, September 21, 2014
19 56Sunday, September 21, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
1 2
RV523 100K_0402_5%
1 2
RV524 100K_0402_5%
DISP_CLK_AUXP_CONN
DISP_DAT_AUXN_CONN
CAB_DET_SINK
12
RV525
1M_0402_5%
16
11
10
14
13
2
3
5
6
UV2
Vcc
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
DISP_DAT_AUXN_CONN
DISP_CLK_AUXP_CONN
4
1A
7
2A
9
3A
12
4A
15
OE#
1
S
8
GND
+5VS
1
CV372
0.1U_0402_10V6K
CPU_DPC_AUX<10>
CPU_DPC_CTRLCLK<10>
CPU_DPC_AUX#<10>
CPU_DPC_CTRLDAT<10>
C C
2
12
PCH_DP_AUXP_C
CV3710.1U_0402_10V7K
12
PCH_DP_AUXN_C
CV3700.1U_0402_10V7K
SN74CBT3257CPWR_TSSOP16
S = L, A port = B1 port (DP Port)
+3VS
S = H, A port = B2 port (HDMI/DVI/VGA Dongle)
Mini DP connector
1
GND
2
DPC_HPD<10>
DDI2_LANE_P0<6>
CAB_DET_SINK<11>
DDI2_LANE_N0<6>
DDI2_LANE_P1<6>
DDI2_LANE_P3<6>
DDI2_LANE_N1<6>
B B
+3VS_DP
+3VS
1 2
FV1
1.5A_6V_1206L150PR~D
CV11
0.1U_0402_16V7K~D
CV10
10U_0603_6.3V6M~D
1
1
2
2
DDI2_LANE_N3<6>
DDI2_LANE_P2<6>
DDI2_LANE_N2<6>
CAB_DET_SINK
1 2
CV2 0.1U_0402_10V7K~D
1 2
CV3 0.1U_0402_10V7K~D
1 2
RV4 5.1M_0402_5%
1 2
CV4 0.1U_0402_10V7K~D
1 2
CV5 0.1U_0402_10V7K~D
1 2
CV6 0.1U_0402_10V7K~D
1 2
CV7 0.1U_0402_10V7K~D
1 2
CV8 0.1U_0402_10V7K~D
1 2
CV9 0.1U_0402_10V7K~D
mDP_LANE_P0_C
mDP_LANE_N0_C
DISP_CEC
mDP_LANE_P1_C
mDP_LANE_P3_C
mDP_LANE_N1_C
mDP_LANE_N3_C
mDP_LANE_P2_C
DISP_CLK_AUXP_CONN
mDP_LANE_N2_C
DISP_DAT_AUXN_CONN
3
LANE0_P
4
5
LANE0_N
6
7
GND
8
9
LANE1_P
10
11
LANE1_N
12
13
GND
14
15
LANE2_P
16
17
LANE2_N
18
19
RETURN
20
21
22
23
24
GND
JDP
FOX_3V111T1-R24KKA-7H
CONN@
HPD
CONFIG1
CONFIG2
GND
LANE3_P
LANE3_N
GND
AUX_CHP
AUX_CHN
DP_PWR
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
sualaptop365.edu.vn
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
Mini DP
Mini DP
Mini DP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
20 56Friday, September 19, 2014
20 56Friday, September 19, 2014
20 56Friday, September 19, 2014
1.0
1.0
1.0
5
+1.5VS
4.7U_0603_6.3V6K
0.1U_0402_10V7K
D D
DDI1_LANE_P0<6>
DDI1_LANE_N0<6>
DDI1_LANE_P1<6>
DDI1_LANE_N1<6>
DDI1_LANE_P2<6>
DDI1_LANE_N2<6>
DDI1_LANE_P3<6>
DDI1_LANE_N3<6>
HDMI_HPLUG HDMI_PD#
C C
+3VS
12
RV194
4.7K_0402_5%
HDMI_ISET
12
@
RV195
4.7K_0402_5%
+3VS
12
RV196
B B
4.7K_0402_5%
HDMI_PRE
12
@
RV197
4.7K_0402_5%
1
CV422
2
CV40 0.1U_0402_10V7K
CV39 0.1U_0402_10V7K
CV38 0.1U_0402_10V7K
CV37 0.1U_0402_10V7K
CV36 0.1U_0402_10V7K
CV35 0.1U_0402_10V7K
CV32 0.1U_0402_10V7K
CV31 0.1U_0402_10V7K
1 2
RV540
10K_0402_5%
@
TMDS output swing adjustment; Internal 150K PD)
( ) L: default
(*) H: increase +13%
( ) M: reduce -13%
Output pre-emphasis setting(Internal 150K PD)
( ) L: no pre-emphasis
(*) H: 1.6dB pre-emphasis
( ) M: 3.0dB pre-emphasis
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
CV424
CV423
2
2
12
12
12
12
12
12
12
12
RV193
4.7K_0402_5%
1 2
1
CV425
2
12
@
RV541
20K_0402_1%
0.01U_0402_16V7K
1
CV426
2
TMDS_TX2P_C
TMDS_TX2N_C
TMDS_TX1P_C
TMDS_TX1N_C
TMDS_TX0P_C
TMDS_TX0N_C
TMDS_TXCP_C
TMDS_TXCN_C
HDMI_BUF
HDMI_DCIN_EN
HDMI_EQ
I2C_CTL_EN
HDMI_CFG
HDMI_PRE
19
20
31
12
40
1
2
4
5
6
7
9
10
14
13
17
8
18
36
23
16
4
UV12
VDDTA
VDDTX
VDDTX
VDDRX
VDDRX
IN_D2p
IN_D2n
IN_D1p
IN_D1n
IN_D0p
IN_D0n
IN_CKp
IN_CKn
DDCBUF/SDA_CTL
DCIN_EN/SCL_CTL
EQ/I2C_ADDR0
I2C_CTL_EN
REXT
PD#
CFG / I2C_ADD
PRE
PS8407ATQFN40GTR2A1_TQFN40_5X5
OUT_D2p
OUT_D2n
OUT_D1p
OUT_D1n
OUT_D0p
OUT_D0n
OUT_CKp
OUT_CKn
SDA_SRC
SCL_SRC
SDA_SNK
SCL_SNK
HPD_SRC
HPD_SNK
VDD33
VDD33
EPAD
3
Place close to JHDMI
+3VS
0.01U_0402_16V7K
1
CV428
2
RV23
2.2K_0402_5%
DPB_HPD <10>
0.1U_0402_10V7K
1
CV429
2
+5VS
RV24
2.2K_0402_5%
1 2
1 2
HDMI_CTRLDAT
HDMI_CTRLCLK
0.01U_0402_16V7K
1
CV427
11
37
30
29
27
26
25
24
22
21
39
38
33
32
3
34
ISET
28
15
GND
35
GND
41
+3VS
12
@
RV202
4.7K_0402_5%
HDMI_CFG
+3VS
12
@
RV203
4.7K_0402_5%
HDMI_DCIN_EN
2
TMDS_TX2P
TMDS_TX2N
TMDS_TX1P
TMDS_TX1N
TMDS_TX0P
TMDS_TX0N
TMDS_TXCP
TMDS_TXCN
CPU_DPB_CTRLDAT <10>
CPU_DPB_CTRLCLK <10>
HDMI_ISET
HDMI_HPLUG
CFG(Internal 150K PD)
(*) L: HDMI ID disable(default)
( ) H: HDMI ID enable
DC en(Internal 150K PD)
(*) L: AC coupling input(default)
( ) H: DC coupling input
TMDS_TXCN TMDS_L_TXCN
TMDS_TXCP
TMDS_TX0N
TMDS_TX0P
TMDS_TX1N
TMDS_TX1P
TMDS_TX2P TMDS_L_TX2P
TMDS_TX2N
WCM-2012HS-900T_4P
1
1
4
4
LV3
EMI@
WCM-2012HS-900T_4P
1
1
4
4
LV4
EMI@
WCM-2012HS-900T_4P
1
1
4
4
LV5
EMI@
LV6
EMI@
4
4
1
1
WCM-2012HS-900T_4P
2
2
3
3
2
2
3
3
2
2
3
3
3
3
2
2
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
2
12
+5VS
FV2
1.5A_6V_1206L150PR~D
HDMI_HPLUG
HDMI_CTRLDAT
HDMI_CTRLCLK
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TX2P
W=40mils
+3VS
12
@
RV19
10K_0402_5%
19
18
17
16
15
14
13
12
11
10
JHDMI
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
FUTUR_061-HA18-0001
CONN@
0.1U_0402_16V7K
GND
GND
GND
GND
+VDISPLAY_VCC
CV33
1
2
20
21
22
23
1
1
CV34
2
10U_0603_6.3V6M
ROYALTY HDMI W/LOGO
CPN:RO0000002HM
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_L_TX0N
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX2N
TMDS_L_TX2P
1 2
CV41 3.3P_0402_50V8C@EMI@
1 2
CV42 3.3P_0402_50V8C@EMI@
1 2
CV43 3.3P_0402_50V8C@EMI@
1 2
CV44 3.3P_0402_50V8C@EMI@
1 2
CV45 3.3P_0402_50V8C@EMI@
1 2
CV46 3.3P_0402_50V8C@EMI@
1 2
CV47 3.3P_0402_50V8C@EMI@
1 2
CV48 3.3P_0402_50V8C@EMI@
+3VS
12
RV198
4.7K_0402_5%
HDMI_EQ
12
@
RV199
4.7K_0402_5%
+3VS
12
RV200
A A
4.7K_0402_5%
HDMI_BUF
12
@
RV201
4.7K_0402_5%
Receiver equalization setting(Internal 150K PD)
( ) L: programmable EQ for channel loss up to 5.3dB
(*) H: programmable EQ for channel loss up to 10dB
( ) M: programmable EQ for channel loss up to 14dB
Enable active DDC buffer(Internal 150K PD)
( ) L: default, passive DDC pass-through
(*) H: active DDC buffer W/ internal PU 2.36K resistor
( ) M: active DDC buffer W/O internal PU resistor
sualaptop365.edu.vn
5
4
+3VS
12
@
RV537
4.7K_0402_5%
12
RV538
4.7K_0402_5%
I2C_CTL_EN
I2C control en(Internal 150K PD)
(*) L: auto jitter cleaning(default)
( ) H: I2C address
( ) M: full jitter cleaning
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
HDMI/PS8407A
HDMI/PS8407A
HDMI/PS8407A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
21 56Friday, September 19, 2014
21 56Friday, September 19, 2014
21 56Friday, September 19, 2014
1.0
1.0
1.0
5
UV1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA00007CM0L
R1N15P@
D D
UV1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA000084Q0L
R1N16P@
C C
DGPU_HOLD_RST#<10,41>
PCH_PLTRST#<10,34>
B B
UV1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA00007CM1L
R3N15P@
UV1
S IC CL8064701477802 SR1EF D0 1.7G A31!
SA000084Q1L
R3N16P@
1 2
RV58 10K_0402_5%
DGPU_HOLD_RST#
PCH_PLTRST#
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
+3VALW
5
1
P
B
O
2
A
G
UV14
3
TC7SH08FU_SSOP5~D
DV8
2
3
BAT54A-7-F_SOT23-3
PEG_CRX_GTX_P0_GPU<34>
PEG_CRX_GTX_N0_GPU<34>
PEG_CRX_GTX_P1_GPU<34>
PEG_CRX_GTX_N1_GPU<34>
PEG_CRX_GTX_P2_GPU<34>
PEG_CRX_GTX_N2_GPU<34>
PEG_CRX_GTX_P3_GPU<34>
PEG_CRX_GTX_N3_GPU<34>
1
CV212
2
@
0.1U_0402_10V7K
4
+3.3V_GFX_AON
12
1
10K_0402_5%
RV39
SYS_PEX_RST_MON#
12
@
0_0402_5%
12
RV208
RV187
10K_0402_5%
DGPU_PEX_RST#
GC6 2.0 function
2
1 2
1 3
D
RV56
10K_0402_5%
G
S
+3.3V_GFX_AON
RV57
10K_0402_5%
1 2
CLK_REQ
NVVDD_PWR_GD<25,52>
A A
CLKREQ#_GPU<9,34>
5
QV12
2N7002H 1N_SOT23-3
4
PEG_CTX_GRX_P0_GPU<34>
PEG_CTX_GRX_N0_GPU<34>
PEG_CTX_GRX_P1_GPU<34>
PEG_CTX_GRX_N1_GPU<34>
PEG_CTX_GRX_P2_GPU<34>
PEG_CTX_GRX_N2_GPU<34>
PEG_CTX_GRX_P3_GPU<34>
PEG_CTX_GRX_N3_GPU<34>
1 2
CV54 0.22U_0402_10V6K
1 2
CV55 0.22U_0402_10V6K
1 2
CV56 0.22U_0402_10V6K
1 2
CV57 0.22U_0402_10V6K
1 2
CV58 0.22U_0402_10V6K
1 2
CV59 0.22U_0402_10V6K
1 2
CV60 0.22U_0402_10V6K
1 2
CV61 0.22U_0402_10V6K
CLK_PEG_N15P<34>
CLK_PEG_N15P#<34>
1 2
@
RV47 200_0402_1%
DGPU_PEX_RST#
4
1 2
1 2
RV40 0_0402_1%
RV50 2.49K_0402_1%
VGA_SMB_CK2
VGA_SMB_DA2
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
CLK_REQ
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
DGPU_PEX_RST#_R
@
4
2N7002DW-T/R7_SOT363-6
QV1B
2
2N7002DW-T/R7_SOT363-6
QV1A
PEX_TERMP
SYS_PEX_RST_MON#
5
61
3
AM12
AM14
AM15
AM17
AM18
AM20
AM21
AM23
AM24
AM26
AM27
AN12
AN14
AP14
AP15
AN15
AN17
AP17
AP18
AN18
AN20
AP20
AP21
AN21
AN23
AP23
AP24
AN24
AN26
AP26
AP27
AN27
AK14
AH14
AG14
AK15
AK16
AK17
AH17
AG17
AK18
AK19
AK20
AH20
AG20
AK21
AK22
AK23
AH23
AG23
AK24
AK25
AK13
AK12
AK26
AP29
AJ14
AJ15
AL16
AJ17
AJ18
AL19
AJ20
AJ21
AL22
AJ23
AJ24
AL25
AJ11
AL13
AJ26
AJ12
N15P-GT_BGA908
@
UV1A
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
NC
PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_RST_N
PEX_TERMP
EC_SMB_CK2 <9,40,41>
EC_SMB_DA2 <9,40,41>
3
Part 1 of 7
GPIO
DACs
PCI EXPRESS
CLK
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2C
I2CS_SCL
I2CS_SDA
PLLVDD
SP_PLLVDD
VID_PLLVDD
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
P6
M3
L6
P5
P7
L7
M7
N8
L3
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1
AK9
AL10
AL9
AM9
AN9
AG10
AP9
AP8
R4
R5
R7
R6
R2
R3
T4
T3
AD8
AE8
AD7
H3
H2
J4
H1
Internal Thermal Sensor
3
2
GPU_GC6_FB_EN
3V3_MAIN_EN
GC6_EVENT#_D
SYS_PEX_RST_MON#
THERMAL_ALERT#
MEM_VREF
NVVDD PWM_VID
GPU_LEVEL
NVVDD PSI
GPU_PEX_RST_HOLD#
VGA_CRT_CLK
VGA_CRT_DATA
RV510 1.8K_0402_5%
RV511 1.8K_0402_5%
I2CB_SCL
I2CB_SDA
RV512 1.8K_0402_5%
RV513 1.8K_0402_5%
VGA_EDID_CLK
VGA_EDID_DATA
RV514 1.8K_0402_5%
RV515 1.8K_0402_5%
VGA_SMB_CK2
VGA_SMB_DA2
W=78mils
+PLLVDD
W=71mils
W=41mils
XTALIN
XTAL_OUT
XTALOUT
1 2
XTALSSIN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
GPU_GC6_FB_EN <11,25,41>
3V3_MAIN_EN <25,52>
NVVDD PWM_VID <52>
NVVDD PSI <52>
THERMAL_ALERT#
OVERT#
OVERT#<23>
1 2
1 2
1 2
1 2
1 2
1 2
@
RV45
0_0402_5%
1 2
+SP_PLLVDD
RV4910K_0402_5%
XTALIN XTAL_OUT
CV70
10P_0402_50V8J
12
RV51
10K_0402_5%
1 2
RV52 10M_0402_5%
YV1
27MHZ_10PF_7V27000050
1
1
3
GND
GND
2
4
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
RV27
100K_0402_5%~D
1 2
SYS_PEX_RST_MON#
5
3
4
2N7002DW-T/R7_SOT363-6
QV2B
SYS_PEX_RST_MON#
2
61
2N7002DW-T/R7_SOT363-6
QV2A
GPU_LEVEL
3
CV71
10P_0402_50V8J
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
MEM_VREF <27,28>
+3.3V_GFX_AON
5
Y4VCC
3
+1.05VS_VGA
GPU_ALERT# <41>
GPU_OVERT# <41>
1
CV421
2
@
0.1U_0402_10V7K
1
B
2
A
G
UV15
MC74VHC1G09DFT2G_SC70-5
180 ohm
(ESR=0.2) Bead
+PLLVDD
CV72 under GPU
CV73 near GPU
RB751S40T1G_SOD523-2
GPU_PWR_LEVEL <41>
ACIN <10,37,41,47,48>
LV7
BLM18PG181SN1D_2P
1 2
1
2
0.1U_0402_10V7K
1
12
DV9
GC6_EVENT#GC6_EVENT#_D
THERMAL_ALERT#
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
3V3_MAIN_EN
GC6_EVENT#_D
GPU_LEVEL
NVVDD PSI
VGA_SMB_CK2
VGA_SMB_DA2
GPU_GC6_FB_EN
MEM_VREF
GC6_EVENT# <11,41>
1 2
RV526 10K_0402_5%
1 2
RV532 10K_0402_5%@
1 2
RV41 10K_0402_5%
1 2
RV55 10K_0402_1%
1 2
RV42 10K_0402_5%
RV60 100K_0402_5%~D
1 2
RV35 10K_0402_1%
1 2
RV191 1.8K_0402_5%
1 2
RV192 1.8K_0402_5%
1 2
RV37 10K_0402_5%
RV38 100K_0402_5%~D@
GPU_PWR_LEVEL
Low
High
12
12
Low Performace
High Performace
150mA
1
1
1
CV51
CV50
2
2
22U_0805_6.3V6M
4.7U_0402_6.3V6M
1 2
LV8
1
CV72
BLM18PG181SN1D_2P
CV73
2
30 ohm@100MHz (ESR=0.05)
22U_0805_6.3V6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
N15P_PCIE/DAC/GPIO
N15P_PCIE/DAC/GPIO
N15P_PCIE/DAC/GPIO
1
CV52
CV53
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
Under GPU
(below 150mils)
+1.05VS_VGA
LA-A301P
LA-A301P
LA-A301P
1
+3.3V_GFX_AON
+3.3V_GFX_AON
+SP_PLLVDD
22 56Tuesday, September 23, 2014
22 56Tuesday, September 23, 2014
22 56Tuesday, September 23, 2014
1.0
1.0
1.0
sualaptop365.edu.vn
5
4
3
2
1
UV1D
AM6
IFPA_TXC
AN6
IFPA_TXC_N
AP3
IFPA_TXD0
D D
C C
B B
AN3
IFPA_TXD0_N
AN5
IFPA_TXD1
AM5
IFPA_TXD1_N
AL6
IFPA_TXD2
AK6
IFPA_TXD2_N
AJ6
IFPA_TXD3
AH6
IFPA_TXD3_N
AJ9
IFPB_TXC
AH9
IFPB_TXC_N
AP6
IFPB_TXD4
AP5
IFPB_TXD4_N
AM7
IFPB_TXD5
AL7
IFPB_TXD5_N
AN8
IFPB_TXD6
AM8
IFPB_TXD6_N
AK8
IFPB_TXD7
AL8
IFPB_TXD7_N
AK1
IFPC_L0
AJ1
IFPC_L0_N
AJ3
IFPC_L1
AJ2
IFPC_L1_N
AH3
IFPC_L2
AH4
IFPC_L2_N
AG5
IFPC_L3
AG4
IFPC_L3_N
AM1
IFPD_L0
AM2
IFPD_L0_N
AM3
IFPD_L1
AM4
IFPD_L1_N
AL3
IFPD_L2
AL4
IFPD_L2_N
AK4
IFPD_L3
AK5
IFPD_L3_N
AD2
IFPE_L0
AD3
IFPE_L0_N
AD1
IFPE_L1
AC1
IFPE_L1_N
AC2
IFPE_L2
AC3
IFPE_L2_N
AC4
IFPE_L3
AC5
IFPE_L3_N
AE3
IFPF_L0
AE4
IFPF_L0_N
AF4
IFPF_L1
AF5
IFPF_L1_N
AD4
IFPF_L2
AD5
IFPF_L2_N
AG1
IFPF_L3
AF1
IFPF_L3_N
AG3
IFPC_AUX_I2CW_SCL
AG2
IFPC_AUX_I2CW_SDA_N
AK3
IFPD_AUX_I2CX_SCL
AK2
IFPD_AUX_I2CX_SDA_N
AB3
IFPE_AUX_I2CY_SCL
AB4
IFPE_AUX_I2CY_SDA_N
AF3
IFPF_AUX_I2CZ_SCL
AF2
IFPF_AUX_I2CZ_SDA_N
Part 4 of 7
3V3AUX_NC
VDD_SENSE
GND_SENSE
TEST
TESTMODE
JTAG_TRST_N
SERIAL
ROM_CS_N
ROM_SCLK
LVDS/TMDS
GENERAL
MULTI_STRAP_REF0_GND
NC
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
ROM_SI
ROM_SO
BUFRST_N
OVERT
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
THERMDP
THERMDN
P8
AC6
NC
AJ28
NC
AJ4
NC
AJ5
NC
AL11
NC
C15
NC
D19
NC
D20
NC
D23
NC
D26
NC
H31
NC
T8
NC
V32
NC
L4
L5
AK11
TESTMODE
AM10
GPU_JTAG_TCK
AM11
GPU_JTAG_TDI
AP12
GPU_JTAG_TDO
AP11
GPU_JTAG_TMS
AN11
GPU_JTAG_TRST#
H6
ROM_CS
H4
ROM_SCLK
H5
ROM_SI
H7
ROM_SO
L2
RV64 10K_0402_5%
M1
J1
RV66 40.2K_0402_1%
J2
J7
J6
J5
J3
K3
K4
trace width: 16mils
differential voltage sensing.
differential signal routing.
VCCSENSE_VGA
VSSSENSE_VGA
OVERT#
1 2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
1 2
12
VCCSENSE_VGA <52>
VSSSENSE_VGA <52>
T98PAD~D @
T99PAD~D @
T100PAD~D @
T101PAD~D @
RV63
10K_0402_5%
ROM_CS <29>
ROM_SCLK <29>
ROM_SI <29>
ROM_SO <29>
STRAP0 <29>
STRAP1 <29>
STRAP2 <29>
STRAP3 <29>
STRAP4 <29>
12
RV62
10K_0402_5%
+3.3V_GFX_AON
RV34
10K_0402_5%
1 2
OVERT# <22>
N15P-GT_BGA908
@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
N15P_eDP/HDMI/mDP
N15P_eDP/HDMI/mDP
N15P_eDP/HDMI/mDP
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
23 56Friday, September 19, 2014
23 56Friday, September 19, 2014
23 56Friday, September 19, 2014
1.0
5
4
3
2
1
+1.35VS_VGA
D D
+1.35VS_VGA
1
CV100
2
1U_0402_6.3V6K
+1.35VS_VGA
C C
B B
For GDDR5 setting. Near GPU
1
1
1
1
CV75
CV74
2
2
4.7U_0603_6.3V6K
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV76
CV110
2
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
Under GPU(below 150mils)
1
CV102
CV101
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CV112
CV103
2
2
1U_0402_6.3V6K
1
1
1
Under GPU(below 150mils)
1
1
CV211
2
1U_0402_6.3V6K
1
CV210
2
2
0.1U_0402_10V7K
1U_0402_6.3V6K
2
1
CV77
2
4.7U_0603_6.3V6K
1
CV113
2
1U_0402_6.3V6K
1
CV209
2
0.1U_0402_10V7K
2
CV79
CV78
10U_0603_6.3V6M
CV206
CV80
1
1
10U_0603_6.3V6M
1
1
CV105
CV104
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CV207
CV208
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
CALIBRATION PIN GDDR5
FB_CAL_x_PD_VDDQ
FB_CAL_x_PU_GND
FB_CAL_xTERM_GND
40.2 ohm
40.2 ohm
60.4 ohm
1
1
2
22U_0805_6.3V6M
1
1
CV106
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
CV205
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.35VS_VGA
1
CV84
CV83
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
CV108
CV107
2
0.1U_0402_10V7K
1
CV203
CV215
2
0.1U_0402_10V7K
1 2
RV77 40.2_0402_1%
1 2
RV78 40.2_0402_1%
1 2
RV79 60.4_0402_1%
1
CV85
CV86
2
22U_0805_6.3V6M
1
CV109
2
0.1U_0402_10V7K
1
CV204
2
0.1U_0402_10V7K
Place near balls
AA27
FBVDDQ_0
AA30
FBVDDQ_1
AB27
FBVDDQ_2
AB33
FBVDDQ_3
AC27
FBVDDQ_4
AD27
FBVDDQ_5
AE27
FBVDDQ_6
AF27
FBVDDQ_7
AG27
FBVDDQ_8
B13
FBVDDQ_9
B19
FBVDDQ_11
E13
FBVDDQ_12
E19
FBVDDQ_14
H10
FBVDDQ_15
H11
FBVDDQ_16
H12
FBVDDQ_17
H13
FBVDDQ_18
H14
FBVDDQ_19
H18
FBVDDQ_22
H19
FBVDDQ_23
H20
FBVDDQ_24
H21
FBVDDQ_25
H22
FBVDDQ_26
H23
FBVDDQ_27
H24
FBVDDQ_28
H8
FBVDDQ_29
H9
FBVDDQ_30
L27
FBVDDQ_31
M27
FBVDDQ_32
N27
FBVDDQ_33
P27
FBVDDQ_34
R27
FBVDDQ_35
T27
FBVDDQ_36
T30
FBVDDQ_37
T33
FBVDDQ_38
Y27
FBVDDQ_43
B16
FBVDDQ_AON
E16
FBVDDQ_AON
H15
FBVDDQ_AON
H16
FBVDDQ_AON
V27
FBVDDQ_AON
W27
FBVDDQ_AON
W30
FBVDDQ_AON
W33
FBVDDQ_AON
F1
FB_VDDQ_SENSE
F2
FB_GND_SENSE
J27
FB_CAL_PD_VDDQ
H27
FB_CAL_PU_GND
H25
FB_CAL_TERM_GND
@
UV1E
Part 5 of 7
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_PLL_HVDD
PEX_SVDD_3V3
PEX_PLLVDD
POWER
IFPAB_PLLVDD
IFPAB_RSET
IFPA_IOVDD
IFPB_IOVDD
IFPC_PLLVDD
IFPC_IOVDD
IFPD_PLLVDD
IFPD_IOVDD
IFPEF_PLVDD
IFPEF_RSET
IFPE_IOVDD
IFPF_IOVDD
3V3_AON
3V3_AON
3V3_MAIN
3V3_MAIN
IFPC_RSET
+1.05VS_VGA
2
CV111
1
10U_0603_6.3V6M
+3.3V_GFX_AON
Place near balls Place near GPU
1
1
CV202
2
0.1U_0402_10V7K
+3VS_VGA
1
CV120
2
+1.05VS_VGA
1
CV214
CV213
2
2
4.7U_0603_6.3V6K
1U_0402_6.3V6K
150mA
1
CV123
2
4.7U_0805_25V6-K
1
2
1U_0402_6.3V6K
1
CV96
2
+3VS_VGA
Under GPU
1
CV87
2
1U_0402_6.3V6K
1
CV97
2
22U_0805_6.3V6M
CV88
1
2
22U_0805_6.3V6M
210mA
1
CV89
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CV99
CV98
2
22U_0805_6.3V6M
Near GPU
85mA
Near GPU
1
1
CV91
2
4.7U_0603_6.3V6K
+1.05VS_VGA
1
CV92
2
4.7U_0603_6.3V6K
1
CV114
2
0.1U_0402_10V7K
CV90
2
2
1
10U_0603_6.3V6M
4.7U_0603_6.3V6K
CV93
10U_0603_6.3V6M
+3.3V_GFX_AON
1
CV115
2
4.7U_0603_6.3V6K
2
2
CV94
CV95
1
1
10U_0603_6.3V6M
1
CV116
2
Place near balls Place near GPU
1
CV117
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
2
0.1U_0402_10V7K
CV119
CV118
2
4.7U_0603_6.3V6K
1U_0402_6.3V6K
1
1
CV121
CV122
2
2
1U_0603_10V6K
Place near balls
AG19
3500mA
AG21
AG22
AG24
AH21
AH25
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
AH12
AG12
AG26
J8
K8
L8
M8
AH8
AJ8
AG8
AG9
AF7
AF8
AF6
AG7
AN2
NC
AG6
AB8
AD6
AC7
AC8
+3.3V_GFX_AON
+3.3V_GFX_AON
150mA
+3.3V_GFX_AON
85mA
22U_0805_6.3V6M
+3.3V_GFX_AON
S
G
+3.3V_GFX_AON
D
123
LA-A301P
LA-A301P
LA-A301P
1
0.1U_0402_25V6
CV363
12
1.0
1.0
24 56Friday, October 17, 2014
24 56Friday, October 17, 2014
24 56Friday, October 17, 2014
1.0
+5VALW
+3VS
12
RV528
10K_0402_5%
DGPU_PWR_EN<10>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2
G
+3VS
12
RV184
100K_0402_5%
DGPU_PWR_EN#
L2N7002WT1G_SC-70-3
13
D
QV87
S
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
QV86
LP2301ALT1G_SOT23-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N15P_Power
N15P_Power
N15P_Power
5
58+30%A
+VGA_CORE
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22
U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
NC
Y2
NC
Y3
NC
Y4
Y5
Y6
Y7
Y8
AA1
NC
AA2
NC
AA3
NC
AA4
NC
AA5
NC
AA6
NC
AA7
NC
AA8
NC
CV410
CV411
22U_0805_6.3VAM
1
2
CV413
22U_0805_6.3VAM
CV412
22U_0805_6.3VAM
1
2
1
1
2
2
+VGA_CORE
CV419
4.7U_0603_6.3V6K
1
2
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
CV405
4.7U_0603_6.3V6K
UV1G
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
N15P-GT_BGA908
@
CV406
4.7U_0603_6.3V6K
1
1
2
2
4.7U_0603_6.3V6K
Part 7 of 7
CV407
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8
XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
POWER
XVDD_16
XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22
XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
22U_0805_6.3VAM
CV408
4.7U_0603_6.3V6K
CV409
4.7U_0603_6.3V6K
1
1
2
1
2
2
+VGA_CORE
D D
C C
B B
4
3V3_MAIN_EN<22,52>
330U_D3_2.5VY_R6M
330U_D3_2.5VY_R6M
1
CV414
22U_0805_6.3VAM
CV415
22U_0805_6.3VAM
1
1
2
2
1
CV416
22U_0805_6.3VAM
NVVDD_PWR_GD<22,52>
GPU_GC6_FB_EN<11,22,41>
CV418
CV417
1
+
+
2
2
2
DV7
NVVDD_PWR_GD
3
2
BAT54CW_SOT323-3
1
+1.05VS
12
+3VS
200K_0402_5%
3V3_MAIN_EN
RV209
3
+3VS_VGA / +1.05VS_VGA
NVVDD_PWR_GD
+3VALW
100K_0402_5%
12
RV182
DGPU_PWR_ON#
DMN66D0LDW-7_SOT363-6
6
2
1
QV84A
UV11
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
AOZ1331_SON14_2X3
+5VALW
12
14
VOUT1
13
VOUT1
12
CT1
11
GND
10
CT2
9
VOUT2
8
VOUT2
15
GPAD
B+_BIAS
470K_0402_5%
470K_0402_5%
@
12
RV183
RV529
DMN66D0LDW-7_SOT363-6
34
QV84B
5
CO26
1 2
220P_0402_50V8J
@
CO28
1 2
220P_0402_50V8J
@
+1.35VS_VGA
QV83
AON6508_SON8-5
5
DGPU_PWR_ON
2.2M_0402_5%
0.01U_0402_16V7K
12
RV180
CV366
1
2
2
UV1F
A2
GND_0
AA17
GND_1
AA18
GND_2
AA20
GND_3
AA22
GND_4
AB12
GND_5
AB14
GND_6
AB16
GND_7
AB19
GND_8
AB2
GND_9
AB21
GND_10
A33
GND_11
AB23
GND_12
AB28
GND_13
AB30
+3VS_VGA
60mil
+1.05VS_VGA
60mil
+1.35VS_VGA+1.35V
1
2
3
20K_0402_5%
10U_0603_6.3V6M
12
RV181@
CV365
12
4
AB32
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE28
AE30
AE32
AE33
AH10
AA15
AH13
AH16
AH19
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AK10
AL12
AL14
AL15
AL17
AL18
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AM13
AM16
AM19
AM22
AM25
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AP33
AB5
AB7
AE2
AE5
AE7
AH2
AH5
AH7
AJ7
AK7
AL2
AL5
AN1
AN4
AN7
AP2
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
N15P-GT_BGA908
@
Part 6 of 7
GND
1
GND_OPT
GND_OPT
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
N15P_VGA CORE/GND
N15P_VGA CORE/GND
N15P_VGA CORE/GND
LA-A301P
LA-A301P
LA-A301P
1
25 56Friday, September 19, 2014
25 56Friday, September 19, 2014
25 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
FBA_D[0..63]<27>
30ohms (ESR=0.01) Bead
D D
C C
B B
A A
P/N;SM010007W00
+1.05VS_VGA +FB_PLLAVDD
1 2
300mA
LV13
PBY160808T-300Y-N_2P
+FB_PLLAVDD
22U_0805_6.3V6M~D
CV151
1
2
@
RV97
0_0402_1%
FBA_EDC[7..0]<27>
FBA_AVDD_1.05_3.3V
12
FBA_DBI0#<27>
FBA_DBI1#<27>
FBA_DBI2#<27>
FBA_DBI3#<27>
FBA_DBI4#<27>
FBA_DBI5#<27>
FBA_DBI6#<27>
FBA_DBI7#<27>
FBA_D[0..63]
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DBI0#
FBA_DBI1#
FBA_DBI2#
FBA_DBI3#
FBA_DBI4#
FBA_DBI5#
FBA_DBI6#
FBA_DBI7#
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AK29
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33
AD31
AM32
AF34
AE31
AK30
AN33
AF33
AF30
AK31
AM34
AF32
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AJ29
AJ30
AL31
P30
F31
F34
M32
AL29
M31
G31
E33
M33
M30
H30
E34
M34
UV1B
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
N15P-GT_BGA908
@
Part 2 of 7
MEMORY INTERFACE
A
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FB_CLAMP
FB_DLL_AVDD
FBA_PLL_AVDD
FB_VREF
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
R28
AC28
R32
AC32
R30
FBA_CLK0
R31
FBA_CLK0#
AB31
FBA_CLK1
AC31
FBA_CLK1#
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
NC
J31
NC
J32
NC
J33
NC
AH31
NC
AJ31
NC
AJ32
NC
AJ33
NC
RV104 10K_0402_5%
E1
K27
U27
H26
FBA_CS#_L
FBA_MA3_BA3_L
FBA_MA2_BA0_L
FBA_MA4_BA2_L
FBA_MA5_BA1_L
FBA_WE#_L
FBA_MA7_MA8_L
FBA_MA6_MA11_L
FBA_ABI#_L
FBA_MA12_RFU_L
FBA_MA0_MA10_L
FBA_MA1_MA9_L
FBA_RAS#_L
FBA_RST#_L
FBA_CKE_L
FBA_CAS#_L
FBA_CS#_H
FBA_MA3_BA3_H
FBA_MA2_BA0_H
FBA_MA4_BA2_H
FBA_MA5_BA1_H
FBA_WE#_H
FBA_MA7_MA8_H
FBA_MA6_MA11_H
FBA_ABI#_H
FBA_MA12_RFU_H
FBA_MA0_MA10_H
FBA_MA1_MA9_H
FBA_RAS#_H
FBA_RST#_H
FBA_CKE_H
FBA_CAS#_H
FBA_WCK0
FBA_WCK0_N
FBA_WCK1
FBA_WCK1_N
FBA_WCK2
FBA_WCK2_N
FBA_WCK3
FBA_WCK3_N
CV152 0.1U_0402_10V7K
1 2
Place close to ball
12
1
2
0.1U_0402_10V7K
FBA_CS#_L <27>
FBA_MA3_BA3_L <27>
FBA_MA2_BA0_L <27>
FBA_MA4_BA2_L <27>
FBA_MA5_BA1_L <27>
FBA_WE#_L <27>
FBA_MA7_MA8_L <27>
FBA_MA6_MA11_L <27>
FBA_ABI#_L <27>
FBA_MA12_RFU_L <27>
FBA_MA0_MA10_L <27>
FBA_MA1_MA9_L <27>
FBA_RAS#_L <27>
FBA_RST#_L <27>
FBA_CAS#_L <27>
FBA_CS#_H <27>
FBA_MA3_BA3_H <27>
FBA_MA2_BA0_H <27>
FBA_MA4_BA2_H <27>
FBA_MA5_BA1_H <27>
FBA_WE#_H <27>
FBA_MA7_MA8_H <27>
FBA_MA6_MA11_H <27>
FBA_ABI#_H <27>
FBA_MA12_RFU_H <27>
FBA_MA0_MA10_H <27>
FBA_MA1_MA9_H <27>
FBA_RAS#_H <27>
FBA_RST#_H <27>
FBA_CAS#_H <27>
FBA_CLK0 <27>
FBA_CLK0# <27>
FBA_CLK1 <27>
FBA_CLK1# <27>
FBA_WCK0 <27>
FBA_WCK0_N <27>
FBA_WCK1 <27>
FBA_WCK1_N <27>
FBA_WCK2 <27>
FBA_WCK2_N <27>
FBA_WCK3 <27>
FBA_WCK3_N <27>
+FB_PLLAVDD
1
CV154
2
1U_0402_6.3V6K
FBA_AVDD_1.05_3.3V
1
CV155
2
22U_0805_6.3V6M
Place close to ball Place close to BGA
FBA_RST#_L
FBA_RST#_H
12
12
RV107
RV108
10K_0402_5%
10K_0402_5%
50mA
CV156
+1.35VS_VGA
+1.35VS_VGA
FBC_EDC[7..0]<28>
120mA
FBC_RST#_L
FBC_RST#_H
12
RV95
10K_0402_5%
FBA_CKE_L <27>
12
RV98
10K_0402_5%
FBA_CKE_H <27>
FBC_DBI0#<28>
FBC_DBI1#<28>
FBC_DBI2#<28>
FBC_DBI3#<28>
FBC_DBI4#<28>
FBC_DBI5#<28>
FBC_DBI6#<28>
FBC_DBI7#<28>
FBA_AVDD_1.05_3.3V
12
RV110
10K_0402_5%
FBC_D[0..63]<28>
12
RV111
10K_0402_5%
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DBI0#
FBC_DBI1#
FBC_DBI2#
FBC_DBI3#
FBC_DBI4#
FBC_DBI5#
FBC_DBI6#
FBC_DBI7#
FBC_EDC0
FBC_EDC1
FBC_EDC2
FBC_EDC3
FBC_EDC4
FBC_EDC5
FBC_EDC6
FBC_EDC7
FBC_D[0..63]
UV1C
G9
FBB_D0
E9
FBB_D1
G8
FBB_D2
F9
FBB_D3
F11
FBB_D4
G11
FBB_D5
F12
FBB_D6
G12
FBB_D7
G6
FBB_D8
F5
FBB_D9
E6
FBB_D10
F6
FBB_D11
F4
FBB_D12
G4
FBB_D13
E2
FBB_D14
F3
FBB_D15
C2
FBB_D16
D4
FBB_D17
D3
FBB_D18
C1
FBB_D19
B3
FBB_D20
C4
FBB_D21
B5
FBB_D22
C5
FBB_D23
A11
FBB_D24
C11
FBB_D25
D11
FBB_D26
B11
FBB_D27
D8
FBB_D28
A8
FBB_D29
C8
FBB_D30
B8
FBB_D31
F24
FBB_D32
G23
FBB_D33
E24
FBB_D34
G24
FBB_D35
D21
FBB_D36
E21
FBB_D37
G21
FBB_D38
F21
FBB_D39
G27
FBB_D40
D27
FBB_D41
G26
FBB_D42
E27
FBB_D43
E29
FBB_D44
F29
FBB_D45
E30
FBB_D46
D30
FBB_D47
A32
FBB_D48
C31
FBB_D49
C32
FBB_D50
B32
FBB_D51
D29
FBB_D52
A29
FBB_D53
C29
FBB_D54
B29
FBB_D55
B21
FBB_D56
C23
FBB_D57
A21
FBB_D58
C21
FBB_D59
B24
FBB_D60
C24
FBB_D61
B26
FBB_D62
C26
FBB_D63
E11
FBB_DQM0
E3
FBB_DQM1
A3
FBB_DQM2
C9
FBB_DQM3
F23
FBB_DQM4
F27
FBB_DQM5
C30
FBB_DQM6
A24
FBB_DQM7
D10
FBB_DQS_WP0
D5
FBB_DQS_WP1
C3
FBB_DQS_WP2
B9
FBB_DQS_WP3
E23
FBB_DQS_WP4
E28
FBB_DQS_WP5
B30
FBB_DQS_WP6
A23
FBB_DQS_WP7
D9
FBB_DQS_RN0
E4
FBB_DQS_RN1
B2
FBB_DQS_RN2
A9
FBB_DQS_RN3
D22
FBB_DQS_RN4
D28
FBB_DQS_RN5
A30
FBB_DQS_RN6
B23
FBB_DQS_RN7
N15P-GT_BGA908
@
Part 3 of 7
MEMORY INTERFACE B
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35
FBB_CLK0
FBB_CLK0_N
FBB_CLK1
FBB_CLK1_N
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_PLL_AVDD
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
G14
G20
C12
C20
D12
E12
E20
F20
F8
E8
A5
A6
D24
D25
B27
C27
D6
NC
D7
NC
C6
NC
B6
NC
F26
NC
E26
NC
A26
NC
A27
NC
H17
FBC_CS#_L
FBC_MA3_BA3_L
FBC_MA2_BA0_L
FBC_MA4_BA2_L
FBC_MA5_BA1_L
FBC_WE#_L
FBC_MA7_MA8_L
FBC_MA6_MA11_L
FBC_ABI#_L
FBC_MA12_RFU_L
FBC_MA0_MA10_L
FBC_MA1_MA9_L
FBC_RAS#_L
FBC_RST#_L
FBC_CKE_L
FBC_CAS#_L
FBC_CS#_H
FBC_MA3_BA3_H
FBC_MA2_BA0_H
FBC_MA4_BA2_H
FBC_MA5_BA1_H
FBC_WE#_H
FBC_MA7_MA8_H
FBC_MA6_MA11_H
FBC_ABI#_H
FBC_MA12_RFU_H
FBC_MA0_MA10_H
FBC_MA1_MA9_H
FBC_RAS#_H
FBC_RST#_H
FBC_CKE_H
FBC_CAS#_H
FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#
FBC_WCK0
FBC_WCK0_N
FBC_WCK1
FBC_WCK1_N
FBC_WCK2
FBC_WCK2_N
FBC_WCK3
FBC_WCK3_N
1
CV153
2
0.1U_0402_10V7K
Place close to ball
FBC_CS#_L <28>
FBC_MA3_BA3_L <28>
FBC_MA2_BA0_L <28>
FBC_MA4_BA2_L <28>
FBC_MA5_BA1_L <28>
FBC_WE#_L <28>
FBC_MA7_MA8_L <28>
FBC_MA6_MA11_L <28>
FBC_ABI#_L <28>
FBC_MA12_RFU_L <28>
FBC_MA0_MA10_L <28>
FBC_MA1_MA9_L <28>
FBC_RAS#_L <28>
FBC_RST#_L <28>
FBC_CAS#_L <28>
FBC_CS#_H <28>
FBC_MA3_BA3_H <28>
FBC_MA2_BA0_H <28>
FBC_MA4_BA2_H <28>
FBC_MA5_BA1_H <28>
FBC_WE#_H <28>
FBC_MA7_MA8_H <28>
FBC_MA6_MA11_H <28>
FBC_ABI#_H <28>
FBC_MA12_RFU_H <28>
FBC_MA0_MA10_H <28>
FBC_MA1_MA9_H <28>
FBC_RAS#_H <28>
FBC_RST#_H <28>
FBC_CAS#_H <28>
FBC_CLK0 <28>
FBC_CLK0# <28>
FBC_CLK1 <28>
FBC_CLK1# <28>
FBC_WCK0 <28>
FBC_WCK0_N <28>
FBC_WCK1 <28>
FBC_WCK1_N <28>
FBC_WCK2 <28>
FBC_WCK2_N <28>
FBC_WCK3 <28>
FBC_WCK3_N <28>
FBA_AVDD_1.05_3.3V
120mA
PU for X32 modePU for X32 mode
+1.35VS_VGA
12
+1.35VS_VGA
12
RV96
10K_0402_5%
RV99
10K_0402_5%
FBC_CKE_H <28>
FBC_CKE_L <28>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
N15P_MEM Interface
N15P_MEM Interface
N15P_MEM Interface
LA-A301P
LA-A301P
LA-A301P
1
26 56Friday, September 19, 2014
26 56Friday, September 19, 2014
26 56Friday, September 19, 2014
of
1.0
1.0
1.0
sualaptop365.edu.vn
5
Memory Partition A - Lower 32 bits
FBA_D[0..63]< 26>
FBA_EDC[7..0]<26>
UV7
K4G41325FC-HC03
SA00007D800
UV9
K4G41325FC-HC03
SA00007D800
1 2
RV122 40.2_0402_1%
RV123
160_0402_1%
@
1 2
1 2
RV124 40.2_0402_1%
MEM_VREF<22,28>
+1.35VS_VGA
2
1
10U_0603_6.3V6M
S4G@
CV373
UV6
S4G@
K4G41325FC-HC03
D D
SA00007D800
UV8
S4G@
K4G41325FC-HC03
SA00007D800
FBA_CLK0
C C
FBA_CLK0#
B B
A A
S4G@
2
G
10U_0603_6.3V6M
1
2
0.01U_0402_25V7K
13
D
S
2N7002W-T/R7_SOT323-3
2
CV160
1
1U_0603_25V6
FBA_D[0..63]
FBA_EDC[7..0]
FBA_DBI0#<26>
FBA_DBI1#< 26>
FBA_DBI2#<26>
FBA_DBI3#< 26>
FBA_CLK0<26>
FBA_CLK0#<26>
FBA_CKE_L<26> FBA_CKE_H<26>
FBA_MA2_BA0_L<26>
FBA_MA5_BA1_L<26>
FBA_MA4_BA2_L<26>
FBA_MA3_BA3_L<26>
FBA_MA7_MA8_L<26>
FBA_MA1_MA9_L<26>
FBA_MA0_MA10_L<26>
FBA_MA6_MA11_L<26>
FBA_MA12_RFU_L<26>
RV120
121_0402_1%
FBA_ABI#_L<26>
FBA_RAS#_L<26>
FBA_CS#_L<26>
FBA_CAS#_L<26>
FBA_WE#_L<26>
FBA_WCK0_N<26>
FBA_WCK0<26>
FBA_WCK1_N<26>
FBA_WCK1<26>
CV157
+1.35VS_VGA
12
RV125
549_0402_1%
RV126
1 2
931_0402_1%
QV20
1
2
1.33K_0402_1%
CV161
1U_0603_25V6
RV127
RV129
1 2
931_0402_1%
1
CV162
2
12
+1.35VS_VGA
RV128
549_0402_1%
RV130
1.33K_0402_1%
1
CV163
2
1U_0603_25V6
1
2
820P_0402_25V7
1
2
1U_0603_25V6
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_DBI0#
FBA_DBI1#
FBA_CLK0
FBA_CLK0#
FBA_CKE_L
FBA_MA2_BA0_L
FBA_MA5_BA1_L
FBA_MA4_BA2_L
FBA_MA3_BA3_L
FBA_MA7_MA8_L
FBA_MA1_MA9_L
FBA_MA0_MA10_L
FBA_MA6_MA11_L
FBA_MA12_RFU_L
12
RV116
1K_0402_1%
12
RV118
12
1K_0402_1%
FBA_ABI#_L
FBA_RAS#_L
FBA_CS#_L
FBA_CAS#_L
FBA_WE#_L
FBA_WCK0_N
FBA_WCK0
FBA_WCK1_N
FBA_WCK1
+FBA_VREFD_L
+FBA_VREFC0
FBA_RST#_L
+FBA_VREFC0
W=16mils
CV158
+1.35VS_VGA +1.35VS_VGA
12
+FBA_VREFD_L
12
1
CV159
2
820P_0402_25V7
1
CV164
CV165
2
0.1U_0402_10V7K
0.1U_0402_10V7K
FBA_DBI2#
FBA_DBI3#
1
CV166
2
UV6
MF=0 MF=1 MF=0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WC K23#
D4
WCK01 WCK23
P5
WCK23# WC K01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
H4G@
1
1
CV375
CV167
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
0.1U_0402_10V7K
CV374
MF=0
1
2
0.1U_0402_10V7K
CV376
4
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
H5GC4H24MFR-T2C
1
CV378
2
0.1U_0402_10V7K
3
UV7
A4
FBA_D0
A2
FBA_D1
B4
FBA_D2
B2
FBA_D3
E4
FBA_D4
E2
FBA_D5
F4
FBA_D6
F2
FBA_D7
A11
FBA_D8
A13
FBA_D9
B11
FBA_D10
B13
FBA_D11
E11
FBA_D12
E13
FBA_D13
F11
FBA_D14
F13
FBA_D15
U11
FBA_D16
U13
FBA_D17
T11
FBA_D18
T13
FBA_D19
N11
FBA_D20
N13
FBA_D21
M11
FBA_D22
M13
FBA_D23
U4
FBA_D24
U2
FBA_D25
T4
FBA_D26
T2
FBA_D27
N4
FBA_D28
N2
FBA_D29
M4
FBA_D30
M2
FBA_D31
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1
2
0.1U_0402_10V7K
1
1
CV377
CV379
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
BYTE0
FBA_DBI7#<26>
FBA_DBI6#<26>
FBA_DBI5#<26>
BYTE1
BYTE2
BYTE3
1 2
FBA_CLK1
RV173 40.2_0402_1%
RV175
160_0402_1%
@
1 2
1 2
FBA_CLK1#
RV174 40.2_0402_1%
+1.35VS_VGA
1
2
2
CV381
1
CV380
10U_0603_6.3V6M
CV169
CV168
2
1
1U_0603_25V6
10U_0603_6.3V6M
FBA_DBI4#<26>
12
121_0402_1%
1
2
1U_0603_25V6
FBA_MA4_BA2_H
FBA_MA3_BA3_H
FBA_MA2_BA0_H
FBA_MA5_BA1_H
FBA_MA0_MA10_H
FBA_MA6_MA11_H
FBA_MA7_MA8_H
FBA_MA1_MA9_H
FBA_MA12_RFU_H
RV117
RV119
+FBA_VREFD_L
+FBA_VREFC0
1
CV172
2
0.1U_0402_10V7K
FBA_CLK1
FBA_CLK1#
1K_0402_1%
1K_0402_1%
FBA_ABI#_H
FBA_CAS#_H
FBA_WE#_H
FBA_RAS#_H
FBA_CS#_H
FBA_WCK3_N
FBA_WCK3
FBA_WCK2_N
FBA_WCK2
CV173
FBA_CLK1<26>
FBA_CLK1#<26>
FBA_MA4_BA2_H<26>
FBA_MA3_BA3_H<26>
FBA_MA2_BA0_H<26>
FBA_MA5_BA1_H<26>
FBA_MA0_MA10_H<26>
FBA_MA6_MA11_H<26>
FBA_MA7_MA8_H< 26>
FBA_MA1_MA9_H<26>
FBA_MA12_RFU_H<26>
+1.35VS_VGA
RV121
FBA_ABI#_H<26>
FBA_CAS#_H<26>
FBA_WE#_H<26>
FBA_RAS#_H<26>
FBA_CS#_H<26>
FBA_WCK3_N<26>
FBA_WCK3<26>
FBA_WCK2_N<26>
FBA_WCK2<26>
FBA_RST#_H<26>FBA_RST#_L<26>
1
CV196
2
0.01U_0402_25V7K
1
1
CV170
CV171
2
2
1U_0603_25V6
1U_0603_25V6
FBA_EDC7
FBA_EDC6
FBA_EDC5
FBA_EDC4
FBA_DBI7#
FBA_DBI6#
FBA_DBI5#
FBA_DBI4#
FBA_CKE_H
12
12
FBA_RST#_H
1
2
0.1U_0402_10V7K
CV174
C2
C13
R13
R2
D2
D13
P13
P2
J12
J11
J3
H11
K10
K11
H10
K4
H5
H4
K5
J5
A5
U5
J1
J10
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
1
CV175
2
0.1U_0402_10V7K
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
BA0/A2 BA2/A4
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
A8/A7 A10/A0
A9/A1 A11/A6
A10/A0 A8/A7
A11/A6 A9/A1
A12/RFU/NC
VPP/NC
VPP/NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WC K23#
WCK01 WCK23
WCK23# WC K01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
170-BALL
SGRAM GDDR5
H4G@
0.1U_0402_10V7K
MF=1
MF=0 MF=1 MF=0MF=1
1
1
2
1
CV383
CV384
CV382
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
H5GC4H24MFR-T2C
1
CV387
2
2
A4
FBA_D56
A2
FBA_D57
B4
FBA_D58
B2
FBA_D59
E4
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
1
2
BYTE7
BYTE6
BYTE5
BYTE4
+1.35VS_VGA+1.35VS_VGA
CV388
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1
1
CV385
CV386
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
N15P_GDDR5_A
N15P_GDDR5_A
N15P_GDDR5_A
LA-A301P
LA-A301P
LA-A301P
1
27 56Wednesday, Septem ber 24, 2014
27 56Wednesday, Septem ber 24, 2014
27 56Wednesday, Septem ber 24, 2014
1.0
1.0
1.0
sualaptop365.edu.vn
5
Memory Partition A - Lower 32 bits
RV141
1 2
931_0402_1%
RV144
1 2
931_0402_1%
CV180
1U_0603_25V6
FBC_CAS#_L<26>
FBC_WE#_L<26>
FBC_WCK1<26>
FBC_RST#_L<26>
1.33K_0402_1%
1.33K_0402_1%
1
CV181
2
FBC_D[0..63]
FBC_EDC[7..0]
FBC_CLK0<26>
FBC_CLK0#<26>
FBC_CKE_L< 26>
FBC_MA2_BA0_L<26>
FBC_MA5_BA1_L<26>
FBC_MA4_BA2_L<26>
FBC_MA3_BA3_L<26>
FBC_MA7_MA8_L<26>
FBC_MA1_MA9_L<26>
FBC_MA0_MA10_L<26>
FBC_MA6_MA11_L<26>
FBC_MA12_RFU_L<26>
FBC_ABI#_L<26>
FBC_RAS#_L<26>
FBC_CS#_L<26>
FBC_WCK0_N<26>
FBC_WCK0<26>
FBC_WCK1_N<26>
+1.35VS_VGA
RV140
549_0402_1%
RV142
+1.35VS_VGA
RV143
549_0402_1%
RV145
1
CV182
2
1U_0603_25V6
C2
FBC_EDC0
C13
FBC_EDC1
R13
FBC_EDC2
R2
FBC_EDC3
FBC_DBI0#<26>
FBC_DBI1#< 26>
FBC_DBI2#<26>
FBC_DBI3#< 26>
RV136
12
12
820P_0402_25V7
12
12
1
CV183
2
1U_0603_25V6
FBC_DBI0#
FBC_DBI1#
FBC_DBI2#
FBC_DBI3#
FBC_CLK0
FBC_CLK0#
FBC_CKE_L
FBC_MA2_BA0_L
FBC_MA5_BA1_L
FBC_MA4_BA2_L
FBC_MA3_BA3_L
FBC_MA7_MA8_L
FBC_MA1_MA9_L
FBC_MA0_MA10_L
FBC_MA6_MA11_L
FBC_MA12_RFU_L
RV132
1K_0402_1%
RV134
12
1K_0402_1%
121_0402_1%
FBC_ABI#_L
FBC_RAS#_L
FBC_CS#_L
FBC_CAS#_L
FBC_WE#_L
FBC_WCK0_N
FBC_WCK0
FBC_WCK1_N FBC_WCK2
FBC_WCK1
+FBC_VREFD_H
+FBC_VREFC1
FBC_RST#_L
+FBC_VREFC1
W=16mils
1
CV177
+1.35VS_VGA
2
+FBC_VREFD_H
1
CV178
2
820P_0402_25V7
1
1
CV184
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
D2
D13
P13
P2
J12
J11
J3
H11
K10
K11
H10
K4
H5
H4
K5
J5
A5
U5
12
J1
J10
12
J13
J4
G3
G12
L3
L12
D5
D4
P5
P4
A10
U10
J14
J2
H1
K1
B5
G5
L5
T5
B10
D10
G10
L10
P10
T10
H14
K14
G1
L1
G4
L4
C5
R5
C10
R10
D11
G11
L11
P11
G14
L14
1
1
CV185
CV186
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
FBC_D[0..63]<26 >
FBC_EDC[7..0]<26>
D D
C C
B B
A A
FBC_CLK0
FBC_CLK0#
MEM_VREF<22,27>
1 2
RV177 40.2_0402_1%
RV178
160_0402_1%
@
1 2
1 2
RV176 40.2_0402_1%
2
G
+1.35VS_VGA
2
2
CV389
1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV197
2
0.01U_0402_25V7K
13
D
QV21
S
2N7002W-T/R7_SOT323-3
1
CV179
2
1U_0603_25V6
4
UV8
EDC0 EDC3
EDC1 EDC2
EDC2 EDC1
EDC3 EDC0
DBI0# DBI3#
DBI1# DBI2#
DBI2# DBI1#
DBI3# DBI0#
CK
CK#
CKE#
BA0/A2 BA2/A4
BA1/A5 BA3/A3
BA2/A4 BA0/A2
BA3/A3 BA1/A5
A8/A7 A10/A0
A9/A1 A11/A6
A10/A0 A8/A7
A11/A6 A9/A1
A12/RFU/NC
VPP/NC
VPP/NC
MF
SEN
ZQ
ABI#
RAS# CAS#
CS# WE#
CAS# RAS#
WE# CS#
WCK01# WC K23#
WCK01 WCK23
WCK23# WC K01#
WCK23 WCK01
VREFD
VREFD
VREFC
RESET#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
170-BALL
SGRAM GDDR5
H4G@
CV392
0.1U_0402_10V7K
MF=0
MF=0 MF=1 MF=0MF=1
1
1
CV390
CV391
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
2
CV395
0.1U_0402_10V7K
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
H5GC4H24MFR-T2C
1
1
CV393
2
2
0.1U_0402_10V7K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
3
UV9
A4
FBC_D0
A2
FBC_D1
B4
FBC_D2
B2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
+1.35VS_VGA
FBC_CLK1
FBC_CLK1#
BYTE0
BYTE1
BYTE2
BYTE3
1 2
RV137 40.2_0402_1%
RV138
160_0402_1%
@
1 2
1 2
RV139 40.2_0402_1%
+1.35VS_VGA
2
CV397
1
10U_0603_6.3V6M
10U_0603_6.3V6M
12
121_0402_1%
CV189
1U_0603_25V6
FBC_CLK1
FBC_CLK1#
FBC_MA4_BA2_H
FBC_MA3_BA3_H
FBC_MA2_BA0_H
FBC_MA5_BA1_H
FBC_MA0_MA10_H
FBC_MA6_MA11_H
FBC_MA7_MA8_H
FBC_MA1_MA9_H
FBC_MA12_RFU_H
RV131
RV133
+FBC_VREFD_H
+FBC_VREFC1
FBC_RST#_H
+1.35VS_VGA
1
CV190
2
1U_0603_25V6
FBC_DBI7#
FBC_DBI6#
FBC_DBI5#
FBC_DBI4#
FBC_CKE_H
1K_0402_1%
1K_0402_1%
1
2
FBC_DBI7#<26>
FBC_DBI6#< 26>
FBC_DBI5#<26>
FBC_DBI4#< 26>
FBC_CLK1<26>
FBC_CLK1#<26>
FBC_CKE_H<26>
FBC_MA4_BA2_H<26>
FBC_MA3_BA3_H<26>
FBC_MA2_BA0_H<26>
FBC_MA5_BA1_H<26>
FBC_MA0_MA10_H<26>
FBC_MA6_MA11_H<26>
FBC_MA7_MA8_H<26>
FBC_MA1_MA9_H<26 >
FBC_MA12_RFU_H<26>
+1.35VS_VGA
RV135
FBC_ABI#_H<26>
FBC_CAS#_H<26>
FBC_WE#_H<26>
FBC_RAS#_H<26>
FBC_CS#_H<26>
FBC_WCK3_N<26>
FBC_WCK3<26>
FBC_WCK2_N<26>
FBC_WCK2<26>
1
CV176
2
FBC_RST#_H<26>
0.01U_0402_25V7K
1
2
1
1
CV188
CV187
2
2
1U_0603_25V6
1U_0603_25V6
E4
E2
F4
F2
A11
A13
B11
FBC_D10
B13
FBC_D11
E11
FBC_D12
E13
FBC_D13
F11
FBC_D14
F13
FBC_D15
U11
FBC_D16
U13
FBC_D17
T11
FBC_D18
T13
FBC_D19
N11
FBC_D20
N13
FBC_D21
M11
FBC_D22
M13
FBC_D23
U4
FBC_D24
U2
FBC_D25
T4
FBC_D26
T2
FBC_D27
N4
FBC_D28
N2
FBC_D29
M4
FBC_D30
M2
FBC_D31
B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14
A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14
1
CV396
CV394
2
0.1U_0402_10V7K
FBC_EDC7
FBC_EDC6
FBC_EDC5
FBC_EDC4
12
12
FBC_ABI#_H
FBC_CAS#_H
FBC_WE#_H
FBC_RAS#_H
FBC_CS#_H
FBC_WCK3_N
FBC_WCK3
FBC_WCK2_N
CV191
0.1U_0402_10V7K
1
CV192
2
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WC K23#
D4
WCK01 WCK23
P5
WCK23# WC K01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
H4G@
1
CV193
2
0.1U_0402_10V7K
MF=1
MF=0 MF=1 MF=0MF=1
1
CV194
2
0.1U_0402_10V7K
1
1
CV399
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
DQ24 DQ0
DQ25 DQ1
DQ26 DQ2
DQ27 DQ3
DQ28 DQ4
DQ29 DQ5
DQ30 DQ6
DQ31 DQ7
DQ16 DQ8
DQ17 DQ9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31
H5GC4H24MFR-T2C
CV400
0.1U_0402_10V7K
2
A4
FBC_D56
A2
FBC_D57
B4
FBC_D58
B2
FBC_D59
E4
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
0.1U_0402_10V7K
+1.35VS_VGA
1
CV401
2
BYTE7
BYTE6
BYTE5
BYTE4
1
CV404
2
0.1U_0402_10V7K
E2
F4
F2
A11
A13
B11
B13
E11
E13
F11
F13
U11
U13
T11
T13
N11
N13
M11
M13
U4
U2
T4
T2
N4
N2
M4
M2
B1
VDDQ
D1
VDDQ
F1
VDDQ
M1
VDDQ
P1
VDDQ
T1
VDDQ
G2
VDDQ
L2
VDDQ
B3
VDDQ
D3
VDDQ
F3
VDDQ
H3
VDDQ
K3
VDDQ
M3
VDDQ
P3
VDDQ
T3
VDDQ
E5
VDDQ
N5
VDDQ
E10
VDDQ
N10
VDDQ
B12
VDDQ
D12
VDDQ
F12
VDDQ
H12
VDDQ
K12
VDDQ
M12
VDDQ
P12
VDDQ
T12
VDDQ
G13
VDDQ
L13
VDDQ
B14
VDDQ
D14
VDDQ
F14
VDDQ
M14
VDDQ
P14
VDDQ
T14
VDDQ
A1
VSSQ
C1
VSSQ
E1
VSSQ
N1
VSSQ
R1
VSSQ
U1
VSSQ
H2
VSSQ
K2
VSSQ
A3
VSSQ
C3
VSSQ
E3
VSSQ
N3
VSSQ
R3
VSSQ
U3
VSSQ
C4
VSSQ
R4
VSSQ
F5
VSSQ
M5
VSSQ
F10
VSSQ
M10
VSSQ
C11
VSSQ
R11
VSSQ
A12
VSSQ
C12
VSSQ
E12
VSSQ
N12
VSSQ
R12
VSSQ
U12
VSSQ
H13
VSSQ
K13
VSSQ
A14
VSSQ
C14
VSSQ
E14
VSSQ
N14
VSSQ
R14
VSSQ
U14
VSSQ
1
1
2
1
CV402
CV398
CV403
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUS TODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
N15P_GDDR5_B
N15P_GDDR5_B
N15P_GDDR5_B
LA-A301P
LA-A301P
LA-A301P
1
28 56Friday, September 19, 2014
28 56Friday, September 19, 2014
28 56Friday, September 19, 2014
1.0
1.0
1.0
sualaptop365.edu.vn
5
4
3
2
1
ZZZ
X76R3@
D D
15K_0402_1%
X7656331L06
C C
ZZZ
X76R1@
15K_0402_1%
X7656331L02
ROM_SI<23>
ROM_SO<23>
ROM_SCLK<23>
RV157
4.99K_0402_1%
@
1 2
ROM_SI
ROM_SO
ROM_SCLK
RV160
15K_0402_1%
@
1 2
RV160
S4G@
20K_0402_1%
SD034200280
RV160
H4G@
15K_0402_1%
SD034150280
X7656331L01 : S4G@
X7656331L02 : H4G@
RV158
4.99K_0402_1%
@
1 2
RV161
4.99K_0402_1%
1 2
+3.3V_GFX_AON
RV159
4.99K_0402_1%
@
1 2
RV162
4.99K_0402_1%
1 2
+3.3V_GFX_AON
RV146
49.9K_0402_1%
STRAP0<23>
STRAP1<23>
STRAP2<23>
STRAP3<23>
STRAP4<23>
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
1 2
RV152
49.9K_0402_1%
@
1 2
RV147
34.8K_0402_1%
@
1 2
RV153
34.8K_0402_1%
1 2
RV148
10K_0402_1%
@
1 2
RV154
4.99K_0402_1%
1 2
RV149
15K_0402_1%
@
1 2
RV155
4.99K_0402_1%
1 2
1 2
1 2
SA00007D800 S IC D5 128M32 K4G41325FC-HC03 FBGA 170P
SA00006O40L S IC D5 128M32/2.5G H5GC4H24MFR-T2C FBGA
RV150
20K_0402_1%
@
RV156
20K_0402_1%
SA00006O41L S IC D5 128M32/2.5G H5GC4H24MFR-T2C A31!
FB Memory GDDR5 STRAP2
Samsung
2500MHz
N15P-GX
8
7
6
5
+3VS_VGA
1
2
ROM_SCLK_R
ROM_SI_R
CV195
0.1U_0402_16V4Z~D
RV169
33_0402_5%~D
1 2
1 2
RV170
33_0402_5%~D
ROM_SCLK
ROM_SI
B B
12
RV167
10K_0402_5%
ROM_CS<23>
ROM_CS
1 2
ROM_SO ROM_SO_R
RV168
33_0402_5%~D
+3VS_VGA+3VS_VGA
UV10
1
CS#
2
3
4
VCC
SO
HOLD#
WP#
SCK
GND
W25X20CLSNIG SOIC 8P
@
SI
Hynix
2500MHz
K4G41325FC-HC03
256Mx16
H5GC4H24MFR-T2C
256Mx16
ROM_SO ROM_SCLK ROM_SI STRAP1GPU
PD
4.99K
PD
4.99K
PD
4.99K
PD
4.99K
PD
20K
PD
15K
STRAP0
PU
49.9K
PU
49.9K
PD
34.8KPD4.99KPD4.99K
PD
34.8K
PD
4.99K
PD
4.99K
STRAP4STRAP3
PD
20K
PD
20K
W25X20CL 2M-Bit/256K-byte
A A
Security Classification
Security Classification
Security Classification
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
2013/09/09 2014/09/09
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
N15P_MISC
N15P_MISC
N15P_MISC
LA-A301P
LA-A301P
LA-A301P
29 56Wednesday, September 24, 2014
29 56Wednesday, September 24, 2014
29 56Wednesday, September 24, 2014
1
1.0
1.0
1.0
5
4
3
2
1
UL1
XTLI
XTLO
1
2
30
TX_P
29
TX_N
35
RX_P
36
RX_N
33
REFCLK_P
32
REFCLK_N
4
CLKREQ#
2
PERST#
3
WAKE#
25
SMCLK
26
SMDATA
28
NC
27
TESTMODE
41
GND
8
XTLI
7
XTLO
5
ISOLAT#
38
LED_0
39
LED_1
23
LED_2
S IC E220 1-BL3A-R QFN 40P E-LAN CTRL
+AVDDL
1U_0402_6.3V6K~D
CL18
W=20mils
1
1
CL19
2
2
1U_0402_6.3V6K~D
12
PCIE_PRX_LANTX_P4<12>
PCIE_PRX_LANTX_N4<12>
+LAN_IO
12
D D
PCIE_W AKE#<10,41>
RL1
4.7K_0402_5%~D
PCIE_W AKE#
PCIE_PTX_LANRX_P4<12>
PCIE_PTX_LANRX_N4<12>
CLK_PCIE_LAN<9>
CLK_PCIE_LAN#<9>
CLKREQ#_ LAN<9>
PLT_RST#<6 ,10,32,41>
PCIE_PRX_LANTX_P4 _C
CL1 0.1U_0402_16V7K~D
12
PCIE_PRX_LANTX_N4_C
CL2 0.1U_0402_16V7K~D
PCIE_PTX_LANRX_P4
PCIE_PTX_LANRX_N4
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLKREQ#_ LAN
PLT_RST#
The pull-up resisters might not be
necessory due to existence
on PCH side.
4
GND2GND
OSC1OSC
YL1
3
2
CL8
1
15P_0402_50V8J~D
W=40mils
1
1
CL12
2
1000P_0402_50V7K~D
1
CL13
CL14
2
2
0.1U_0402_16V7K~D
1U_0402_6.3V6K~D
4.7U_080 5_10V4 Z
CL40
+3VALW
EN_WOL #
1
2
W=40mils
1
CL41
0.1U_040 2_16V7 K
2
1
CL26
0.1U_040 2_16V7 K
2
UL2
OUT
5
IN
GND
4
EN
OCB
SY6288D20AAC_SOT23-5
+3VS
+LAN_IO
CL11
1
2
3
1 2
RL5
10K_040 2_5%
C C
EN_WOL #<41 >
+LAN_IO
25MHZ_10PF_7V25000014
2
CL9
1
15P_0402_50V8J~D
1A
1
1
CL15
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1 2
RL2 30K_0 402_5%
LAN_ACTIVITY# +RB IAS
LAN_LINK#_R
LAN_LED2 #_R
RL4
5.1K_0402_1%~D
1 2
1
CL16
CL17
2
0.1U_0402_16V7K~D
VDD33
AVDD33
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL_REG
AVDDH
AVDDH_REG
DVDDL_REG
TRXP0
TRXN0
TRXP1
TRXN1
TRXP2
TRXN2
TRXP3
TRXN3
RBIAS
0.1U_0402_16V7K~D
1
W=40mils
16
13
+AVDDL
19
31
34
6
22
+AVDDH
9
37
+DVDDL
11
LAN_MDIP0
12
LAN_MDIN0
14
LAN_MDIP1
15
LAN_MDIN1
17
LAN_MDIP2
18
LAN_MDIN2
20
LAN_MDIP3
21
LAN_MDIN3
40
LX
24
PPS
10
1 2
RL3
2.37K_0402_1%~D
+LAN_IO
+AVDDH
W=20mils
1
CL5
2
+DVDDL
W=20mils
1
CL3
1
CL4
2
2
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
close to UL1 pin37
1
CL6
2
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
1
CL7
2
0.1U_0402_16V7K~D
close to UL1 pin9 close to UL1 pin22
CL20
1
2
1
1
CL21
CL22
2
2
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
4.7U_0603_6.3V6K~D
CL23
1
2
0.1U_0402_16V7K~D
CL24
1
2
0.1U_0402_16V7K~D
CL25
1
2
0.1U_0402_16V7K~D
close to UL1 pin13 close to UL1 pin19close to UL1 pin31close to UL1 pin1 close to UL1 pin16 close to UL1 pin6 close to UL1 pin34
@EMI@
D
13
1 2
Issued Date
Issued Date
Issued Date
CL27
0.1U_040 2_16V7 K~D
1 2
+LAN_IO
+LAN_IO
LAN_LED2 #_R
RL15
1K_0402 _1%~D
JLAN
LAN_ACTIVITY#
12
RL8 330_0 402_5%
RJ45_MDI3RJ45_MDI3+
RJ45_MDI1RJ45_MDI2RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI0RJ45_MDI0+
12
LAN_LINK#
CL28 0.1U_ 0402_1 6V7K~DEMI@
1 2
LAN_LED2 #
CL29 0.1U_ 0402_1 6V7K~DEMI@
1 2
LL1
BLM15AG121SN1D_ L0402_ 2P
12
RL13 130_0402 _1%~D
12
RL14 130_0402 _5%~D
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
10
Yellow LED-
9
Yellow LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
SANTA_130 456-511
CONN@
2
@EMI@
CL31
0.1U_040 2_16V7 K~D
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
17
GND
16
GND
15
GND
14
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Numb er Rev
Size Docum ent Numb er Rev
Size Docum ent Numb er Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LAN E2201
LAN E2201
LAN E2201
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
30 56Friday, September 19, 2014
30 56Friday, September 19, 2014
30 56Friday, September 19, 2014
1.0
B B
A A
5
TIMAG: S X'FORM_ IH-160 LAN,SP050006F00
BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00
+VDDCT_L
2
CL32
1
TL1
1
2
LAN_MDIN3
3
LAN_MDIP3
4
5
LAN_MDIN2
6
LAN_MDIP2
7
8
LAN_MDIN1
9
LAN_MDIP1
10
11
LAN_MDIN0
12
LAN_MDIP0
2
1
CL33
2
1000P_0402_50V7K~D
1
CL34
CL35
1
2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1000P_0402_50V7K~D
TCT1
MCT1
TD1+
MX1+
TD1-
MX1-
TCT2
MCT2
TD2+
MX2+
TD2-
MX2-
TCT3
MCT3
TD3+
MX3+
TD3-
MX3-
TCT4
MCT4
TD4+
MX4+
TD4-
MX4-
350UH_GS T5009-CLF
2
1
CL36
CL37
1
2
0.1U_0402_16V7K~D
1000P_0402_50V7K~D
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_CT3
RJ45_MDI3RJ45_MDI3+
RJ45_CT2
RJ45_MDI2RJ45_MDI2+
RJ45_CT1
RJ45_MDI1RJ45_MDI1+
RJ45_CT0
RJ45_MDI0RJ45_MDI0+
2
CL38
1
1
CL39
2
0.1U_0402_16V7K~D
1000P_0402_50V7K~D
4
RL9
1 2
75_0402 _1%~D
RL10
1 2
75_0402 _1%~D
RL11
1 2
75_0402 _1%~D
RL12
1 2
75_0402 _1%~D
2
EMI@
CL30
10P_180 8_3KV7 K~D
1
3
LAN_LINK#_R
QL3
2N7002_SOT23
S
G
2
+LAN_IO
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
sualaptop365.edu.vn
5
4
3
2
1
1 2
RA29 0_0603_5%
1 2
RA30 0_0603_5%
1 2
RA31 0_0603_5%
1 2
RA32 0_0603_5%
ESD@
1 2
RA4 200K_0402_5%
BEEP#<41>
BAT54C-7-F_SOT23-3
1
1
CA30
CA29
2
2
EMI@
EMI@
1000P_0402_50V7K
HP2_D_R1_JK
HP2_D_L1_JK
+3VS
B2
VDD
GND
A2
GNDGNDA
JACK_SENSE#
DA8
2
1
3
CA31
EMI@
1000P_0402_50V7K
3
PC_BEEP
12
@
RA19
10K_0402_5%
JSPK
1
1
2
2
3
3
4
4
5
GND1
6
1
1
CA32
2
2
EMI@
1000P_0402_50V7K
1000P_0402_50V7K
HPOUT2-JD
2
DA16
AZ5125-02S.R7G_SOT23-3
ESD@
1
2
3
AZ5125-02S.R7G_SOT23-3
DA13
@ESD@
1
JHP2
4
M
3
G
2
R
1
L
5
6
SINGA_2SJ3080-039111F
CONN@
3
AZ5125-02S.R7G_SOT23-3
2
1
Re-tasking port
Headphone/Speaker Out
GND2
E-T_3806K-F04N-03R
DA14
@ESD@
CONN@
G
7
/Line-In/Microphone
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Audio Codec ALC3234
Audio Codec ALC3234
Audio Codec ALC3234
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
31 56Friday, September 19, 2014
31 56Friday, September 19, 2014
31 56Friday, September 19, 2014
1.0
1 2
1 2
JHP1
M
G
R
L
RA8
0_0402_1%
@
@
RA176
0_0402_5%
@
RA33
0_0603_1%
@
RA34
0_0603_1%
1 2
1 2
Line1-VREFO-L
1
DA18
BAT54AW_SOT323-3~D
3
2
12
12
RA166
4.7K_0402_5%
Line-IN-L
Place on the moat between GND & GNDA.
JACK_PLUG#
Reserve for cancel Delay circutis
+CODEC_AVDD2+1.5VS
+5VS+5V_PVDD
12
+5VS
12
HP2_D_R_C
+
CA3
100U_B2_6.3VM_LESR55M
HP2_D_L_C
+
CA4
100U_B2_6.3VM_LESR55M
G
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
Close to UA1 Pin42,43,44,45
INT-SPK-RINT-SPK-R+
INT-SPK-LINT-SPK-L+
Line1-VREFO-R
1 2
RA23
8.2_0402_5%~D
1 2
RA24
8.2_0402_5%~D
7
Issued Date
Issued Date
Issued Date
LA3 BLM15BB121SN1D_0402EMI@
LA4 BLM15BB121SN1D_0402EMI@
LA5 BLM15BB121SN1D_0402EMI@
LA6 BLM15BB121SN1D_0402EMI@
1
EC Beep
SPK_R-_CONN
SPK_R+_CONN
SPK_L-_CONN
SPK_L+_CONN
1
CA75
100P_0402_50V8J~D
2
1
CA76
100P_0402_50V8J~D
2
UA2
MAX9892ERT+T_UCSP6~D
A1
INL
A3
INR
B1
/MUTE
B3
SET
Deciphered Date
Deciphered Date
Deciphered Date
HDA_SPKR<11>
MCU Beep
1 2
1 2
1 2
1 2
DA17
BAT54AW_SOT323-3~D
3
2
12
RA172
4.7K_0402_5%
12
RA173
4.7K_0402_5%
LA11
0_0603_5%~D
HP_MUTE#
1 2
LA12
0_0603_5%~D
1 2
RA25
0_0402_5%
1 2
1 2
RA26
0_0402_5%
12
CA77
0.01U_0402_16V7K
Setting the Turn-Off Time:
Ton (ms) = 0.02 x Cset (pF)
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
HP2_D_R_R
HP2_D_L_R
2013/10/01 2014/09/30
2013/10/01 2014/09/30
2013/10/01 2014/09/30
CA53,CA55 change Value
from 10U_0603_6.3V6M~D to
CA57,CA58 close
to UA1 pin1
+3VS
CA57
4.7U_0603_6.3V6K
CA58
0.1U_0402_16V7K
1
D D
CA59,CA60 close
to UA1 pin9
PCH_AZ_CODEC_BITCLK<8>
PCH_AZ_CODEC_SDOUT<8>
PCH_AZ_CODEC_SYNC<8>
PCH_AZ_CODEC_SDIN0<8>
PCH_AZ_CODEC_RST#<8>
PCH_AZ_CODEC_BITCLK
12
@EMI@
RA35
0_0402_5%
1
@EMI@
C C
B B
CA21
22P_0402_50V8J
2
PCH_AZ_CODEC_RST#
+MIC2-VREFO
+RTCVCC
EC_MUTE#<41>
RA167 100K_0402_5%ESD@
1 2
1
2
+3VS
10U_0603_6.3V6M
0.1U_0402_16V7K
CA59
CA60
1
1
2
2
1 2
RA130 22_0402_5%
LINE1-R
LINE1-L
Line1-VREFO-R
Line1-VREFO-L
HP2_D_R
HP2_D_L
+MIC2-VREFO
RING2
MIC_IN
12
MIC1-L
CA74
10U_0603_6.3V6M
EC_MUTE#
1 2
1 2
CA62 10U_0603_6.3V6M
1 2
CA63 10U_0603_6.3V6M
1 2
CA64 10U_0603_6.3V6M
EAPD#
@
RA6
10K_0402_5%
2
DMN66D0LDW-7_SOT363-6
2
+RTCVCC
@
QA6B
CA71,CA51 place close to pin26
UA1
1
DVDD
9
DVDD-IO
6
BCLK
5
SDATA-OUT
10
SYNC
8
SDATA-IN
11
RESETB
21
LINE1-R(PORT-C-R)
22
LINE1-L(PORT-C-L)
30
LINE1-VREFO-R
31
LINE1-VREFO-L
23
LINE2-R(PORT-E-R)
24
LINE2-L(PORT-E-L)
16
MONO-OUT
29
MIC2-VREFO
17
MIC2-L(PORT-F-L)/RING
18
MIC2-R(PORT-F-R)/SLEEVE
19
MIC_CAP
20
NC
47
PDB
27
LDO1-CAP
39
LDO2-CAP
7
LDO3-CAP
4
DVSS
49
GND
ALC3234-CG_MQFN48_6X6
12
@
RA5
61
D
G
S
470K_0402_5%
34
@
D
G
5
QA6A
S
DMN66D0LDW-7_SOT363-6
MIC_IN
+5VA
CA51
0.1U_0402_16V7K
10U_0603_6.3V6M
1
1
2
2
AVDD1
AVDD2
CPVDD
PVDD1
PVDD2
HP/LINE1 JD(JD1)
MIC2/LINE2 JD(JD2)
SPDIFO/FRONT JD(JD3)/GPIO3
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
SPK-OUT-L+
SPK-OUT-L-
SPK-OUT-R+
SPK-OUT-R-
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
SPDIF-OUT/GPIO2
VREF
PCBEEP
CPVEE
AVSS1
AVSS2
CA71
26
40
36
41
46
13
14
15
32
33
42
43
45
44
2
3
48
37
CBP
35
CBN
28
12
34
25
38
Prevent S3,S4,S5 entry/resume noise(sleeve)
+MIC2-VREFO
12
12
RA20
2.2K_0402_5%
MIC_IN
RING2
RA55
15_0402_1%
1 2
HPOUT-L AUD_HP_OUT_L_CN
1 2
HPOUT-R
RA56
A A
Setting the Turn-Off Time:
Ton (ms) = 0.02 x Cset (pF)
15_0402_1%
HP_MUTE#
5
RA53
2.2K_0402_5%
EMI@
12
12
EMI@
12
EMI@
12
EMI@
12
UA3
MAX9892ERT+T_UCSP6~D
A1
INL
A3
INR
B1
/MUTE
B3
SET
LA7 BLM15PX330SN1D 0402
LA10 BLM15PX330SN1D 0402
Line-IN-L
LA8 FBMA-L11-160808-800LMT_2P
Line-IN-R
LA9 FBMA-L11-160808-800LMT_2P
RA21
100_0402_1%
1 2
1 2
RA22
100_0402_1%
CA78
0.1U_0402_16V4Z~D
+3VS
100P_0402_50V8J
1
B2
VDD
GND
A2
2
4
4.7U_0603_6.3V6K
+5V_PVDD +5V_PVDD
10U_0603_6.3V6M
CA54
0.1U_0402_16V7K
1
1
2
2
+CODEC_AVDD2
+3VS
CA61
10U_0603_6.3V6M
1
10U_0603_6.3V6M
1
2
2
1 2
RA168 100K_0402_5%ESD@
1 2
RA171 100K_0402_5%
1 2
RA170 100K_0402_5%ESD@
HPOUT-L
HPOUT-R
INT-SPK-L+
INT-SPK-LINT-SPK-R+
INT-SPK-R-
1 2
MIC_CLK_C
LA1
CA24
BLM15BB221SN1D_2P
1U_0402_6.3V6K
12
12
CA23 2.2U_0603_6.3V6K
12
CA65 0.1U_0402_16V7K
12
CA25 1U_0402_6.3V6K
+3VS
RA36
10K_0402_5%~D
1 2
HP_MUTE#
680P_0402_50V8J
CA38
680P_0402_50V8J
CA39
CA33
100P_0402_50V8J
1
1
1
EMI@
EMI@
EMI@
2
2
2
CA53
1
2
CA79
EMI@
1
DA15
BAT54AW_SOT323-3~D
W=40mils
W=40mils
3
CA40
EMI@
1
CA56
0.1U_0402_16V7K
CA55
10U_0603_6.3V6M
1
2
JACK_SENSE#
HPOUT2-JD
MIC_CLK
1
@EMI@
CA22
22P_0402_50V8J
2
12
RA174
10K_0402_5%
+3VS
1 2
2
3
RA79
1K_0402_1%
12
RA175
10K_0402_5%~D
EAPD#
DEPOP#_EC
+3VS
+3VS
MIC_DATA <19>
MIC_CLK <19>
PC_BEEP
CA67
4.7U_0603_6.3V6K
LINE1-L
LINE1-R Line-IN-R
CA68
4.7U_0603_6.3V6K
DEPOP#_EC <41>
RA165
4.7K_0402_5%
RA80
1K_0402_1%
1 2
1 2
1 2
1 2
RA82
1K_0402_1%
+3VS
+5VA
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-RSpeaker 4 ohm : 40mil
Speaker 8 ohm : 20mil
HP2_D_R
HP2_D_L
Universal Audio Jack(UAJ)
Headphone/Speaker Out
/iPhone or Nokia headset/Line-In/Microphone
3
4
3
2
1
5
6
SINGA_2SJ3080-039111F
CONN@
MIC_IN_R
RING2_R
AUD_HP_OUT_R_CN
2
3
2
AZ5125-02S.R7G_SOT23-3
DA12
AZ5123-02S SOT23
DA10
ESD@
ESD@
1
MIC_IN_R
RING2_R
AUD_HP_OUT_R_CN
AUD_HP_OUT_L_CN
JACK_PLUG#
sualaptop365.edu.vn
5
D D
4
3
2
1
+3VS_WLAN_NGFF
RN9
100K_0402_5%~D
RN3
100K_0402_5%~D
12
12
2
G
NGFF(M.2)2230 slot(E Key)
LED1#
PCM_IN
LED2#
COEX3
COEX2
COEX1
ALERT
MTG76
22U_0603_6.3V6M~D
GND
CN6
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
0.1U_0402_10V7K~D
1
2
+3VS_WLAN_NGFF
CN5
WLAN_LED
BT_LED
22U_0603_6.3V6M~D
1
CN4
2
SUSCLK_R
PLT_RST#_R
BT_OFF#
0.1U_0402_10V7K~D
1
CN3
2
For EC to detect
debug card insert.
1 2
RN7
1 2
RN1 0_0402_1%@
1 2
RN2 0_0402_1%@
100K_0402_5%
EC_TX <41>
EC_RX <41>
JNGFF
1
GND
USB20_BT_P7<12>
USB20_BT_N7<12>
C C
PCIE_PTX_WLANRX_P3<12>
PCIE_PTX_WLANRX_N3<12>
PCIE_PRX_WLANTX_P3<12>
PCIE_PRX_WLANTX_N3<12>
CLK_PCIE_WLAN<9>
CLK_PCIE_WLAN#<9>
CLKREQ#_WLAN<9>
WLAN_WAKE#<41>
B B
CLKREQ#_WLAN
WLAN_WAKE#
3
USB_D+
5
USB_D-
7
GND
9
SIDO_CLK
11
SDIO_CMD
13
SDO_DAT0
15
SDO_DAT1
17
SDO_DAT2
19
SDO_DAT3
21
SDIO_WAKE#
23
SDIO_RESET#
25
GND
27
PETP0
29
PETN0
31
GND
33
PERP0
35
PERN0
37
GND
39
REFCLKP0
41
REFCLKN0
43
GND
45
CLKEQ0#
47
PEWAKE0#
49
GND
51
RSRVD/PETP1
53
RSRVD/PETN1
55
GND
57
RSRVD/PERP1
59
RSRVD/PERN1
61
GND
63
RESERVED
65
RESERVED
67
GND
69
MTG77
LOTES_APCI0019-P009A
CONN@
closed to pin 2, 4 closed to pin 72,74
3.3VAUX
3.3VAUX
PCM_CLK
PCM_SYNC
PCM_OUT
UART_WAKE#
UART_RX
UART_TX
UART_CTS
UART_RTS
RESERVED
RESERVED
RESERVED
SUSCLK
PERST0#
W_DISABLE2#
W_DISABLE1#
I2C_DATA
I2C_CLK
RESERVED
RESERVED
RESERVED
RESERVED
3.3VAUX
3.3VAUX
+3VS_WLAN_NGFF +3VS_WLAN_NGFF
1
2
BT_LED
WLAN_LED
AOAC_WLAN<41>
S
QN3
2N7002K_SOT23-3
SUSCLK <10>
PLT_RST# <6,10,30,41>
BT_OFF# <11>
10K_0402_5%~D
WL_OFF#_R
Prevent backdriver from +3VS_WLAN_NGFF to +3VS
+3VALW +3VS_WLAN_NGFF
2
CN2
1U_0402_6.3V6K
1
UN1
5
IN
4
EN
SY6288C20AAC_SOT23-5
D
S
QN1
2
2N7002K_SOT23-3
G
13
D
+3VS_WLAN_NGFF +3VS
12
RN5
1
OUT
2
GND
3
OC
13
1 3
2
G
D
2
1
+5VALW
RN6
100K_0402_5%~D
12
QN2
DII-DMN65D8LW-7~D
S
CN1
100U_1206_6.3V6M
+3VALW
12
RN8
10K_0402_5%
WLAN_LED# <38>
WL_OFF# <11>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
NGFF WLAN/BT
NGFF WLAN/BT
NGFF WLAN/BT
LA-A301P
LA-A301P
LA-A301P
1
32 56Friday, September 19, 2014
32 56Friday, September 19, 2014
32 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
EMI@
LU1
USB3TP2
USB3TP2<12>
USB3TN2
USB3TN2<12>
C C
USB3TP1
USB3TP1<12>
USB3TN1
USB3TN1<12>
B B
USB3TP3
USB3TP3<12>
USB3TN3
USB3TN3<12>
A A
12
USB3TP2_C
CU4 0.1U_0402_10V7K
12
CU5 0.1U_0402_10V7K
USB3RP2<12>
USB3RN2<12>
SW_USB20_P1 USB20_P1_CONN
SW_USB20_N1
12
USB3TP1_C
CU12 0.1U_0402_10V7K
12
CU13 0.1U_0402_10V7K
USB3RP1<12>
USB3RN1<12>
USB20_P0<12>
USB20_N0<12>
12
USB3TP3_C
CU21 0.1U_0402_10V7K
12
USB3TN3_C USB3TN3_R
CU18 0.1U_0402_10V7K
USB3RP3<12>
USB3RN3<12>
USB20_P2<12>
USB20_N2<12>
1 2
3
2
EMI@
LU4
DLW21SN670HQ2L_4P
EMI@
LU5
DLW21SN670HQ2L_4P
EMI@
LU6
1
2
3
4
WCM-2012HS-900T_4P
EMI@
LU7
DLW21SN670HQ2L_4P
EMI@
LU8
DLW21SN670HQ2L_4P
EMI@
LU9
1
2
3
4
WCM-2012HS-900T_4P
34
34
3
2
USB20_N1_CONN
34
34
2
3
USB20_N0_CONN
34
34
2
USB20_P2_CONNUSB20_P2
3
USB20_N2_CONN
DLW21SN670HQ2L_4P
EMI@
LU2
1 2
USB3RP2
USB3RN2
DLW21SN670HQ2L_4P
EMI@
LU3
4
4
1
1
WCM-2012HS-900T_4P
1 2
USB3RP1
1 2
USB3RN1
1
USB20_P0 USB20_P0_CONN
4
USB20_N0
1 2
USB3RP3
1 2
USB3RN3
1
4
USB20_N2
USB3TP2_R
USB3TN2_RUSB3TN2_C
USB3RP2_R
USB3RN2_R
USB3TP1_R
USB3TN1_RUSB3TN1_C
USB3RP1_R
USB3RN1_R
USB3TP3_R
USB3RP3_R
USB3RN3_R
4
SDMK0340L-7-F_SOD323-2
220K_0402_5%
12
12
RU5
CU27
12
2.2U_0603_6.3V6K
TC7SZ14FU_SSOP5~D
DU9
1
2
SDMK0340L-7-F_SOD323-2
CU28
0.1U_0402_16V7K
+5VALW
1
CU7
0.1U_0402_16V7K
2
USB_OC1#<12>
USB20_N1<12>
USB20_P1<12>
1 2
RU1 10K_0402_5%~D
1 2
RU7 10K_0402_5%~D
+5VALW
CU14
CU22
USB_PWR_EN#
CTL1<41>
CTL2<41>
1
2
+5VALW
1
CU15
0.1U_0402_16V7K
2
1
2
1
1
2
2
USB20_N1
USB20_P1
CU16
0.1U_0402_16V7K
CU23
0.1U_0402_16V7K
1
CU24
0.1U_0402_16V7K
2
USB_PWR_EN#<41>
RU4
100K_0402_5%
USBCHG_DET#
+3VLP
+3VLP
4.7U_0805_10V4Z
12
PWRSHARE_EN_EC#<41>
USB_PWR_EN#
4.7U_0805_10V4Z
+3VLP+3VLP+3VLP+3VLP
DU8
5
1
P
NC
2
A
G
UU5
3
12
Power share
UU1
1
IN
13
FAULT#
2
DM_OUT
3
DP_OUT
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2
8
CTL3
TPS2546RTER_QFN16_3X3
UU3
5
IN
4
EN
SY6288D20AAC_SOT23-5
UU4
5
4
SY6288D20AAC_SOT23-5
3
1
2
4
Y
1M_0402_5%
OUT
GND
OCB
IN
EN
USB charge for DC S5
CU26
0.1U_0402_16V7K
12
RU6
1
CU29
0.1U_0402_16V7K
2
+5V_USB_PWR1
12
W=80mils
OUT
9
NC
11
SW_USB20_N1
DM_IN
10
SW_USB20_P1
DP_IN
15
RU2 19.1K_0402_1%
ILIM1
16
RU3 19.1K_0402_1%
ILIM0
14
GND
17
GPAD
+5V_USB_PWR2
1
W=80mils
2
3
+5V_USB_PWR3
W=80mils
1
OUT
2
GND
3
OCB
1
CU25
0.1U_0402_16V7K
2
USBCHG_DET_D <49>
USBCHG_DET_EC# <41>
12
12
CU17
0.1U_0402_16V7K
USB_OC0# <12>
USB_OC2# <12>
1
2
USB20_N0_CONN
USB20_P0_CONN
USB3RN1_R
USB3RP1_R
USB3TN1_R
USB3TP1_R
USB20_N2_CONN
USB20_P2_CONN
USB3RN3_R
USB3RP3_R
USB3TN3_R
USB3TP3_R
2
Right side (power share)
+5V_USB_PWR1
JUSB1
1
VBUS
10
2
3
DU1
L30ESDL5V0C3-2_SOT23-3
ESD@
1
2
D-
3
D+
5
SSRX-
6
SSRX+
8
SSTX-
9
SSTX+
D1-DP
TAITW_USB011-107BRL-TW
CONN@
USB20_N1_CONN
USB20_P1_CONN
USB3RN2_R
USB3RP2_R
USB3TN2_R
USB3TP2_R
USBCHG_DET#
Left side 1
+5V_USB_PWR2
JUSB2
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX -
2
3
DU4
L30ESDL5V0C3-2_SOT23-3
ESD@
1
6
StdA-SSRX +
7
GND-DRAIN
8
StdA-SSTX-
9
StdA-SSTX+
SANTA_377175-1
CONN@
GND1
GND2
GND3
GND4
10
11
12
13
Left side 2
+5V_USB_PWR3
JUSB3
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX -
6
StdA-SSRX +
GND1
7
GND-DRAIN
GND2
8
StdA-SSTX-
GND3
9
StdA-SSTX+
GND4
SANTA_377175-1
CONN@
2
3
DU6
L30ESDL5V0C3-2_SOT23-3
ESD@
1
USB3RN2_R
USB3RP2_R
USB3TN2_R
USB3TP2_R
10
11
12
13
14
GND
13
GND
12
GND
11
GND
4
GND
7
GND
1
2
4
5
3
47U_0805_6.3V6M~D
DU2
TVWDF1004AD0_DFN9
ESD@
47U_0805_6.3V6M~D
9
8
7
6
CU10
1
USB3RN1_R USB3RN1_R
2
USB3RP1_R USB3RP1_R
4
USB3TP1_R
5
USB3TN1_R
3
TVWDF1004AD0_DFN9
ESD@
CU19
47U_0805_6.3V6M~D
1
USB3RN3_R
2
USB3RP3_R
4
USB3TN3_R
5
USB3TP3_R
3
1
CU2
USB3RN2_R
USB3RP2_R
USB3TN2_R
USB3TP2_R
+5V_USB_PWR2
10U_0603_6.3V6M~D
1
12
2
DU5
+5V_USB_PWR3
12
DU7
TVWDF1004AD0_DFN9
ESD@
+5V_USB_PWR1
12
CU11
9
8
7
USB3TP1_R
6
USB3TN1_R
10U_0603_6.3V6M~D
CU20
1
2
9
8
7
6
10U_0603_6.3V6M~D
1
2
USB3RN3_R
USB3RP3_R
USB3TN3_R
USB3TP3_R
CU3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
sualaptop365.edu.vn
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
USB 3.0/2.0 x3
USB 3.0/2.0 x3
USB 3.0/2.0 x3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
33 56Friday, September 19, 2014
33 56Friday, September 19, 2014
33 56Friday, September 19, 2014
1.0
1.0
1.0
5
RM64 0_0603_1%@
1 2
+3VS
RM65 0_0603_5%@
1 2
+3VALW
CM46 0.22U_0402_10V6K
PEG_CRX_GTX_N0<12>
PEG_CRX_GTX_P0<12>
PEG_CRX_GTX_N0_DGPU<35>
PEG_CRX_GTX_P0_DGPU<35>
PEG_CRX_GTX_N3<12>
PEG_CRX_GTX_P3<12>
D D
From CPU RX
C C
From CPU TX
B B
CLK_PEG_N15P<22>
CLK_PEG_N15P#<22>
A A
PEG_CRX_GTX_N2<12>
PEG_CRX_GTX_P2<12>
PEG_CRX_GTX_N1<12>
PEG_CRX_GTX_P1<12>
RM37 0_0402_1%@
1 2
RM38 0_0402_1%@
1 2
5
PEG_CRX_GTX_N3_DGPU<35>
PEG_CRX_GTX_P3_DGPU<35>
PEG_CRX_GTX_N2_DGPU<35>
PEG_CRX_GTX_P2_DGPU<35>
PEG_CRX_GTX_N1_DGPU<35>
PEG_CRX_GTX_P1_DGPU<35>
HD3SS3415Pin Number
21
NC VDD
25
NC
31
NC
35
NC
39
NC
PEG_CTX_GRX_P0<12>
PEG_CTX_GRX_N0<12>
PEG_CTX_GRX_P1<12>
PEG_CTX_GRX_N1<12>
PEG_CTX_GRX_P2<12>
PEG_CTX_GRX_N2<12>
PEG_CTX_GRX_P3<12>
PEG_CTX_GRX_N3<12>
CLK_PEG_GPU<9>
CLK_PEG_GPU#<9>
CLKREQ#_GPU<9,22>
1 2
1 2
CM47 0.22U_0402_10V6K
1 2
CM48 0.22U_0402_10V6K
CM49 0.22U_0402_10V6K
1 2
1 2
CM50 0.22U_0402_10V6K
CM51 0.22U_0402_10V6K
1 2
CM52 0.22U_0402_10V6K
1 2
1 2
CM53 0.22U_0402_10V6K
PI3PCIE3415
GND
VDD
GND
VDD
CTX_DRX_P0
CTX_DRX_N0
CTX_DRX_P1
CTX_DRX_N1
CTX_DRX_P2
CTX_DRX_N2
CTX_DRX_P3
CTX_DRX_N3
CLKREQ#_GPU
12
CLKREQ#_DGPU
DM1 RB751V-40_SOD323-2
RM41
49.9_0402_1%
12
12
SML0DATA<9>
SML0CLK<9>
RM39 33_0402_1%
RM40 33_0402_1%
CLK_N15P_C
CLK_N15P#_C
49.9_0402_1%
PEG_CRX_GTX_N0_C
PEG_CRX_GTX_P0_C
PEG_CRX_GTX_N3_C
PEG_CRX_GTX_P3_C
PEG_CRX_GTX_N2_C
PEG_CRX_GTX_P2_C
PEG_CRX_GTX_N1_C
PEG_CRX_GTX_P1_C
CM36 0.22U_0402_10V6K
1 2
1 2
CM37 0.22U_0402_10V6K
CM34 0.22U_0402_10V6K
1 2
CM35 0.22U_0402_10V6K
1 2
CM32 0.22U_0402_10V6K
1 2
CM33 0.22U_0402_10V6K
1 2
1 2
CM30 0.22U_0402_10V6K
CM31 0.22U_0402_10V6K
1 2
RM22 0_0402_1%@
1 2
RM23 0_0402_1%@
1 2
+3VS
12
12
RM42
+3VS
@
RM30
2.2K_0402_5%
1 2
1 2
CM18
@
RM31
2.2K_0402_5%
4
+3V_PCIE_MUX
UM1
1
AI+
2
AI-
3
AOb+
4
AOb-
5
BI+
6
BI-
7
BOb+
8
BOb-
9
VDD_1
10
CI+
11
CI-
12
COb+
13
COb-
14
DI+
15
DI-
16
DOb+
17
DOb-
18
GND_1
19
VDD_2
20
GND_2
VDD_321GND_3
PI3PCIE3415ZHEX_TQFN42_3P5X9
+3V_PCIE_MUX +3V_PCIE_MUX
UM2
1
AI+
2
AI-
3
AOb+
4
AOb-
5
BI+
6
BI-
7
BOb+
8
BOb-
9
VDD_1
10
CI+
11
CI-
12
COb+
13
COb-
14
DI+
15
DI-
16
DOb+
17
DOb-
18
GND_1
19
VDD_2
20
GND_2
VDD_321GND_3
PI3PCIE3415ZHEX_TQFN42_3P5X9
PCIE_CLK_BUFFER
+3VS
12
@
12
RM19
4.7K_0402_5%
RM21
1K_0402_1%
CLK_PEG_N15P_R
CLK_PEG_N15P#_R
1
CM19
2
0.1U_0402_10V7K
1
2
0.1U_0402_10V7K
CLK+
CLK-
4
UM4
1
PLL_BW_SEL
2
SRCIN
3
SRCIN#
4
OE_0#
5
VDD
6
GND
7
CLK0
8
CLK0#
9
VDD
10
SDATA
PI6CEQ20200LIEX_TSSOP20
GND_9
VDD_8
GND_8
VDD_7
GND_7
GND_6
VDD_6
VDD_5
GND_5
VDD_4
GND_4
HEATGND
GND_9
VDD_8
GND_8
VDD_7
GND_7
GND_6
VDD_6
VDD_5
GND_5
VDD_4
GND_4
HEATGND
42
41
40
39
38
37
AOa+
36
AOa-
35
34
33
BOa+
32
BOa-
31
30
SEL
29
28
COa+
27
COa-
26
25
24
DOa+
23
DOa-
22
43
42
41
40
39
38
37
AOa+
36
AOa-
35
34
33
BOa+
32
BOa-
31
30
SEL
29
28
COa+
27
COa-
26
25
24
DOa+
23
DOa-
22
43
VDDA
GNDA
IRef
OE_1#
VDD
GND
CLK1
CLK1#
VDD
SCLK
+3V_PCIE_MUX
1
2
1
2
PEG_CTX_GRX_P0_GPU_C
PEG_CTX_GRX_N0_GPU_C
PEG_CTX_GRX_P1_GPU_C
PEG_CTX_GRX_N1_GPU_C
PEG_CTX_GRX_P2_GPU_C
PEG_CTX_GRX_N2_GPU_C
PEG_CTX_GRX_P3_GPU_C
PEG_CTX_GRX_N3_GPU_C
1
CM15
2
0.1U_0402_10V7K
20
19
18
RM24 475_0402_1%
17
CLKREQ#_DGPU
16
15
14
13
RM26 33_0402_1%
12
RM27 33_0402_1%
11
CM20
1U_0402_6.3V
12
3
1U_0402_6.3V4Z~D
0.1U_0402_16V7K
0.1U_0402_16V7K
CM1
CM2
CM3
1
1
2
2
PEG_CRX_GTX_N0_GPU <22>
PEG_CRX_GTX_P0_GPU <22>
PEG_CRX_GTX_N3_GPU <22>
PEG_CRX_GTX_P3_GPU <22>
PEG_CRX_GTX_N2_GPU <22>
PEG_CRX_GTX_P2_GPU <22>
PEG_CRX_GTX_N1_GPU <22>
PEG_CRX_GTX_P1_GPU <22>
1U_0402_6.3V4Z~D
CM4
CM16
CM5
1
2
1
RM18
2.2_0402_1%
2
0.1U_0402_10V7K
12
+3VS
12
12
CM6
1
2
1 2
CM44 0.22U_0402_10V6K
CM45 0.22U_0402_10V6K
1 2
CM42 0.22U_0402_10V6K
1 2
1 2
CM43 0.22U_0402_10V6K
CM40 0.22U_0402_10V6K
1 2
1 2
CM41 0.22U_0402_10V6K
1 2
CM38 0.22U_0402_10V6K
CM39 0.22U_0402_10V6K
1 2
+3VS
12
12
CM17
22U_0603_6.3V6M
CLKREQ#_DGPU <41>
DGFX_CLK+_R
DGFX_CLK-_R
RM28
49.9_0402_1%
RM29
49.9_0402_1%
12
12
3
1 2
CM62
0.01U_0603_25V7K
1 2
1 2
CM63
0.01U_0603_25V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
RM34
10K_0402_5%
DGFX_CLK+
DGFX_CLK-
PCIE_MUX <11>
PEG_CTX_GRX_P0_GPU <22>
PEG_CTX_GRX_N0_GPU <22>
PEG_CTX_GRX_P1_GPU <22>
PEG_CTX_GRX_N1_GPU <22>
PEG_CTX_GRX_P2_GPU <22>
PEG_CTX_GRX_N2_GPU <22>
PEG_CTX_GRX_P3_GPU <22>
PEG_CTX_GRX_N3_GPU <22>
JCDRA
CALDERA_PRSNT#
TE_2260531-1
CONN@
To N15P-GX TX
FunctionSEL Pin
Low
xI ---> xOa
High
xI ---> xOb
To N15P-GX RX
1
Caldera_ON
2
Caldera_PWRGD
3
CTX_DRX_P0
T0+
4
CTX_DRX_N0
T0-
5
GND
6
CTX_DRX_P1
T1+
7
CTX_DRX_N1
T1-
8
GND
9
CTX_DRX_P2
T2+
10
CTX_DRX_N2
T2-
11
GND
12
CTX_DRX_P3
T3+
13
CTX_DRX_N3
T3-
14
GND
15
R0+
16
R0-
17
GND
18
R1+
19
R1-
20
GND
21
22
PLTRST#
BUTTON#
LED_WHITE
LED_RED
REFCLK+
REFCLK-
SSTX+
USBD+
USBD-
SSRX+
SSRX-
I2C_CLK
I2C_DATA
SSTX-
GND
R2+
GND
R3+
GND
GND
GND
GND
GND
GND
GND
GND
GND
CDR_RST#
23
24
25
R2-
26
CDR_BTN#
27
28
29
30
31
R3-
32
33
DGFX_CLK+
34
DGFX_CLK-
35
36
CM9 0.1U_0402_10V6K
1 2
37
1 2
CM10 0.1U_0402_10V6K
38
39
USB20_P3_PCH
40
USB20_N3_PCH
41
42
43
44
45
CDR_I2C_CLK
46
CDR_I2C_DAT
47
48
49
50
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2
RM66 0_0402_5%~D
1 2
1 2
RM67 0_0402_5%~D
+3VALW +3VALW
1U_0402_6.3V4Z~D
CM65
1
12
RM15
10K_0402_5%
@
2
@
UM8
16
VDD
15
INT_IN#
+3VALW
1
CM64
2
@
12
RM4
10K_0402_5%
12
RM17
100K_0402_5%
14
SDA_SLAVE
13
SCL_SLAVE
12
A3
11
A2
10
A1
9
A0
PCA9541APW-03_TSSOP16
@
+3VALW
0.1U_0402_10V7K
5
1
P
B
O
2
A
G
3
CDR_ON <41>
PWGD_USBOC <41>
CDR_PRNT# <35,37,41>
CDR_BTN# <41>
4
UM7
TC7SH08FU_SSOP5~D
CDR_I2C_DAT
CDR_I2C_CLK
CDR_TXRX_GOOD<41>
+3VALW
12
RM35
100K_0402_5%
12
RM36
470K_0402_5%
CRX_DGFX_CRXP0 <35>
CRX_DGFX_CRXN0 <35>
CRX_DGFX_CRXP1 <35>
CRX_DGFX_CRXN1 <35>
CRX_DGFX_CRXP2 <35>
CRX_DGFX_CRXN2 <35>
CDR_LED_WHITE <41>
CDR_LED_RED <41>
CRX_DGFX_CRXP3 <35>
CRX_DGFX_CRXN3 <35>
USB3RN4 <12>
USB3RP4 <12>
USB3TN4 <12>
USB3TP4 <12>
Compal Secret Data
Compal Secret Data
2
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
INT0#
SDA_MST0
SCL_MST0
RESET#
SCL_MST1
SDA_MST1
INT1#
VSS
CDR_ON_ELC <37>
EMI@
LM1
3
3
2
2
WCM-2012HS-900T_4P
1
12
12
RM63
10K_0402_5%
RM16
10K_0402_5%
RM62
10K_0402_5%
@
@
@
1 2
1
2
3
4
5
6
7
8
+3VALW
1
CM11
2
@
0.1U_0402_10V7K
4
O
4
4
1
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RM2
10K_0402_5%
5
1
P
B
2
A
G
3
UM3
TC7SH08FU_SSOP5~D
USB20_CALDERA_P3 <12>
USB20_CALDERA_N3 <12>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCIE MUX/CLK_BUFFER
PCIE MUX/CLK_BUFFER
PCIE MUX/CLK_BUFFER
LA-A301P
LA-A301P
LA-A301P
1
I2C_DAT <37,38,39>
I2C_CLK <37,38,39>
EC_SMB_CK1 <35,41,47,48>
EC_SMB_DA1 <35,41,47,48>
12
CALDERA_RST# <41>
PCH_PLTRST# <10,22>
1.0
1.0
1.0
34 56Friday, September 19, 2014
34 56Friday, September 19, 2014
34 56Friday, September 19, 2014
sualaptop365.edu.vn
5
D D
1 2
PEG_CRX_GTX_P0_DGPU<34>
PEG_CRX_GTX_N0_DGPU<34>
PEG_CRX_GTX_P1_DGPU<34>
PEG_CRX_GTX_N1_DGPU<34>
PEG_CRX_GTX_P2_DGPU<34>
PEG_CRX_GTX_N2_DGPU<34>
PEG_CRX_GTX_P3_DGPU<34>
PEG_CRX_GTX_N3_DGPU<34>
C C
+3VS
1 2
RM7
1K_0402_1%
VGA_EN
12
@
RM8
1K_0402_1%
CM54 0.22U_0402_10V6K
CM55 0.22U_0402_10V6K
1 2
CM56 0.22U_0402_10V6K
1 2
1 2
CM57 0.22U_0402_10V6K
CM58 0.22U_0402_10V6K
1 2
1 2
CM59 0.22U_0402_10V6K
CM60 0.22U_0402_10V6K
1 2
CM61 0.22U_0402_10V6K
1 2
+3VS
W=20mils
10U_0805_10V4Z
CM21
1
2
PEG_CRX_GTX_P0_DGPU_C
PEG_CRX_GTX_N0_DGPU_C
PEG_CRX_GTX_P1_DGPU_C
PEG_CRX_GTX_N1_DGPU_C
PEG_CRX_GTX_P2_DGPU_C
PEG_CRX_GTX_N2_DGPU_C
PEG_CRX_GTX_P3_DGPU_C
PEG_CRX_GTX_N3_DGPU_C
10U_0805_10V4Z
1U_0603_10V4Z
CM22
1
1
2
2
CM23
4
2.5VOUT
1
CM7
CM8
2
0.1U_0402_10V7K
0.1U_0402_10V7K
9
14
36
UM5
1
OUTB_0+
2
OUTB_0-
3
OUTB_1+
4
OUTB_1-
5
OUTB_2+
6
OUTB_2-
7
OUTB_3+
8
OUTB_3-
10
INA_0+
11
INA_0-
12
INA_1+
13
INA_1-
15
INA_2+
16
INA_2-
17
INA_3+
18
INA_3-
VGA_EN
1 2
RM6
10K_0402_5%
19
20
21
22
23
24
25
26
27
EQA1
EQA0
RATE
RXDET
LPBK
VIN
VDD_SEL
SD_TH/READ_EN
ALL_DONE
DS80PCI402SQNOPB_WQFN54_10X5P5
EQA1
EQA0
1U_0603_10V4Z
CM24
1
2
51
VDD
VDD
VDD41VDD
VDD
INB_0+
INB_0-
INB_1+
INB_1-
INB_2+
INB_2-
INB_3+
INB_3-
OUTA_0+
OUTA_0-
OUTA_1+
OUTA_1-
OUTA_2+
OUTA_2-
OUTA_3+
OUTA_3-
DEMB1/AD0
DEMB0/AD1
PRSNT
DEMA1/SCL
DEMA0/SDA
ENSMB
EQB1/AD2
EQB0/AD3
DAP_GND
1
1
1
CM13
CM12
2
2
2
0.1U_0402_10V7K
0.1U_0402_10V7K
45
44
43
42
40
39
38
37
35
34
33
32
31
30
29
28
54
DEMB1
53
DEMB0
52
RM61 20K_0402_5%
50
49
48
ENSMB
47
EQB1
46
EQB0
55
1
CM14
2
0.1U_0402_10V7K
12
3
CRX_DGFX_CRXP0 <34>
CRX_DGFX_CRXN0 <34>
CRX_DGFX_CRXP1 <34>
CRX_DGFX_CRXN1 <34>
CRX_DGFX_CRXP2 <34>
CRX_DGFX_CRXN2 <34>
CRX_DGFX_CRXP3 <34>
CRX_DGFX_CRXN3 <34>
CDR_PRNT# <34,37,41>
EC_SMB_CK1 <34,41,47,48>
EC_SMB_DA1 <34,41,47,48>
2
Tie 1KΩ to VDD = Register Access SMBus Slave mode
FLOAT = Read External EEPROM (Master SMBUS Mode)
Tie 1KΩ to GND = Pin Mode
+3VS
RM52
1K_0402_1%
ENSMB
1 2
12
@
RM53
1K_0402_1%
1
EQ Settings DEMA Settings Level control Settings
EQA1
EQA0
dB at
5
dB at
2.5G
4G
3.7 4.9
5.8 7.9
7.7 9.9
8.9 11
11.2 14.3
11.4 14.6
13.5 17
15 18.5
12.8 18
17.4 22
19.7 24.4
21.1 25.8
21.7 27.4
23.5 29.0
25.8 31.4
27.3 32.7
Suggested Use
< 5 inch trace
5 inch 5–mil trace
5 inch 4–mil trace
10 inch 5–mil trace
10 inch 4–mil trace
15 inch 4–mil trace
20 inch 4–mil trace
25 to 30 inch 4–mil trace
30 inch 4–mil trace
35 inch 4–mil trace
10m, 30awg cable
10m – 12m cable
Level
EQB1
EQB0
0
0
1
0
R
2
0
B B
A A
F
3
R
1
4
0
R
5
R
R
6
R
F
7
R
1
8
F
0
9
R
F
10
F
F
11
F
1
12
1
0
13
R
1
14
F
1
15
1 1
16
Level
DEMA1
DEMA0
DEMB0
0
0
0
0
R
R
R
R
F
F
F
F
1
1
1
1 1
0
R
F
1
0
R
F
1
0
R
F
1
0
R
F
DEM dB Suggested Use
0
<5 inch 4–mil trace
0
<5 inch 4–mil trace
-3.5
10 inch 4–mil trace
0
<5 inch 4–mil trace
-3.5
10 inch 4–mil trace
-6
15 inch 4–mil trace
0
<5 inch 4–mil trace
-3.5
10 inch 4–mil trace
-6
15 inch 4–mil trace
0
<5 inch 4–mil trace
-3.5
10 inch 4–mil trace
-6
15 inch 4–mil trace
0
<5 inch 4–mil trace
-3.5
10 inch 4–mil trace
-6
15 inch 4–mil trace
-9
20 inch 4–mil trace
4
DEMB1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Level Pin Setting Description
1
2
3
4
1kΩ to GND
0
20kΩ to GND
R
Float
F
1kΩ to VDD
1
Suggested Use
<5 inch 4–mil trace
<5 inch 4–mil trace
10 inch 4–mil trace
<5 inch 4–mil trace
3
1 2
RM10
1K_0402_1%
1 2
RM12
1K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
EQ*MB
2
1 2
RM20
1K_0402_1%
1 2
RM43
1K_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
EQA1
EQA0
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
EQB1
EQB0
DEM*EGPU
+3VS
RM44
1K_0402_1%
1 2
1 2
RM47
1K_0402_1%
Title
Title
Title
PCIE re-driver
PCIE re-driver
PCIE re-driver
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
DEMB1
DEMB0
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
35 56Friday, September 19, 2014
35 56Friday, September 19, 2014
1
35 56Friday, September 19, 2014
1.0
1.0
1.0
sualaptop365.edu.vn
A
US2
HTI@
SN75LVCP601RTJR
SA00003ZX00
1 1
SATA_PTX_DRX_P0<8>
SATA_PTX_DRX_N0<8>
SATA_PRX_DTX_P0<8>
SATA_PRX_DTX_N0<8>
+3VS
US2
PS8527CTQFN20GTR2-A1
SA00007JU00
+3VS
1 2
CS37 0.01U_0402_16V7K
1 2
CS36 0.01U_0402_16V7K
1 2
CS35 0.01U_0402_16V7K
1 2
CS33 0.01U_0402_16V7K
RS29 0_0402_5%@
RS30 0_0402_5%@
RS20 0_0402_5%@
RS22 0_0402_5%
TI,SN75LVCP601RTJR
2 2
Pop RS22,RS23,RS28,RS35,RS36
PARADE,PS8520CTQFN20GTR2-A1
Pop RS18,RS22,RS23,RS35,RS36
3 3
B
HPA@
1 2
RS19 0_0402_5%
1 2
1 2
1 2
1 2
ZZZ1
X76@
TI SATA Redriver
X7656331L03
SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C
SATA_PRX_DTX_P0_C
SATA_PRX_DTX_N0_C
HDD_B0_PRE1
HDD_A0_PRE1
HDD_B0_EQ
DDR_XDP_WLAN_TP_SMBDAT<6,9,17,18>
DDR_XDP_WLAN_TP_SMBCLK<6,9,17,18>
C
US2
7
1
2
5
4
17
19
18
3
13
21
VDD
EN
VDD
A_INp
A_INn
NC
REXT
B_OUTp
A_PRE0
B_OUTn
B_PRE0
B_PRE1
A_PRE1
A_OUTp
A_OUTn
TEST
B_INp
GND
GND
B_INn
EPAD
PS8520BTQFN20GTR2_TQFN20_4X4
@
+3VS
0.1U_0402_16V4Z~D
CS7
1
2
FFS_INT1<10>
FFS_INT2<11>
D
+3VS
RS34
4.7K_0402_5%
RS33
4.7K_0402_5%
@
1 2
1 2
6
DEW2
16
DEW1
10
20
HDD_REXT_SATA0
9
HDD_A0_PRE0
8
HDD_B0_PRE0
15
SATA_PTX_DRX_P0_RC
14
SATA_PTX_DRX_N0_RC SATA_PTX_DRX_N0_R
11
SATA_PRX_DTX_P0_RC
12
SATA_PRX_DTX_N0_RC
10U_0805_10V4Z~D
CS8
1
2
1
14
FFS_INT1
FFS_INT2
11
9
7
6
4
8
CS22
0.01U_0402_16V7K
CS23
0.1U_0402_25V6K
1
1
12
@
2
2
1 2
CS9 0.01U_0402_16V7K
1 2
CS10 0.01U_0402_16V7K
1 2
CS11 0.01U_0402_16V7K
1 2
CS12 0.01U_0402_16V7K
HDD_B0_EQ
DEW2
DEW1
HDD_B0_PRE0
HDD_B0_PRE1
HDD_A0_PRE1
HDD_A0_PRE0
HDD_REXT_SATA0
US1
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
LNG3DMTR_LGA16_3X3~D
RS38 0_0402_5%@
RS37 0_0402_5%
RS35 4.7K_0402_5%
RS36 4.7K_0402_5%
RS21 0_0402_5%@
RS18 0_0402_5%HPA@
RS23 0_0402_5%
RS24 2K_0402_5%@
RS31 5.1K_0402_1%@
10
RES
13
RES
15
RES
16
RES
5
GND
12
GND
2
NC
3
NC
RS25
0_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
RS26
0_0402_5%
0_0402_5%
12
12
SATA_PTX_DRX_P0_R
SATA_PRX_DTX_P0_R
SATA_PRX_DTX_N0_R
E
RS28
0_0402_5%
RS27
12
HTI@
@
+3VS
+3VS
0.1U_0402_25V6K~D
10U_0805_25V6K~D
1
1
CS5
CS2
2
2
SATA_PTX_DRX_P1<8>
SATA_PTX_DRX_N1<8>
SATA_PRX_DTX_N1<8>
SATA_PRX_DTX_P1<8>
CS13 0.01U_0402_16V7K~D
CS18 0.01U_0402_16V7K~D
CS15 0.01U_0402_16V7K~D
CS20 0.01U_0402_16V7K~D
1 2
1 2
1 2
1 2
F
+5VS
10U_0805_25V6K~D
1
CS1
2
1000P_0402_50V7K~D
1
CS21
2
HDD_DET#<11>
DEVSLP0<11>
DEVSLP1<11>
SATA_PTX_DRX_P0_R
SATA_PTX_DRX_N0_R
SATA_PRX_DTX_P0_R
SATA_PRX_DTX_N0_R
SATA_PTX_DRX_P1_C
SATA_PTX_DRX_N1_C
SATA_PRX_DTX_N1_C
SATA_PRX_DTX_P1_C
FFS_INT2_CONN
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
1
1
CS6
2
2
CS19
G
JHDD
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
GND
32
GND
33
GND
34
GND
35
GND
STARC_111H30-000000-G4-R
CONN@
H
+5VS
+3VS
G
2
13
D
S
QS1
4 4
SSM3K7002FU_SC70-3~D
DS1
SDM10U45-7_SOD523-2~D
sualaptop365.edu.vn
A
B
12
@
RS1
100K_0402_5%~D
21
C
FFS_INT2_CONNFFS_INT2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
F
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SATA HDD/M2 cards
SATA HDD/M2 cards
SATA HDD/M2 cards
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
G
36 56Wednesday, September 24, 2014
36 56Wednesday, September 24, 2014
36 56Wednesday, September 24, 2014
H
1.0
1.0
1.0
5
4
3
2
1
SIO_SLP_S4#<10,41>
SIO_SLP_S5#<10>
1 2
RE8
1K_0402_1%~D
+3.3V_F383
+3.3V_F383
1
2
1U_0805_10V7
CE2
CE1
1
@
2
USB20_ELC_P6<12>
USB20_ELC_N6<12>
+3.3V_F383
@
@
CE11 0.1U_0402_16V4Z~D
CE12 0.1U_0402_16V4Z~D
1
1
1
2
2
2
+3.3V_F383
D
2
G
S
+3.3V_F383
D
2
G
S
+3.3V_F383
D
2
G
S
CE3
1
2
@
@
@
CE15 0.1U_0402_16V4Z~D
CE14 0.1U_0402_16V4Z~D
CE13 0.1U_0402_16V4Z~D
1
1
2
2
12
RE45
100K_0402_5%~D
SLP_S4
1
QE14
SSM3K7002F_SC59-3~D
3
12
RE17
100K_0402_5%~D
SLP_S5
1
QE6
SSM3K7002F_SC59-3~D
3
12
RE22
100K_0402_5%~D
BATT_LOW_LED
1
QE8
SSM3K7002F_SC59-3~D
3
CE4
2
1
USB20_ELC_P6
USB20_ELC_N6
@
@
CE16 0.1U_0402_16V4Z~D
CE17 0.1U_0402_16V4Z~D
1
1
2
2
10
18
17
16
15
14
13
12
@
CE18 0.1U_0402_16V4Z~D
1
2
UE1
6
P0.0
VDD
P0.1
4
P0.2
D+
5
P0.3
D-
P0.4
7
P0.5
REGIN
8
P0.6
VBUS
P0.7
9
RST#/C2CK
P1.0
P3.0/C2D
P1.1
P1.2
P2.0
P1.3
P2.1
P1.4
P2.2
P1.5
P2.3
P1.6
P2.4
P1.7
P2.5
P2.6
P2.711GND
C8051F383-GQ_LQFP32_7X7
+3.3V_F383
S5
ON
OFF
1 2
+3VS
12
RE24.7K_0402_5%~D
12
RE34.7K_0402_5%~D
SPI_MOSO
place RE5 as close as UE1
RE5
2
SPI_MOCLK
1
SPI_MOSO
32
SPI_MOSI
31
SPI_MOCS#
30
I2C_DAT
29
I2C_CLK
28
27
26
SLP_S3
25
BATT_CHG_LED
24
ACIN#
23
LID_SW_IN#_D
22
BATT_LOW_LED
21
SLP_S5
20
SLP_S4
19
3
0_0603_5%~D
1 2
I2C_DAT <34,38,39>
I2C_CLK <34,38,39>
CDR_PRNT# <34,35,41>
CDR_ON_ELC <34>
SDMK0340L-7-F_SOD323-2~D
1 2
CE8 0.1U_0402_16V4Z~D@
1 2
CE9 0.1U_0402_16V4Z~D@
+3.3V_F383
SPI_MOCLK_R
12
RE910K_0402_5%
12
LID_SW_IN#
DE1
SPI_MOSI
SPI_MOCLK_R
1 2
RE13 10K_0402_5%~D
1 2
RE14 10K_0402_5%~D
1 2
RE15 10K_0402_5%~D
+3.3V_F383
+3VALW +3.3V_F383
CE21
4.7U_0805_10V4Z
3V_F383_ON<41>
SPI_MOCS#
1
2
+3VALW_EC
0.1U_0402_16V4Z~D
CE19
1
2
+3.3V_F383 behavior
AC IN
BATT only
AC mode battery full in S5:turn off ELC controller
LID_SW_IN# <38,41>
12
5
RE1015_0402_5%
6
12
RE1215_0402_5%
1
7
3
8
22P_0402_50V8J~D
1
CE20
2
@
J1
2
JUMP_43X118
UE9
5
IN
4
EN
SY6288C20AAC_SOT23-5
I2C_DAT
I2C_CLK
UE2
SO
DI
CLK
CS
HOLD
WP
VCC
VSS
W25Q80DVSSIG_SO8
112
OUT
GND
OC
S0ONS3
ON
ON
ON
2
RE11 15_0402_5%
4
1
2
3
1 2
RE19
10K_0402_5%
S4
ON
OFF
22P_0402_50V8J~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
D D
1 2
RE4 0_0603_1%@
+5VALW
+5VS
C C
Cloase to JP1
B B
A A
SIO_SLP_S3#<10,41>
ACIN<10,22,41,47,48>
BATT_CHG_LED#<41>
+3.3V_F383
1
2
RE6 0_0603_5%~D@
0.1U_0402_16V4Z
CE10
@
2
G
2
G
2
G
1 2
+3.3V_F383
12
RE16
100K_0402_5%~D
1
D
QE4
SSM3K7002F_SC59-3~D
S
3
+3.3V_F383
12
RE18
100K_0402_5%~D
1
D
QE7
SSM3K7002F_SC59-3~D
S
3
+3.3V_F383
12
RE24
100K_0402_5%~D
1
D
QE9
SSM3K7002F_SC59-3~D
S
3
SLP_S3
ACIN#
BATT_CHG_LED
1U_0805_10V7
CE6
1
2
JELC
GND1
GND2
ACES_50450-00671-P02
CONN@
W=40mils
+3.3V_F383
0.1U_0402_16V4Z~D
CE7
1
@
2
1
1
2
2
3
3
4
4
5
5
6
6
7
8
BATT_LOW_LED#<41>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
sualaptop365.edu.vn
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
ELC (1)C8051F383
ELC (1)C8051F383
ELC (1)C8051F383
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
37 56Friday, September 19, 2014
37 56Friday, September 19, 2014
37 56Friday, September 19, 2014
1.0
1.0
1.0
5
4.7K_0402_1%~D
I2C_CLK<34,37,39>
I2C_DAT<34,37,39>
RE1
10K_0402_5%~D
+3VLP
RK1
100K_0402_5%
1 2
1
CK1
0.1U_0402_16V7K
2
+3.3V_F383
RE26
12
RE37
10K_0402_5%~D
+5VS
2
ON/OFF_BTN#
12
I2C_CLK
I2C_DAT
100K_0402_5%~D
12
RE36
SATA_LED_ACT
61
DMN66D0LDW-7_SOT363-6~D
LID_SW
AD0
AD1
AD2
AD3
QE3A
2
G
UE3
24
RESET
25
SCL
26
SDA
31
A0
32
A1
1
A2
2
A3
12
N.C.
13
N.C.
28
N.C.
29
N.C.
30
N.C.
7
GND
18
GND
TLC59116FIRHBR_VQFN32_5X5
1
D
QE13
SSM3K7002F_SC59-3~D
S
3
D D
C C
B B
A A
+3.3V_F383
RE28
4.7K_0402_1%~D
RE27
4.7K_0402_1%~D
12
12
RE29
4.7K_0402_1%~D12RE38
4.7K_0402_1%~D
12
+3VS
12
SATALED#<8>
@
SW2
SMT1-05-A_4P
3
1
2
4
5
6
ON/OFF switch power button
Bottom Side pop only before MP
5
2
5
TP_EN
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
GND
GND
Vcc
34
61
34
HDD_G_7313#
4
27
3
ALIEN_LED_R_DRV#
4
ALIEN_LED_G_DRV#
5
ALIEN_LED_B_DRV#
6
LOGO_LED_R_DRV#
8
LOGO_LED_G_DRV#
9
LOGO_LED_B_DRV#
10
LED_R_7313#
11
LED_G_7313#
14
LED_B_7313#
15
PWR_R_7313#
16
PWR_G_7313#
17
PWR_B_7313#
19
HDD_R_7313#
20
HDD_G_7313#
21
HDD_B_7313#
22
23
33
HDD_B
QE2B
HDD_B_7313#
HDD_R
DMN66D0LDW-7_SOT363-6~D
QE2A
HDD_R_7313#
HDD_G
DMN66D0LDW-7_SOT363-6~D
QE3B
DMN66D0LDW-7_SOT363-6~D
2
CT5
100P_0402_50V8J~D
1
2
+3VALW
+3.3V_F383
470K_0402_5%~D
12
61
DMN66D0LDW-7_SOT363-6~D
1
CE24
0.1U_0402_16V4Z~D
2
RT10
RT12
8.2_0402_5%~D
QT2A
12
12
CT6
0.047U_0402_25V7K
+3VS_TOUCH
10U_0603_6.3V6M~D
CT7
1
2
5
3
Power LED
+5VALW
100K_0402_5%~D
12
RE30
1
D
2
PWR_LED#<41>
G
QE11
SSM3K7002F_SC59-3~D
S
3
Power_LED
+5VALW
QE10
G
2
1 3
S
LP2301ALT1G 1P SOT-23-3
D
+LED_PWR
2
LOGO_LED_R_DRV#
LOGO_LED_G_DRV#
LOGO_LED_B_DRV#
ALIEN_LED_R_DRV#
ALIEN_LED_G_DRV#
ALIEN_LED_B_DRV#
1
+5VS
0.1U_0402_16V4Z
1
2
+5VS
0.1U_0402_16V4Z
LID_SW
1
2
W=20mils
CE30
JSLIT
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
GND
14
GND
ACES_50208-01201-P01_12P
CONN@
CE28
Logic up LED board
+5VALW
12
RE34
100K_0402_5%~D
LID_SW
1
D
LID_SW_IN#<37,41>
LID_SW_IN#
2
G
QE12
SSM3K7002F_SC59-3~D
S
3
0.1U_0402_16V4Z
+3VALW
+LED_PWR
CAPS_LED<41>
WLAN_LED#<32>
ON/OFF_BTN#<41>
T97@
PTP pin define
VDD
I2C_DATA
I2C_CLK
GND
ATTN
PTP_DISABLE#(CLOSE LID)
+3VS_TOUCH
I2C1_SDA_TP<11>
I2C1_SCL_TP<11>
+3VS_TOUCH
TP_INT#<10,41>
PTP_DISABLE#<41>
TP_DATA<41>
TP_CLK<41>
PTP_KBBL#<41>
+3VS_TOUCH
1 2
CT4 1U_0402_6.3V6K~D
1 2
RT7 0_0402_5%@
1 2
RT8 0_0402_5%@
1 2
RT4 100K_0402_5%
1 2
RT13 10K_0402_5%
PS2_DATA
PS2_CLK
PTP_KBBL#(KB BL)
NC
RT1
RT11
39_0402_5%~D
12
34
QT2B
DMN66D0LDW-7_SOT363-6~D
+3VALW
0_0603_1%
1 2
@
@
RT2
0_0603_5%
1 2
+3VS
TP_EN<41>
TP_EN I2C1_SDA_TP_R
UT1
1
VOUT
VIN
2
VOUT
VIN
3
CT
ON
4
VBIAS
GND
GND
TPS22967DSGR_SON8_2X2
7
8
6
5
9
+3VS_TOUCH+V_TP
1
1
CT1
@
2
CT2
@
2
2200P_0402_25V7K
I2C1_SDA_TP
I2C1_SCL_TP I2C1_SCL_TP_R
0.1U_0402_10V6K
APE8937(SA000070L00)
+5VS
1
CE23
LED_R_7313#
LED_B_7313#
LED_G_7313#
CAPS_LED
WLAN_LED#
HDD_R
HDD_G
HDD_B
ON/OFF_BTN#
PWR_G_7313#
PWR_R_7313#
PWR_B_7313#
LID_SW_IN#
I2C1_SDA_TP_R
I2C1_SCL_TP_R
2
JPWR
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
GND
32
GND
ACES_50506-03041-P01
CONN@
Logic low LED board
+3VS_TOUCH
+3VS_TOUCH
2
G
S
QT1B
5
DMN66D0LDW-7_SOT363-6
34
SGD
QT1A
DMN66D0LDW-7_SOT363-6
D
10K_0402_5%
61
12
RT5
12
RT6
10K_0402_5%
TPS22967(SA000070S00)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
5
sualaptop365.edu.vn
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
ELC (2)PTP/PWR SW
ELC (2)PTP/PWR SW
ELC (2)PTP/PWR SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
38 56Friday, September 19, 2014
38 56Friday, September 19, 2014
38 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
I2C address
D D
RE42
4.7K_0402_1%~D
12
12
C C
B B
UE1 (sheet 10 in Caldera board)
UE4 (sheet 39)
UE3 (sheet 38)
3rd LED drive (reserve)
+3.3V_F383
12
RE40
4.7K_0402_1%~D
RE39
4.7K_0402_1%~D
RE43
4.7K_0402_1%~D
12
+5VS
RE41
4.7K_0402_1%~D
I2C_CLK<34,37,38>
I2C_DAT<34,37,38>
12
+3.3V_F383
12
RE44
10K_0402_5%~D
KB_LED_R1
KB_LED_G1
KB_LED_B1
KB_LED_R2
KB_LED_G2
KB_LED_B2
KB_LED_R3
KB_LED_G3
KB_LED_B3
KB_LED_R4
KB_LED_G4
KB_LED_B4
I2C_DAT
AD0
AD1
AD2
AD3
JKBBL
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
ACES_50552-02001-001
CONN@
A3 A2 A1 A0
0
0
0
0
0
001
UE4
24
RESET
25
SCL
26
SDA
31
A0
32
A1
1
A2
2
A3
12
N.C.
13
N.C.
28
N.C.
29
N.C.
30
N.C.
7
GND
18
GND
TLC59116FIRHBR_VQFN32_5X5
21
GND
22
GND
0
1
1
0
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
GND
GND
Vcc
1
0
1
0
27
3
4
5
6
8
9
10
11
14
15
16
17
19
20
21
22
23
33
+3.3V_F383
KB_LED_R1_DRV#
KB_LED_G1_DRV#I2C_CLK
KB_LED_B1_DRV#
KB_LED_R2_DRV#
KB_LED_G2_DRV#
KB_LED_B2_DRV#
KB_LED_R3_DRV#
KB_LED_G3_DRV#
KB_LED_B3_DRV#
KB_LED_R4_DRV#
KB_LED_G4_DRV#
KB_LED_B4_DRV#
1
CE29
0.1U_0402_16V4Z~D
2
100K_0402_5%
KB_LED_R1_DRV#
100K_0402_5%
KB_LED_G1_DRV#
100K_0402_5%
KB_LED_B1_DRV#
100K_0402_5%
KB_LED_R2_DRV#
100K_0402_5%
KB_LED_G2_DRV#
RE46
RE48
RE50
RE52
RE54
+3VS
+3VS
+3VS
+3VS
+3VS
12
12
12
12
+3VS
12
12
RE47
39K_0402_5%
KB_LED_R1_DRV
34
QE15B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE49
39K_0402_5%
KB_LED_G1_DRV
34
QE16B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE51
39K_0402_5%
KB_LED_B1_DRV
34
QE17B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE53
39K_0402_5%
KB_LED_R2_DRV
34
QE18B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE55
39K_0402_5%
KB_LED_G2_DRV
34
QE19B
DMN66D0LDW-7_SOT363-6~D
5
KB_LED_R1
61
2
QE15A
DMN66D0LDW-7_SOT363-6~D
KB_LED_G1
61
2
QE16A
DMN66D0LDW-7_SOT363-6~D
KB_LED_B1
61
QE17A
DMN66D0LDW-7_SOT363-6~D
2
KB_LED_R2
61
2
QE18A
DMN66D0LDW-7_SOT363-6~D
KB_LED_G2
61
2
QE19A
DMN66D0LDW-7_SOT363-6~D
KB_LED_R3_DRV#
KB_LED_G3_DRV#
KB_LED_B3_DRV#
KB_LED_R4_DRV#
KB_LED_G4_DRV#
RE58
100K_0402_5%
RE60
100K_0402_5%
RE62
100K_0402_5%
RE64
100K_0402_5%
RE66
100K_0402_5%
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
12
12
12
12
12
12
RE59
39K_0402_5%
KB_LED_R3_DRV
34
QE21B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE61
39K_0402_5%
KB_LED_G3_DRV
34
QE22B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE63
39K_0402_5%
KB_LED_B3_DRV
34
QE23B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE65
39K_0402_5%
KB_LED_R4_DRV
34
QE24B
DMN66D0LDW-7_SOT363-6~D
5
+3VS
12
RE67
39K_0402_5%
KB_LED_G4_DRV
34
QE25B
DMN66D0LDW-7_SOT363-6~D
5
KB_LED_R3
61
2
QE21A
DMN66D0LDW-7_SOT363-6~D
KB_LED_G3
61
2
QE22A
DMN66D0LDW-7_SOT363-6~D
KB_LED_B3
61
2
QE23A
DMN66D0LDW-7_SOT363-6~D
KB_LED_R4
61
2
QE24A
DMN66D0LDW-7_SOT363-6~D
KB_LED_G4
61
2
QE25A
DMN66D0LDW-7_SOT363-6~D
+3VS
+3VS
12
RE56
100K_0402_5%
KB_LED_B2_DRV#
A A
5
sualaptop365.edu.vn
4
12
RE57
39K_0402_5%
KB_LED_B2_DRV
34
QE20B
DMN66D0LDW-7_SOT363-6~D
5
3
KB_LED_B2
61
2
QE20A
DMN66D0LDW-7_SOT363-6~D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITH ER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONI CS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
KB_LED_B4_DRV#
Deciphered Date
Deciphered Date
Deciphered Date
2
RE68
100K_0402_5%
+3VS
+3VS
12
RE69
12
39K_0402_5%
KB_LED_B4_DRV
34
QE26B
DMN66D0LDW-7_SOT363-6~D
5
Title
Title
Title
ELC (3)KBBL
ELC (3)KBBL
ELC (3)KBBL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
KB_LED_B4
61
QE26A
DMN66D0LDW-7_SOT363-6~D
2
Compal Electronics, Inc.
39 56Friday, September 19, 2014
39 56Friday, September 19, 2014
1
39 56Friday, September 19, 2014
1.0
1.0
1.0
5
4
3
2
1
CPU FAN control circuit
+3VS
+3VS
+3VS
1
2
1 2
RF4
4.7K_0402_5%
0.1U_0402_10V7K
CF2
UF1
1
VDD
2
D+
3
DTHERM#4GND
NCT7718W_MSOP8
SCLK
SDATA
ALERT#
8
7
6
5
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK2 <9,22,41>
EC_SMB_DA2 <9,22,41>
CPU_FAN_PWM<41>
CPU_FAN_FB<41>
10K_0402_5%
10K_0402_5%
RF1
1 2
1 2
SDMK0340L-7-F_SOD323-2
D D
SENSOR_DIODE_P1
1
@
CF3
100P_0402_50V8J
2
SENSOR_DIODE_N1
C
2
B
E
QF1
3 1
MMBT3904WT1G_SC70-3
1
CF4
470P_0402_50V7K
2
Diode circuit s used for skin temp sensor
(placed near CPU).
+5VS
RF2
12
DF1
22U_0805_6.3VAM
CF1
1
10K_0402_5%
RF3
2
1 2
JFAN1
1
1
2
2
3
3
4
4
5
GND1
6
GND2
E-T_3806K-F04N-03R
CONN@
Place CF3 close to QF1 as possible.
GPU FAN control circuit
+3VS
+3VS
0.1U_0402_10V7K
CF6
1
C C
Diode circuit s used for skin temp sensor
SENSOR_DIODE_P2
1
@
CF7
100P_0402_50V8J
2
SENSOR_DIODE_N2
C
2
B
E
QF2
3 1
MMBT3904WT1G_SC70-3
1
CF8
470P_0402_50V7K
2
+3VS
(placed between DIMM1 and DIMM2).
2
1 2
RF8
6.8K_0402_5%~D
UF2
1
VDD
SCLK
2
D+
SDATA
3
ALERT#
DTHERM#4GND
W83L771AWG-2_TSSOP8
8
7
6
5
EC_SMB_CK2
EC_SMB_DA2
GPU_FAN_PWM<41>
GPU_FAN_FB<41>
10K_0402_5%
10K_0402_5%
RF5
1 2
1 2
SDMK0340L-7-F_SOD323-2
+5VS
RF6
12
DF2
22U_0805_6.3VAM
CF5
1
10K_0402_5%
RF7
2
1 2
JFAN2
1
1
2
2
3
3
4
4
5
GND1
6
GND2
E-T_3806K-F04N-03R
CONN@
Place CF7 close to QF2 as possible.
UF1
NCT7718W(SA000067P00)Address:1001_100xb(0x98h)
B B
ADM1032ARMZ-REEL(SA010320110)Address:100_1100(0x4C)
UF2
W83L771AWG-2(SA00003PU00)Address:1001_101xb(0x9Ah)
ADM1032ARMZ-2R(SA010320120)Address:100_1101(0x4D)
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
5
4
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KSI[0..7]<41>
KSO[0..17]<41>
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
KSO[0..17]
Compal Secret Data
Compal Secret Data
Compal Secret Data
INT_KBD Connector
KSI[0..7]
Deciphered Date
Deciphered Date
Deciphered Date
2
KSO7
KSO0
KSI1
KSI7
KSO9
KSI6
KSI5
KSO3
KSI4
KSI2
KSO1
KSI3
KSI0
KSO13
KSO5
KSO2
KSO4
KSO8
KSO6
KSO11
KSO10
KSO12
KSO14
KSO15
KSO16
KSO17
JKB
3030GND
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_50552-03001-001
CONN@
31
32
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
FAN/KB/Thermal sensor
FAN/KB/Thermal sensor
FAN/KB/Thermal sensor
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1.0
1.0
40 56Friday, September 19, 2014
40 56Friday, September 19, 2014
40 56Friday, September 19, 2014
1.0
5
12
12
@EMI@
RK9
0_0402_5%
1 2
+3VS
5
P
Y4A
1
+3VALW_EC
1
2
KSI[0..7]<40>
KSO[0..17]<40>
1
CK23
0.1U_0402_10V7K
2
2
G3NC
CK27
0.033U_0402_16V
CK3
0.1U_0402_10V7K
ME_SUS_PWR_ACK<10>
1
CK2
0.1U_0402_10V7K
2
WLAN_WAKE#<32>
SERIRQ<11>
LPC_LFRAME#<9>
LPC_LAD3<9>
LPC_LAD2<9>
LPC_LAD1<9>
LPC_LAD0<9>
CLK_PCI_LPC<9>
PLT_RST#<6,10,30,32>
EC_SCI#<11>
SLP_SUS#<10>
KSI[0..7]
KSO[0..17]
EC_SMB_CK1<34,35,47,48> PWR_LED# <38>
EC_SMB_DA1<34,35,47,48>
EC_SMB_CK2<9,22,40>
EC_SMB_DA2<9,22,40>
SIO_SLP_S3#<10,37>
SIO_SLP_S4#<10,37>
EC_SMI#<8>
PS_ID<47>
DBC_EN<19>
CPU_FAN_FB<40>
GPU_FAN_FB<40>
EC_TX<32>
EC_RX<32>
PCH_PWROK<10>
RUNPWROK<6>
+1.05V_PGOOD<51>
VCCST_PG_EC<13>
1 2
RK13
60.4K_0402_1%
1
2
RK4
0_0603_1%
+3VALW
D D
PLT_RST#
CK8
ESD@
0.047U_0402_16V4Z
Place CK8
close to RC13.1
C C
+3VALW_EC
1 2
RK20 4.7K_0402_5%
1 2
RK22 4.7K_0402_5%
+3VALW_EC
Please close to EC
B B
+3VALW_EC
12
RM1
100K_0402_5%~D
CLKREQ#_DGPU
VR_HOT#<53>
A A
H_PROCHOT#<6,47,48>
1
2
+3VALW_EC
RPK1
2.2K_0804_8P4R_5%
12
CK15
@ESD@
0.1U_0402_10V7K
12
CK18
@ESD@
0.1U_0402_10V7K
12
RK18
10K_0402_5%
+3VLP
EC_ESB_CLK
EC_ESB_DAT
45
36
27
18
SIO_SLP_S3#
SIO_SLP_S4#
PCH_PWROK
VR_HOT#
47P_0402_50V8J
RK23
0_0402_1%
@
RK6
0_0603_5%
@
@EMI@
CK9
0.1U_0402_10V7K
12
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
CK24
12
12
12
@
1
2
UK3
SN74LVC1G06DCKR_SC70-5
RK8 47K_0402_5%
CK10 0.1U_0402_10V7K
CLKREQ#_DGPU <34>
sualaptop365.edu.vn
5
4
EMI@
LK1
FBMA-L11-160808-800LMT_0603
Int. K/B
Matrix
9
EC_VDD/VCC
PS2 Interface
SM Bus
1 2
22
33
EC_VDD/VCC
GND/GND
11
24
+EC_VCCA
+3VLP
67
96
111
125
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
PWM Output
BATT_TEMP/GPIO38
AD Input
DA Output
SPI Device Interface
EN_DFAN1/GPIO3D
EC_MUTE#/GPIO4A
CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
VCIN0_PH/GPXIOD00
SPI Flash ROM
PECI_KB930/GPIO41
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
PM_SLP_S4#/GPIO59
EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
GPIO
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11
GPI
LID_SW#/GPXIOD04
PECI_KB9012/GPXIOD07
GND/GND
GND/GND
AGND/AGND
GND/GND
GND0
KB9012QF-A4_LQFP128_14X14
35
69
94
113
ECAGND
FBMA-L11-160808-800LMT_0603
W=20mils
BEEP#/GPIO10
ACOFF/GPIO13
ADP_I/GPIO3A
IMON/GPIO43
DAC_BRIG/GPIO3C
CHGVADJ/GPIO3F
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F
ME_EN/GPXIOA02
SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A
ENBKL/GPIO40
FSTCHG/GPIO50
SYSON/GPIO56
VR_ON/GPIO57
BKOFF#/GPXIOA08
AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
SUSP#/GPXIOD05
2
1
+3VS_WLAN_NGFF
RK2
10K_0402_5%
1 2
KB_RST#
SERIRQ
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
SLP_SUS#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
SIO_SLP_S3#
SIO_SLP_S4#
EC_SMI#
PS_ID
EC_ESB_CLK
EC_ESB_DAT
CLKREQ#_DGPU
DBC_EN
CPU_FAN_FB
GPU_FAN_FB
EC_TX
EC_RX
PCH_PWROK
ME_SUS_PWR_ACK
RUNPWROK
+1.05V_PGOOD
VCCST_PG_EC
@EMI@
CK4
1000P_0402_50V7K
122
123
+3VALW_EC
2
@EMI@
CK5
1000P_0402_50V7K
1
UK1
1
GATEA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ
4
LPC_FRAME#
5
LPC_AD3
7
LPC_AD2
8
LPC_AD1
10
LPC & MISC
LPC_AD0
12
CLK_PCI_EC
13
PCIRST#/GPIO05
37
EC_RST#
20
EC_SCII#/GPIO0E
38
GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
EC_SMB_CK1/GPIO44
78
EC_SMB_DA1/GPIO45
79
EC_SMB_CK2/GPIO46
80
EC_SMB_DA2/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
GPIO0A
17
GPIO0B
18
GPIO0C
19
GPIO0D
25
EC_INVT_PWM/GPIO11
28
FAN_SPEED1/GPIO14
29
EC_PME#/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
PCH_PWROK/GPIO18
34
SUSP_LED#/GPIO19
36
NUM_LED#/GPIO1A
XCLKI/GPIO5D
XCLKO/GPIO5E
ME_FWP PCH has internal 20K pulldown
(suspend power rail)
VCOUT1_PHH_PROCHOT#
RK25
100K_0402_5%
1 2
ME_EN
12
@
RK24
1K_0402_5%
Reserve for abnormal shutdown
1 2
POK<47,49>
4
DK3 RB751V-40_SOD323-2
DK2 RB751V-40_SOD323-2
1 2
EC_RSMRST#
PCH_PWROK
+EC_VCCA
1
2
GPIO0F
GPIO12
GPIO39
GPIO3B
GPIO42
IREF/GPIO3E
GPXIOD06
V18R
LK2
3
+3VALW
Ra
Rb
CK6
0.1U_0402_10V7K
ECAGND
RK7
B@
33K_0402_1%
SD034330280
21
CDRA_LED WHITE_T
23
BEEP#
26
CPU_FAN_PWM
27
GPU_FAN_PWM
63
BATT_TEMP
64
PCIE_WAKE#
65
ADP_I
66
AD_BID0
75
USBCHG_DET_EC#
76
PANEL_BKLEN
68
EN_INVPWR
70
M_THERMAL#
71
WAKE_PCH#
72
LCD_TEST
83
EC_MUTE#
84
CDR_TXRX_GOOD
85
AOAC_WLAN
86
87
TP_CLK
88
TP_DATA
97
SUSACK#
98
EN_WOL#
99
ME_EN
109
VCIN0_PH
119
120
126
CDRA_LED RED_T
128
3V_F383_ON
73
TS_EN
74
CDR_BTN#
89
SIO_SLP_S0#
90
BATT_CHG_LED#
91
CAPS_LED
92
PWR_LED#
93
BATT_LOW_LED#
95
SYSON
121
IMVP_VR_ON VR_ON
127
100
EC_RSMRST#
101
EC_LID_OUT#
102
VCIN1_PH
103
VCOUT1_PH
104
VCOUT0_PH#
105
BKOFF#
106
PBTN_OUT#
107
108
110
112
114
115
116
117
118
124
12
ACIN
EC_ON
ON/OFF_BTN#
LID_SW_IN#
SUSP#
USB_PWR_EN#
PECI_KB9012
+V18R
1
CK22
4.7U_0805_10V4Z
2
+3VALW_EC
3
12
RK17
43_0402_1%
12
1 2
RK21
43_0402_1%
47K_0402_5%
RK27
RST#
.1U_0402_16V7K~D
2
1
Board ID
RK3
100K_0402_1%
1 2
AD_BID0
1
RK7
43K_0402_1%
@
1 2
RK7
43K_0402_1%
SD034430280
CK26
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CK7
0.1U_0402_10V7K
2
H@
BEEP# <31>KB_RST#<11>
CPU_FAN_PWM <40>
GPU_FAN_PWM <40>
12
CK11 100P_0402_50V8J
PCIE_WAKE# <10,30>
ADP_I <47,48>
USBCHG_DET_EC# <33>
PANEL_BKLEN <10>
EN_INVPWR <19>
WAKE_PCH# <11>
LCD_TEST <19>
EC_MUTE# <31>
CDR_TXRX_GOOD <34>
AOAC_WLAN <32>
SYS_PWROK <6,10>
TP_CLK <38>
TP_DATA <38>
SUSACK# <10>
EN_WOL# <30>
ME_EN <8>
VCIN0_PH <47>
PWRSHARE_EN_EC# <33>
TP_INT# <10,38>
3V_F383_ON <37>
TS_EN <19>
CDR_BTN# <34>
SIO_SLP_S0# <10>
BATT_CHG_LED# <37>
CAPS_LED <38>
BATT_LOW_LED# <37>
PCH_DPWROK <10>
EC_LID_OUT# <11>
VCIN1_PH <47>
VCOUT0_PH# <49>
BKOFF# <19>
PBTN_OUT# <6,10>
PCH_PWR_EN <42>
CDR_ON <34>
ACIN <10,22,37,47,48>
EC_ON <49>
ON/OFF_BTN# <38>
LID_SW_IN# <37,38>
SUSP# <42,51>
USB_PWR_EN# <33>
PECI_EC <6>
Issued Date
Issued Date
Issued Date
+3VS
GPU_PWR_LEVEL<22>
DGPU_HOLD_RST#<10,22>
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2
SD028000080 0_0402_5%
SD034120280 12K_0402_1%
SD034150280 15K_0402_1%
SD028200280 20K_0402_1%
SD034100300 27K_0402_1%
SD034330280 33K_0402_1%
SD034430280 43K_0402_1%
SD034560280 56K_0402_1%
SD034750280 75K_0402_1%
SD034100380 100K_0402_1%
SD034130380 130K_0402_1%
SD034160380 160K_0402_1%
SD034200380 200K_0402_1%
SD000001B80 240K_0402_1%
SD00000G280 270K_0402_1%
SD034330380 330K_0402_1%
SD028430380 430K_0402_1%
ECAGND
12
RK26
10K_0402_5%
Place CE12
between DK1 and RK14
Place CK13
between DK1 and UK1
1 2
1 2
DEPOP#_EC<31>
CDR_PRNT#<34,35,37>
GC6_EVENT#<11,22>
CTL1<33>
CTL2<33>
PTP_DISABLE#<38>
M_THERMAL# <17,18>
VR_ON
@ESD@
0.1U_0402_10V7K
VCCST_PG_EC
@ESD@
220P_0402_50V8J
@
RK14
0_0402_5%
EC_RSMRST# <10>
RK16
10K_0402_5%
GPU_ALERT#
GPU_OVERT#
Compal Secret Data
Compal Secret Data
Compal Secret Data
ECAGND <47>
BATT_TEMP <47,48>
1
CK12
2
1
CK13
2
RK28 10K_0402_5%
RK29 10K_0402_5%
EC_ESB_CLK
DEPOP#_EC
RST#
EC_ESB_DAT
DGPU_HOLD_RST#
Deciphered Date
Deciphered Date
Deciphered Date
2
CDRA_LED WHITE_T
221 ohm for white LED
316 ohm for red LED
on dock cable side
CDRA_LED RED_T
VR_ON
VCCST_PG_EC
@ESD@
DK1
L03ESDL5V0CG3-2_SOT-523-3
VR_ON <13,53>
@
RK15
10K_0402_5%
1 2
12
12
UK2
1
ESB_CLK
2
GPIO00
3
RST#
4
ESB_DAT
5
GPIO01
6
GPIO02
7
GPIO03
8
GPIO04
9
GPIO05
10
GPIO06
11
GPIO07/CAS_CLK
12
GND
KC3810_QFN24_4X4
+5VALW
12
RK30
100K_0402_5%~D
1
D
2
QK2
G
SSM3K7002F_SC59-3~D
S
3
+5VALW
12
RK12
100K_0402_5%~D
1
D
2
QK4
G
SSM3K7002F_SC59-3~D
S
3
3
3
1
1
Place DK1 close to UK1
1
2
+3VS
GPIO10/ESB_RUN#
GPIO11/BaseAddOpt
SYSON <50,51>
CK16
0.1U_0402_10V7K
TEST_EN#
GPIO08/CAS_DAT
GPIO09
GPIO0A
GPIO0B
GPIO0C/PWM0
GPIO0D/PWM1
GPIO0E/PWM2
GPIO0F/PWM3
VCC
GND
25
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+5VALW
12
RK5
549_0402_1%
S
G
2
QK1
LP2301ALT1G 1P SOT-23-3
D
1 3
CDR_LED_WHITE <34>
+5VALW
12
RK19
100_0402_1%
S
G
2
QK3
LP2301ALT1G 1P SOT-23-3
D
1 3
CDR_LED_RED <34>
TP_CLK
TP_DATA
2
2
CK14
100P_0402_50V8J
12
ACIN
@ESD@
PCH_PWROK
SYS_PWROK
1 2
CK19 0.1U_0402_10V7K
@ESD@
1 2
CK20 0.1U_0402_10V7K
Place CK17,CK19,CK20 close to UK1
13
14
15
16
17
18
19
20
21
22
23
24
GPU_ALERT#
GPU_OVERT#
W=60mils
0.1U_0402_16V4Z
CK25
1
2
TP_EN <38>
PWGD_USBOC <34>
CALDERA_RST# <34>
PTP_KBBL# <38>
GPU_ALERT# <22>
GPU_GC6_FB_EN <11,22,25>
GPU_OVERT# <22>
+3VALW_EC
Compal Electronics, Inc.
EC ENE-KB9012/KC3810
EC ENE-KB9012/KC3810
EC ENE-KB9012/KC3810
LA-A301P
LA-A301P
LA-A301P
1
+3VS_TOUCH
12
RK104.7K_0402_5%
12
RK114.7K_0402_5%
41 56Wednesday, September 24, 2014
41 56Wednesday, September 24, 2014
41 56Wednesday, September 24, 2014
1.0
1.0
1.0
A
B
C
D
E
1 1
RO7
W=10mils
SUSP#<41,51>
2 2
SUSP#
1 2
RO8
1 2
82K_0402_5%
470K_0402_5%
12
CO14
0.01U_0603_25V7K
+5VS and +3VS switch
+5VALW
UO3
1
VIN1
2
VIN1
5VS_GATE
3VS_GATE
12
+3VALW
CO15
0.01U_0603_25V7K
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
TPS22966DPUR_SON14_2X3
+3VALW
CO18
10U_0603_6.3V6M
CO19
10U_0603_6.3V6M
1
2
CO20
1
1
2
2
10U_0603_6.3V6M
VOUT1
VOUT1
VOUT2
VOUT2
GPAD
+5VALW
@
J510
1 2
1 2
5VS
@
@
3VS
2
JUMP_43X79
220P_0402_50V8J
220P_0402_50V8J
@
J511
2
JUMP_43X79
112
112
14
13
CO10
12
CT1
11
GND
CO13
10
CT2
9
8
15
CO21
10U_0603_6.3V6M
1
2
+5VS
CO11
10U_0805_10V4Z
CO12
10U_0603_6.3V6M
1
1
@
2
2
+3VS
CO17
10U_0603_6.3V6M
CO16
10U_0603_6.3V6M
1
1
@
2
2
+3VALW TO +3V_DSW
@
J3
2
112
JUMP_43X39
+3V_DSW+3VALW
+3VALW_PCH switch
3 3
RO9
PCH_PWR_EN<41>
W=10mils
1 2
0_0402_5%
+5VALW
+3VALW_PCH_GATE
12
CO27
0.01U_0603_25V7K
+3VALW
UO4
1
VOUT1
VIN1
2
VOUT1
VIN1
3
4
5
6
7
CT1
ON1
GND
VBIAS
ON2
CT2
VIN2
VOUT2
VIN2
VOUT2
GPAD
TPS22966DPUR_SON14_2X3
+3VALW
+3VALW_PCH
3VALW_PCH
1 2
@
1 2
@
2
JUMP_43X79@
220P_0402_50V8J
220P_0402_50V8J
112
CO23
10U_0805_10V4Z
CO24
10U_0603_6.3V6M
1
1
@
2
2
14
13
CO22
12
11
CO25
10
9
8
15
J513
+0.675VS
12
13
D
S
RO5
22_0603_5%
2
G
QO1
2N7002K_SOT23-3
SUSP
SUSP#
RO6
100K_0402_5%
+5VALW
12
RO3
SUSP
12
100K_0402_5%
13
D
2
QO2
G
2N7002K_SOT23-3
S
CO33
10U_0603_6.3V6M
CO32
10U_0603_6.3V6M
1
1
2
2
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
sualaptop365.edu.vn
A
B
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
For Intel S3 power reduction
Compal Secret Data
Compal Secret Data
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC/DC Interface
DC/DC Interface
DC/DC Interface
LA-A301P
LA-A301P
LA-A301P
E
42 56Monday, September 22, 2014
42 56Monday, September 22, 2014
42 56Monday, September 22, 2014
1.0
1.0
1.0
5
4
3
2
1
Screw Hole
H8
H10
H_3P0
H_3P0
@
H_3P2X3P7
@
H_3P2N
@
H_2P7X3P0
@
H_2P7
@
H_3P2
@
H_3P5
@
H_3P0
@
H_2P7X3P2
@
H_5P0N
@
@
1
D D
C C
1
H25
1
H24
1
H9
1
H11
1
H20
1
H26
1
H22
1
H23
1
H27
1
H13
H12
H_3P0
@
1
H14
H_3P0
H_3P0
@
@
1
1
H16
H15
H_3P0
@
1
H17
H_3P0
@
1
H18
H_3P0
H_3P0
@
@
1
1
H21
H19
H_3P0
H_3P0
@
@
1
1
H_3P7
@
1
H_3P7X4P2
@
1
1
H2
H6
FD2
FIDUCIAL@
1
H1
B B
H5
FD1
FIDUCAL@
A A
sualaptop365.edu.vn
5
H_3P7X4P2
@
1
H_3P7X4P2
@
1
H3
H7
FD3
FIDUCAL@
1
H_3P7X4P2
@
1
H_3P7
@
1
FD4
FIDUCIAL@
4
H4
H_4P2
@
1
FIDUCIAL MARK
1
CPU bracket
GPU bracket
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Screw Hole
Screw Hole
Screw Hole
LA-A301P
LA-A301P
LA-A301P
1
43 56Friday, September 19, 2014
43 56Friday, September 19, 2014
43 56Friday, September 19, 2014
1.0
1.0
1.0
A
PL1
EMI@
SMB3025500YA_2P
ADPIN
@
PJPDC
1
1
2
2
3
3
4
4
5
5
6
6
1 1
7
7
8
GND
9
GND
ACES_50300-00701-001
PSID
12
PC1
EMI@
1000P_0402_50V7K
1 2
12
PC2
EMI@
100P_0402_50V8J
PL2
EMI@
BLM15HG601SN1D_2P
12
VIN
12
12
PC3
EMI@
1000P_0402_50V7K
BATT++BATT+
PL3
EMI@
SMB3025500YA_2P
BATT+
1 2
12
12
PC6
EMI@
0.022U_0402_25V7K
@
ACES_51202-00901-001
PBATT
PC7
EMI@
0.01U_0402_25V7K
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
2 2
Battery connector:
Battery connector:
Battery connector: Battery connector:
1.GND
1.GND
1.GND1.GND
2.GND
2.GND
2.GND2.GND
3.BAT_ALERT
3.BAT_ALERT
3.BAT_ALERT3.BAT_ALERT
3 3
4.SYS_PRES
4.SYS_PRES
4.SYS_PRES4.SYS_PRES
5.BATT_PRS
5.BATT_PRS
5.BATT_PRS5.BATT_PRS
6.DAT_SMB
6.DAT_SMB
6.DAT_SMB6.DAT_SMB
7.CLK_SMB
7.CLK_SMB
7.CLK_SMB7.CLK_SMB
8.BATT++
8.BATT++
8.BATT++8.BATT++
9.BATT++
9.BATT++
9.BATT++9.BATT++
10.GND
10.GND
10.GND10.GND
11.GND
11.GND
11.GND11.GND
CLK_SMB
DAT_SMB
BATT_PRS
SYS_PRES
BATT++
12
12
PC8
EMI@
1000P_0402_50V7K
1 2
1 2
PR22 100_0402_5%
1 2
PR21 100_0402_5%
PR19 100_0402_5%
@
JRTC
1
2
G1
G2
ACES_50271-00201-001
PC9
1
EMI@
100P_0402_50V8J
1
2
3
4
PD2
TVNST52302AB0_SOT523-3
EMI@
2
3
PR2
1K_0402_1%
+3VLP
12
JRTC1
2
1
3
1 2
2
3
PD3
TVNST52302AB0_SOT523-3
EMI@
PR15
@
0_0402_1%
PR18
@
0_0402_1%
1 2
PR20
@
0_0402_1%
1 2
PD5
1
BAS40CW_SOT323-3
PC4
EMI@
100P_0402_50V8J
10K_0402_1%
+RTC_CELL
B
PR16
1 2
EC_SMB_CK1 <34,35,41,48>
EC_SMB_DA1 <34,35,41,48>
BATT_TEMP <41,47,48>
+3VALW
2
1
3
@
PD1
SM24_SOT23
100K_0402_1%
POK<41,49>
ADP_I<41,48>
PR6
1 2
100K_0402_1%
PR9
15K_0402_1%
1 2
+5VALW
PR14
1 2
1 2
C
B+
PR17
0_0402_1%
PSID-1
@
VSB_N_002
@
D
+3VALW
PR4
33_0402_5%
1 3
D
2
C
2
B
E
3 1
PR13
100K_0402_1%
1 2
VSB_N_003
13
D
2
PQ4
2N7002KW_SOT323-3
G
12
S
PC12
.1U_0402_16V7K
1 2
PSID-3
S
PQ7
FDV301N_G 1N SOT23-3
G
PSID-2
PQ2
MMST3904-7-F_SOT323~D
12
12
PR12
100K_0402_1%
VSB_N_001
PQ3
SI3457CDV-T1-GE3_TSOP6
S
4
PC10
3
0.22U_0603_25V7K
G
PR3
2.2K_0402_5%
1 2
PR8
10K_0402_1%
6
5
2
D
1
B+_BIAS
12
PC11
0.1U_0402_25V6
PS_ID <41>
12
+5VALW
CPU thermal protection at 93 +/- 3 degree C
+3VLP+3VALW
PR26
PR23
110K_0402_1%
1 2
PC13
.1U_0402_16V7K
1 2
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
@
Deciphered Date
Deciphered Date
Deciphered Date
C
PR25
PR24
12.1K_0402_1%
VCIN0_PH<41>
100K_0402_1%_TSM0B104F4251RZ
Title
Title
Title
PWR-DCIN/BATT CONN/OTP
PWR-DCIN/BATT CONN/OTP
PWR-DCIN/BATT CONN/OTP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LA-A301P
LA-A301P
LA-A301P
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
PH1
ECAGND<41>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
D
12.1K_0402_1%
1 2
12
@
47 56Friday, September 19, 2014
47 56Friday, September 19, 2014
47 56Friday, September 19, 2014
1.0
1.0
1.0
Adapter protection:
if battery removed, adaptor only,
then trigger the H_PROCHOT#,
keep @ in BOM since battery can not
be removed by end user
PR32
3.3K_1206_5%~D
PQ9A
DMN66D0LDW-7_SOT363-6~D
BATT_TEMP<41,47,48>
H_PROCHOT#<6,41,48>
PC14
1U_0603_25V6K
1 2
VCIN1_PH<41>
13
D
2
PQ8
G
S
PR28
10K_0402_1%
1 2
B
2N7002KW_SOT323-3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
100K_0402_1%
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
PR30
1M_0402_1%
34
PQ9B
DMN66D0LDW-7_SOT363-6~D
VIN
1 2
PR31
1M_0402_1%
1 2
12
61
2
Erp lot6 Circuit
ACIN <10,22,37,41,48>
12
4 4
PR29
200K_0402_1%
PC15
0.1U_0402_25V6
5
12
sualaptop365.edu.vn
A
A
B
C
D
CC = 3A
CV = 17.7V
PR700
1M_0402_5%
1 2
2
G
PR701
3M_0402_5%
1 2
13
D
PQ700
2N7002KW_SOT323-3
S
Iada=0~6.67A(130W)
1 1
2 2
3 3
PQ701
MDU1516URH_POWERDFN56-8-5
5
12
PC700
2200P_0402_50V7K
PR725
4.7_0603_5%
4
12
P1VIN
1
2
3
ACIN<10,22,37,41,47>
PQ702
MDV1526URH 1N PDFN33-8
1
2
3
12
12
4
PC701
0.1U_0402_25V6
12
PR706
PR705
4.12K_0603_1%
4.12K_0603_1%
PR714
1 2
REGN_CHG ACDET_CHG
100K_0402_5%
P2
5
PC707
1U_0603_25V6K
1 2
12
PR715
120K_0402_5%
49.9K_0402_1%
PR719
PR703
@
12
PR702
0.01_1206_1%
1
2
CSSP_1
12
0_0402_1%
0.1U_0402_25V6
VIN
12
PR716
324K_0402_1%
12
PC708
1 2
CSSP_2
AC Det
Max:18.16V
Typ :17.98V
Min :17.8V
PC719
0.1U_0402_25V4Z~D
ADP_I = 40*Iadapter*Rsense
4
3
CSSN_1
12
BATT++
PR704
0_0402_1%
@
PC709
0.1U_0402_25V6
1 2
CSSN_2
CMSRC_CHG
ACDRV_CHG
PR717
0_0402_1%@
1 2
ADP_I<41,47>
VIN
BAT54CW_SOT323-3
PC718
1 2
100P_0402_50V8J
PD700
2
3
1 2
PC711
1U_0603_25V6K
PU700
29
PWPD
1
ACN
2
ACP
3
CMSRC
4
ACDRV
5
ACOK
6
ACDET
7
IADP
1 2
PC720
100P_0402_50V8J
1
12
PR707
10_1206_1%
LX_CHG
28
27
VCC
IDCHG
8
9
PC702
0.047U_0402_25V7K
1 2
12
PR708
2.2_0603_1%
1 2
REGN_CHG
BTST_CHG
DH_CHG
24
25
26
BTST
REGN
HIDRV
PHASE
BQ24780RUYR_WQFN28_4X4
PROCHOT#
PMON
PR724
@
SCL
SDA
10
12
11
PR720 0_0402_1%
0_0402_1%
1 2
1 2
1 2
@
B+
PC710
2.2U_0603_16V6K
DL_CHG
23
LODRV
CMPIN
13
PR721
0_0402_1%
@
1UH_PCMB041B-1R0MS_4.2A_20%
22
GND
21
ILIM
20
SRP
19
SRN
18
BATDRV
17
BATSRC
16
TB_STAT#
15
BATPRES#
CMPOUT
14
PL701
EMI@
1 2
+3VALW
1 2
BATDRV_CHG
BATSRC_CHG
TB_STAT#_CHG
PR726
0_0402_1%
1 2
@
BATT_TEMP<41,47>
PR709
100K_0402_1%
PR711
1 2
4.75K_0402_1%
12
+3VALW
12
PC703
PC704
0.1U_0402_25V6
@EMI@
@EMI@
2200P_0402_50V7K
12
PR710
26.7K_0402_1%
PQ705
13
D
2N7002W-T/R7_SOT323-3
2
TB_STAT#_CHG
G
S
PR718
10K_0402_5%
PQ703
MDV1526URH 1N PDFN33-8
5
CHG_B+
12
12
12
PC706
PC705
10U_0805_25V6K
10U_0805_25V6K
5
4
DH_CHG
LX_CHG
DL_CHG
1 2
1 2
4
PR722
10_0402_5%
PR723
10_0402_5%
123
5
123
PQ704
S TR MDV1528URH 1N PDFN33-8
PQ706
S TR MDV1528URH 1N PDFN33-8
PL700
1 2
12
PR713
4.7_1206_5%
@EMI@
SNUB_CHG
12
PC715
680P_0402_50V7K
@EMI@
PC716
0.1U_0402_25V6
1 2
3.3UH_PCMB053T-3R3MS_5A_20%
4
BATDRV_CHG
PR712
0.01_1206_1%
1
CHG
2
CSOP_1
0.1U_0402_25V6
PC717
1 2
1
2
3
4
3
CSON_1
0.1U_0402_25V6
BATSRC_CHG
PC721
1 2
BATT+
12
12
PC712
PC713
10U_0805_25V5K~D
10U_0805_25V5K~D
<6,41,47>
4 4
A
sualaptop365.edu.vn
B
EC_SMB_DA1
H_PROCHOT#
<34,35,41,47>
<34,35,41,47>
EC_SMB_CK1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-Charger
PWR-Charger
PWR-Charger
LA-A301P
LA-A301P
LA-A301P
D
48 56Friday, September 19, 2014
48 56Friday, September 19, 2014
48 56Friday, September 19, 2014
1.0
1.0
1.0
A
B
C
D
E
+3VLP
PR115
0_0603_5%
@
PC101
1 2
4.7U_0603_6.3V6K
1 2
1 1
PR101
64.9K_0402_1%
1 2
PR103
100K_0402_1%
1 2
VFB=2V
VFB=2V
PR102
150K_0402_1%
1 2
PR104
100K_0402_1%
1 2
Output capacitor ESR need follow
below equation to make sure feed back
loop stability
ESR=20mV*L*fsw/2V
FB_5V
3
2
VFB1
VREG3
VREG5
VO114DRVL1
13
VL
12
PC111
4.7U_0603_6.3V6K
12
PR106
68.1K_0402_1%
CS1
1
TP
CS1
EN1
VCLK
SW1
VBST1
DRVH1
15
+5VALWP
3/5V_B+
12
PC102
5
21
20
5V_EN
PR107
@
200_0402_1%
1 2
19
18
LX_5V
PR109
0_0603_5%@
BST_5V
UG_5V
1 2
17
16
LG_5V
PC106
0.1U_0402_25V6
1 2
PJ100
112
2
@JUMP_43X118
4.7U_0805_25V6K
PQ102
MDV1528URH_PDFN33-8-5
4
123
LX_5V
5
4
+5VALW+5VALWP +3VALW+3VALWP
PQ103
123
MDV1523URH 1N PDFN33-8
5VALWP
TDC=7A
Peak Current 10A
OCP current 12A
FSW=300kHz
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
L/S Rds(on) : 7mohm 8.4mohm
PL102
3.3UH_6.3A_20%_7X7X3_M
1 2
12
PR111
4.7_1206_5%
@EMI@
12
PC110
680P_0603_50V8J
@EMI@
PJ102
112
PC108
+5VALWP
1
+
2
150U_B2_6.3VM_R35M
2
@JUMP_43X118
12
PL100
EMI@
B+
2 2
3.3VALWP
TDC=6.2A
Peak Current 8.83A
OCP current 10.6A
3 3
FSW=355kHz
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
L/S Rds(on) : 7mohm 8.4mohm
4 4
1UH_PCMB041B-1R0MS_4.2A_20%
1 2
12
PC100
0.1U_0402_25V6
@EMI@
+3VALWP
EC_ON<41>
USBCHG_DET_D<33>
3/5V_B+
12
PC104
PC103
2200P_0402_50V7K
@EMI@
PD100
2
3
BAS40CW_SOT323-3
VCOUT0_PH#<41>
12
4.7U_0805_25V6K
1
+
PC107
2
150U_B2_6.3VM_R35M
1
4.7UH_5.5A_20%_7X7X3_M
1 2
EN
Rising=1.6~0.3V
3V_EN
5V_EN
PR113
2.2K_0402_5%
1 2
PR114
0_0402_1%
1 2
PR110
4.7_1206_5%
@EMI@
PC109
680P_0603_50V8J
@EMI@
PR100
0_0402_1%
1 2
PR112
0_0402_1%
1 2
PQ100
LX_3V
12
12
@
@
MDV1528URH_PDFN33-8-5
PL101
@
POK need pull high, it
5
will pull high on VS
transfer circuit
4
123
5
PQ101
4
123
MDV1523URH 1N PDFN33-8
POK<41,47>
PC105
0.1U_0402_25V6
1 2
PR108
0_0603_5%@
1 2
3V_EN
LX_3V
UG_3V
BST_3V
LG_3V
3/5V_B+
PU100
6
7
8
9
10
OVP=Vout*(112.5%~117.5%)
OCP=Vtrip/Rdson+Iripple/2
Vtrip=Ics(min)*Rcs/8+1mV
Vcs=Ics*vcs should be in the range of 0.2~2V
Vout=VFB*(1+Rtop/Rbot)
VFB=2V
PR105
66.5K_0402_1%
CS2
FB_3V
4
5
CS2
EN2
PGOOD
SW2
VBST2
DRVH2
VFB2
APW8822EQBI-TRG_QFN20_3X3
VIN
DRVL2
12
11
12
A
sualaptop365.edu.vn
12
PR116
200K_0402_1%
PC112
4.7U_0603_6.3V6K
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Compal Electronics, Inc.
PWR-3.3VALWP/5VALWP
PWR-3.3VALWP/5VALWP
PWR-3.3VALWP/5VALWP
LA-A301P
LA-A301P
LA-A301P
1.0
1.0
49 56Friday, September 19, 2014
49 56Friday, September 19, 2014
49 56Friday, September 19, 2014
E
1.0
5
D D
4
3
2
1
Pin19 need pull separate from +1.35VP.
If you have +1.35V and +0.675V sequence question,
PJ203
@
B+
1.35VP
TDC=16.7A
Ipeak=24A
OCP=28.8A
C C
Switching Frequency: 285kHz
2
112
JUMP_43X39
12
1UH_PCMB104T-1R0MH_18A_20%
+1.35VP
1
OVP: 110%~120%
VFB=0.75V, Vout=1.35V
TYP MAX
H/S Rds(on) : 11.7mohm 14mohm
L/S Rds(on) : 2.7mohm 3mohm
B B
Mode Level +0.675VSP VTTREF_1.35V
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
+
PC209
2
330U_D2_2V_Y
ESR=9m ohm
12
PC200
0.1U_0402_25V6
@EMI@
PL201
1 2
@EMI@
@EMI@
680P_0402_50V7K
1.35V_B+
12
PC201
2200P_0402_50V7K
@EMI@
PR202
4.7_1206_5%
PC211
PR200
2.2_0603_5%
PR201
10.7K_0402_1%
1 2
12
1 2
DL_1.35V
CS_1.35V
PC207
1U_0402_10V6K
1 2
VDD_1.35V
1.35V_B+
SYSON<41,51>
PR204
2.2_0603_5%
1 2
887K_0402_1%
12
PC203
PC202
4.7U_0805_25V6K
4.7U_0805_25V6K
5
PQ200
MDU1516URH_POWERDFN56-8-5
12
12
PQ201
MDU1511RH_POWERDFN56-8-5
4
123
5
4
123
12
PC204
0.1U_0603_25V7K
+5VALW +1.35VP
BST_1.35V
PR203
5.1_0603_5%
1 2
PC212
1U_0402_10V6K
0.675V_DDR_VTT_ON<17>
A A
you can change from +1.35VP to +1.35VS.
BOOT_1.35V
DH_1.35V
SW_1.35V
15
LGATE
14
PGND
13
CS
12
VDDP
11
VDD
PR206
1 2
1 2
0.1U_0402_10V7K
PR208
0_0402_1%
1 2
16
RT8207MZQW_WQFN20_3X3
10
17
PHASE
PGOOD
9
TON_1.35V
@
PC213
@
PR209
@
0_0402_1%
18
20
19
PU200
21
VTT
BOOT
UGATE
S5
TON
8
EN_1.35V
12
PAD
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
6
FB_1.35V
1
2
3
4
5
VLDOIN
S3
7
EN_0.675VSP
+1.35VP +1.35V
12
PC214
@
0.1U_0402_10V7K
+0.675VSP +0.675VS
VTTREF_1.35V
8.06K_0402_1%
1 2
12
PR207
10K_0402_1%
PR205
+1.35VP
12
PJ200
@
112
JUMP_43X118
PJ201
@
112
JUMP_43X118
PJ202
112
JUMP_43X39
PC205
10U_0603_6.3V6M
2
2
@
2
0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A
12
PC206
10U_0603_6.3V6M
12
PC210
0.033U_0402_16V7K
+1.35VP
+0.675VSP
+1.35VS_VGA
1
+
PC208
2
330U_D2_2V_Y
Security Classification
Security Classification
Security Classification
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PWR-1.35VP/0.675VSP
PWR-1.35VP/0.675VSP
PWR-1.35VP/0.675VSP
LA-A301P
LA-A301P
LA-A301P
1
1.0
1.0
1.0
50 56Friday, September 19, 2014
50 56Friday, September 19, 2014
50 56Friday, September 19, 2014
5
D D
+1.05V_PGOOD<41>
118K_0402_1%
PR300
@
0_0402_1%
1 2
SUSP#<41,42>
SYSON<41,50>
SUSP#
PR304
@
0_0402_5%
1 2
PC300
@
0.1U_0402_16V7K
1 2
12
PR303
4
TRIP_+1.05VSP
EN_+1.05VSP
FB_+1.05VSP
RF_+1.05VSP
12
PR306
470K_0402_1%
+3VS
12
PR301
100K_0402_5%
PU300
1
PGOOD
2
TRIP
3
EN
4
VFB
5
TST
TPS51212DSCR_SON10_3X3
VBST
DRVH
V5IN
DRVL
3
+1.05VSP_B+
12
PC301
5
PQ300
4
PR302
10
BST_+1.05VSP
9
UG_+1.05VSP
8
SW_+1.05VSP
SW
7
6
LG_+1.05VSP
11
TP
2.2_0603_5%
1 2
12
PC308
1U_0603_6.3V6M
PC305
0.1U_0603_25V7K
1 2
+5VALW
MDV1528URH 1N PDFN33-8
123
5
4
PQ301
123
0.1U_0402_25V6
@EMI@
12
12
MDV1526URH 1N PDFN33-8
2
12
12
PC303
PC302
4.7U_0805_25V6K
2200P_0402_50V7K
@EMI@
1UH_6.6A_20%_5X5X3_M
PL300
1 2
PR305
@EMI@
4.7_1206_5%
PC309
@EMI@
680P_0402_50V7K
1
PJ301
@
2
112
JUMP_43X39
12
PC304
4.7U_0805_25V6K
B+
1.05VSP
TDC 7A
Peak Current 10A
OCP current 12A
FSW=290kHz
+1.05VSP
1
+
PC306
2
220U_B2_2.5VM_R15M
C C
12
PR308
10K_0402_1%
PR307
4.99K_0402_1%
1 2
+1.05VSP +1.05VS
PJP400
PR400
0_0402_1%
1 2
2
JUMP_43X39
@
4.7U_0603_6.3V6K
@
47K_0402_5%
112
@
+3VS
B B
SUSP#
PC400
PR401
+1.5VSP_VIN
12
12
11
GND
VOUT
VOUT
VOUT
POK
5
4
3
2
FB
1
Rup
Rdown
12
12
PR402
12
PR403
PC402
@
1.54K_0402_1%
1.74K_0402_1%
0.01U_0402_25V7K
12
+1.5VSP
PC403
10U_0603_6.3V6M
6
VIN
7
VIN
8
VIN
9
EN
10
12
PC401
@
0.1U_0402_16V7K
VCNTL
PU400
APL5930QBI-TRG_TDFN10_3X3
Switching Frequency: 290kHz
OVP: 120%-130%
VFB=0.7V
TYP MAX
H/S Rds(on) : 23.2mohm 27.8mohm
L/S Rds(on) : 13.7mohm 16.4mohm
PJ300
@
2
112
JUMP_43X118
PJP401
2
+1.5VSP +1.5VS
112
JUMP_43X39@
1.5VSP
TDC 0.5A
A A
5
sualaptop365.edu.vn
4
Vout=0.8V* (1+Rup/Rdown)
Security Classification
Security Classification
Security Classification
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-1.05VSP/1.5VSP
PWR-1.05VSP/1.5VSP
PWR-1.05VSP/1.5VSP
LA-A301P
LA-A301P
LA-A301P
1
51 56Friday, September 19, 2014
51 56Friday, September 19, 2014
51 56Friday, September 19, 2014
1.0
1.0
1.0
<23>
PC626
.01U_0402_16V7K
VSSSENSE_VGA
<23>
+VGA_CORE
12
3V3_MAIN_EN
12
12
12
@
VCCSENSE_VGA
1U_0402_6.3V6K
PC613
PR620
0_0402_5%~D@
@
2
G
PR631
10K_0402_1%~D@
PR624
100_0402_1%
1 2
1 2
1 2
100_0402_1%
GPU_REFIN
12
@
13
D
S
GPU_FBRTN
PR622
0_0402_1%
1 2
PR627
@
0_0402_1%
PR629
PR623
GPU_B+
@
B+
+3VS
12
PR600
0_0402_5%~D
PR610
@
12
PR602
0_0402_5%~D
@
12
PR606
20K_0402_1%
PR611
2K_0402_1%
1 2
12
PC616
PR616
3K_0402_1%
18K_0402_1%
1 2
12
PQ610
2N7002KW_SOT323-3
PR618
0_0402_1%
@
GPU_FBRTN
PR650
340K_0402_1%
@
2700P_0402_50V7K
12
PC617
12
2700P_0402_50V7K
GPU_REFIN
GPU_VREF
GPU_TON
GPU_FBRTN
GPU_FB
PR613
20K_0402_1%
1 2
7
8
9
10
11
12
PU600
REFIN
VREF
TON
RGND
VSNS
SS
GND
25
@
47P_0402_50V8J~D
GPU_PSI
GPU_REFADJ
GPU_EN
GPU_VID
U2_UGATE1U2_UGATE2
4
3
5
6
13
2
EN
PSI
VID
REFADJ
TSNS/ISEN3
UGATE1
TALERT/ISEN2
PGOOD
VCC/ISNE1
14
17
16
15
@
0_0402_1%
1 2
1 2
12
PC614
U2_BOOT1
1
BOOT1
24
PHASE1
23
LGATE1
22
GND/PWM3
21
PVCC
20
LAGTE2
19
PHASE2
BOOT218UGATE2
RT8813AGQW_WQFN24_4X4
PL600
FBMA-L11-453215800LMA90T_2P
1 2
NVVDD PWM_VID <22>
PR607
@
0_0402_1%
@
@
47P_0402_50V8J~D
+3VS
12
PR614
10K_0402_1%~D
12
PC618
U2_PHASE1
U2_LGATE1
U2_PWM3
U2_LGATE2
U2_PHASE2
NVVDD PSI <22>
12
PR615
0_0402_1%
1 2
PR625
2.2 +-5% 0603
1 2
PC622
1U_0603_6.3V6M
@
+5VS
GPU_B+
U2_BOOT1
U2_PHASE1
U2_LGATE1
3V3_MAIN_EN <22,25,52>
U2_BOOT2
U2_PHASE2
PR601
2.2 +-5% 0603
1 2
1 2
PR617
2.2 +-5% 0603
1 2
PR649
12
12
PC634
PC600
10U_0805_25V6K
@EMI@
U2_UGATE1
1
12
.1U_0603_25V7K
9.53K_0402_1%
12
2
D1
G1
PC612
PC619
.1U_0603_25V7K
D2/S1
S24S2
S2
5
3
6
GPU_B+
U2_UGATE2
1
2
D1
D2/S1
S24S2
S2
5
3
2200P_0402_50V7K~D
PQ605
AON6970_DFN5X6D-8-7
0.24UH_PCME063T-R24MS1R195_28A_20%
7
U2_PHASE1
G2
12
PC601
10U_0805_25V6K
PQ606
AON6970_DFN5X6D-8-7
G1
0.24UH_PCME063T-R24MS1R195_28A_20%
7
U2_PHASE2
G2
6
U2_LGATE2
PL601
PL602
+VGA_CORE
12
VGA_CORE
TDC 49A
Peak Current 76A
OCP=91.2A
TYP MAX
H/S Rds(on):6.7mohm ,8.5mohm
L/S Rds(on):1.8mohm ,2.3mohm
12
+5VS
S24S2
1
D2/S1
5
12
PC602
10U_0805_25V6K
PQ607
AON6970_DFN5X6D-8-7
G1
0.24UH_PCME063T-R24MS1R195_28A_20%
7
PHASE3
G2
6
Compal Secret Data
Compal Secret Data
Compal Secret Data
PL603
12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-VGA_CORE
PWR-VGA_CORE
PWR-VGA_CORE
LA-A301P
LA-A301P
LA-A301P
52 56Friday, September 19, 2014
52 56Friday, September 19, 2014
52 56Friday, September 19, 2014
1.0
1.0
1.0
GPU_PGOOD1
GPU_TALERT/ISEN2
GPU_TSNS/ISEN3
GPU_DSBL/ISEN1
U2_BOOT2
2.2 +-5% 0603
1 2
PHASE3
PR638
+3VS
12
PR639
10K_0402_1%
PR646
1 2
10K_0402_1%
U2_PHASE2
12
PC627
@
PR648
1 2
10K_0402_1%
U2_PHASE1
10K_0402_1%~D
.01U_0402_16V7K
NVVDD_PWR_GD<22,25>
PR619
0_0402_1%
1 2
.1U_0603_25V7K
@
U2_PWM3
sualaptop365.edu.vn
PR643
PC629
PR642
0_0402_1%
1 2
12
12
@
GPU_EN
PU601
8
UGATE
VCC
1
BOOT
EN
5
PWM
PHASE
6
LGATE
GND
TP
RT9610BZQW WDFN8 MOSFET DRIVER ET88
9
3
4
2
7
UG3
LG3
PR633
2.2 +-5% 0603
1 2
PHASE3
12
PC625
.1U_0603_25V7K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
GPU_B+
2
D1
S2
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
5
4
3
2
1
Follow Intel SB_ULT_PDDG 1.0
VR_HOT#
PR505 10K ohm for 100 degree
PR505 8K ohm for 110 degree
VREF
12
D D
CPU_B+
CSP1
CSN1
+3VS
1 2
PR520
4.75K_0402_1%
VSSSENSE
VCCSENSE
PC511
@
1 2
100P_0402_50V8J
PR519
1 2
10K_0402_5%
1 2
PC512
1500P_0402_50V7K
+5VALW
VSSSENSE
C C
VCCSENSE
B B
75_0402_1%
SLEWA
39.2K_0402_1%
PR511
1 2
10K_0402_5%
17
18
19
20
21
22
23
24
0.33U_0603_10V7K
+1.05VS
PR500
@
PR510
PU500
CSP1
CSN1
CSN2
CSP2
N/C
N/C
GFB
VFB
PR518
1 2
3.92K_0402_1%
1 2
10_0603_1%
12
12
PR521
25
VREF
PC513
12
PR505
10K_0402_5%
15
16
14
VBAT
SLEWA
COMP26VCLK31V5A28DROP
29
27
12
1 2
PR523
56_0402_5%
PH500
100K_0402_1%_TSM0B104F4251RZ
12
PC501
0.01U_0402_16V7K
13
12
11
10
IMON
OCP-I
F-IMAX
THERM
B-RAMP
ALERT#
GND33GND
VR_HOT#30VREF
32
12
PC514
1U_0402_10V6K
VR_HOT#<41>
9
O-USR
PGOOD
TPS51624RSM_QFN32_4X4
VR_ON
SKIP#
PWM1
PWM2
MODE
PC500
VDD
VDIO
IMON
12
4700P_0402_25V7K
8
7
6
5
4
3
2
1
VR_SVID_CLK
12
PR501
OCP-I
12
PR506
PR528
1 2
150K_0402_1%
VR_SVID_ALRT#
316K_0402_1%
B-RAMP
39K_0402_1%
PR512
0_0402_1%
1 2
VR_SVID_DAT
SKIP#
PWM1
@
12
12
@
PR502
12
PR507
PC508
1 2
1_0603_5%
1U_0402_10V6K
75_0402_1%
150K_0402_1%
1 2
1.91K_0402_1%
PR515
F-IMAX
PR513
12
PR503
665K_0402_1%
12
PR508
100K_0402_1%
O-USR
VR_ON <13,41>
H_VR_READY <13>
+3VS
+3VS
12
PR504
36.5K_0402_1%
12
PR509
20K_0402_1%
OCP-I
B+
CPU_B+
PR531
1 2
2M_0402_1%
PWM1
12
PR529
2M_0402_1%
12
PR530
27K_0402_1%
PL500
1 2
HCB2012KF-121T50_0805
Vps0
Vboot 1.7V
Icc_MAX
Idyn_MAX
Icc-TDC
Load-Line
Fast Slew Rate
CPU_B+
12
12
PC519
PC518
4.7U_0805_25V6K
4.7U_0805_25V6K
PC507
1 2
0.1U_0402_25V6
1 2
PR514
2.2_0603_5%
Specifications
12
12
PC503
PC504
4.7U_0805_25V6K
4.7U_0805_25V6K
9
PGND2
8
PWM
7
BOOT
6
BOOT_R
5
VIN
CSD97374CQ4M_SON8_3P5X4P5
1.8V
32A
27A
10A
2.0mV/A
48mV/us
1
+
PC502
2
33U_D2_25VM_R60M
PU501
VSW
PGND1
VDD
SKIP#
4
3
2
1
SKIP#-1
PC505
@EMI@
LX_CORE
1 2
PR516
0_0402_1%
PC509
1 2
1U_0402_10V6K
CPU_CORE
Frequency = 1.2MHz
OCP Current 39 A
DCR: 0.66m +-7% ohm
PH500 B value: 4250k 1%
PH501 B value: 3435k 1%
12
12
PC506
0.1U_0402_25V6
@EMI@
2200P_0402_50V7K
12
SKIP#
@
PR517
Plz notice.
4.7_1206_5%
Snubber R power rating on
12
@EMI@
High voltage and High FSW
CSP
PC510
@EMI@
1 2
2.15K_0402_1%
PR522
680P_0603_50V7K
12
PR524
20K_0402_1%
+5VS
PL501
0.15UH_PCME064T-R15MS_36A_20%
1
4
3
2
12
PH501
12
PC515
12
PR525
3.01K_0402_1%
10K_0402_1%_TSM0A103F34D1RZ
+CPU_CORE
CSP1
PC516
12
0.068U_0402_16V7K
0.068U_0402_16V7K
CSN1
+1.05VS
12
12
12
PR526
VR_SVID_CLK<13>
VR_SVID_ALRT#<13>
VR_SVID_DAT<13>
A A
5
VR_SVID_CLK
VR_SVID_ALRT#
54.9_0402_1%
VR_SVID_DAT
sualaptop365.edu.vn
PC517
0.1U_0402_25V6
PR527
130_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEIT HER THIS SHEET NOR THE I NFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTR ONICS, INC.
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR-CPU_CORE
PWR-CPU_CORE
PWR-CPU_CORE
LA-A301P
LA-A301P
LA-A301P
1
53 56Friday, September 19, 2014
53 56Friday, September 19, 2014
53 56Friday, September 19, 2014
1.0
1.0
1.0
5
D D
4
3
2
1
+CPU_CORE
C C
12
12
12
B B
12
12
PC901
22U_0603_6.3V6M
PC909
22U_0603_6.3V6M
PC917
22U_0603_6.3V6M
PC902
22U_0603_6.3V6M
12
PC910
22U_0603_6.3V6M
12
PC918
22U_0603_6.3V6M
12
PC903
12
PC911
12
PC919
PC904
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
12
PC912
22U_0603_6.3V6M
12
PC920
22U_0603_6.3V6M
12
12
PC906
PC905
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC913
PC914
22U_0603_6.3V6M
22U_0603_6.3V6M
@
12
@
12
PC922
PC921
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC908
PC907
22U_0603_6.3V6M
22U_0603_6.3V6M
12
12
PC915
PC916
22U_0603_6.3V6M
22U_0603_6.3V6M
@
1
@
12
PC924
+
2
PC923
22U_0603_6.3V6M
330U_D2_2.5VM_R9M
+VGA_CORE
1U_0402_10V6K
1U_0402_10V6K
PC927
12
22U_0805_6.3VAM
1
PC944
2
4.7U_0603_6.3V
PC954
12
1U_0402_10V6K
PC928
12
1
2
12
PC929
12
4.7U_0805_6.3V6K
22U_0805_6.3VAM
12
PC946
PC945
4.7U_0603_6.3V
4.7U_0603_6.3V
PC956
PC955
12
1U_0402_10V6K
1U_0402_10V6K
PC931
PC930
12
12
+GPU_CORE
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
12
12
PC947
PC948
4.7U_0603_6.3V
4.7U_0603_6.3V
PC957
12
PC958
12
1U_0402_10V6K
1U_0402_10V6K
PC932
12
4.7U_0805_6.3V6K
12
PC949
4.7U_0603_6.3V
PC959
12
1U_0402_10V6K
PC933
12
12
12
PC934
12
4.7U_0603_6.3V
4.7U_0805_6.3V6K
PC951
12
PC950
4.7U_0603_6.3V
22U_0805_6.3VAM
PC960
1
PC961
2
4.7U_0603_6.3V
4.7U_0603_6.3V
PC953
PC952
12
12
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
2
PC963
PC962
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
2
1
1
PC965
PC964
2
1
+
2
2
PC966
470U_D2_2VM_R4.5M~D
1
+
2
PC967
470U_D2_2VM_R4.5M~D
1
1
+
+
PC968
470U_D2_2VM_R4.5M~D
+
2
2
PC969
PC970
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
A A
Security Classification
Security Classification
Security Classification
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2013/09/09 2014/09/09
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PWR-PROCESSOR DECOUPLING
PWR-PROCESSOR DECOUPLING
PWR-PROCESSOR DECOUPLING
LA-A301P
LA-A301P
LA-A301P
54 56Friday, September 19, 2014
54 56Friday, September 19, 2014
54 56Friday, September 19, 2014
1
1.0
1.0
1.0
5
4
3
2
1
Power block
CPU OTP
D D
B+
+3VALWP: TDC:6.2A
+5VALWP: TDC:7A
DC IN
Input
Switch
Page 48
TPS51225CRUKR
CHARGER
CC:3A
CV:17.7V
+1.35VP/+0.675VSP: TDC:16.7A/0.7A
RT8207MZQW
BQ24780
Page 48
C C
Battery
+1.05VSP: TDC:7A
TPS51212DSCR
+1.5VSP: TDC:0.5mA
APL5930QBI
3V3_MAIN_EN
B B
+VGA_CORE
TDC:49A
RT8813AGQW
Page 52
Page 47
Turn Off
Always
Page 49
SYSON
Page 50
SUSP#
Page 51
SUSP#
Page 51
VR_ON
+CPU_CORE
TDC: 10A
TPS51624
Page 53
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
sualaptop365.edu.vn
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/09/09 2014/09/09
2013/09/09 2014/09/09
2013/09/09 2014/09/09
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PWR_POWER BLOCK DIAGRAM
PWR_POWER BLOCK DIAGRAM
PWR_POWER BLOCK DIAGRAM
LA-A301P
LA-A301P
LA-A301P
55 56Friday, September 19, 2014
55 56Friday, September 19, 2014
55 56Friday, September 19, 2014
1
1.0
1.0
1.0
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