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A
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Date: 2010.03.29
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B
C
D
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DC/DC IMVP4
Switching Power
ISL6218
INPUTS
4 4
DCBATOUT VCC_CORE
OUTPUT
32
SPR.01.2004
SYSTEM DC/DC
MAX1715
INPUTS OUTPUTS
DCBATOUT
34
1D35V_S0
2D5V_S3
DC/DC&CHARGER
MAX1645
3 3
INPUTS OUTPUTS
AD+
35
BT+
DC/DC
MAX1999
OUTPUTS INPUTS
DCBATOUT
2 2
G913C/APL1085
APL5331kAC/G1211X
OUTPUTS INPUTS
3D3V_S0 1D8V_VCCA_S0
3D3V_S5 1D5V_S5
3D3V_S0
2D5V_S3 1D25V_S0
1D35V_S0 VCC_IO_S0
1D5V_S0
33
3D3V_S5
5V_S5
38
MOLOKAI Block Diagram
CLOCK
Generator
ICS950810
DDR
DRAM
Socket
* 2
HDD
OPTICAL
49LF004-334C
10,11,12
26
USB2.0
LPC BUS
BIOS
ROM
3
DDR 266/333
Ultra
DMA-100
IDE BUS
KBC
M38859
27 28
TOUCH
PAD
CPU
Banias/Dothan
Montara-GM+
ICH4-M
USB 2.0
2 Ports
INT
KB
5,6
HOST BUS
100MHz
7,8,9
Hub I/F
PCI BUS
16,17,18
USB2.0
AC-LINK
29
MODEM
DAUGHTER
CARD
RJ-11
Project Code:91.43E01.001
CRT
DVO
LVDS
CH7011
(CHRONTEL)
LCD
SD/MS CARD
READER + 1394
PCI7420
LAN
BCM4401
23
AC 97
Codec
29
STAC9750
03249-SC
13
15
14
24
TV_OUT
POWER SW
TPS2220A
21
MINIPCI
802.11B
802.11G
Amplifier
TPA0312
PCB LAYER
L1:COMPONENT
L2:GND
L3:SIGNAL1
L4:SIGNAL2
L5:VCC
L6:GND
L7:SIGNAL3
L8:COMPONENT
20
CARDBUS
SLOT B
CardReader
1394
19
RJ-45
25
(TBD)
22
Line-out
MIC
1 1
A
B
C
Wistron Confidential
D
Title
Size Document Number Rev
A3
Date: Sheet
BLOCK DIAGRAM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
13 9 Monday, April 05, 2004
E
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of
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D
E
S5 S0 S3
5V_S5
3D3V_S5
1D5V_S5
4 4
VCC_RTC_S5
AD+
DCBATOUT
5V_S5 18,33,34,36
3D3V_S5 4,16,17,18,28,30,31,33,36,38,39
1D5V_S5 18,38
VCC_RTC_S5 17
AD+ 35,37,39
DCBATOUT 14,32,33,34,35,36,38,39
3D3V_S3
2D5V_S3
1D25V_DDRVREF_S3
3D3V_LAN_S5AC
3D3V_S3 14,25,28,30,34,36,39
2D5V_S3 7,9,10,11,34,38,39
1D25V_DDRVREF_S3 7,10,34
LAN-AC AC-IN / BAT.-IN
3D3V_LAN_S5AC 23,29,36,37
1D8V_VCCA_S0
5V_S0
3D3V_S0
1D5V_S0
1D25V_S0
1D35V_S0
VCC_CORE_S0
VCC_IO_S0
5VA_AUD_S3
5V_S0 13,14,17,18,19,20,24,26,28,30,32,34,36,38,39
3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,26,27,29,30,31,32,36,38,39
1D5V_S0 7,8,9,15,16,18,27,38,39
1D25V_S0 11,12,38
1D35V_S0 7,9,34,38,39
VCC_CORE_S0 6,32,39
VCC_IO_S0 4,5,6,7,9,17,18,32,38,39
1D8V_VCCA_S0 5,38
5VA_AUD_S3 24
AUDIO
3D3V_LCD_S0
CRT_VCC_S0
TV3D3V1_S0
3 3
OTHERS
5V_AUX
3D3V_AUX
3D3V_RTC
ICH_VBIAS
MAX1999_REF
MAX1999_VCC
2 2
5V_AUX 30,31,33,35,37,38,39
3D3V_AUX 14,17,33
3D3V_RTC 17,28
ICH_VBIAS 17
MAX1999_REF 33,38
MAX1999_VCC 33
TV3D3VA_S0
TV3D3V2_S0
TV1D5V_S0
3D3V_LCD_S0 14
CRT_VCC_S0 13
TV3D3V1_S0 15
TV3D3VA_S0 15
TV3D3V2_S0 15
TV1D5V_S0 15
LCD
CRT
TV-OUT
PCI TABLE
DEVICE IDSEL IRQ REQ# / GNT#
SD/MS CARD READER+1394
AD20
PCI7420
1 1
MINI PCI 802.11B/G AD17 REQ#0 / GNT#0 PIRQE#
LAN BCM4401
A
AD21 PIRQD# REQ#4 / GNT#4
PIRQB#
PIRQC#
PIRQF#
PIRQG#
REQ#1 / GNT#1
B
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
C
D
Date: Sheet
Table of Content
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
23 9 Saturday, April 17, 2004
E
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of
Page 3
Host Freq. Setting
FS1/0 = 00 166MHz
FS1/0 = 01 100MHz
FS1/0 = 10 200MHz
FS1/0 = 11 133MHz
FS2 = 0 unbuffer mode (disable 66MHz-IN)
FS2 = 1 buffer mode
Mult0 = 0 Rr=221,Iref=5mA =>Vswing=1.0V@50ohm
Mult0 = 1 Rr=475,Iref=2.32mA =>Vswing=0.7V@50ohm
CPU & MEMORY Freq. Selection
3D3V_S0
1 2
1 2
R483
10KR2
CK-408_MULT0
R484
DUMMY-R2
3D3V_S0
1 2
1 2
R184
DUMMY-R2
R185
1KR2
3D3V_S0
1 2
R181
DUMMY-R2
1 2
R182
1KR2
R192
1 2
1 2
0R5J-1
BC145
SCD1U16V
No stuff:
caps are internal
to CK-TITAN.
CLK66_DREF_GMCH 8
CLK48_DOT 21
Filtering CKT for
48MHz power plane
1 2
BC128
SC10U10V5ZY
BC140
1 2
DUMMY-SC10P50V2JN-1
BC127
1 2
DUMMY-SC10P50V2JN-1
CLKGEN_48MPWR
R191 33R2
1 2
R603 DUMMY-33R2
1 2
R190 33R2
1 2
3D3V_S0
BC229
SCD01U16V2KX
X2
X-14D31818M-7
1 2
PM_SLP_S1# 17
PM_STPPCI# 17
PM_STPCPU# 17,32
CLK_PWD# 32
SMBD_ICH 10,17
SMBC_ICH 10,17
02/09/2004
R208
1 2
0R5J-1
1 2
BC230
SCD1U10V2MX-1
R187 1KR2
1 2
SEL2
CK-408_MULT0
SMBD_ICH
SMBC_ICH
R186
1 2
475R3F
CLKGEN_+3VRUN
1 2
BC139
DUMMY-SC10U10V5ZY
U40
1
VDDREF
8
VDDPCI
14
VDDPCI
19
VDD3V66
32
VDD3V66
37
VDD48
46
VDDCPU
50
VDDCPU
2
X1
3
X2
40
FS2
55
FS1
54
25
34
53
28
43
29
30
33
35
42
41
4
9
15
20
31
36
47
CK-408
FS0
PD#
PCI_STOP#
CPU_STOP#
VTT_PWRGD#
MULTSEL0
SDATA
SCLK
3V66_0
3V66_1/VCH_CLK
IREF
GND
GND
GND
GND
GND
GND
GND
GND
ICS950810CG
1 2
BC237
SCD1U10V2MX-1
1 2
BC238
SCD1U10V2MX-1
VDDA
GND
CPUCLKT2
CPUCLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5
3V66_4
3V66_3
3V66_2
PCICLK_F2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
48MHZ_USB
48MHZ_DOT
REF
1 2
26
27
45
44
49
48
52
51
24
23
22
21
7
6
5
18
17
16
13
12
11
10
39
38
56
BC228
SCD1U10V2MX-1
1 2
1 2
BC142
SCD1U10V2MX-1
RN26 SRN33-2-U2
RN25 SRN33-2-U2
RN24 DUMMY-SRN33-2-U2
TP90
TP89
TPAD28
R217 33R2
1 2
TPAD28
R216 33R2
1 2
R209 33R2
1 2
TP86
TPAD28
TP84
TPAD28
TP88
TPAD28
R215 33R2
1 2
R214 33R2
1 2
R213 33R2
1 2
R212 33R2
1 2
R211 33R2
1 2
TP182 TPAD28
R188 33R2
1 2
R189 33R2
1 2
R183 33R2
1 2
R655 DY-33R2
1 2
SC:Because codec
change to use
crystal so dummy
CLK source
BC239
SCD1U10V2MX-1
CLKGEN_APWR
BC143
SCD01U16V2KX
1
2 3
1
2 3
1
2 3
1 2
BC141
SCD1U10V2MX-1
1 2
4
4
4
CLK_ITP_R
CLK_ITP#_R
01/15/2004
PLACE NEAR EACH PIN
1 2
BC231
SCD1U10V2MX-1
1 2
BC144
DUMMY-SC10U10V5ZY
R160 49D9R3F
1 2
R161 49D9R3F
1 2
R158 49D9R3F
1 2
R159 49D9R3F
1 2
R155 DUMMY-R2
1 2
R154 DUMMY-49D9R3F
1 2
R157 DUMMY-49D9R3F
1 2
R156 DUMMY-R2
1 2
CLK66_GMCH 8
CLK66_ICH 16
CLKPCIF_ICH 17
PCLK_CBUS 21
PCLK_KBC 28
PCLK_FWH 27
PCLK_MINI 19
PCLK_LAN 23
CLK48_ICH 16
CLK48_DREF_GMCH 8
CLK14_ICH 17
CLK14_AUDIO 24
1 2
R218
0R5J-1
BC227
SCD1U10V2MX-1
3D3V_S0
CLK_CPU 5
CLK_CPU# 5
CLK_MCH 7
CLK_MCH# 7
CLK_ITP_CPU 4,5
CLK_ITP_CPU# 4,5
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
Clock GEN.
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
33 9 Thursday, April 15, 2004
SC
of
Page 4
A
4 4
B
C
D
E
ITP Debug Pad
1 2
R440
54D9R3F
1 2
DUMMY-22D6R3F
1 2
VCC_IO_S0
1 2
R456
39D2R3F
R441
R453
DUMMY-22D6R3F
VCC_IO_S0
1 2
C365
DUMMY-SCD1U10V2MX-1
1 2
R442
150R2
TDI_FLEX
TMS_FLEX
TRST_FLEX
TCK_FLEX
TDO_FLEX
CLK_ITP_CPU#
CLK_ITP_CPU
H_TCK
RESET_FLEX#
CPU ITP Conn.
TP60 TPAD28
TP63 TPAD28
TP71 TPAD28
TP62 TPAD28
TP61 TPAD28
TP64 TPAD28
TP9 TPAD28
TP8 TPAD28
TP67 TPAD28
TP66 TPAD28
TP17 TPAD28
TP74 TPAD28
TP16 TPAD28
TP70 TPAD28
TP73 TPAD28
TP13 TPAD28
TP68 TPAD28
TP69 TPAD28
TP65 TPAD28
TP72 TPAD28
TCK(PIN A13)
TCK(PIN 5)
FBO(PIN 11)
VCC_IO_S0
1 2
R454
54D9R3F
H_TDI 5
H_TMS 5
H_TRST# 5
3 3
Should place near conn.
2 2
H_TCK 5
H_TDO 5
CLK_ITP_CPU# 3,5
CLK_ITP_CPU 3,5
GTL_CPURST# 5,7
R439
27D4R3F
ITP_DBRESET# 5
1 2
GTL_CPURST#
H_BPM5_PREQ# 5
H_BPM4_PRDY# 5
3D3V_S5
1 2
R455
150R2
H_BPM3_ITP# 5
H_BPM2_ITP# 5
H_BPM1_ITP# 5
H_BPM0_ITP# 5
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
A
B
C
D
Date: Sheet
ITP
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
43 9 Thursday, April 15, 2004
E
SC
of
Page 5
A
For CPU VCCA[0:3] PLL
place one 0.01u & 10u for
each VCCA pin
1 2
4 4
DY-SC10U6D3V5MX
3 3
VCC_IO_S0
1 2
R116
150R2
H_TDI
H_VID[5:0] 32
2 2
1 1
BC87
CLK_ITP_CPU 3,4
CLK_ITP_CPU# 3,4
1D8V_VCCA_S0
1 2
DUMMY-1KR2
TP12
TP11
TPAD28
TPAD28
DUMMY-54D9R3F
1 2
BC75
SC10U6D3V5MX
CLK_CPU 3
CLK_CPU# 3
CC_A20M# 17
CC_FERR# 17
CC_IGNNE# 17
CC_INTR 17
CC_NMI 17
CC_SMI# 17
CC_STPCLK# 17
R113
CC_CPUSLP# 17
H_TCK 4
H_TDI 4
H_TDO 4
1 2
R131
A
1 2
BC108
DY-SC10U6D3V5MX
CC_FERR#
TP20
TP10
TPAD28
TP7
TPAD28
TP14
TPAD28
TEST3
TPAD28
TP19
TPAD28
H_TCK
H_TDI
H_TDO
H_VID5
H_VID4
1 2
H_VID3
H_VID2
H_VID1
R132
H_VID0
DUMMY-54D9R3F
1 2
BC104
DY-SC10U6D3V5MX
U68D
B15
BCLK0
B14
BCLK1
A16
ITP_CLK0
A15
ITP_CLK1
C2
A20M#
D3
FERR#
A3
IGNNE#
D1
LINT0
D4
LINT1
B4
SMI#
C6
STPCLK#
AC26
VCCA3
N1
VCCA2
B1
VCCA1
F26
VCCA0
B2
RSVD
AF7
RSVD
C14
RSVD
C3
RSVD
C16
RSVD
E1
RSVD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
AE7
VCCSENSE
AF6
VSSSENSE
H4
VID5
G4
VID4
G3
VID3
F3
VID2
F2
VID1
E2
VID0
BGA479-SKT-2-U
BC106
SCD01U16V2KX
120mA
BC105
SCD01U16V2KX
BPM3#
BPM2#
BPM1#
BPM0#
COMP3
COMP2
COMP1
COMP0
DPSLP#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
PROCHOT#
PWRGOOD
TEST1
TEST2
THERMDA
THERMDC
THERMTRIP#
TMS
TRST#
B
BC86
SCD01U16V2KX
C9
A9
B8
C8
AB1
AB2
P26
P25
B7
AC1
G1
E26
AD26
B17
E4
C5
F23
B18
A18
C17
C11
B13
B
C
CPU VCCA POWER:
At Dothan CPU application, POWER is 1.5V or 1.8V.
1D8V_VCCA_S0
BC90
SCD01U16V2KX
Layout note:
COMP0 and COMP2 need to
H_BPM3_ITP#
H_BPM2_ITP#
H_BPM1_ITP#
H_BPM0_ITP#
27D4-3
27D4-1
27D4-4
27D4-2
CC_PROCHOT#
CC_CPUPWRGD
TEST1
TEST2
H_TMS
1 2
1 2
1 2
1 2
1 2
TP6
TP15
TPAD28
TPAD28
R115
680R2
H_BPM3_ITP# 4
H_BPM2_ITP# 4
H_BPM1_ITP# 4
H_BPM0_ITP# 4
CC_CPUPWRGD 7,17
H_TMS 4
H_TRST# 4
GTL_IERR#
CC_CPUPWRGD
CC_PROCHOT#
be Zo=27.4ohm traces.
COMP1 and COMP3 should be
routed asx Zo=54.9ohm,
traces shorter than 0.5".
R135 54D9R3F
R136 27D4R3F
R110 54D9R3F
R109 27D4R3F
CC_DPSLP# 7,17
C165
SC1000P50V
R450 56R2J
R133 330R2
R114 56R2J
VCC_IO_S0
H_GTLREF_0
2/3 RATIO
THERMDP1 30
THERMDN 30
PM_THERMTRIP# 17
VCC_IO_S0
1 2
1 2
1 2
C
SC: Change
to 1KR2F for
1 2
GTLREF pass
R108
1KR2F
Voltage divider placed
within 0.5" of CPU pin
via a Zo=55ohm trace.
1 2
R107
2KR3F
1 2
D
GTL_D#[15..0] 7
GTL_D#15
GTL_D#14
GTL_D#13
GTL_D#12
GTL_D#11
GTL_D#10
GTL_D#9
GTL_D#8
GTL_D#7
GTL_D#6
GTL_D#5
GTL_D#4
GTL_D#3
GTL_D#2
GTL_D#1
GTL_D#0
GTL_DINV#0 7
GTL_DSTBN#0 7
GTL_DSTBP#0 7
GTL_D#[31..16] 7 GTL_D#[63..48] 7
C134
DUMMY-SCD1U16V
GTL_DINV#1 7
GTL_DSTBN#1 7
GTL_DSTBP#1 7
GTL_A#[16..3] 7
GTL_ADSTB#0 7
GTL_A#[31..17] 7
GTL_ADSTB#1 7
GTL_D#31
GTL_D#30
GTL_D#29
GTL_D#28
GTL_D#27
GTL_D#26
GTL_D#25
GTL_D#24
GTL_D#23
GTL_D#22
GTL_D#21
GTL_D#20
GTL_D#19
GTL_D#18
GTL_D#17
GTL_D#16
GTL_A#16
GTL_A#15
GTL_A#14
GTL_A#13
GTL_A#12
GTL_A#11
GTL_A#10
GTL_A#9
GTL_A#8
GTL_A#7
GTL_A#6
GTL_A#5
GTL_A#4
GTL_A#3
GTL_A#31
GTL_A#30
GTL_A#29
GTL_A#28
GTL_A#27
GTL_A#26
GTL_A#25
GTL_A#24
GTL_A#23
GTL_A#22
GTL_A#21
GTL_A#20
GTL_A#19
GTL_A#18
GTL_A#17
D
U68C
C25
D15#
E23
D14#
B23
D13#
C26
D12#
E24
D11#
D24
D10#
B24
D9#
C20
D8#
B20
D7#
A21
D6#
B26
D5#
A24
D4#
B21
D3#
A22
D2#
A25
D1#
A19
D0#
D25
DINV0#
C23
DSTBN0#
C22
DSTBP0#
K25
D31#
N25
D30#
H26
D29#
M25
D28#
N24
D27#
L26
D26#
J25
D25#
M23
D24#
J23
D23#
G24
D22#
F25
D21#
H24
D20#
M26
D19#
L23
D18#
G25
D17#
H23
D16#
J26
DINV1#
K24
DSTBN1#
L24
DSTBP1#
U68B
AA2
A16#
Y3
A15#
AA3
A14#
U1
A13#
Y1
A12#
Y4
A11#
W2
A10#
T4
A9#
W1
A8#
V2
A7#
R3
A6#
V3
A5#
U4
A4#
P4
A3#
U3
ADSTB0#
AF1
A31#
AE1
A30#
AF3
A29#
AD6
A28#
AE2
A27#
AD5
A26#
AC6
A25#
AB4
A24#
AD2
A23#
AE4
A22#
AD3
A21#
AC3
A20#
AC7
A19#
AC4
A18#
AF4
A17#
AE5
ADSTB1#
BGA479-SKT-2-U
GTL_D#47
Y25
D47#
GTL_D#46
AA26
D46#
Y23
GTL_D#45
D45#
V26
GTL_D#44
D44#
U25
GTL_D#43
D43#
GTL_D#42
V24
D42#
GTL_D#41
U26
D41#
AA23
GTL_D#40
D40#
R23
GTL_D#39
D39#
GTL_D#38
R26
D38#
R24
GTL_D#37
D37#
GTL_D#36
V23
D36#
GTL_D#35
U23
D35#
GTL_D#34
T25
D34#
GTL_D#33
AA24
D33#
GTL_D#32
Y26
D32#
T24
DINV2#
W25
DSTBN2#
W24
DSTBP2#
AF26
D63#
AF22
D62#
AF25
D61#
AD21
D60#
AE21
D59#
AF20
D58#
AD24
D57#
AF23
D56#
AE22
D55#
AD23
D54#
AC25
D53#
AC22
D52#
AC20
D51#
AB24
D50#
AC23
D49#
AB25
D48#
AD20
DINV3#
AE24
DSTBN3#
AE25
DSTBP3#
BGA479-SKT-2-U
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
A7
DBR#
M2
DBSY#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
B5
INIT#
J2
LOCK#
A10
PRDY#
B10
PREQ#
B11
RESET#
M3
TRDY#
L2
RS2#
K1
RS1#
H1
RS0#
C19
DPWR#
GTL_REQ#4
T1
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
Title
Size Document Number Rev
A3
Date: Sheet
GTL_REQ#3
P1
GTL_REQ#2
T2
GTL_REQ#1
P3
R2
GTL_REQ#0
Banias CPU (1 of 2)
MOLOKAI
E
GTL_D#[47..32] 7
GTL_DINV#2 7
GTL_DSTBN#2 7
GTL_DSTBP#2 7
GTL_D#63
GTL_D#62
GTL_D#61
GTL_D#60
GTL_D#59
GTL_D#58
GTL_D#57
GTL_D#56
GTL_D#55
GTL_D#54
GTL_D#53
GTL_D#52
GTL_D#51
GTL_D#50
GTL_D#49
GTL_D#48
GTL_DINV#3 7
GTL_DSTBN#3 7
GTL_DSTBP#3 7
TP18
TPAD28
GTL_IERR#
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
53 9 Thursday, April 15, 2004
E
GTL_ADS# 7
GTL_BNR# 7
GTL_BPRI# 7
GTL_BR0# 7
ITP_DBRESET# 4
GTL_DBSY# 7
GTL_DEFER# 7
GTL_DRDY# 7
GTL_HIT# 7
GTL_HITM# 7
CC_INIT# 17,27
GTL_LOCK# 7
H_BPM4_PRDY# 4
H_BPM5_PREQ# 4
GTL_CPURST# 4,7
GTL_TRDY# 7
GTL_RS#2 7
GTL_RS#1 7
GTL_RS#0 7
GTL_DPWR# 7
GTL_REQ#[0..4] 7
of
SC
Page 6
A
U68A
4 4
A11
A14
A17
A20
A23
A26
B12
B16
B19
B22
B25
C10
C13
C15
C18
C21
VSS
VSS
VSS
VSSD2VSSD5VSSD7VSSD9VSS
C24
BGA479-SKT-2-U
VSS
VSS
VSS
VSS
VSS
VSSB3VSSB6VSSB9VSS
VSS
VSS
VSS
VSS
VSSC1VSSC4VSSC7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSE3VSSE6VSSE8VSS
VSS
E10
D11
D13
D15
D17
D19
D21
D23
E12
D26
E14
VSS
VSS
VSS
VSS
E16
E18
VSS
VSS
E20
AD25
AE3
VSSA2VSSA5VSSA8VSS
VSS
VSS
VSS
VSS
VSSF1VSSF4VSSF5VSSF7VSSF9VSS
E22
E25
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
F11
AE16
VSS
VSS
F13
AE18
VSS
VSS
F15
AE20
VSS
VSS
F17
AE23
VSS
VSS
F19
AE26
VSS
VSS
F21
AF2
VSS
AF5
F24
VSS
VSS
AF9
VSS
B
AF11
AF13
VSS
VSS
VSSG6VSSG2VSS
G22
AF15
VSS
VSS
G23
AF17
VSS
VSS
G26
AF19
VSS
AF21
VSS
VSSH5VSSH3VSS
AF24
VSS
H21
VCCD6VCCD8VCC
VSS
VSSJ1VSSJ4VSSJ6VSS
H25
C
D18
D20
D22
E17
E19
E21
F18
F20
F22
G21
H22
J21
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
VCC
VCC
VCCE5VCCE7VCCE9VCC
VCC
VCC
VCCF6VCCF8VCC
VCC
VCC
VCCG5VCC
VCCH6VCC
VCCJ5VCC
VCC
VCCU5VCCV6VCC
VCCW5VCC
VCCY6VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSSK2VSSK5VSS
VSS
VSS
VSSL3VSSL6VSS
VSS
VSSM1VSSM4VSSM5VSS
VSS
VSSN3VSSN6VSS
VSS
VSS
VSSP2VSSP5VSS
VSS
VSSR1VSSR4VSSR6VSS
VSS
VSST3VSST5VSS
VSS
VSS
VSSU2VSSU6VSS
VSS
VSSV1VSSV4VSSV5VSS
VSS
VSSW3VSSW6VSS
VSS
J22
J24
K21
K23
K26
L22
L25
M21
M24
P21
N22
P24
N23
N26
T21
T23
T26
R22
R25
V21
V25
U22
U24
W22
W23
W26
AC19
VCC
VCC
VSS
VSSY2VSSY5VSS
AD8
VCC
AD10
VCC
Y21
AD12
VCC
VSS
Y24
AD14
VCC
VSS
AA1
D
AD16
VCC
VSS
AA4
AD18
VCC
VSS
AA6
AE9
AA8
VCC
VSS
AE11
VCC
VSS
AA10
AE13
VCC
VSS
AA12
VCC_CORE_S0 VCC_IO_S0
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
VCCP
VCCP
VCCP
VCCP
VCCPK6VCCPL5VCCP
L21
VCCPM6VCCP
AE15
VCC
AE17
VCC
AE19
VCC
AF8
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF16
VCC
AF18
VCC
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
21A
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB3
AB5
AB7
AA14
AA16
AA18
AA20
AA22
AA25
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
M22
VSS
AC18
N21
VCCPN5VCCP
VSS
AC21
AC24
E
VSS
AD1
P22
VCCPP6VCCP
VSS
VSS
AD4
AD7
R21
VCCPR5VCCP
VSS
VSS
AD9
AD11
T22
U21
VCCPT6VCCP
2.5A
VSS
VSS
AD13
AD15
VCCP
VSS
AD17
P23
VSS
AD19
W4
VCCQ0
VCCQ1
VSS
VSS
AD22
VCC_CORE_S0
3 3
C182
SCD1U10V2MX-1
10uF_6.3V *18 ,0805,X5R
C148
SCD1U10V2MX-1
C149
SCD1U10V2MX-1
C151
SCD1U10V2MX-1
C150
SCD1U10V2MX-1
0.1uF_10V *18 ,0402,X7R
C173
SCD1U10V2MX-1
C172
SCD1U10V2MX-1
C175
SCD1U10V2MX-1
C174
SCD1U10V2MX-1
C177
SCD1U10V2MX-1
C136
SCD1U10V2MX-1
C137
SCD1U10V2MX-1
C135
SCD1U10V2MX-1
C162
SCD1U10V2MX-1
C142
SCD1U10V2MX-1
C143
SCD1U10V2MX-1
C186
SCD1U10V2MX-1
C185
SCD1U10V2MX-1
Place near CPU
VCC_CORE_S0
1 2
C138
SC10U6D3V5MX
VCC_CORE_S0
1 2
C181
SC10U6D3V5MX
2 2
VCC_IO_S0
1 2
C179
SC10U6D3V5MX
1 2
C153
SC10U6D3V5MX
1 2
C159
SC10U6D3V5MX
BC99
SCD1U10V2MX-1
1 2
C155
SC10U6D3V5MX
1 2
C146
SC10U6D3V5MX
BC98
SCD1U10V2MX-1
1 2
C152
SC10U6D3V5MX
1 2
C145
SC10U6D3V5MX
BC188
SCD1U10V2MX-1
BC102
SCD1U10V2MX-1
1 2
C156
SC10U6D3V5MX
1 2
C147
SC10U6D3V5MX
0.1uF_10V *10 ,0402,X7R 10uF_10V *1 ,0805,X5R
BC103
SCD1U10V2MX-1
1 2
C154
SC10U6D3V5MX
1 2
C133
SC10U6D3V5MX
BC89
SCD1U10V2MX-1
1 2
C178
SC10U6D3V5MX
BC76
SCD1U10V2MX-1
1 2
C176
SC10U6D3V5MX
POSCAP 100uF_4V*1
BC88
SCD1U10V2MX-1
BC200
SCD1U10V2MX-1
1 2
C158
SC10U6D3V5MX
C161
SCD1U10V2MX-1
1 2
C160
SC10U6D3V5MX
DUMMY-ST100U4VBM
1 2
TC8
1 2
C141
SC10U6D3V5MX
1 2
C180
SC10U6D3V5MX
Place near CPU
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
A
B
C
D
Date: Sheet
Banias CPU (2 of 2)
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
63 9 Thursday, April 15, 2004
E
SC
of
Page 7
A
B
C
D
E
R330
226R3F
R331
147R3F
R332
113R3F
HYSWING
R91
470R2
1
2
3 4
300R3
A
CPU
ITP
Close to pin
PSWING
1D35V_S0
change
for
MGM+
1 2
GMCH_PWROK
GTL_A#[31:3] 5
C304
SCD01U16V2KX
HLVREF
C306
SCD01U16V2KX
GTL_ADSTB#0 5
GTL_ADSTB#1 5
GTL_REQ#[4:0] 5
CLK_MCH 3
CLK_MCH# 3
GTL_ADS# 5
GTL_DRDY# 5
GTL_DEFER# 5
GTL_TRDY# 5
GTL_RS#0 5
GTL_RS#1 5
GTL_RS#2 5
PCIRST#_3 15,17,18,19,20,21,23,27,28
GTL_BR0# 5
GTL_BNR# 5
GTL_BPRI# 5
GTL_DBSY# 5
GTL_HITM# 5
GTL_HIT# 5
GTL_LOCK# 5
CC_DPSLP# 5,17
GTL_CPURST# 4,5
GTL_DPWR# 5
HL_[10:0] 16
HL_STB 16
HL_STB# 16
1 2
R421 27D4R3F
1 2
R94 27D4R3F
1 2
CC_CPUPWRGD 5,17
HXRCOMP,HYRCOMP as
18mil wide trace
AC18
AD14
AD13
AD17
AD11
AC13
AD8
AD7
AC6
AC5
AC19
AD5
AB5
AD16
AC12
AF11
AD10
AD25
AC24
AC21
AD22
AD20
AD23
AD26
AC22
AC25
AC7
AB7
AC9
AC10
AB2
AA2
AC26
AB25
AC3
AD4
AC2
AD2
AB23
AB24
AA3
AB4
AH27
AH28
AH26
AE26
AG28
AF28
AG26
AF26
AE27
AD27
AD15
AH15
AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17
AJ22
AJ19
U61A
SMA[0]
SMA[1]
SMA[2]
SMA[3]
SMA[4]
SMA[5]
SMA[6]
SMA[7]
SMA[8]
SMA[9]
SMA[10]
SMA[11]
SMA[12]
SMAB[1]
SMAB[2]
SMAB[4]
SMAB[5]
SWE#
SCAS#
SRAS#
SBA[0]
SBA[1]
SCS[0]#
SCS[1]#
SCS[2]#
SCS[3]#
SCKE[0]
SCKE[1]
SCKE[2]
SCKE[3]
SCK[0]
SCK[0]#
SCK[1]
SCK[1]#
SCK[2]
SCK[2]#
SCK[3]
SCK[3]#
SCK[4]
SCK[4]#
SCK[5]
SCK[5]#
SDQS[7]
SDM[7]
SDQ[56]
SDQ[57]
SDQ[58]
SDQ[59]
SDQ[60]
SDQ[61]
SDQ[62]
SDQ[63]
SDQS[8]
SDM[8]
SDQ[64]
SDQ[65]
SDQ[66]
SDQ[67]
SDQ[68]
SDQ[69]
SDQ[70]
SDQ[71]
SMVSWINGL
SMVSWINGH
MONTARA-GM
D
DDR
MEMORY
Title
Size Document Number Rev
A3
Date: Sheet
SDQS[0]
SDQS[1]
SDQ[10]
SDQ[11]
SDQ[12]
SDQ[13]
SDQ[14]
SDQ[15]
SDQS[2]
SDQ[16]
SDQ[17]
SDQ[18]
SDQ[19]
SDQ[20]
SDQ[21]
SDQ[22]
SDQ[23]
SDQS[3]
SDQ[24]
SDQ[25]
SDQ[26]
SDQ[27]
SDQ[28]
SDQ[29]
SDQ[30]
SDQ[31]
SDQS[4]
SDQ[32]
SDQ[33]
SDQ[34]
SDQ[35]
SDQ[36]
SDQ[37]
SDQ[38]
SDQ[39]
SDQS[5]
SDQ[40]
SDQ[41]
SDQ[42]
SDQ[43]
SDQ[44]
SDQ[45]
SDQ[46]
SDQ[47]
SDQS[6]
SDQ[48]
SDQ[49]
SDQ[50]
SDQ[51]
SDQ[52]
SDQ[53]
SDQ[54]
SDQ[55]
SMRCOMP
SMVREF_0
U61C
P23
HA[3]#
T25
GTL_A#4
GTL_A#5
GTL_A#6
GTL_A#7
GTL_A#8
GTL_A#9
GTL_A#10
GTL_A#11
GTL_A#12
GTL_A#13
GTL_A#14
GTL_A#15
GTL_A#16
GTL_A#17
GTL_A#18
GTL_A#19
GTL_A#20
GTL_A#21
GTL_A#22
GTL_A#23
GTL_A#24
GTL_A#25
GTL_A#26
GTL_A#27
GTL_A#28
GTL_A#29
GTL_A#30
GTL_A#31
GTL_REQ#0
GTL_REQ#1
GTL_REQ#2
GTL_REQ#3
GTL_REQ#4
GMCH_PWROK
HL_0
HL_1
HL_2
HL_3
HL_4
HL_5
HL_6
HL_7
HL_8
HL_9
HL_10
HLVREF SMRCOMP
R329
HLZCOMP
37D4R3F
HYRCOMP
HXRCOMP
PSWING
HYSWING
HXSWING
R27
U23
U24
R24
U28
V28
U27
V27
U25
V26
V25
V23
W25
AA27
W24
W23
W27
AA28
W28
AB27
AB28
AA26
R28
P25
R23
R25
AE29
AD29
N24
M28
M25
N23
P26
M27
AD28
M23
N25
P28
M26
N28
N27
P27
AA22
H28
B20
K28
B18
T28
T27
Y24
Y25
Y27
Y26
T26
T23
L28
Y23
F15
J11
U7
U4
U3
V3
W2
W6
V6
W7
T3
V5
V4
W3
V2
W1
T2
U2
F7
HA[4]#
HA[5]#
HA[6]#
HA[7]#
HA[8]#
HA[9]#
HA[10]#
HA[11]#
HA[12]#
HA[13]#
HA[14]#
HA[15]#
HA[16]#
HA[17]#
HA[18]#
HA[19]#
HA[20]#
HA[21]#
HA[22]#
HA[23]#
HA[24]#
HA[25]#
HA[26]#
HA[27]#
HA[28]#
HA[29]#
HA[30]#
HA[31]#
HADSTB[0]#
HADSTB[1]#
HREQ[0]#
HREQ[1]#
HREQ[2]#
HREQ[3]#
HREQ[4]#
BCLK
BCLK#
ADS#
DRDY#
DEFER#
HTRDY#
RS[0]#
RS[1]#
RS[2]#
RSTIN#
BREQ0#
BNR#
BPRI#
DBSY#
HITM#
HIT#
HLOCK#
DPSLP#
CPURST#
PWROK
DPWR#
HL[0]
HL[1]
HL[2]
HL[3]
HL[4]
HL[5]
HL[6]
HL[7]
HL[8]
HL[9]
HL[10]
HLSTB
HLSTB#
HLVREF
HLZCOMP
HYRCOMP
HXRCOMP
PSWING
HYSWING
HXSWING
AGPBUSY#
HOST
HUB LINK
B
HDSTBP[0]#
HDSTBN[0]#
HDSTBP[1]#
HDSTBN[1]#
HDSTBP[2]#
HDSTBN[2]#
HDSTBP[3]#
HDSTBN[3]#
MONTARA-GM
HD[0]#
HD[1]#
HD[2]#
HD[3]#
HD[4]#
HD[5]#
HD[6]#
HD[7]#
HD[8]#
HD[9]#
HD[10]#
HD[11]#
HD[12]#
HD[13]#
HD[14]#
HD[15]#
DINV[0]#
HD[16]#
HD[17]#
HD[18]#
HD[19]#
HD[20]#
HD[21]#
HD[22]#
HD[23]#
HD[24]#
HD[25]#
HD[26]#
HD[27]#
HD[28]#
HD[29]#
HD[30]#
HD[31]#
DINV[1]#
HD[32]#
HD[33]#
HD[34]#
HD[35]#
HD[36]#
HD[37]#
HD[38]#
HD[39]#
HD[40]#
HD[41]#
HD[42]#
HD[43]#
HD[44]#
HD[45]#
HD[46]#
HD[47]#
DINV[2]#
HD[48]#
HD[49]#
HD[50]#
HD[51]#
HD[52]#
HD[53]#
HD[54]#
HD[55]#
HD[56]#
HD[57]#
HD[58]#
HD[59]#
HD[60]#
HD[61]#
HD[62]#
HD[63]#
DINV[3]#
HDVREF[0]
HDVREF[1]
HDVREF[2]
HAVREF
HCCVREF
K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
K27
J28
J25
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
D26
C27
E25
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
E21
E22
B25
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18
E18
D18
G19
K21
J21
J17
Y22
Y28
GTL_D#0 GTL_A#3
GTL_D#1
GTL_D#2
GTL_D#3
GTL_D#4
GTL_D#5
GTL_D#6
GTL_D#7
GTL_D#8
GTL_D#9
GTL_D#10
GTL_D#11
GTL_D#12
GTL_D#13
GTL_D#14
GTL_D#15
GTL_D#16
GTL_D#17
GTL_D#18
GTL_D#19
GTL_D#20
GTL_D#21
GTL_D#22
GTL_D#23
GTL_D#24
GTL_D#25
GTL_D#26
GTL_D#27
GTL_D#28
GTL_D#29
GTL_D#30
GTL_D#31
GTL_D#32
GTL_D#33
GTL_D#34
GTL_D#35
GTL_D#36
GTL_D#37
GTL_D#38
GTL_D#39
GTL_D#40
GTL_D#41
GTL_D#42
GTL_D#43
GTL_D#44
GTL_D#45
GTL_D#46
GTL_D#47
GTL_D#48
GTL_D#49
GTL_D#50
GTL_D#51
GTL_D#52
GTL_D#53
GTL_D#54
GTL_D#55
GTL_D#56
GTL_D#57
GTL_D#58
GTL_D#59
GTL_D#60
GTL_D#61
GTL_D#62
GTL_D#63
HDVREF
HAVREF
HCCVREF
GTL_D#[63..0] 5
GTL_DSTBP#0 5
GTL_DSTBN#0 5
GTL_DINV#0 5
GTL_DSTBP#1 5
GTL_DSTBN#1 5
GTL_DINV#1 5
GTL_DSTBP#2 5
GTL_DSTBN#2 5
GTL_DINV#2 5
GTL_DSTBP#3 5
GTL_DSTBN#3 5
GTL_DINV#3 5
HDVREF 9
HAVREF 9
HCCVREF 9 AGPBUSY# 17
C
R380
604R3F
R378
150R3F
R379
150R3F
R381
604R3F
M_A[12..0] 10,12
2D5V_S3
1 2
1 2
2D5V_S3
1 2
1 2
M_AB1 10,12
M_AB2 10,12
M_AB4 10,12
M_AB5 10,12
M_WE# 10,12
M_CAS# 10,12
M_RAS# 10,12
M_BS0# 10,12
M_BS1# 10,12
M_CS0_R# 10,12
M_CS1_R# 10,12
M_CS2_R# 10,12
M_CS3_R# 10,12
M_CKE0_R# 10,12
M_CKE1_R# 10,12
M_CKE2_R# 10,12
M_CKE3_R# 10,12
CLK_DDR0 10
CLK_DDR0# 10
CLK_DDR1 10
CLK_DDR1# 10
CLK_DDR2 10
CLK_DDR2# 10
CLK_DDR3 10
CLK_DDR3# 10
CLK_DDR4 10
CLK_DDR4# 10
CLK_DDR5 10
CLK_DDR5# 10
SMVSWINGL
1 2
1 2
C337
SCD1U10V2MX-1
SMVSWINGH
C335
SCD1U10V2MX-1
M_A0
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_DQS7
M_DM7
M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63
M_DQS8
M_DM8
M_DATA64
M_DATA65
M_DATA66
M_DATA67
M_DATA68
M_DATA69
M_DATA70
M_DATA71
AG2
AE5
SDM[0]
AF2
SDQ[0]
AE3
SDQ[1]
AF4
SDQ[2]
AH2
SDQ[3]
AD3
SDQ[4]
AE2
SDQ[5]
AG4
SDQ[6]
AH3
SDQ[7]
AH5
AE6
SDM[1]
AD6
SDQ[8]
AG5
SDQ[9]
AG7
AE8
AF5
AH4
AF7
AH6
AH8
AE9
SDM[2]
AF8
AG8
AH9
AG10
AH7
AD9
AF10
AE11
AE12
AH12
SDM[3]
AH10
AH11
AG13
AF14
AG11
AD12
AF13
AH13
AH17
AD19
SDM[4]
AH16
AG17
AF19
AE20
AD18
AE18
AH18
AG19
AE21
AD21
SDM[5]
AH20
AG20
AF22
AH22
AF20
AH19
AH21
AG22
AH24
AD24
SDM[6]
AE23
AH23
AE24
AH25
AG23
AF23
AF25
AG25
AB1
AJ24
Montara (1 of 3)
M_DQS0
M_DM0
M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7
M_DQS1
M_DM1
M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15
M_DQS2
M_DM2
M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23
M_DQS3
M_DM3
M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31
M_DQS4
M_DM4
M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39
M_DQS5
M_DM5
M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47
M_DQS6
M_DM6
M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55
SMRCOMP
C347
SCD1U10V2MX-1
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
E
M_DATA[71..0] 12
M_DQS[8..0] 12
M_DM[8..0] 12
2D5V_S3
1 2
R334
60D4R3F
1 2
R333
60D4R3F
1D25V_DDRVREF_S3
C345
SCD01U16V2KX
1 2
73 9 Thursday, April 15, 2004
of
SCD1U10V2MX-1
1 2
C308
SC
GMCH
CPURST#
(GTL_CPURST#)
1 2
1 2
VCC_IO_S0
R422
R423
VCC_IO_S0
R92
R93
3D3V_S0
3D3V_S0
C303
1 2
C305
1 2
1 2
1 2
1 2
6
5
1D5V_S0
1 2
1 2
1 2
1 2
C352
SCD1U10V2MX-1
HXSWING
1 2
C103
SCD1U10V2MX-1
Q20
UMX1N-U
1 2
R72
4 4
SCD1U10V2MX-1
SCD1U10V2MX-1
3 3
301R3F
150R3F
2 2
301R3F
150R3F
R70
470R2
1 1
Page 8
A
U61E
AA29
VSS
W29
VSS
U29
VSS
N29
VSS
L29
VSS
J29
VSS
G29
VSS
E29
VSS
4 4
3 3
2 2
1 1
C29
AE28
AC28
E28
D28
AJ27
AG27
AC27
F27
A27
AJ26
AB26
W26
U26
R26
N26
G26
AE25
AA25
D25
A25
AG24
AA24
V24
T24
P24
M24
K24
H24
F24
B24
AJ23
AC23
AA23
D23
A23
AE22
W22
U22
R22
N22
F22
C22
AG21
AB21
AA21
Y21
V21
T21
P21
M21
H21
D21
A21
AJ20
AC20
AA20
F20
AE19
AB19
H19
D19
A19
AJ18
AG18
AA18
F18
AC17
AB17
U17
R17
N17
H17
D17
A17
AE16
AA16
T16
P16
L26
J26
L22
J22
J20
J18
J16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MONTARA-GM
A
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSADAC
VSSALVDS
AE13
AB13
U13
R13
N13
H13
F13
D13
A13
AJ12
AG12
AA12
J12
AJ11
AC11
AB11
H11
F11
D11
AJ10
AE10
AA10
J10
C10
AG9
AB9
W9
U9
T9
R9
N9
L9
E9
AC8
Y8
V8
T8
P8
K8
H8
AJ7
AE7
AA7
R7
M7
J7
G7
E7
C7
AG6
Y6
L6
Y5
U5
B5
AE4
AC4
AA4
W4
T4
N4
K4
G4
D4
AJ3
AG3
R2
AJ1
AE1
AA1
U1
L1
G1
C1
F16
AG15
AB15
U15
R15
N15
H15
D15
AC14
AA14
T14
P14
J14
B8
B11
DEFAULT NOT USE TV ENCODER
IF USE TV ENCODER ADD R63 ,REMOVE
R76 AND R66
TV_D[0..11] 15
TV_HSYNC 15
TV_VSYNC 15
1D5V_S0
R326
100KR2
1D5V_S0
R324
1KR2F
1 2
R325
1KR2F
1 2
CLK66_GMCH 3
CLK48_DREF_GMCH 3
CLK66_DREF_GMCH 3
SB: for SIV pass
PM_SUS_CLK 17,30
1 2
TV_STALL 15
GVREF
1 2
C301
SCD1U10V2MX-1
R95
10R2
SC2D2P50V2CN
B
1D5V_S0
R76
1 2
DUMMY-1KR2
R3
R5
R6
R4
P6
P5
N5
P2
N2
N3
M1
TV_D0
TV_D1
TV_D2
TV_D3
TV_D4
TV_D5
TV_D6
TV_D7
TV_D8
TV_D9
TV_D10
TV_D11
TV_HSYNC
TV_VSYNC
DVORCOMP
GVREF
M5
P3
P4
M2
T6
T5
L2
G2
M3
K5
K1
K3
K2
H2
H1
H3
H4
H6
G3
H5
K6
L5
L3
D1
F1
Y3
D5
B7
B17
D6
MONTARA-GM
1 2
R328
100KR2
1 2
R66
DUMMY-100KR2
TV_CLK 15
TV_CLK# 15
1 2
1 2
C102
1D5V_S0 3D3V_S0
1 2
1KR2
1
G
2 3
B
1 2
1 2
R62
1 2
C58
R59
D
Q19
2N7002
S
TV_CLK
TV_CLK#
100KR2
40D2R3F
R323
DUMMY-R2
DUMMY-C2
CLK48_DPMS
1 2
R64
1 2
R67
10R2
SC10P50V2JN-1
C63
1 2
R63
1KR2
DVODETECT
U61B
DVOBD[0]
DVOBD[1]
DVOBD[2]
DVOBD[3]
DVOBD[4]
DVOBD[5]
DVOBD[6]
DVOBD[7]
DVOBD[8]
DVOBD[9]
DVOBD[10]
DVOBD[11]
DVOBCLK
DVOBCLK#
DVOBFLDSTL
DVOBHSYNC
DVOBVSYNC
DVOBBLANK#
DVOBCINTR#
DVOBCCLKINT
DVOCD[0]
DVOCD[1]
DVOCD[2]
DVOCD[3]
J6
DVOCD[4]
J5
DVOCD[5]
DVOCD[6]
DVOCD[7]
DVOCD[8]
DVOCD[9]
DVOCD[10]
DVOCD[11]
J3
DVOCCLK
J2
DVOCCLK#
DVOCFLDSTL
DVOCHSYNC
DVOCVSYNC
DVOCBLANK#
DVORCOMP
GVREF
GCLKIN
DPMS
DREFCLK
DREFSSCLK
EXTTS_0
R71
10KR2F-U
R73
1 2
DUMMY-R2
C
1 2
ADDID7
F12
RSVDL7RSVDE5RSVDF5RSVDE3RSVDE2RSVDG5RSVDF4RSVDG6RSVDF6RSVD
DVOB CRT
VIDEO
DVOC
NC
NC
NC
NC
NC
NC
NC
AJ4NCAJ2
B29NCA29
A28
AA9
AJ29
AJ28
AH29
TP2
TP58
TP57
TP56
TP55
TP59
TP54
TP46
TP47
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
1 2
PM_THRM# 17,30
C
D12
B12
AA5
RSVD
RSVD
RSVD
RSVDL4RSVDC4RSVDF3RSVDD3RSVDC3RSVDB3RSVDF2RSVDD2RSVDC2RSVDB2RSVD
LVDS
NCA2NC
NCB1NC
AH1
AC16NCAC15
TP44
TP48
M_RCVI#
M_RCVO#
TPAD28
TPAD28
TPAD28
TPAD28
DDR Feedback(inside the package)
Route transitioned to buttom
TP4
TP3
TP45
side with vias near ball
TPAD28
TPAD28
TPAD28
GST[0]
GST[1]
GST[2]
D7
DDCA_DATA
DDCA_CLK
DDCPDATA
DDCPCLK
RED
RED#
GREEN
GREEN#
BLUE
BLUE#
HSYNC
VSYNC
PANELBKLTCTL
PANELBKLTEN
PANELVDDEN
IYAP[0]
IYAM[0]
IYAP[1]
IYAM[1]
IYAP[2]
IYAM[2]
IYAP[3]
IYAM[3]
ICLKAP
ICLKAM
IYBP[0]
IYBM[0]
IYBP[1]
IYBM[1]
IYBP[2]
IYBM[2]
IYBP[3]
IYBM[3]
ICLKBM
ICLKBP
LCLKCTLA
LCLKCTLB
MDDCCLK
MDDCDATA
MDVICLK
MDVIDATA
MI2CCLK
MI2CDATA
REFSET
LIBG
R61
1 2
DUMMY-1KR2
R60
1 2
DUMMY-1KR2
R40
1 2
DUMMY-1KR2
G9
B6
C5
B4
A7
A8
C8
D8
C9
D9
H10
J9
G8
F8
A5
F14
G14
E14
E15
C14
C15
B13
C13
E13
D14
G12
H12
E11
E12
C11
C12
G10
G11
E10
F10
H9
LCLKCTLA
LCLKCTLB
C6
P7
T7
N7
M6
K7
N6
E8
A10
1D5V_S0
BL_PWM
REFSET
1 2
R75
1K5R3F
D
DAT_DDC1 13
CLK_DDC1 13
DAC_RED 13
DAC_GREEN 13
DAC_BLUE 13
DAC_HSYNC 13
DAC_VSYNC 13
TP1
TPAD28
NB_BL_ON 14
LCDVDD_ON 14
TXOUT0+ 14
TXOUT0- 14
TXOUT1+ 14
TXOUT1- 14
TXOUT2+ 14
TXOUT2- 14
TXCLK+ 14
TXCLK- 14
TP183
TPAD28
TPAD28
TP184
1 2
D
FOR MGM+
change
for
MGM+
MI2CCLK
MI2CDATA
R65
127R3F
MI2CCLK
MI2CDATA
GST[2:0]
000
001
010
111
MDDCCLK
MDDCDATA
MDVI_CLK
MDVI_DAT
E
internal pull down
DDR FSB Gfx Core Clock Low Gfx Core Clock High
400 266 133 200
400
400
3D3V_S0
3
2
RN5
SRN2D7KJ
1 4
200
333 400
100 200
100
DAT_DDC_EDID 14
CLK_DDC_EDID 14
200
133
250 166
short trace
1D5V_S0
RP1
1
2
3
4
5 6
SRP2K2
1D5V_S0
1 2
R677
R678
2K7R2J
2K7R2J
1
CHT2222A
Q62
3
2
CHT2222A
Q63
2
Title
Size Document Number Rev
A3
Date: Sheet
10
MI2CCLK
9
MI2CDATA
8
7
3D3V_S0
1 2
3
RN74
SRN8K2J
2
1 4
1
3
Montara (2 of 3)
MOLOKAI
SB:03/03/2004
TV_I2C_CLK 15
TV_I2C_DATA 15
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
83 9 Thursday, April 15, 2004
E
of
SC
Page 9
A
B
C
D
E
AG29
AF29
AC29
AF27
AJ25
AF24
AB22
AJ21
AF21
AB20
AF18
AB18
AJ17
AB16
AF15
AB14
AJ13
AA13
AF12
AB12
AA11
AB10
AJ9
AF9
Y9
AB8
AA8
Y7
AF6
AB6
AA6
AJ5
Y4
AF3
AB3
AG1
AC1
AJ8
AJ6
AF1
AD1
V29
M29
H29
A24
A22
AB29
Y29
K29
F29
A26
V22
T22
P22
M22
H22
U21
R21
N21
L21
H20
A20
J19
H18
A18
H16
G15
2D5V_S3
1 2
SCD1U10V2MX-1
1 2
SCD1U10V2MX-1
C354 SCD1U10V2MX-1
C353 SCD1U10V2MX-1
C350 SCD1U10V2MX-1
C129 SCD1U10V2MX-1
C104 SCD1U10V2MX-1
1 2
C336
C316
2D5V_VCC_QSM_S3
1 2
C328
SCD1U10V2MX-1
1D2V_VCC_ASM_S0
1 2
1 2
1 2
1 2
1 2
1 2
C131
SC10U6D3V5MX
DUMMY-ST100U4VBM
1 2
C357
SCD1U10V2MX-1
1 2
C330
SCD1U10V2MX-1
C310
SCD1U10V2MX-1
1 2
1 2
1 2
SCD1U10V2MX-1
1 2
SCD1U10V2MX-1
1 2
C312
SC10U6D3V5MX
VSS_QSM_GND
1 2
C108
SC10U6D3V5MX
TC6
C358
C329
1 2
IND-D68UH-6
C307
SC10U6D3V5MX
1 2
C110
SCD1U10V2MX-1
1 2
C139
SCD1U10V2MX-1
1 2
C311
SCD1U10V2MX-1
1 2
C338
SCD1U10V2MX-1
2D5V_S3
L16
R335
1 2
1R5
1 2
DUMMY-ST100U4VBM
1 2
TC11
VCC_IO_S0
1 2
C105
SCD1U10V2MX-1
1 2
C163
SCD1U10V2MX-1
1 2
C309
SCD1U10V2MX-1
1D35V_S0
L15
IND-1UH-6
1 2
C77
SCD1U10V2MX-1
TC12
ST220U4VDM-6
SC: populate
220uF for 2.5V
undershoot
issue.
1 2
C184
SCD1U10V2MX-1
1 2
C140
SCD1U10V2MX-1
1 2
1 2
C76
SCD1U10V2MX-1
ST100U4VBM
1 2
TC14
1D5V_S0
1 2
C85
SC10U6D3V5MX
1 2
SCD1U10V2MX-1
L17
1 2
IND-D1UH
L4
1 2
IND-D1UH
1D35V_S0
1 2
C82
SC10U6D3V5MX
1D35V_S0
1 2
C112
DUMMY-SC22U10V-1
C59
1 2
1 2
1 2
C64
SCD1U10V2MX-1
Cap for
VCCAGPLL
1 2
C74
SCD1U10V2MX-1
C80
SC10U6D3V5MX
1 2
C86
SCD1U10V2MX-1
1D5V_S0
1 2
C81
SCD1U10V2MX-1
TC13
ST100U4VBM
1D2V_ADPLLB-1_S0
TC15
ST100U4VBM
1 2
C60
SCD1U10V2MX-1
1 2
TC3
ST100U4VBM
2D5V_S3
1 2
C87
SCD1U10V2MX-1
1D5V_S0
1 2
C315
SCD1U10V2MX-1
1 2
C101
SCD1U10V2MX-1
1D35V_S0
1 2
C107
SCD1U10V2MX-1
Cap for
VCCAHPLL
1D2V_ADPLLA-1_S0
1D5V_S0
3D3V_S0
1D35V_S0
1 2
C72
SC10U6D3V5MX
4 4
1 2
C61
SCD01U16V2KX
1 2
C56
SC10U6D3V5MX
1D35V_S0
C65
SCD1U10V2MX-1
1 2
C84
SCD1U10V2MX-1
1 2
C114
SCD1U10V2MX-1
1 2
C113
SCD1U10V2MX-1
3 3
Caps for VCCALVDS
1 2
Caps for VCCGPIO
1 2
2 2
Caps for VCCHL
1 2
C78
SCD1U10V2MX-1
C57
SCD1U10V2MX-1
C83
SC10U6D3V5MX
1D5V_S0
3D3V_S0
1 2
1 2
C313
SC10U6D3V5MX
SC10U6D3V5MX
C130
SCD1U10V2MX-1
SC: Populate
C331 for 2.5V
undershoot
issue
1 2
1 2
C79
1D35V_S0
1 2
1D35V_S0
1 2
1 2
C109
SCD1U10V2MX-1
DUMMY-SC22U10V-1
ST100U4VBM
C331
1 2
R356
1R5
ESR<50mohm,ESL<2.5mH
TC8,C78 on the same s ide
R74
1R5
ESR<50mohm,ESL<2.5mH
TC9,C81 on the same s ide
C297
DUMMY-SC47U10V-1
1 2
C302
1D2V_ADPLLA_S0
1D2V_ADPLLB_S0
W21
AA19
AA17
U16
R16
N16
AA15
U14
R14
N14
H14
D10
G13
D29
T17
P17
T15
P15
T13
P13
A12
B10
B15
B14
A11
B16
P9
M9
K9
R8
N8
M8
L8
J8
H7
E6
M4
J4
E4
N1
J1
E1
J15
F9
J13
A6
Y2
B9
A9
A3
A4
V9
W8
U8
V7
U6
W5
Y1
V1
U61D
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
90mA
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCC
VCC
VCC
VCC
VCC
POWER
VCC
VCC
VCC
VCC
2.24A
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCTXLVDS
VCCTXLVDS
50mA
VCCTXLVDS
VCCTXLVDS
VCCDLVDS
VCCDLVDS
40mA
VCCDLVDS
VCCDLVDS
70mA
VCCALVDS
VCCADPLLA
VCCADPLLB
VCCAGPLL
VCCAHPLL
VCCADAC
70mA
VCCADAC
VCCGPIO
20mA
VCCGPIO
VCCHL
VCCHL
VCCHL
VCCHL
90mA
VCCHL
VCCHL
VCCHL
VCCHL
25mA
90mA
690mA
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCQSM
VCCQSM
VCCASM
VCCASM
VTTHF
VTTHF
VTTHF
VTTHF
VTTHF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
MONTARA-GM
C73
SCD1U10V2MX-1
1D5V_S0
A
C75
SCD01U16V2KX
1 2
C355
SCD1U10V2MX-1
Caps for VCCADAC
1 2
1 1
This two cap chould connect to
VSSADAC first then to GND
Reference Voltage: 2/3 Vcc_IO_S0
1 2
R425
49D9R3F
1 2
1 2
BC199
SC1U10V3KX
B
R424
100R3F
1 2
BC65
SC1U10V3KX
1 2
C111
SCD1U10V2MX-1
1 2
1 2
R99
49D9R3F
R98
100R3F
C
VCC_IO_S0 VCC_IO_S0 VCC_IO_S0
1 2
R96
49D9R3F
HDVREF 7 HAVREF 7 HCCVREF 7
HDVREF HAVREF HCCVREF
1 2
C106
SCD1U10V2MX-1
1 2
BC64
SC1U10V3KX
1 2
R97
100R3F
D
Title
Size Document Number Rev
A3
Date: Sheet
Montara (3 of 3)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
93 9 Thursday, April 15, 2004
E
SC
of
Page 10
A
DIMM1 DIMM2
DM1
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
118
/RAS
120
/CAS
119
/WE
1
VREF
2
VREF
197
VDDSPD
199
VDDID
202
GND
SKTSODIMM200-1U1
62.10017.311
121
/CS0
122
/CS1
96
CKE0
95
CKE1
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
12
DM0
26
DM1
48
DM2
62
DM3
134
DM4
148
DM5
170
DM6
184
DM7
78
DM8
35
CK0
37
/CK0
160
CK1
158
/CK1
89
CK2
91
/CK2
195
SCL
193
SDA
194
SA0
196
SA1
198
SA2
9
VDD
10
VDD
21
VDD
22
VDD
33
VDD
34
VDD
36
VDD
45
VDD
46
VDD
57
VDD
58
VDD
69
VDD
70
VDD
81
VDD
82
VDD
92
VDD
93
VDD
94
VDD
113
VDD
114
VDD
131
VDD
132
VDD
143
VDD
144
VDD
155
VDD
156
VDD
157
VDD
167
VDD
168
VDD
179
VDD
180
VDD
191
VDD
REVERSE TYPE
192
VDD
3
VSS
4
VSS
15
VSS
16
VSS
27
VSS
28
VSS
38
VSS
39
VSS
40
VSS
51
VSS
52
VSS
63
VSS
64
VSS
75
VSS
76
VSS
87
VSS
88
VSS
90
VSS
103
VSS
104
VSS
125
VSS
126
VSS
137
VSS
138
VSS
149
VSS
150
VSS
159
VSS
161
VSS
162
VSS
173
VSS
174
VSS
185
VSS
186
VSS
201
GND
M_A_SR0 12
M_A1 7,12 M_CS1_R# 7,12
M_A2 7,12
M_A_SR3 12
M_A4 7,12
M_A5 7,12
M_A_SR6 12
M_A_SR7 12
4 4
3 3
2 2
1 1
M_A_SR8 12
M_A_SR9 12
M_A_SR10 12
M_A_SR11 12
M_A_SR12 12
M_DATA_R_[71..0] 12
1D25V_DDRVREF_S3
M_BS0_SR# 12
M_BS1_SR# 12
M_A1
M_A2
M_A4
M_A5
M_RAS_SR# 12
M_CAS_SR# 12
M_WE_SR# 12
M_A_SR6
M_A_SR7
M_A_SR8
M_A_SR9
M_A_SR10
M_A_SR11
M_A_SR12
TP49 TPAD28
TP5 TPAD28
TP51 TPAD28
A
M_A_SR0
M_A_SR3
M_DATA_R_0
M_DATA_R_1
M_DATA_R_2
M_DATA_R_3
M_DATA_R_4
M_DATA_R_5
M_DATA_R_6
M_DATA_R_7
M_DATA_R_8
M_DATA_R_9
M_DATA_R_10
M_DATA_R_11
M_DATA_R_12
M_DATA_R_13
M_DATA_R_14
M_DATA_R_15
M_DATA_R_16
M_DATA_R_17
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
M_DATA_R_21
M_DATA_R_22
M_DATA_R_23
M_DATA_R_24
M_DATA_R_25
M_DATA_R_26
M_DATA_R_27
M_DATA_R_28
M_DATA_R_29
M_DATA_R_30
M_DATA_R_31
M_DATA_R_32
M_DATA_R_33
M_DATA_R_34
M_DATA_R_35
M_DATA_R_36
M_DATA_R_37
M_DATA_R_38
M_DATA_R_39
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
M_DATA_R_46
M_DATA_R_47
M_DATA_R_48
M_DATA_R_49
M_DATA_R_50
M_DATA_R_51
M_DATA_R_52
M_DATA_R_53
M_DATA_R_54
M_DATA_R_55
M_DATA_R_56
M_DATA_R_57
M_DATA_R_58
M_DATA_R_59
M_DATA_R_60
M_DATA_R_61
M_DATA_R_62
M_DATA_R_63
M_DATA_R_64
M_DATA_R_65
M_DATA_R_66
M_DATA_R_67
M_DATA_R_68
M_DATA_R_69
M_DATA_R_70
M_DATA_R_71
DM0_RESET#
DM0_A13
DM0_BA2
1 2
BC17
SCD1U10V2MX-1
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
M_DM_R_0
M_DM_R_1
M_DM_R_2
M_DM_R_3
M_DM_R_4
M_DM_R_5
M_DM_R_6
M_DM_R_7
M_DM_R_8
B
2D5V_S3
B
M_CS0_R# 7,12
M_CKE0_R# 7,12
M_CKE1_R# 7,12
M_DQS_R[0..8] 12
M_DM_R_[8..0] 12
CLK_DDR0 7
CLK_DDR0# 7
CLK_DDR1 7
CLK_DDR1# 7
CLK_DDR2 7
CLK_DDR2# 7
SMBC_ICH 3,17
SMBD_ICH 3,17
M_AB1 7,12
M_AB2 7,12
M_AB4 7,12
M_AB5 7,12
1D25V_DDRVREF_S3
C
Use old symbol change PN only
DM2
112
TP50 TPAD28
TP53 TPAD28
TP52 TPAD28
M_A0
M_A3
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_DATA_R_0
M_DATA_R_1
M_DATA_R_2
M_DATA_R_3
M_DATA_R_4
M_DATA_R_5
M_DATA_R_6
M_DATA_R_7
M_DATA_R_8
M_DATA_R_9
M_DATA_R_10
M_DATA_R_11
M_DATA_R_12
M_DATA_R_13
M_DATA_R_14
M_DATA_R_15
M_DATA_R_16
M_DATA_R_17
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
M_DATA_R_21
M_DATA_R_22
M_DATA_R_23
M_DATA_R_24
M_DATA_R_25
M_DATA_R_26
M_DATA_R_27
M_DATA_R_28
M_DATA_R_29
M_DATA_R_30
M_DATA_R_31
M_DATA_R_32
M_DATA_R_33
M_DATA_R_34
M_DATA_R_35
M_DATA_R_36
M_DATA_R_37
M_DATA_R_38
M_DATA_R_39
M_DATA_R_40
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
M_DATA_R_44
M_DATA_R_45
M_DATA_R_46
M_DATA_R_47
M_DATA_R_48
M_DATA_R_49
M_DATA_R_50
M_DATA_R_51
M_DATA_R_52
M_DATA_R_53
M_DATA_R_54
M_DATA_R_55
M_DATA_R_56
M_DATA_R_57
M_DATA_R_58
M_DATA_R_59
M_DATA_R_60
M_DATA_R_61
M_DATA_R_62
M_DATA_R_63
M_DATA_R_64
M_DATA_R_65
M_DATA_R_66
M_DATA_R_67
M_DATA_R_68
M_DATA_R_69
M_DATA_R_70
M_DATA_R_71
DM1_RESET#
DM1_A13
DM1_BA2
3D3V_S0 3D3V_S0
1 2
BC34
SCD1U10V2MX-1
C
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
5
DQ0
7
DQ1
13
DQ2
17
DQ3
6
DQ4
8
DQ5
14
DQ6
18
DQ7
19
DQ8
23
DQ9
29
DQ10
31
DQ11
20
DQ12
24
DQ13
30
DQ14
32
DQ15
41
DQ16
43
DQ17
49
DQ18
53
DQ19
42
DQ20
44
DQ21
50
DQ22
54
DQ23
55
DQ24
59
DQ25
65
DQ26
67
DQ27
56
DQ28
60
DQ29
66
DQ30
68
DQ31
127
DQ32
129
DQ33
135
DQ34
139
DQ35
128
DQ36
130
DQ37
136
DQ38
140
DQ39
141
DQ40
145
DQ41
151
DQ42
153
DQ43
142
DQ44
146
DQ45
152
DQ46
154
DQ47
163
DQ48
165
DQ49
171
DQ50
175
DQ51
164
DQ52
166
DQ53
172
DQ54
176
DQ55
177
DQ56
181
DQ57
187
DQ58
189
DQ59
178
DQ60
182
DQ61
188
DQ62
190
DQ63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
118
/RAS
120
/CAS
119
/WE
1
VREF
2
VREF
197
VDDSPD
199
VDDID
201
GND
SKT-SODIMM200-7U
62.10024.481
BOT side Top Side
M_A0 7,12
M_A3 7,12
M_A6 7,12
M_A7 7,12
M_A8 7,12
M_A9 7,12
M_A10 7,12
M_A11 7,12
M_A12 7,12
M_BS0# 7,12
M_BS1# 7,12
M_RAS# 7,12
M_CAS# 7,12
M_WE# 7,12
121
/CS0
122
/CS1
96
CKE0
95
CKE1
11
25
47
61
133
147
169
183
77
12
26
48
62
134
148
170
184
78
35
37
160
158
89
91
195
193
194
196
198
9
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
93
94
113
114
131
132
143
144
155
156
157
167
168
179
180
191
192
3
4
15
16
27
28
38
39
40
51
52
63
64
75
76
87
88
90
103
104
125
126
137
138
149
150
159
161
162
173
174
185
186
202
SMBC_ICH
SMBD_ICH
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
M_DM_R_0
M_DM_R_1
M_DM_R_2
M_DM_R_3
M_DM_R_4
M_DM_R_5
M_DM_R_6
M_DM_R_7
M_DM_R_8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
CK0
/CK0
CK1
/CK1
CK2
/CK2
SCL
SDA
SA0
SA1
SA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
NORMAL TYPE
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
M_CS2_R# 7,12
M_CS3_R# 7,12
M_CKE2_R# 7,12
M_CKE3_R# 7,12
3D3V_S0
2D5V_S3
D
CLK_DDR3 7
CLK_DDR3# 7
CLK_DDR4 7
CLK_DDR4# 7
CLK_DDR5 7
CLK_DDR5# 7
D
Montara-GM+
(BOT side)
Title
Size Document Number Rev
Custom
Date: Sheet
E
(Normal Type)
DIMM 2(BOT side)
(REVERSE TYPE)
DIMM 1(Top side)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DDR Socket
MOLOKAI
E
of
10 39 Thursday, April 15, 2004
SC
Page 11
A
B
C
D
E
1D25V_S0
4 4
BC47
SCD01U16V2KX
BC58
SCD01U16V2KX
0.01u_25V*24,0402-X7R
BC49
SCD01U16V2KX
BC62
SCD01U16V2KX
BC40
SCD01U16V2KX
BC61
SCD01U16V2KX
BC36
SCD01U16V2KX
BC51
SCD01U16V2KX
BC35
SCD01U16V2KX
BC52
SCD01U16V2KX
BC37
SCD01U16V2KX
BC46
SCD01U16V2KX
BC39
SCD01U16V2KX
BC48
SCD01U16V2KX
BC42
SCD01U16V2KX
BC50
SCD01U16V2KX
BC41
SCD01U16V2KX
BC72
SCD01U16V2KX
BC38
SCD01U16V2KX
BC73
SCD01U16V2KX
BC60
SCD01U16V2KX
BC69
SCD01U16V2KX
BC59
SCD01U16V2KX
BC67
SCD01U16V2KX
0.1u_10V*24,0402-X5R
1 2
BC55
SCD1U10V2MX-1
3 3
1 2
BC92
SCD1U10V2MX-1
1 2
BC57
SCD1U10V2MX-1
1 2
BC96
SCD1U10V2MX-1
1 2
BC84
SCD1U10V2MX-1
1 2
BC95
SCD1U10V2MX-1
1 2
BC82
SCD1U10V2MX-1
1 2
BC94
SCD1U10V2MX-1
1 2
BC83
SCD1U10V2MX-1
1 2
BC91
SCD1U10V2MX-1
2D5V_S3
1 2
BC85
SCD1U10V2MX-1
1 2
BC93
SCD1U10V2MX-1
FOR DDR SKTS POWER PIN
10u_6.3V*1,0805-X5R
0.1u_10V*24,0402-X5R
1 2
BC78
SCD1U10V2MX-1
1 2
BC97
SCD1U10V2MX-1
1 2
BC81
SCD1U10V2MX-1
1 2
BC77
SCD1U10V2MX-1
1 2
BC71
SCD1U10V2MX-1
1 2
BC80
SCD1U10V2MX-1
1 2
BC74
SCD1U10V2MX-1
1 2
BC79
SCD1U10V2MX-1
1 2
BC68
SCD1U10V2MX-1
1 2
BC66
SCD1U10V2MX-1
1 2
BC70
SCD1U10V2MX-1
1 2
BC56
SCD1U10V2MX-1
2 2
1 1
A
1 2
C360
SC10U6D3V5MX
B
1 2
BC185
SCD1U10V2MX-1
1 2
BC187
SCD1U10V2MX-1
1 2
BC194
SCD1U10V2MX-1
1 2
BC191
SCD1U10V2MX-1
1 2
BC184
SCD1U10V2MX-1
1 2
C66
SCD1U10V2MX-1
1 2
BC192
SCD1U10V2MX-1
1 2
BC181
SCD1U10V2MX-1
1 2
C314
SCD1U10V2MX-1
C
1 2
BC193
SCD1U10V2MX-1
1 2
BC182
SCD1U10V2MX-1
1 2
C333
SCD1U10V2MX-1
1 2
BC201
SCD1U10V2MX-1
1 2
BC183
SCD1U10V2MX-1
1 2
C319
SCD1U10V2MX-1
1 2
BC203
SCD1U10V2MX-1
1 2
BC186
SCD1U10V2MX-1
1 2
C318
SCD1U10V2MX-1
D
1 2
BC202
SCD1U10V2MX-1
1 2
BC180
SCD1U10V2MX-1
1 2
C317
SCD1U10V2MX-1
1 2
BC204
SCD1U10V2MX-1
1 2
BC195
SCD1U10V2MX-1
1 2
C332
SCD1U10V2MX-1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
DDR Decoupling CPA
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
11 39 Thursday, April 15, 2004
E
of
SC
Page 12
A
B
C
D
E
SERIES DAMPING
M_DQS0 M_DQS_R0
M_DATA4
M_DATA5
M_DATA0
M_DATA1
4 4
M_DATA2
M_DATA3
M_DATA6
M_DATA7
M_DATA8 M_DATA45
M_DATA9
M_DATA12
M_DATA13
M_DATA11
M_DATA10
M_DATA14
M_DATA15
M_DQS2
3 3
M_DATA20
M_DATA21
M_DATA16
M_DATA17
M_DATA22
M_DATA18
M_DATA23
M_DATA19
M_DQS3
M_DATA24
M_DATA25
M_DATA28
M_DATA29
M_DATA30
M_DATA27
M_DATA26
M_DATA31
2 2
M_DQS8 M_DQS_R8
M_DATA65
M_DATA64
M_DATA68
M_DATA69
M_DATA66
M_DATA67
M_DATA70
M_DATA71
M_DM0 M_DM_R_0
M_DM1
M_DM2
M_DM3
M_DM4
1 1
M_DM5
M_DM6
M_DM7
M_DM8
R338 10R2
1 2
8
7
6
RN33 SRN10-1
8
7
6
RN32 SRN10-1
10R2
R339
1 2
8
7
6
RN31 SRN10-1
8
7
6
RN34 SRN10-1
10R2
R358
1 2
8
7
6
RN36 SRN10-1
8
7
6
RN35 SRN10-1
10R2
R366
1 2
8
7
6
RN40 SRN10-1
8
7
6
RN38 SRN10-1
10R2
R368
1 2
8
7
6
RN37 SRN10-1
8
7
6
RN39 SRN10-1
10R2
R336
1 2
10R2
R337
1 2
10R2
R357
1 2
10R2
R370
1 2
10R2
R383
1 2
10R2
R408
1 2
10R2
R426
1 2
10R2
R427
1 2
10R2
R369
1 2
A
M_DATA_R_4
1
M_DATA_R_5
2
M_DATA_R_0
3
M_DATA_R_1
4 5
M_DATA_R_2
1
M_DATA_R_3
2
M_DATA_R_6
3
M_DATA_R_7
4 5
1
M_DATA_R_9
2
M_DATA_R_12
3
4 5
M_DATA_R_13
1
M_DATA_R_11
M_DATA_R_10
2
M_DATA_R_14
3
4 5
M_DATA_R_15
M_DQS_R2
1
M_DATA_R_20
M_DATA_R_21
2
3
M_DATA_R_16
M_DATA_R_17
4 5
M_DATA_R_22
1
M_DATA_R_18
2
3
M_DATA_R_23
4 5
M_DATA_R_19
M_DQS_R3
M_DATA_R_24
1
M_DATA_R_25
2
M_DATA_R_28
3
M_DATA_R_29
4 5
M_DATA_R_30
1
M_DATA_R_27
2
M_DATA_R_26
3
M_DATA_R_31
4 5
M_DATA_R_65
1
2
M_DATA_R_64
3
M_DATA_R_68
4 5
M_DATA_R_69
1
M_DATA_R_66
2
M_DATA_R_67
3
M_DATA_R_70
M_DATA_R_71
4 5
M_DM_R_1
M_DM_R_2
M_DM_R_3
M_DM_R_4
M_DM_R_5
M_DM_R_6
M_DM_R_7
M_DM_R_8
M_DQS4
M_DATA32
M_DATA33
M_DATA36
M_DATA37
M_DATA38
M_DATA39
M_DATA34
M_DATA35
M_DQS5 M_DQS1
M_DATA40
M_DATA41
M_DATA44
M_DATA46
M_DATA47
M_DATA42
M_DATA43
M_DQS6
M_DATA53
M_DATA52
M_DATA49
M_DATA48
M_DATA50
M_DATA54
M_DATA55
M_DATA51
M_DQS7
M_DATA56
M_DATA57
M_DATA61
M_DATA60
M_DATA63
M_DATA62
M_DATA59
M_DATA58
8
7
6
RN44 SRN10-1
8
7
6
RN47 SRN10-1
8
7
6
RN48 SRN10-1
8
7
6
RN49 SRN10-1
8
7
6
RN50 SRN10-1
8
7
6
RN51 SRN10-1
8
7
6
RN52 SRN10-1
8
7
6
RN53 SRN10-1
R384
1 2
R407
1 2
R428
1 2
R429
1 2
10R2
1
M_DATA_R_32
2
M_DATA_R_33
3
M_DATA_R_36
M_DATA_R_37
4 5
M_DATA_R_38
1
M_DATA_R_39
2
M_DATA_R_34
3
M_DATA_R_35
4 5
10R2
1
M_DATA_R_45 M_DATA_R_8
M_DATA_R_40
2
M_DATA_R_41
3
M_DATA_R_44
4 5
1
M_DATA_R_46
M_DATA_R_47
2
M_DATA_R_42
3
4 5
M_DATA_R_43
10R2
1
M_DATA_R_53
M_DATA_R_52
2
M_DATA_R_49
3
M_DATA_R_48
4 5
M_DATA_R_50
1
M_DATA_R_54
2
3
M_DATA_R_55
4 5
M_DATA_R_51
10R2
M_DATA_R_56
1
M_DATA_R_57
2
M_DATA_R_61
3
M_DATA_R_60
4 5
M_DATA_R_63
1
2
M_DATA_R_62
3
M_DATA_R_59
M_DATA_R_58
4 5
B
M_DQS_R4
M_DQS_R5 M_DQS_R1
M_DQS_R6
M_DQS_R7
M_A10
M_DATA_R_6
M_DATA_R_7
M_DATA_R_3
M_DATA_R_2
M_DATA_R_1
M_DATA_R_0
M_DATA_R_5
M_DATA_R_4
M_DATA_R_13
M_DATA_R_12
M_DATA_R_9
M_DATA_R_8
M_DATA_R_15
M_DATA_R_14
M_DATA_R_10
M_DATA_R_11
M_DATA_R_17
M_DATA_R_16
M_DATA_R_21
M_DATA_R_20
M_DATA_R_18
M_DATA_R_19
M_DATA_R_23
M_DATA_R_22
M_DATA_R_28
M_DATA_R_29
M_DATA_R_24
M_DATA_R_25
M_DATA_R_31
M_DATA_R_27
M_DATA_R_26
M_DATA_R_30
Put decap near power(1.25V) and pull-u p r es is to r
6
7
8
6
7
8
6
7
8
6
7
8
6
7
8
6
7
8
6
7
8
6
7
8
RN42
SRN10-1
RN41
SRN10-1
RN43
SRN10-1
1D25V_S0
R412 56R2J
1 2
6
7
8
RN12 SRN56-3
6
7
8
RN18 SRN56-3
Put decap near power(1.25V) and pull-u p r es is to r
R413 56R2J
1 2
6
7
8
RN16 SRN56-3
6
7
8
RN17 SRN56-3
Put decap near power(1.25V) and pull-u p r es is to r
R433 56R2J
1 2
6
7
8
RN19 SRN56-3
6
7
8
RN21 SRN56-3
Put decap near power(1.25V) and pull-u p r es is to r
R432 56R2J
1 2
6
7
8
RN20 SRN56-3
6
7
8
RN22 SRN56-3
M_BS1_SR# 10
6
M_A_SR10 10
7
M_RAS_SR# 10
8
6
7
8
6
7
8
R343 56R2J
M_DQS_R0 M_DQS_R4
M_DQS_R1 M_DQS_R5
M_DQS_R2
M_DQS_R3 M_DQS_R7
M_BS1# 7,10
M_RAS# 7,10
M_BS0# 7,10 M_BS0_SR# 10
M_A0
M_A7
M_A8
M_A3
M_A12
M_A6
M_A11
M_A9
1 2
4 5
3
2
1
RN3 SRN56-3
4 5
3
2
1
RN2 SRN56-3
R342 56R2J
1 2
4 5
3
2
1
RN1 SRN56-3
4 5
3
2
1
RN4 SRN56-3
R360 56R2J
1 2
4 5
3
2
1
RN8 SRN56-3
4 5
3
2
1
RN7 SRN56-3
R373 56R2J
1 2
4 5
3
2
1
RN6 SRN56-3
4 5
3
2
1
RN10 SRN56-3
4 5
3
2
1
4 5
3
2
1
4 5
3
2
1
C
PARALLEL TERMINATION
4 5
M_DATA_R_36
3
M_DATA_R_37
2
M_DATA_R_33
M_DATA_R_32
1
M_DATA_R_35
4 5
M_DATA_R_34
3
M_DATA_R_39
2
M_DATA_R_38
1
M_DATA_R_44
4 5
M_DATA_R_45
3
M_DATA_R_41
2
M_DATA_R_40
1
4 5
M_DATA_R_42
M_DATA_R_43
3
M_DATA_R_46
2
1
M_DATA_R_47
M_DATA_R_49
4 5
M_DATA_R_48
3
M_DATA_R_53
2
M_DATA_R_52
1
M_DATA_R_51
4 5
M_DATA_R_55
3
M_DATA_R_54
2
M_DATA_R_50
1
M_DATA_R_61
4 5
M_DATA_R_60
3
2
M_DATA_R_57
M_DATA_R_56
1
M_DATA_R_59
4 5
3
M_DATA_R_58
2
M_DATA_R_62
1
M_DATA_R_63
M_A_SR0 10
M_A_SR8 10
M_A_SR3 10
M_A_SR12 10
M_A_SR6 10
M_A_SR11 10
M_A_SR9 10
M_AB1 7,10
M_AB5 7,10
M_CS2_R# 7,10
M_AB4 7,10
M_DQS_R6
Command Signals USE Topology 2
M_WE# 7,10 M_WE_SR# 10
M_CAS# 7,10 M_CAS_SR# 10 M_A_SR7 10
D
M_DATA_R_71
M_DATA_R_70
M_DATA_R_66
M_DATA_R_67
M_DATA_R_65
M_DATA_R_64
M_DATA_R_68
M_DATA_R_69
M_DQS_R8
M_DM_R_0
M_DM_R_1
M_DM_R_2
M_DM_R_3
M_DM_R_4
M_DM_R_5
M_DM_R_6
M_DM_R_7
M_DM_R_8
M_A3
6
7
8
M_A7
RN46 SRN56-3
M_WE#
6
M_BS0#
7
8
M_A10
RN45 SRN56-3
4 5
M_A5
3
M_A0
2
M_A1
1
6
7
8
RN9 SRN56-3
6
7
8
RN11 SRN56-3
R374 56R2J
1 2
R340 56R2J
1 2
R341 56R2J
1 2
R359 56R2J
1 2
R371 56R2J
1 2
R410 56R2J
1 2
R411 56R2J
1 2
R431 56R2J
1 2
R430 56R2J
1 2
R372 56R2J
1 2
R406
1 2
10R2
R405
1 2
10R2
Title
Size Document Number Rev
A3
Date: Sheet
1D25V_S0
4 5
3
6
2
7
1
8
4 5
3
6
2
7
1
8
1 2
1 2
1 2
1 2
1 2
1 2
R388 56R2J
R386 56R2J
R367 56R2J
R391 56R2J
R382 56R2J
R409 56R2J
1 2
1 2
1 2
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
RN15
SRN56-3
4 5
3
2
1
RN13 SRN56-3
Put decap near power(1.25V) and pull-u p r es is to r
4 5
3
2
1
RN14 SRN56-3
Put decap near power(1.25V) and pull-u p r es is to r
6
7
8
Put decap near power(1.25V) and pull-u p r es is to r
4 5
3
2
1
R389 56R2J
4 5
R385 56R2J
3
R390 56R2J
2
R387 56R2J
1
DDR Serial/Terminator Resistor
MOLOKAI
M_A2
M_A4
M_A6
M_CAS#
M_RAS#
M_BS1#
M_A12
M_A8
M_A9
M_A11
M_DQS_R[8..0] 10
M_DQS[8..0] 7
M_DATA[71..0] 7
M_DATA_R_[71..0] 10
M_A[12..0] 7,10
M_DM_R_[8..0] 10
M_DM[8..0] 7
12 39 Thursday, April 15, 2004
E
M_AB2 7,10
M_CS3_R# 7,10
M_CKE0_R# 7,10
M_CKE2_R# 7,10
M_CKE1_R# 7,10
M_CKE3_R# 7,10
M_CS0_R# 7,10
M_CS1_R# 7,10
of
SC
Page 13
A
Ferrite bead impedance:
75ohm@100MHz
L18
1 2
R80
75R2F
1 2
1 2
1 2
1 2
R81
75R2F
5 6
MLB-160808-10
L19
MLB-160808-10
L20
MLB-160808-10
14
4
7
DAC_RED 8
DAC_GREEN 8
4 4
DAC_BLUE 8
SB: for SIV pass
3 3
SC15P50V2JN
SC15P50V2JN
C88
SC15P50V2JN
C89
C90
1 2
1 2
1 2
DAC_HSYNC 8
DAC_VSYNC 8
1 2
R79
75R2F
R78
1 2
33R2
R100
1 2
33R2
5V_S0
U25B
TSAHCT125
B
14
1
2 3
TSAHCT125
7
1 2
BC63
SCD1U10V2MX-1
U25A
HSYNC_5
VSYNC_5
CRT_R
CRT_G
CRT_B
3
3
3
D44
BAV99-2
D45
BAV99-2
D46
BAV99-2
5V_S0
2
1
2
1
2
1
C
CRT
L5
1 2
33R2
L6
1 2
33R2
DUMMY-SC3D3P50V
D
5V_S0
CRT_R
CRT_G
CRT_B
JVGA_HS
JVGA_VS
1 2
C116
CLOSE TO CRT CONN
D20
2 1
SSM5817SL
1 2
CRT_VCC_1_S0
R415
3K3R2
DAT_DDC1_5
SC47P50V2JN
1 2
C481
CLK_DDC1_5
SC47P50V2JN
1 2
C482
C117
DUMMY-SC3D3P50V
E
CRT_VCC_S0
F9
1 2
FUSE-1A6V
BC189
R414
3K3R2
1 2
1 2
JVGA_HS
JVGA_VS
Layout Note:
Must be a ground return path for
CRT_R,CRT_G,CRT_B
SCD01U16V2KX
MH1
MH2
17
11
12
13
14
10
15
16
CRT1
6
1
7
2
8
3
9
4
5
FOX-CONN15-2-U
20.20305.015
DDC_CLK & DATE LEVEL SHIFT
2 2
1 2
1 2
R435
2K2R3
DAT_DDC1 8
CLK_DDC1 8
1 1
A
R434
2K2R3
G
Q41 2N7002
2 3
S
1
D
3D3V_S0 3D3V_S0
1 2
R416
10KR2
G
1
Q40 2N7002
2 3
S
D
B
DAT_DDC1_5
CLK_DDC1_5
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
C
D
Date: Sheet
CRT CONN.
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
13 39 Thursday, April 15, 2004
E
SC
of
Page 14
A
LCD CONN
1 1
LCD1
JAE-CON44
20.F0577.044
45
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
46
TXCLK+
TXCLK-
TXOUT2+
TXOUT2-
TXOUT1+
TXOUT1-
TXOUT0+
TXOUT0-
47
MH1
48
49
MH2
50
51
52
53
54
55
2 2
3 3
3D3V_LCD_S0
SC10U10V5ZY
3D3V_S0
DAT_DDC_EDID 8
CLK_DDC_EDID 8
TXCLK+ 8
TXCLK- 8
TXOUT2+ 8
TXOUT2- 8
TXOUT1+ 8
TXOUT1- 8
TXOUT0+ 8
TXOUT0- 8
80211_LED#
C17
B
Layout 40 mil
1 2
1 2
PWR_STBY_LED# 17
BRIGHTNESS 28
R654
100KR2
1 2
C40
SC4D7U35V-U
R668
DUMMY-R2
3D3V_S3
3D3V_S0
LAN_R_ON 19
01/19/2004
01/30/04
C292
C12
SCD1U50V3ZY
SCD1U16V
C2
1 2
KBC_SPKR 25,28
SCD1U16V
C1
1 2
3D3V_S0
U6A
14 7
TSLCX14-U
1 2
C
INVERTER/LED
01/27/2004
PWR_STBY_LED#
BRIGHTNESS
1 2
1 2
FPBACK
SCD1U16V
C290
SCD1U16V
C284 SC1000P50V
C286 SC1000P50V
C294 SC1000P50V
C291 SCD1U16V
1 2
C283 SC1000P50V
C285 SC1000P50V
C287 SC1000P50V
C289 SC1000P50V
31
2
1
4
3
6
5
8
10
12
14
16
18
20
22
24
26
28
30
AMP-CONN30D-1-U
20.D0144.215
LCDVDD_ON 8
7
9
11
13
15
17
19
21
23
25
27
29
32
PWR_STBY_LED#
80211_LED#
FPBACK
BRIGHTNESS
HDD_LED#
CAPS_LED#
NUM_LED#
CHARGE_LED#
INV1
01/28/2004
HDD_LED#
CAPS_LED#
NUM_LED#
CHARGE_LED#
SCROLL_LED#
80211_LED#
5V_S0
3D3V_AUX
C295
SCD1U16V
C293
1 2
SCD1U16V
3D3V_S0
14 7
3 4
1 2
Change Inv1 to 20.D0144.215
2nd source:20.D0070.215
LCDVDD_ON
D
HDD_LED# 26
CAPS_LED# 28
NUM_LED# 28
CHARGE_LED# 35
SCROLL_LED# 28
SC1U10V3ZY
U6B
TSLCX14-U
C19
FPBACK
C18
SC1U10V3KX
D43
1 2
S1N4148-U
R278
1 2
12KR2J
E
3D3V_S0 DCBATOUT
1 2
R297
10KR2
D4
1
6
2
5
RB731U
1 2
1 2
R304
200KR2J
BACKLT_OFF#
3 4
4
NB_BL_ON
U4
SI3445DV-U
S
G
3
COVERUP 28,30
NB_BL_ON 8
BACKLT_OFF# 16
Layout 40 mil
6
D
5
2
1
1
G
3D3V_LCD_S0 3D3V_S0
C3
SCD1U16V
1 2
1 2
R279
1KR2
D
Q35
2N7002
S
2 3
S0/S1 S3 S4 S5
Power On / Battery Low LED
(PWR_LED#)
LOW HIGH HIGH
(STDBY_LED#)
Disk Media
(MEDIA_LED#)
Charging LED
(CHARGE_LED#)
Wireless LED
4 4
(80211_LED#)
NUM Lock
(NUM_LED#)
CAPS Lock
(MEDIA_LED#)
A
HIGH
HIGH HIGH HIGH LOW
B
Functions when LID is closed
readable
(Don't flash during waking) Sleep / Waking LED readable
HDD,ODD access indicator
On when charging.
Flashing when charging error is occured.
On when wireless is On
On when Number key is locked
On when Caps lock is On
not readable
not readable
not readable
not readable
not readable
C
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet
LCD CONN & INVERTER
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
14 39 Thursday, April 15, 2004
E
SC
of
Page 15
A
B
C
D
E
3D3V_S0
4 4
1 2
1 2
BC179
SCD1U16V
3 3
2 2
1 2
R327
0R5J-1
1 2
BC15
SCD1U16V
R16
1 2
0R5J-1
1 2
BC177
DUMMY-SCD1U16V
BC29
1 2
SC22P50V2JN-1
BC10
1 2
SC22P50V2JN-1
BC31
SCD1U16V
TV1D5V_S0 1D5V_S0
SC4D7U10V5ZY
1 2
BC12
DUMMY-SCD1U16V
DUMMY-SCD1U16V
3D3V_S0
BC178
TV_XO
X1
XTAL-14D318M
1 2
82.30005.171
TV_XI
1 2
BC13
1 2
SC: Add
1000p for
EMI
C736
SC1000P50V
R300
0R5J-1
1 2
CH7011 Addresss:
0X75
0X76
1 1
Power up default:
NTSC
PAL
AS pull-up
(int. pull-up)
AS pull-down
GPIO0 pull-down
GPIO0 pull-up (int. pull-up)
A
TV3D3V1_S0
1 2
BC30
SCD1U16V
1 2
BC171
SCD1U16V
TV1D5V_S0
1 2
1 2
BC32
SCD1U16V
TV_HSYNC 8
TV_VSYNC 8
R43 10KR2
1 2
R42 10KR2
1 2
TV_I2C_DATA 8
TV_I2C_CLK 8
TV_CLK 8
TV_CLK# 8
PCIRST#_3 7,17,18,19,20,21,23,27,28
TV_STALL 8
B
BC14
SC4D7U10V5ZY
TV3D3V2_S0
R44
10KR2
TV_VREF
R41
10KR2
TV_ISET
1 2
R302
140R3F
C731
SC1000P50V
BC172
SC4D7U10V5ZY
3
4
5
7
8
10
14
15
57
56
43
42
13
47
46
35
SC: Add
1000p for
EMI
TV3D3V2_S0
VREF
H
V
GPIO[1]
GPIO[0]
AS
SD
SC
XCLK
XCLK#
XO
XI/FIN
RESET#
BCO
P-OUT
ISET
C732
SC1000P50V
C735
SC1000P50V
TV3D3V1_S0 TV3D3VA_S0
12
49
33
18
44
VDD
AVDD
AVDD
DVDD
NC26NC27NC28NC29NC30NC31NC
SC: Add
1000p for
EMI
TV1D5V_S0
1
45
DVDD
DVDD
DVDDV
32
C733
SC1000P50V
25
AGND16AGND
AGND
17
41
3D3V_S0 3,7,8,9,10,13,14,16,17,18,19,20,21,22,24,25,26,27,29,30,31,32,36,38,39
1D5V_S0 7,8,9,16,18,27,38,39
6
DGND
DGND
11
DGND
64
3D3V_S0
R303
1 2
33R5
U14
2
9
NC
NC
NC19NC20NC21NC22NC23NC24NC
63
TV_D0
TV_D1
62
TV_D2
61
TV_D3
60
TV_D4
59
TV_D5
58
55
TV_D6
54
TV_D7
53
TV_D8
52
TV_D9
51
TV_D10
50
TV_D11
TV_CVBS
1 2
36
39
48
38
37
GND
40
CVBS/B
C/HSYNC
GND
34
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[8]
D[9]
D[10]
D[11]
CVBS
C/R
Y/G
CH7011-F
75 Ohm close to chip
3D3V_S0
1D5V_S0
C
DUMMY-R2
R15
1 2
R322
75R2F
1 2
R301
75R2F
1 2
TV_D[0..11] 8
LUMA
BC176
SCD1U16V
CRMA
SC47P50V2JN
1 2
C729
SC47P50V2JN
1 2
C730
Layout
40 mil
BC174
DY-SC22U10V6ZY-U
CRMA 37
SC: Add
47pF for
EMI issue
LUMA 37
D
TV3D3VA_S0
BC175
SC22U10V6ZY-U
Title
Size Document Number Rev
A3
Date: Sheet
BC11
SC1000P50V
SC: Add
1000p for
EMI
TV_ENCODER
MOLOKAI
C734
SC1000P50V
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
15 39 Thursday, April 15, 2004
E
of
SC
Page 16
A
3D3V_S5
1
2
3
4
5 6
3D3V_S0
1
2
3
4 5
3D3V_S0
3D3V_S0
ON OFF
CHKPW
BOOTBLOCK
ENABLE
RP2
SRP10K
RN58
SRN10K-2
R269
1 2
10KR2
R608
1 2
10KR2
R486
1 2
10KR2
SW2
4
HDS402E
SW1-4
8
7
6
1
2 3
ON ENABLE
10
9
8
USB_OC#1
7
USB_OC#5
USB_OC#4
THRM_SDN_EN#
BAY_PWROFF#
CHKPW
BOOTBLOCK#
EN_HP_OUT
ICH_GPIO41
RADIO_ON
CHKPW
BOOTBLOCK#
SW2-3
X
ON X
USBP0 29
USBN0 29
USBP3 26
USBN3 26
USBP4 29
USBN4 29
BAY_PWROFF# 26
BACKLT_OFF# 14
THRM_SDN_EN# 30
CLK48_ICH 3
TP124 TPAD28
TP125 TPAD28
TP126 TPAD28
TP127 TPAD28
TP32
TP31
TPAD28
TPAD28
USB_OC#0 29
USB_OC#4 29
CHARGE_OFF 35
FWH_WP# 27
RADIO_ON 19
Place R220 near S/B
USB_OC#2
USB_OC#0
USB_OC#3
4 4
3 3
ICH4 Integrated Pull-up and Pull-down Resistors
EE_DIN, PWRBTN#
2 2
GNT[B:A]#/GNT[5]#/GPIO[17:16],
LAD[3:0]#/FWH[3:0]#,
LAN_RXD[2:0]
AC_SDOUT,
USB[5:0][P,N] ICH4 internal 15K pull-downs
PDD[7]/SDD[7],
LANCLK
EE_DOUT,
AC_RST#,
AC_SYNC,
PME#,
LDRQ[1:0],
AC_SDIN[2:0], AC_BITCLK,
DPRSLPVR,
PDDREQ / SDDREQ
ICH4 internal 20K pull-ups
ICH4 internal 10K pull-ups
ICH4 internal 20K pull-downs
SPKR
ICH4 internal 11.5K pull-downs
ICH4 internal 100K pull-downs
ICH4 IDE Integrated Series Termination Resistors
PDD[15:0],
1 1
PDIOR#,PDIOW#, PDREQ,SDREQ,
PDDACK#, SDDACK#, PIORDY,SIORDY,
PDA[2:0],
PDCS3#,SDCS3#, IRQ14,IRQ15,
SDD[15:0],PDIOW#,SDIOW#,
approximately 33 ohm
SDA[2:0], PDCS1#,SDCS1#,
A
B
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP5
USBN5
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
EN_HP_OUT
BAY_PWROFF#
PLANARID0
PLANARID1
ICH_GPIO41
CHKPW
BOOTBLOCK#
CLK48_ICH
1 2
R489
18D2R3F
3D3V_S0
B
U49A
C20
D20
A21
B21
C18
D18
A19
B19
C16
D16
A17
B17
B15
C14
A15
B14
A14
D14
J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23
F19
B23
A23
ICH4-M-U
R507 4K7R2
1 2
1 2
R523 4K7R2
PIDE_IORDY 26
3D3V_S0
3D3V_S0
USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
CLK48
USBRBIAS#
USBRBIAS
PIDE_D[0..15] 26
PIDE_A[0..2] 26
SIDE_D[0..15] 26
SIDE_A[0..2] 26
3D3V_S0
USB_I/F
GPIO
SIDE_DACK#
PIDE_DACK#
PIDE_IOW# 26
PIDE_DACK# 26
PIDE_DREQ 26
PIDE_IOR# 26
R527
1 2
4K7R2
PIDE_CS1# 26
PIDE_CS3# 26
1 2
1 2
1 2
1 2
C
L19
HL_0
HI0
L20
HL_1
HI1
M19
HL_2
HI2
HL_3
HUBLINK
HUBLINK
HUBLINK
HI_STB/HI_STBS
HI_STB#/HI_STBF
HI_VSWING
LAN I/F
LAN_RSTSYNC
EEPROM
I/F
AC'97
I/F
AC_SDOUT
AC_BIT_CLK
R592 4K7R2
R593 4K7R2
R594 4K7R2
R595 4K7R2
M21
HI3
P19
HL_4
HI4
R19
HL_5
HI5
T20
HL_6
HI6
R20
HL_7
HI7
HL_8
P23
HI8
L22
HI9
N22
HI10
K21
HI11
P21
N20
R23
HICOMP
R22
M23
HIREF
T21
CLK66
A10
LAN_RXD0
A9
LAN_RXD1
A11
LAN_RXD2
B10
LAN_TXD0
C10
LAN_TXD1
A12
LAN_TXD2
B11
C11
LAN_CLK
D11
EE_DIN
D10
EE_CS
C12
EE_SHCLK
A8
EE_DOUT
AC_SYNC
AC_RST#
AC_SDIN0
AC_SDIN1
AC_SDIN2
PIDE_D15
PIDE_D14
PIDE_D13
PIDE_D12
PIDE_D11
PIDE_D10
PIDE_D9
PIDE_D8
PIDE_D7
PIDE_D6
PIDE_D5
PIDE_D4
PIDE_D3
PIDE_D2
PIDE_D1
PIDE_D0
PIDE_A0
PIDE_A1 SIDE_A1
PIDE_A2
PIDE_IOW#
PIDE_IOR#
SIDE_IOW#
SIDE_IOR#
ICH_AC_SYNC
C9
D9
ICH_AC_DOUT
B8
C13
D13
A13
B13
ICH_AC_DIN2
C419
DUMMY-C2
1 2
Y11
W11
W10
AB10
W9
AC9
Y9
AB9
AA8
Y8
AB8
AA7
AA10
Y10
AC11
AB11
W12
Y12
AA11
AC12
AB12
AA13
AB13
W13
Y13
AB14
HL_9
HL_10
HL_11
1 2
HUB_VSWING
HUB_VREF
LAN_RSTSYNC
AC_RST#
U49E
PDD15
PDD14
PDD13
PDD12
PDD11
PDD10
PDD9
PDD8
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PDIOW#
PDDACK#
PDDREQ
PDIOR#
PIORDY
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
ICH4-M-U
3D3V_S0
C
1 2
R492
56R2J
HL_[10..0] 7
HL_STB 7
HL_STB# 7
AC_SDATA_IN0 24
AC_DIN1 29
TP111
TPAD28
R516
DUMMY-R2
SDD15
SDD14
SDD13
SDD12
SDD11
SDD10
SDD9
SDD8
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
SDIOW#
SDDACK#
SDDREQ
SDIOR#
SIORDY
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
IRQ14
IRQ15
RN59
2
1 4
SRN8K2J
Banias/Montara-GM
Checklist Ver.2.0
48.7 ohm 1% pull
up to 1D5V_S0
48D7R3F
CLOSE TO PIN with in 0.5"
10 mil trace,20 mil space
TP38
TP37
TPAD28
TP39
TPAD28
TP36
TPAD28
TP113
TPAD28
TP41
TPAD28
TP35
TPAD28
TP112
TPAD28
TPAD28
TP115
TP116
TPAD28
TP114
TPAD28
TP40
TPAD28
TPAD28
ICH_AC_BITCLK 24
SIDE_D15
Y17
AA17
SIDE_D14
Y16
SIDE_D13
AB16
SIDE_D12
SIDE_D11
Y15
SIDE_D10
AA15
SIDE_D9
AC15
SIDE_D8
Y14
SIDE_D7
AA14
SIDE_D6
W14
SIDE_D5
AB15
SIDE_D4
W15
SIDE_D3
AC16
SIDE_D2
W16
SIDE_D1
AB17
SIDE_D0
W17
AA18
AB19
AB18
Y18
AC19
SIDE_A0
AA20
AC20
AC21
SIDE_A2
AB21
AC22
AC13
AA19
PIDE_IRQ14
3
SIDE_IRQ15
D
HUB INTERFACE LAYOUT
Route signals with 20 mil space routing. to
others group traces
Signals must match +/- 0.1" of HUB_STB/STB#
signals.
Banias/Odem RDDP
P.120
When board
impedance is 55
1D5V_S0
R197
1 2
1 2
R493
10R2
1 2
BC236
SC10P50V2JN-1
R515 33R2
1 2
R514 33R2
1 2
R521 33R2
1 2
R520 33R2
1 2
R518 0R2-0
1 2
R519 0R2-0
1 2
Place these resistor near
S/B as possible
+/-15% Ohm
36.5 ohm to GND
CLK66_ICH 3
SB: Change
R514 and R521
from 0 ohm to
33R2 for solve
under voltage
MDC_AC_SYNC 29
AC_SYNC 24
AC_SDATA_DOUT 24
MDC_AC_DOUT 29
CODEC_AC_RST# 24
MDC_AC_RST# 29
RESERVED FOR VERSION DETECTION
1 2
R503
10KR2
PLANARID0
PLANARID1
1 2
R504
DUMMY-10KR2
SIDE_IOW# 26
SIDE_DACK# 26
SIDE_DREQ 26
SIDE_IOR# 26
SIDE_IORDY 26
R219
1 2
SIDE_CS1# 26
SIDE_CS3# 26
PIDE_IRQ14 26
SIDE_IRQ15 26
4K7R2
3D3V_S0
Title
Size Document Number Rev
Date: Sheet
D
E
1D5V_S0
1 2
R195
SCD1U10V2MX-1
SCD1U10V2MX-1
3D3V_S0
1 2
R488
DUMMY-10KR2
1 2
BC132
1 2
C399
226R3F
1 2
R196
147R3F
1 2
R194
113R3F
AC_SDATA_DOUT
Planar ID(1,0)
SA: 0, 0
Close to pin
HUB_VSWING
BC133
SCD01U16V2KX
HUB_VREF
C400
SCD01U16V2KX
R517
1 2
DUMMY-1KR3
3D3V_S0
SB: 0, 1
SC: 1, 0
-1: 1, 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R487
10KR2
1 2
ICH4-M (1 of 3)
A3
MOLOKAI
16 39 Thursday, April 15, 2004
E
SC
of
Page 17
A
PCI/Interrupt I/F Pullups
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_SERR#
4 4
PCI_REQA#
PIRQF#
PIRQC#
PIRQD#
PCIRST#_3
PIRQG#
PCI_SERIRQ
PIRQB#
3D3V_S0
3 3
3D3V_S5
3D3V_S0
TP117
TPAD28
TP118
2 2
1 1
TPAD28
3D3V_S0
8
7
6
3D3V_S0
8
7
6
3D3V_S0
8
7
6
1 2
1 2
RN68
SRN10KJ
RN69
SRN10KJ
PCI_GNTA#
PCI_GNTB#
RN66
1
2
3
4 5
SRN8K2-U
1
2
3
4 5
1
2
3
4 5
1 4
2
1 4
2
A
RN65
1
2
3
4 5
SRN8K2-U
RN62
1
2
3
4 5
SRN8K2-U
RN64
1
2
3
4 5
SRN8K2-U
R539 8K2R2
R540 8K2R2
3
3
1 2
DUMMY-10KR2
R494 100KR2
1 2
R526 100KR2
1 2
8
7
6
RN63
SRN8K2-U
RN60
SRN8K2-U
ICH_GPIO5
PM_THRM#
BATLOW#
SYS_RESET#
PCI_CLKRUN#
AGPBUSY#
MUTE
VGATE
RSMRST#
PCI_PLOCK#
PCI_DEVSEL#
PCI_PERR#
PCI_IRDY#
PIRQA#
8
PCI_REQ#0
7
PCI_REQ#1
6
PCI_REQ#2
PIRQE#
8
7
PCI_REQB#
6
PCI_REQ#3
PCI_REQ#4
ICH_PME#
Internal
Pull-up
TP92
VCC_IO_S0
VCC_RTC_S5
1 2
R525
100KR2
TPAD28
CC_CPUSLP# 5
CC_FERR# 5
Should go high no sooner than 10mS
after both +3VRUN and +1.5VRUN
have reach their nominal voltage
Should go high no sooner than 10mS
after both +3VSUS and +1.5VSUS
have reach their nominal voltage
ICH_PME# 19,21,23
CLKPCIF_ICH 3
DPRSLPVR 32
CC_DPSLP# 5,7
1 2
R496
56R2J
R495
1 2
56R2J
LPC_LAD[3..0] 27,28
S5
OK
B
TP110 TPAD28
TP109 TPAD28
SC10P50V2JN-1
CC_STPCLK# 5
CC_A20M# 5
CC_CPUPWRGD 5,7
CC_IGNNE# 5
ICH_A20GATE 28
PCI_SERIRQ 19,21,28
LPC_LFRAME# 27,28
PM_SUS_CLK 8,30
G768D_PWROK 25,30
RSMRST# 30
VCC_RTC_S5
B
PIRQB# 21
PIRQC# 21
PIRQD# 23
PIRQE# 19
PIRQF# 21
PIRQG# 19
PCI_REQ#4 23
PCI_REQ#1 21
PCI_REQ#0 19
PCI_GNT#4 23
PCI_GNT#1 21
PCI_GNT#0 19
PCI_FRAME# 19,21,23
PCI_IRDY# 19,21,23
PCI_TRDY# 19,21,23
PCI_DEVSEL# 19,21,23
PCI_STOP# 19,21,23
PCI_PAR 19,21,23
PCI_PERR# 19,21,23
PCI_PLOCK# 21
PCI_SERR# 19,21,23
PCIRST#_3 7,15,18,19,20,21,23,27,28
1 2
R522
10R2
1 2
BC264
R506 10KR2
1 2
CC_INTR 5
CC_NMI 5
CC_SMI# 5
RCIN# 28
CC_INIT# 5,27
LPC_LDRQ0#
TP121 TPAD28
LPC_LDRQ1#
TP120 TPAD28
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
RTCRST#
ICH_VBIAS
RTCX2
CC_DPSLP#
If ICH-4 LAN not used,10K ohm
PD
or connect directly to
----RSMRST#(SUSPWROK)
But in Bon conncet to
PWROK(DELAY_IMVP_PWRGD)
PIRQA#
ICH_GPIO5
PCI_REQ#3
PCI_REQ#2
PCI_REQB#
PCI_REQA#
PCI_GNT#3
PCI_GNT#2
PCI_GNTB#
PCI_GNTA#
PCI_PLOCK#
ICH_PME#
CLKPCIF_ICH
RTCX1
C
PCI_AD[31..0] 19,21,23
THRMTRIP#
PCI_C/BE#[3..0] 19,21,23
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE3#
C/BE2#
C/BE1#
C/BE0#
AGPBUSY#/GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
STP_PCI#/GPIO18
SLP_S1#/GPIO19
STP_CPU#/GPIO20
C3_STAT#/GPIO21
CPUPERF#/GPIO22
SSMUXSEL/GPIO23
CLKRUN#/GPIO24
GPIO25
GPIO27
GPIO28
SLP_S3#
SLP_S4#
SLP_S5#
PWRBTN#
SYS_RESET#
LAN_RST#
BATLOW#/TP0
SUS_STAT#/LPCPD#
VGATE/VRMPWRGD
THRMTRIP#
THRM#
SMLINK0
SMLINK1
SMBDATA
SMBCLK
SMBALERT#/GPIO11
CLK14
VCC_IO_S0
R498
1 2
56R2J
1 2
C
U49D
D5
PIRQA#
C2
PIRQB#
B4
PIRQC#
A3
PIRQD#
C8
PIRQE#/GPIO2
D7
PIRQF#/GPIO3
C3
PIRQG#/GPIO4
C4
PIRQH#/GPIO5
B6
REQ4#
C7
REQ3#
B3
REQ2#
A2
REQ1#
B1
REQ0#
A6
REQB#/REQ5#/GPIO1
B5
REQA#/GPIO0
D6
GNT4#
B7
GNT3#
A7
GNT2#
E6
GNT1#
C1
GNT0#
C5
GNTB#/GNT5#/GPIO17
E8
GNTA#/GPIO16
F1
FRAME#
L5
IRDY#
F2
TRDY#
M3
DEVSEL#
F3
STOP#
G1
PAR
L4
PERR#
M2
PLOCK#
K5
SERR#
W2
PME#
U5
PCIRST#
P5
PCICLK
ICH4-M-U
BIOS NOTE:
BIOS should disable PM_STPCPU# on CK_Titan.
(Use H_DPSLP# instead)
U49B
J19
APICCLK
H19
APICD0
K20
APICD1
V23
STPCLK#
AB23
A20M#
U21
CPUSLP#
Y23
CPUPWRGD
AB22
INTR
V21
NMI
W23
SMI#
W21
IGNEE#
Y22
A20GATE
U22
RCIN#
AA21
FERR#
V22
INIT#
J22
SERIRQ
T5
LFRAME#/FWH4
U3
LDRQ0#
U4
LDRQ1#
T2
LAD0/FWH0
R4
LAD1/FWH1
T4
LAD2/FWH2
U2
LAD3/FWH3
AA4
SUSCLK
W6
INTRUDER#
W7
RTCRST#
AB6
PWROK
AA6
RSMRST#
AB5
VCCRTC
Y6
VBIAS
AC7
RTCX1
AC6
RTCX2
V20
DPRSLPVR
U23
DPSLP#
ICH4-M-U
P4
PCI_AD31
D2
PCI_AD30
R1
PCI_AD29
PCI_AD28
D3
P2
PCI_AD27
E1
PCI_AD26
P1
PCI_AD25
E2
PCI_AD24
PCI_AD23
M5
E4
PCI_AD22
N3
PCI_AD21
E3
PCI_AD20
N2
PCI_AD19
PCI_AD18
E5
N1
PCI_AD17
F4
PCI_AD16
F5
PCI_AD15
L3
PCI_AD14
PCI_AD13
H2
L2
PCI_AD12
G4
PCI_AD11
L1
PCI_AD10
G2
PCI_AD9
PCI_AD8
K2
J5
PCI_AD7
H4
PCI_AD6
J4
PCI_AD5
G5
PCI_AD4
PCI_AD3
K1
H3
PCI_AD2
J3
PCI_AD1
H5
PCI_AD0
PCI_C/BE#3
N4
M4
PCI_C/BE#2
K4
PCI_C/BE#1
J2
PCI_C/BE#0
R2
R3
V4
V5
W3
Y21
W18
W19
T3
Y20
J21
AC2
V2
W1
W4
PWR_LED#
Y4
Y2
PM_SLP_S5#
AA2
ICH_RI#
Y1
RI#
AA1
Y3
Y5
AB2
AB3
V19
W20
V1
AC3
AB1
AB4
AC4
AA5
H23
SPKR
J23
CLK termination
close to ICH4
R497
56R2J
PM_THERMTRIP# 5
BAY_PWROK#
PM_SLP_S1#_G
PM_C3_STAT#
PM_CPUPERF#
ICH_GMUXSEL#
PCI_CLKRUN#
EXT_POR_L
R673 0R2-0
R543 10KR2
SYS_RESET#
BATLOW#
PM_SUS_STAT#
THRMTRIP#
PM_THRM#
SMB_ALERT#
SB_SPKR
CLK14_ICH
AGPBUSY# 7
ECSMI 28
ECSWI 28
ECSCI 28
PM_STPPCI# 3
PM_STPCPU# 3,32
TP119
TP93
TP91
1 2
1 2
SB_PWRBTN# 31
PM_SUS_STAT# 28
VGATE 32
PM_THRM# 8,30
SMBD_SB
SMBC_SB
SB_SPKR 25
CLK14_ICH 3
1 2
R491
DUMMY-33R2
1 2
BC233
DUMMY-SC10P50V2JN-1
D
LAYOUT:
MAKE PAD
ACCESSABLE
RTCRST#
ICH_VBIAS
RTCX1
RTCX2
3D3V_S5
1 2
R541
10KR2
TPAD28
TPAD28
TPAD28
PCI_CLKRUN# 19,21,23
EXT_POR_L 23
MUTE 25
01/30/04
PWR_STBY_LED# 14
PM_SLP_S3# 24,30,33,34,36
PM_SLP_S4# 28,31,34,35,36
TP122
TPAD28
3D3V_S5
R542
1 2
10KR2
SMB_ALERT#
1 2
H/W Strapping
SB_SPKR
Stuff for No Reboot
1 2
DUMMY-1KR2
D
RTCRST#
2 1
GP1
GAP-OPEN
ICH_VBIAS
1 2
1 2
BAY_PWROK# 26
PM_SLP_S1#_G
PM_SLP_S3#
SMBC_SB
R524
10KR2
3D3V_S0
R490
E
RTC Circuitry
VCC_RTC_S5
1 2
R233
10MR2J
R234
10MR2J
SMBD_SB
3D3V_S5
1 2
3D3V_AUX
1 2
BC155
SC1U10V3KX
R199
1 2
180KR2
BC136
SCD1U10V2MX-1
RTCRST# delay
18~25ms
1 2
SC12P50V2JN-1
3 2
X4
X-32D768KHZ-12-U
1 4
BC154
1 2
SC12P50V2JN-1
R165
1 2
0R2-0
U41
1
A
2
B
GND3Y
DUMMY-NC7SZ08-U
3D3V_S5
3
RN61
SRN4D7KJ
2
1 4
Title
Size Document Number Rev
Custom
Date: Sheet
3D3V_RTC
D25
RB751V-40-U
D26
1 2
RB751V-40-U
SCD047U25V3KX
BC156
PM_SLP_S1#
5
VCC
4
5V_S0 3D3V_S0
1 2
R528
0R2-0
1
Q49
2N7002
D
ICH4-M (2 of 3)
MOLOKAI
1 2
BC53
SC1U10V3KX
R68
1 2
1KR2
BC146
3D3V_S5
3
2
1 4
G
2 3
1
G
S
Q48
2 3
2N7002
S
D
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
E
RTC1
5
RTBAT
1
2
3
4
SCON3
21.D0010.103
PM_SLP_S1# 3
BC134
DUMMY-SCD1U16V3KX
RN27
SRN10KJ
SMBC_ICH 3,10
SMBD_ICH 3,10
of
17 39 Thursday, April 15, 2004
SC
Page 18
A
4 4
3 3
2 2
5V_S0
14
10
1 1
PCIRST#_3
9 8
TSAHCT125
7
U25C
1 2
R392
1 2
33R2
C405
SCD1U10V2MX-1
1 2
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail
RSTDRV#_5 26 PCIRST#_3 ,23,27,28
PCIRST#_3 3V to 5V level shift for HDD & CDROM
A
C401
SCD1U10V2MX-1
B
B
1 2
C420
SCD1U10V2MX-1
3D3V_S0
1 2
D41
RB751V-40-U
1 2
BC266
SCD1U10V2MX-1
3D3V_S5
1 2
D29
RB751V-40-U
1 2
BC244
SCD1U10V2MX-1
1 2
BC261
SCD1U10V2MX-1
5V_S0
1 2
1 2
R512
1KR2
BC253
SC1U10V3ZY
5V_S5
1 2
R513
1KR2
BC241
SC1U10V3ZY
1 2
BC269
SCD1U10V2MX-1
1 2
BC260
SCD1U10V2MX-1
D40
RB751V-40-U
C
1 2
BC265
SCD1U10V2MX-1
1 2
BC255
SCD1U10V2MX-1
1 2
C406
SCD1U10V2MX-1
1D5V_S5
C
1 2
1 2
1 2
C398
SCD1U10V2MX-1
1 2
BC243
SCD1U10V2MX-1
VCC_IO_S0
1 2
BC251
SCD1U10V2MX-1
1D5V_S0
1 2
BC235
SCD1U10V2MX-1
1 2
BC252
SCD1U10V2MX-1
1 2
BC270
SCD1U10V2MX-1
BC254
SCD1U10V2MX-1
C408
SCD1U10V2MX-1
1 2
BC250
SCD1U10V2MX-1
1 2
BC268
SCD1U10V2MX-1
1 2
BC247
SCD1U10V2MX-1
1 2
BC259
SCD1U10V2MX-1
C404
SC4D7U10V5ZY
1 2
BC267
SCD1U10V2MX-1
1 2
C407
SCD1U10V2MX-1
1 2
1 2
BC249
SCD1U10V2MX-1
BC234
SC1U10V3ZY
1 2
BC245
SCD1U10V2MX-1
1D5V_S0
1 2
BC248
SCD1U10V2MX-1
BC257
SCD1U10V2MX-1
BC135
SC1U10V3ZY
BC147
SC4D7U10V5ZY
1 2
BC263
SCD1U10V2MX-1
3D3V_S5
1 2
BC262
SC4D7U10V5ZY
1D5V_S0
BC122
SC4D7U10V5ZY
1 2
BC256
SCD1U10V2MX-1
V5REF_RUN
V5REF_SUS
D
3D3V_S0
BC168
SC4D7U10V5ZY
BC246
SCD1U10V2MX-1
3D3V_S5
BC258
SC4D7U10V5ZY
BC130
SC4D7U10V5ZY
D
E
U49C
A5
VCC3_3
B2
VCC3_3
H6
VCC3_3
J1
VCC3_3
K6
VCC3_3
M10
VCC3_3
P6
VCC3_3
U1
528mA
VCC3_3
P12
VCC3_3
V10
VCC3_3
V16
VCC3_3
V18
VCC3_3
AC8
VCC3_3
AC17
VCC3_3
H18
VCC3_3
J18
VCC3_3
E9
VCCLAN3_3/VCCSUS3_3
F9
VCCLAN3_3/VCCSUS3_3
E11
VCCSUS3_3
F10
VCCSUS3_3
V9
VCCSUS3_3
V8
VCCSUS3_3
V7
VCCSUS3_3
F15
VCCSUS3_3
F16
VCCSUS3_3
F17
VCCSUS3_3
F18
VCCSUS3_3
K14
VCCSUS3_3
K10
VCC1_5
K12
VCC1_5
K18
VCC1_5
K22
VCC1_5
P10
T18
V14
U19
L23
M14
P18
T22
E12
G18
E13
F14
E20
E15
P14
U18
AA23
C22
C23
C21
C19
C17
C15
D22
B20
B18
B16
B12
A22
A20
A18
A16
Title
Size Document Number Rev
Date: Sheet
550mA
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCCHI
VCCHI
99mA
VCCHI
VCCHI
F6
VCCLAN1_5/VCCSUS1_5
F7
VCCLAN1_5/VCCSUS1_5
VCCSUS1_5
R6
VCCSUS1_5
T6
VCCSUS1_5
U6
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
E7
V5REF
V6
V5REF
V5REF_SUS
V_CPU_IO
V_CPU_IO
V_CPU_IO
VCCPLL
D1
VSS
VSS
VSS
VSS
VSS
VSS
C6
VSS
VSS
VSS
VSS
VSS
VSS
B9
VSS
VSS
VSS
VSS
VSS
A4
VSS
A1
VSS
ICH4-M-U
A3
9.2mA
165mA
15.5mA
67.5mA
2.5mA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH4-M (3 of 3)
MOLOKAI
B22
VSS
AC23
VSS
AC18
VSS
AC14
VSS
AC10
VSS
AC5
VSS
AC1
VSS
AB20
VSS
AB7
VSS
AA22
VSS
AA16
VSS
AA12
VSS
AA9
VSS
AA3
VSS
Y19
VSS
Y7
VSS
W22
VSS
W8
VSS
W5
VSS
M20
VSS
V17
VSS
V15
VSS
V3
VSS
T23
VSS
P20
VSS
T19
VSS
T1
VSS
R21
VSS
R18
VSS
R5
VSS
P22
VSS
P13
VSS
P11
VSS
P3
VSS
N23
VSS
N21
VSS
N19
VSS
N14
VSS
N13
VSS
N12
VSS
N11
VSS
N10
VSS
N5
VSS
M13
VSS
M12
VSS
M11
VSS
M1
VSS
M22
VSS
L21
VSS
L14
VSS
L13
VSS
L12
VSS
L11
VSS
L10
VSS
K23
VSS
U20
VSS
K19
VSS
K13
VSS
K11
VSS
K3
VSS
J6
VSS
H1
VSS
G21
VSS
G19
VSS
G6
VSS
G3
VSS
F8
VSS
E22
VSS
E21
VSS
E19
VSS
E18
VSS
E17
VSS
E16
VSS
E14
VSS
E10
VSS
D23
VSS
D21
VSS
D19
VSS
D17
VSS
D15
VSS
D12
VSS
D8
VSS
D4
VSS
18 39 Thursday, April 15, 2004
E
of
SC
Page 19
A
B
C
D
E
Mini PCI
1 1
RADIO_ON 16
3D3V_S0
2 2
3 3
PCLK_MINI 3
1 2
DUMMY-SC10P50V2JN-1
C240
1 2
SB: for SIV pass
R245
DUMMY-10R2
PIRQG# 17
PCI_REQ#0 17
PCI_C/BE#3 17,21,23
PCI_C/BE#2 17,21,23
PCI_IRDY# 17,21,23
PCI_CLKRUN# 17,21,23
PCI_SERR# 17,21,23
PCI_PERR# 17,21,23
PCI_C/BE#1 17,21,23
5V_S0
802.11B/G
RADIO_ON
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25
PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1
5V_S0
BC165
DUMMY-SC4D7U10V5ZY
CN13
125 126
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
PIN 3-16 : LAN RESERVE
LED_WLAN24_ON
LED_WLAN5_ON
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
MOD_IDSEL
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_C/BE#0
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
(VCC)
(M66EN)
PIRQE# 17
PCIRST#_3 7,15,17,18,20,21,23,27,28
PCI_GNT#0 17
R232
1 2
10R2
DUMMY-SC4D7U10V5ZY
U87
1
A
2
B
GND3Y
NC7SZ32-U
ICH_PME#
PCI_AD17
PCI_PAR 17,21,23
PCI_FRAME# 17,21,23
PCI_TRDY# 17,21,23
PCI_STOP# 17,21,23
PCI_DEVSEL# 17,21,23
PCI_C/BE#0 17,21,23
PCI_SERIRQ 17,21,28
PCI_AD[0..31] 17,21,23
5
VCC
4
3D3V_S0
3D3V_S0
01/19/2004
3D3V_S0
ICH_PME# 17,21,23
BC138
1 2
BC153
SCD1U16V
LAN_R_ON 14
1 2
BC166
SCD1U16V
LED_WLAN24_ON
LED_WLAN5_ON
1 2
BC137
SCD1U16V
RN73
2
1 4
SRN100KJ
01/27/2004
1 2
3
BC159
SCD1U16V
1 2
BC226
SCD1U16V
1 2
BC164
SCD1U16V
MODEM124P-1
4 4
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
A
B
C
D
Date: Sheet
Mini PCI Socket
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
19 39 Thursday, April 15, 2004
E
SC
of
Page 20
5V_S0
PCMCIA socket
CN5
69
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
70
A_CAD0
A_CCD1#_C
A_CAD1
A_CAD2
A_CAD3
A_CAD4
A_CAD5
A_CAD6
A_CAD7
A_CC/BE#0
A_CAD8
A_CAD9
A_CAD10
A_CAD11
A_CAD12
A_CAD13
A_CAD14
A_CAD15
A_CC/BE#1
A_CAD16
A_CC/BE#2
A_CAD17
A_CAD18
A_CAD19
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CC/BE#3
A_CAD25
A_CAD26
A_CAD27
A_CAD28
A_CAD29
A_CAD30
A_CAD31
A_CCD2#_C
A_RSVD_D14 21
A_CVS1 21
A_CPAR 21
A_RSVD_A18 21
A_CPERR# 21
A_CBLOCK# 21
A_CGNT# 21
A_CSTOP# 21
A_CINT# 21
A_CDEVSEL# 21
A_CCLK 21
A_CTRDY# 21
A_CIRDY# 21
A_CFRAME# 21
A_CVS2 21
A_CRST# 21
A_CSERR# 21
A_CREQ# 21
A_CAUDIO 21
A_CSTSCHG 21
A_RSVD_D2 21
A_CCLKRUN# 21
A_CC/BE#[3..0] 21
A_CAD[31..0] 21 CB_LATCH 21
3D3V_S0
1 2
C418
SCD1U16V
C205
SCD1U16V
BC119
SC22U10V6ZY-U
A_SKT_VCC_S0
A_SKT_VPP_S0
SKT1
1 2
3 4
CARDBUS-SKT45
21.H0080.001
C196
SCD1U16V
CB_CLOCK 21
3D3V_S0
1 2
1 2
CB_DATA 21
PCIRST#_3 7,15,17,18,19,21,23,27,28
BC120
SC4D7U10V5ZY
1 2
C197
SCD1U16V
BC240
SC1000P50V
BC125
SC4D7U10V5ZY
1 2
R152 10KR2
A_SKT_VPP_S0
Proto1:
change to
1 2
0402 size
R153
100KR2
U39
3
DATA
4
CLOCK
5
LATCH
12
RESET#
21
SHDN#
13
3.3V
1
5V
2
5V
7
12V
20
12V
11
GND
25
GND
TSP2220A
3D3V_S0
A_SKT_VCC_S0
1 2
C417
SCD1U16V
10KR2
R178
1 2
1 2
R179 10KR2
AVCC
AVCC
AVPP
OC#
NC
NC
NC
NC
NC
NC
NC
NC
NC
CB_DATA
CB_LATCH
9
10
8
15
24
23
22
19
18
17
16
14
6
A_SKT_VCC_S0
A_SKT_VPP_S0
5V_S0 13,14,17,18,19,24,26,28,30,32,34,36,38,39
3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,21,22,24,25,26,27,29,30,31,32,36,38,39
A_SKT_VCC_S0 21
5V_S0
3D3V_S0
A_SKT_VCC_S0
CARDBUS68P-9
62.10024.491
A_CCD1#_C
A_CCD2#_C
R485
1 2
22R2
R566
1 2
22R2
1 2
C396
SC220P50V2JN
1 2
C442
SC220P50V2JN
A_CCD1# 21
A_CCD2# 21
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
CARDBUS CONN / PWR SW
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
20 39 Wednesday, April 14, 2004
SC
of
Page 21
A
3D3V_S0
1 2
C425
SCD1U16V
4 4
3 3
PCI_AD20
2 2
1 1
PCI_AD[31..0] 17,19,23
PCI_C/BE#[3..0] 17,19,23
PCI_PAR 17,19,23
PCI_FRAME# 17,19,23
PCI_TRDY# 17,19,23
PCI_IRDY# 17,19,23
PCI_STOP# 17,19,23
PCI_DEVSEL# 17,19,23
PCI_PERR# 17,19,23
PCI_SERR# 17,19,23
PCI_REQ#1 17
PCI_GNT#1 17
PCLK_CBUS 3
PCIRST#_3 7,15,17,18,19,20,23,27,28
ICH_PME# 17,19,23
3D3V_S0
G7
G8
G11
G12
G13
H10
H12
J8
K8
K12
M7
M11
M13
N8
U9
M10
M9
M8
L12
L11
L10
L9
L8
K11
K10
K9
J12
J11
J10
J9
H11
H9
H8
A
R532
1 2
10R2
U48A
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PCI7420GHK-U
C254
SC1U10V3ZY
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
PCI7620_IDSEL
VR_PORT
VR_PORT
VR_EN#
U48B
V1
VCCP
W8
VCCP
T2
AD31
P5
AD30
U1
AD29
U2
AD28
T3
AD27
P6
AD26
V2
AD25
U3
AD24
W3
AD23
U4
AD22
R6
AD21
V4
AD20
W4
AD19
U5
AD18
N7
AD17
V5
AD16
W7
AD15
U8
AD14
V8
AD13
N10
AD12
R9
AD11
V9
AD10
W9
AD9
V10
AD8
W10
AD7
R10
AD6
W11
AD5
V11
AD4
PCI BUS
U11
AD3
N11
AD2
R11
AD1
W12
AD0
W2
C/BE3#
R7
C/BE2#
P9
C/BE1#
U10
C/BE0#
N9
PAR
W5
FRAME#
V6
TRDY#
U6
IRDY#
W6
STOP#
R8
DEVSEL#
V3
IDSEL
U7
PERR#
V7
SERR#
T1
REQ#
R2
GNT#
R1
PCLK
P3
PRST#
N5
GRST#
R3
RI_OUT#/PME#
1 2
PCI7420GHK-U
R247
10R2
02/09/2004Change to 71.07420.00U
SC10P50V2JN-1
C241
1 2
1.8V Output from internal voltage regulator
K5
J19
L1
R244
0R2-0
1 2
Internal voltage regulator enable
SUSPEND#
DATA
CLOCK
LATCH
SPKROUT
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
CLK_48
C233
SC1U10V3ZY
B
B
P2
M1
L5
M2
L7
M3
L6
N1
N2
N3
M5
P1
L2
A_CREQ#
3D3V_S0
1 2
R248
4K7R2
R508 47KR2
1 2
R533 43KR3
1 2
CB_MFUNC5
R231
DUMMY-R2
1 2
C230
DUMMY-C2
1 2
02/09/2004
A_SKT_VCC_S0
C229
SC1U10V3ZY
CB_DATA 20
CB_CLOCK 20
CB_LATCH 20
CB_SPKR 25
PIRQB# 17
PIRQC# 17
PIRQF# 17
PCI_SERIRQ 17,19,28
PCI_PLOCK# 17
PCI_CLKRUN# 17,19,23
R246 10KR2
1 2
1 2
R510
DUMMY-10KR2
C
U48D
B_CAD31/B_D10
B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6
B_CAD19/B_A25
B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17
B_CAD15/B_IOWR#
B_CAD14/B_A9
B_CAD13/B_IORD#
B_CAD12/B_A11
3D3V_S0
CardBus
B
CLK48_DOT 3
B_CSTSCHG/B_BVD1(STSCHG#/R1#)
PCI7420GHK-U
U48E
K7
SCL
L3
SDA
PCI7420GHK-U
DON'T SUPPORT ROM FUNCTION PULL DOWN 220OHM
B_CAD11/B_OE#
B_CAD10/B_CE2#
B_CAD9/B_A10
B_CAD8/B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4
B_CAD0/B_D3
B_CC/BE3#/B_REG#
B_CC/BE2#/B_A12
B_CC/BE1#/B_A8
B_CC/BE0#/B_CE1#
B_CPAR/B_A13
B_CFRAME#/B_A23
B_CTRDY#/B_A22
B_CIRDY#/B_A15
B_CSTOP#/B_A20
B_SDEVSL#/B_A21
B_CBLOCK#/B_A19
B_CPERR#/B_A14
B_CSERR#/B_WAIT#
B_CREQ#/B_INPACK#
B_CGNT#/B_WE#
B_CCLKRUN#(B_WP/IOIS16#)
1 2
1 2
B_CCLK/B_A16
B_CINT#/B_READY/(IREQ#)
B_CRST#/B_RESET
B_CAUDIO/B_BVD2/(SPKR#)
B_CCD1#/B_CD1#
B_CCD2#/B_CD2#
B_CVS1/B_VS1#
B_CVS2/B_VS2#
B_RSVD/B_D14
B_RSVD/B_D2
B_RSVD/B_A18
R509
220R2J
R243
220R2J
C
VCCB
VCCB
3D3V_S0
DUMMY-SC4D7U10V5ZY
C244
D19
K19
E13
A16
E14
B16
A17
F14
D17
C19
F15
E18
G15
F17
H14
F19
H15
K18
K13
K14
L17
L18
L19
L15
M18
M19
L13
N17
N18
M14
M15
P18
P19
P17
D18
G17
K17
M17
J18
G18
H13
G19
J15
H18
J17
J13
B18
E17
H19
A18
B17
H17
B19
E19
C17
N15
C16
C18
F18
N19
C15
K15
M12
N13
R14
U16
P14
P15
B_CAD31
B_CAD30
B_CAD29
B_CAD28
B_CAD26
B_CAD25
B_CAD23
B_CAD22
B_CAD21
B_CAD20
B_CAD19
B_CAD18
B_CAD17
B_CAD16
B_CAD15
B_CAD13
B_CAD12
B_CAD11
B_CAD9
B_CAD8
B_CAD7
B_CAD6
B_CAD5
B_CAD4
B_CAD3
B_CAD2
B_CAD1
B_CAD0
B_CC/BE#3
B_CC/BE#2
B_CC/BE#1
B_CC/BE#0
B_CPAR
B_CFRAME#
B_CTRDY#
B_CIRDY#
B_CSTOP#
B_CDEVSEL#
B_CBLOCK#
B_CPERR#
B_CSERR#
B_CREQ#
B_CSTSCHG
B_CCLKRUN#
B_CCLK
B_CINT#
B_CRST#
B_CAUDIO
B_CCD1#
B_CCD2#
B_CVS1
B_CVS2
B_RSVD_D14
B_RSVD_D2
B_RSVD_A18
SC4D7U10V5ZY
C228
U48F
NC
NC
NC
NC
NC
NC
PCI7420GHK-U
TP130
TP131
TPAD28
TP132
TPAD28
TP133
TPAD28
TPAD28
TP135
TP136
TPAD28
TPAD28
TP138
TP139
TPAD28
TP140
TPAD28
TP141
TPAD28
TP83
TPAD28
TP142
TPAD28
TP81
TPAD28
TP87
TPAD28
TP143
TPAD28
TPAD28
TP145
TP27
TPAD28
TP146
TPAD28
TPAD28
TP148
TP149
TPAD28
TP150
TPAD28
TP151
TPAD28
TP152
TPAD28
TP153
TPAD28
TP154
TPAD28
TP155
TPAD28
TP156
TPAD28
TP157
TPAD28
TPAD28
TP158
TP24
TPAD28
TP159
TPAD28
TP160
TPAD28
TPAD28
TP26
TPAD28
TP104
TP105
TPAD28
TP30
TPAD28
TP29
TPAD28
TP25
TPAD28
TP85
TPAD28
TPAD28
TP106
TP161
TPAD28
TPAD28
TP162
TPAD28
TP164
TP165
TPAD28
TPAD28
TP82
TP166
TPAD28
TPAD28
TP167
TPAD28
TP168
TPAD28
TP169
TP170
TPAD28
TP171
TPAD28
TP172
TPAD28
TPAD28
TP28
TP102
TPAD28
TP107
TPAD28
TPAD28
SC1U10V3ZY
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
TEST0
C431
SCD1U16V
H5
J5
J6
K1
K2
K3
R19
1 2
C415
1 2
C416
SCD1U16V
D
02/24/2004
Change from slotB to slotA
U48C
CardBus
A
A_CSTSCHG/A_BVD1/(STSCHG#/R1#)
A_CCLKRUN#/A_WP/(IOIS16#)
PCI7420GHK-U
1 2
1 2
C426
C414
SCD1U16V
SCD1U16V
D
E
A_SKT_VCC_S0
C232SCD1U16V
1 2
C231SCD1U16V
A4
VCCA
A10
VCCA
A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3
A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CAUDIO/A_BVD2(SPKR#)
A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CCLK/A_A16
A_CINT#/A_READY/(IREQ#)
A_CRST#/A_RESET
A_CAUDIO/A_DVD2/SPKR#
A_CCD1#/A_CD1#
A_CCD2#/A_CD2#
A_CVS1/A_VS1#
A_CVS2/A_VS2#
A_RSVD/A_D14
A_RSVD/A_D2
A_RSVD/A_A18
Title
Size Document Number Rev
A3
Date: Sheet
E3
D1
D2
D3
E5
B3
A3
E6
C5
B5
A5
B6
A6
C7
B7
B10
G10
F10
C11
B11
A11
E11
C12
A12
E12
B13
C13
B14
A14
C14
F12
A15
B4
A7
C10
B12
A9
E8
C8
F9
G9
A8
B9
C9
B2
F6
E9
C3
C2
B8
A2
C6
B1
B15
C1
C4
E7
A13
F5
E10
CARDBUS /PCI7420
1 2
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
A_CC/BE#3
A_CC/BE#2
A_CC/BE#1
A_CC/BE#0
BCCLK
1 2
R511 22R2
A_SKT_VCC_S0 20
3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,20,22,24,25,26,27,29,30,31,32,36,38,39
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
21 39 Thursday, April 15, 2004
E
A_CPAR 20
A_CFRAME# 20
A_CTRDY# 20
A_CIRDY# 20
A_CSTOP# 20
A_CDEVSEL# 20
A_CBLOCK# 20
A_CPERR# 20
A_CSERR# 20
A_CREQ# 20
A_CGNT# 20
A_CSTSCHG 20
A_CCLKRUN# 20
A_CCLK 20
A_CINT# 20
A_CRST# 20
A_CAUDIO 20
A_CCD1# 20
A_CCD2# 20
A_CVS1 20
A_CVS2 20
A_RSVD_D14 20
A_RSVD_D2 20
A_RSVD_A18 20
A_SKT_VCC_S0
of
A_CAD[31..0] 20
A_CC/BE#[3..0] 20
3D3V_S0
SC
Page 22
A
U48H
F3
MC_PWR_CTRL_1
MS_SDIO(DATA0)
4 4
PCI7420GHK-U
U48I
F1
MC_PWR_CTRL_0
PCI7420GHK-U
3 3
SB==>02/20/2004,Del U51
MC_PWR_CTRL_0
MS_BS
MS_DATA1
MS_DATA2
MC_CD_1#
MS_DATA3
MS_CLK
SD_DAT3
SD_CMD
SD_CLK
SD_DAT0
SD_DAT2
SD_DAT1
MC_CD_0#
SD_WP
F2
G2
G1
G3
E1
H7
G5
SD_DATA3
J2
H2
SD_CMD
H1
SD_CLK
SD_DATA0
H3
J1
SD_DATA2
J7
SD_DATA1
E2
MC_CD_0#
SD_WP
J3
C218
SCD1U16V
1 2
B
SB: 2004/03/09
please put near
U48
R679
56R2J
SD_CLK1
For SD/MS Card Power
U45
2
GND
3
NC
4
ON/OFF#
1 2
AAT4250-U
1394_PWR_CLASS_ID0
1394_PWR_CLASS_ID1
1394_PWR_CLASS_ID2
3D3V_S0
5
IN
1
OUT
20mil
R563
220R2J
1 2
1 2
3D3V_CARD_S0
C253
SC1U10V3ZY
R564
220R2J
C
U48G
R565
220R2J
1 2
PHY_TEST_MA
PCI7420GHK-U
AVD2
AVD3
AVD4
VDPLL
TPBIAS0
TPA0+
TPA0-
TPB0+
TPB0-
FILTER0
FILTER1
CPS
CNA
PC0
PC1
PC2
VSPLL
AGN2
AGN3
AGN4
TPBIAS1
TPA1+
TPA1-
TPB1+
TPB1-
R12
U15
V17
U19
W15
R0
V15
R1
U14
V14
W14
V13
W13
R17
U17
U18
P12
R18
T19
XO
T18
XI
N12
U12
V12
T17
U13
R13
W17
V19
V18
W18
V16
W16
R536 6K34R3F
1 2
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
1394_PWR_CLASS_ID0
1394_PWR_CLASS_ID1
1394_PWR_CLASS_ID2
R535 4K7R2
1 2
1 2
C428 SCD1U16V
R534 4K7R2
1 2
R537 4K7R2
1 2
TPA1P_F
TPA1N_F
TPB1P_F
TPB1N_F
1 2
1 2
R251
R252
1KR2
1394_AVDD
1 2
1KR2
D
C441
SCD1U16V
1 2
C427
SCD1U16V
3D3V_S0
TP123
TP43
TPAD28
TPAD28
1 2
C429
SCD1U16V
1394_XO
X-24D576MHZ-19
1394_XI
Close to pin
1 2
C430
SCD1U16V
X6
1 2
R267
1 2
C256
SC4D7U10V5ZY
C243
1 2
SC30P50V2JN
C242
1 2
SC30P50V2JN
0R5J-1
3D3V_S0
E
3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,20,21,24,25,26,27,29,30,31,32,36,38,39
3D3V_S0
DUMMY PORT
2 2
L13
TPA0+
TPA0-
JK1
5
SB: 2004/03/08
change to dummy
for TI suggest
RN30
DUMMY-SRN47K
1 1
3D3V_CARD_S0 3D3V_S0 3D3V_S0
DUMMY-47KR2
R261
DUMMY-10KR2
1 2
R263
1 2
678
123
4 5
A
DUMMY-10KR2
1 2
R206
MC_CD_0#
SD_WP
SD_CMD
SD_DATA1
SD_DATA0
SD_DATA3
SD_DATA2
CN11
16 15
MH2
MH1
CARDBUS-SKT48
62.10024.511
B
11
10
8
7
12
6
5
4
3
2
1
9
13 14
SD_WP
SD_DATA1
SD_DATA0
MC_CD_0#
SD_CLK1
SD_CMD
SD_DATA3
SD_DATA2
1 2
C217
SCD1U16V
3D3V_CARD_S0
C202
SC1U10V3ZY
C
1
3
6
2
4
SKT-1394-4P-6-U
TPB0+ TPA0N
TPB0-
3 4
2
DLW21HN900SQ2
L14
2
3 4
DLW21HN900SQ2
D
1
1
Title
Size Document Number Rev
A3
Date: Sheet
BC167
SCD33U16V3ZY
1 2
R265 56R2J
1 2
R266 56R2J
SD/MS CARD READER AND 1394
CLOSE TO CHIP
1 2
1 2
1 2
R250
R249
56R2J
56R2J
R264
4K99R2F
1 2
1394_TPB1_R
1 2
C255
SC220P50V2JN
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
22 39 Thursday, April 15, 2004
E
TPBIAS0
TPA0P
TPB0P
TPB0N
of
SC
Page 23
3D3V_LAN_S5AC
1 2
BC271
SCD1U10V2MX-1
PCI_AD21
,15,17,18,19,20,21,27,28
1 2
ICH_PME# 17,19,21
PCI_PERR# 17,19,21
PCI_REQ#4 17
PCI_TRDY# 17,19,21
PCI_PAR 17,19,21
PCI_AD[0..31] 17,19,21
PCI_C/BE#[0..3] 17,19,21
PCI_DEVSEL# 17,19,21
PCI_FRAME# 17,19,21
PCI_GNT#4 17
R615 100R2
1 2
PIRQD# 17
PCI_IRDY# 17,19,21
PCI_STOP# 17,19,21
PCIRST#_3
PCI_SERR# 17,19,21
PCLK_LAN 3
3D3V_LAN_S5AC 3D3V_LAN_S5AC
LAN_LINK10#
LAN_LINK100#
BC272
SCD1U10V2MX-1
1 2
R660
10KR2
1 2
R663
10KR2
1 2
BC273
SCD1U10V2MX-1
Q58
R2
IN
2
R1
DTA144EUA-1-U2
Q60
R2
IN
2
R1
DTA144EUA-1-U2
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
1 2
1
3
1
3
BC282
SC5P
1 2
BC274
SCD1U10V2MX-1
113
PCI_PME_L
28
PCI_PERR_L
121
PCI_REQ_L
23
PCI_TRDY_L
31
PCI_PAR
55
PCI_AD0
54
PCI_AD1
53
PCI_AD2
51
PCI_AD3
50
PCI_AD4
49
PCI_AD5
48
PCI_AD6
45
PCI_AD7
42
PCI_AD8
41
PCI_AD9
39
PCI_AD10
38
PCI_AD11
37
PCI_AD12
36
PCI_AD13
34
PCI_AD14
33
PCI_AD15
16
PCI_AD16
15
PCI_AD17
14
PCI_AD18
11
PCI_AD19
10
PCI_AD20
9
PCI_AD21
8
PCI_AD22
6
PCI_AD23
3
PCI_AD24
1
PCI_AD25
128
PCI_AD26
127
PCI_AD27
126
PCI_AD28
124
PCI_AD29
123
PCI_AD30
122
PCI_AD31
43
PCI_CBE0_L
32
PCI_CBE1_L
18
PCI_CBE2_L
4
PCI_CBE3_L
26
PCI_DEVSEL_L
20
PCI_FRAME_L
119
PCI_GNT_L
5
PCI_IDSEL
116
PCI_INTA_L
21
PCI_IRDY_L
27
PCI_STOP_L
117
PCI_RST_L
29
PCI_SERR_L
118
PCI_CLK
R622
22R2
GND
1 2
OUT
R661 510R2J
3D3V_LAN_S5AC 3D3V_LAN_S5AC
GND
1 2
OUT
R665 510R2J
1 2
BC275
SCD1U10V2MX-1
1D8V_AUX_LAN
VDDC17VDDC44VDDC
LAN_LINK10
LAN_LINK100
112
VSS2VSS12VSS13VSS24VSS35VSS46VSS47VSS74VSS84VSS
Close to power pin Close to power pin
C492
SC4D7U10V-U
1 2
1 2
C493
SCD1U10V2MX-1
3D3V_LAN_S5AC 3D3V_LAN_S5AC
Broadcom LAN
C494
SCD1U10V2MX-1
VDDIO79VDDIO94VDDIO
1 2
C495
SCD1U10V2MX-1
106
VDDIO-PCI19VDDIO-PCI7VDDIO-PCI
115
125
VDDIO-PCI
1 2
C496
SCD1U10V2MX-1
40
52
VDDIO-PCI30VDDIO-PCI
VDDIO-PCI
1 2
C497
SCD1U10V2MX-1
58
57
EPHY_AGND
Place RDAC CKT
as close to
chip as
possible
EPHY_AVDD
70
69
BIASVSS
1 2
BIASVDD
C498
SCD1U10V2MX-1
AVDDL_LAN
BIASVDD_LAN
PLLVDD2_LAN
68
63
64
65
PLLVDD
PLLGND
XTAL_AVSS
XTAL_AVDD
SPD100LEDB
SPD1000LEDB
TRAFFICLEDB
EEDATA_PXE
EECLK_PXE
SPROM_CLK
SPROM_CS
RDAC
TRD0-
TRD0+
TRD1-
TRD1+
LINKLEDB
C499
SC4D7U10V-U
U79
72
SB:03/01/2004
61
62
60
59
76
78
75
77
93
90
95
98
C504
SC1U10V3KX
RDAC
LAN_LINK100#
LAN_LINK10#
LAN_TX/RX#
SPROM_CLK
SPROM_CS
R614
1 2
1K24R2F
1 2
BCM4401
REG18OUT
REG18OUT
REGSUP18
REGSUP18
TCK
TDI
TDO
TMS
TRST_L
VESD
VESD
VESD
VAUXPRSNT
XTALO
XTALI
VSS
VSS
100
111
120
1
3
R623
1 2
0R2-0
3D3V_LAN_S5AC 3D3V_LAN_S5AC
GND
1 2
OUT
R664 510R2J
R653
DUMMY-1KR2
1 2
LAN_TX/RX
PCI_CLKRUN# 17,19,21
01/28/2004 01/29/2004
LAN_LINK10 37
1 2
R662
10KR2
Q59
R2
LAN_TX/RX#
LAN_LINK100 37
IN
2
R1
DTA144EUA-1-U2
PCI_CLKRUN_L22NC
102NC103
86
GPIO085GPIO1
NC
105
108NC109NC110
NC
EPHY_VREF
EPHY_TESTMODE
88
71
LAN_TX/RX 37
NC
NC
SPROM_DIN
SPROM_DOUT
EXT_POR_L
89
99
101
104
107
SPROM_DIN
SPROM_DOUT
R626 10KR2
EXT_POR#
Q61
2N7002
EXT_POR_L is an
active low signal
used to place the
BCM4401 into IDDQ
mode, <5 mA current
consumption
1 2
S
D
2 3
G
1
91
92
97
96
80
82
83
81
73
25
56
114
87
66
67
BCM4401KQL-1
71.04401.A0G
1D8V_AUX_LAN
3D3V_LAN_S5AC
3D3V_LAN_S5AC
R616 1KR2
1 2
LAN_X0
1 2
LAN_X1
1 2
XTAL-25MHZ-3-U
BC283
SC22P50V2JN-1
3D3V_LAN_S5AC
EXT_POR_L 17
R619
200R2F
X8
1D8V_AUX_LAN
1 2
1D8V_AUX_LAN
BC276
SCD1U10V2MX-1
1 2
BC277
SCD1U10V2MX-1
Place near Chip
3D3V_LAN_S5AC
1 2
1 2
1 2
1 2
R612
R611
R610
R609
49D9R3F
49D9R3F
49D9R3F
49D9R3F
LAN EEPROM
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
Note: The BCM4401L has weak internal
pulldown resistors on the follow signals:
SPROM_CS,SPROM_CLK,SPROM_DOUT,SPROM_DIN
SCD1U10V2MX-1
3D3V_LAN_S5AC
BC284
SC22P50V2JN-1
C721
1 2
U80
1
CS
2
SK
3
D1
4
D0
M93C46-W-U
BCM4401 requires
16-Bit R/W data
width
3D3V_LAN_S5AC
1 2
1 2
R620
0R2-0
XFR_RDC
R621
0R2-0
XFR_TDC
1 2
1 2
BC278
SCD1U10V2MX-1
TDN
TDP
RDN
RDP
BC279
SCD1U10V2MX-1
Place PLLVDD2_LAN/PLLVDD3_LAN
CKT as close to chip as
possible
8
VCC
7
N.C
6
ORG
5
GND
01/28/2004
SCD1U10V2MX-1
1 2
10/100M Lan Transformer
C722
RDP
RDN
TDP RJ45_1
TDN
01/30/04
U81
1
RD
2
RD
3
CT
6
CT
7
TD
8
TD
XFORM-179-U
68.HBB14.301
RX
RX
CT
CT
TX
TX
1 2
BC280
SC4D7U10V-U
Title
Size Document Number Rev
Date: Sheet
PLLVDD2_LAN
C500
SC2D2U10V5KX
3D3V_LAN_S5AC
C518
SCD01U16V2KX
16
15
14
11
10
9
1 2
R624
R625
75R2
75R2
SC1000P3KV8KX
1 2
Custom
C516
SCD1U10V2MX-1
1 2
BIASVDD_LAN
1 2
BC285
10/100 LAN
MOLOKAI
1 2
C517
SCD1U10V2MX-1
1D8V_AUX_LAN
L26
1 2
MLB-1608080600A
C501
SC1000P50V
3D3V_LAN_S5AC
L29
1 2
MLB-1608080600A
1 2
C505
SCD1U10V2MX-1
01/27/2004
Change name From R613 to L?
RJ45_3
RJ45_6
RJ45_2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
23 39 Thursday, April 15, 2004
1 2
C506
SCD1U10V2MX-1
of
RJ45_3 37
RJ45_6 37
RJ45_1 37
RJ45_2 37
SC
Page 24
R666
OUT
BYPASS
AC97-Link
ANALOG INPUT
LINE_IN_L
LINE_IN_R
LINE_OUT_L
LINE_OUT_R
MONO_OUT
HP_OUT_L
HP_COMM
OUTPUT
HP_OUT_R
R682
2KR2
1 2
01/28/2004
5
4
PC_BEEP
PHONE
AUX_L
AUX_R
VIDEO_L
VIDEO_R
CD_L
CD_GND
CD_R
MIC1
MIC2
VREFOUT
GPIO0
GPIO1
EAPD
SPDIF
C727
SC100P50V2JN
5VA_AUD_S3
1 2
R627
DUMMY-10KR3F
1 2
R628
DUMMY-28KR3F
12
13
LINE_IN
14
15
16
17
18
19
20
21
C_CODEC_MIC1 CODEC_MIC1
22
CODEC_MIC2
23
24
28
AUD_VREFO
35
36
37
39
HP_SPK_L
40
HP_SPK_R
41
43
44
SPDIF_SHDN
EAPD
47
48
CODEC_SPDIF
C728
SC100P50V2JN
C510
SC1U10V3KX
MIC1
G2
G1
5
4
3
6
2
1
AUDIO-JK29
22.10088.541
BC289
SC4D7U10V-U
BC296
SC1U10V3KX
TP173
TPAD28
R658
1 2
10KR2
01/19/2004
C511
1 2
SCD22U10V3KX
SPK_SHUTDOWN# 25
EAPD 25
3D3V_S0
BC290
DUMMY-SC1000P50V3KX
BC293
SC1U10V3KX
HP_SPK_R
HP_SPK_L
BC292
SCD1U16V3KX
TO Audio OP
AUDIO_OUT_L 25
AUDIO_OUT_R 25
TC24 SE220U10V-1-U
1 2
1 2
TC25 SE220U10V-1-U
01/27/2004
Change from 150u to 220u
3D3V_S0
1 2
BC307
SC270P50V3JN
HP_SPK_R1
HP_SPK_L1
HP_NB_SENSE 25
R635 0R2-0
1 2
1 2
R636 0R2-0
HP_SPK_R2
HP_SPK_L2
BC306
SC270P50V3JN
HEADPHONE JACK
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
AUDIO (1 of 2) -- Codec
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
1 2
BC288
SCD1U10V2MX-1
BC305
SC1000P50V
5V_S3
U83
45
CID0
46
CID1
2
XTL_IN
3
XTL_OUT
10
SYNC
6
BIT_CLK
5
SDATA_OUT
8
SDATA_IN
11
RESET#
25
AVDD1
38
AVDD2
26
AVSS1
42
AVSS2
1
DVDD1
9
DVDD2
4
DVSS1
7
DVSS2
27
VREF
29
AFILT1
30
AFILT2
32
CAP2
31
NC
33
NC
34
NC
STAC9750-CC1-U
1 2
BC304
SCD1U10V2MX-1
1
2
3
U82
IN
GND
EN
TPS793475
1 2
DUMMY-R3
I/F
Jack Sense
SB: Remove CLK14 and
change to 24.576 MHZ
crystall for EMI pass
CLK14_AUDIO 3
BC286
SC22P50V2JN-1
BC322
SC22P50V2JN-1
5VA_AUD_S3
1 2
BC294
SCD1U10V2MX-1
DAC Ref Voltage
filter CAP
R656
1 2
DUMMY-0R2-0
X9
X-24D576MHZ-19
1 2
3D3V_S0
CODEC_XIN
CODEC_XOUT
AC'97 LINK
AC_SYNC 16
ICH_AC_BITCLK 16
AC_BTCLK_MDC 29
AC_SDATA_DOUT 16
AC_SDATA_IN0 16
CODEC_AC_RST# 16
1 2
BC295
SCD1U10V2MX-1
1 2
BC297
SCD1U10V2MX-1
1 2
BC300
SCD1U10V2MX-1
C509
SC1U10V3KX
1 2
BC298
SCD1U10V2MX-1
1 2
BC301
SC2D2U10V5KX
01/15/2004
C720
SCD01U16V2KX
R667
DUMMY-1MR2
01/28/2004
1 2
R631 33R2
R632 33R2
R633 33R2
1 2
BC299
SC2D2U10V5KX
BC302
SC1000P50V
1 2
1 2
1 2
BC287
SC4D7U10V-U
PM_SLP_S3# 17,30,33,34,36
SB: change Connect to
PM_SLP_S3# to reduce
power consumption in
S3 mode
R629
1 2
DUMMY-R3
R630
1 2
DUMMY-R3
CODEC_XIN
CODEC_XOUT
CODEC_BCLK
CODEC_SDI1
CODEC_VREF
BC303
SC1000P50V
EXT MIC JACK
5V_S0
1 2
R681
CODEC_MIC1
R683
100R2
1 2
C724
SC100P50V2JN
1KR2
C725
SC100P50V2JN
L28
BLM11A121S
1 2
1 2
BLM11A121S
C726
SC4D7U10V5ZY
L27
SB: Change for EMI solution
R634
100KR2
LOUT1
G2
G1
5
4
3
6
2
1
AUDIO-JK29
22.10088.541
SC
24 39 Thursday, April 15, 2004
of
Page 25
From CODEC LINE OUT
AUDIO_OUT_R 24
AUDIO_OUT_L 24
SC1000P50V
PC BEEP
KBC_SPKR 14,28
SB_SPKR 17
CB_SPKR 21
01/30/04
BC316
R674
0R2-0
1 2
KBC_SPKR_1
1 2
BC310
1 2
SCD1U10V2MX-1
BC313
1 2
SCD1U10V2MX-1
BC317
SC1000P50V
U85
1
A
3
B
6
C
NC7SZ386P6X-U
R643
100KR2
3D3V_S3
VCC
GND
Y
AUDIO_OUT_R1
AUDIO_OUT_L1
5V_S3
5
4
2
BC318
SCD1U16V3KX
R640
1 2
10KR2
SCD1U10V2MX-1
R642
8K2R2
1 2
1 2
C513
SCD1U10V2MX-1
BC319
1 2
GAIN0 GAIN1 AV
0
0
1
0
0 1
11
1 2
C514
SCD1U10V2MX-1
PC_SPKRIN
BC321
SC1000P50V
6dB
10dB
15.6dB
21.6dB
R638
DUMMY-1KR2
1 2
1 2
R639 1KR2
5V_S3
3
2
1 4
SPK_SDN#
1 2
RN71
SRN100KJ
AUDIO_G0
AUDIO_G1
R641
100KR2
AUDIO OP
U84
2
GAIN0
3
GAIN1
23
RLINEIN
20
RHPIN
8
RIN
5
LLINEIN
6
LHPIN
10
LIN
14
PC-BEEP
17
HP/LINE#
22
SHUTDOWN#
15
SE/BTL#
11
BYPASS
TPA0312
BC320
SCD47U16V
LOUT+
LOUT-
ROUT+
ROUT-
GND
GND
GND
GND
GND
PVDD
PVDD
VDD
5V_S3
BC308
SC4D7U10V-U
4
9
21
16
1
12
13
24
25
18
7
19
SPK_LOUT+
SPK_LOUT-
SPK_ROUT+
SPK_ROUT-
BC314
SC1000P50V
3D3V_S0
1 2
BC309
SCD1U10V2MX-1
BC315
SC1000P50V
BC311
SC1000P50V
01/30/04
R669 0R2-0
R670 0R2-0
R671 0R2-0
R672 0R2-0
1 2
1 2
1 2
1 2
BC312
SC1000P50V
SPK_LOUT1SPK_LOUT1+
SPK_ROUT1+
SPK_ROUT1-
SB: Change to JH2 that one
SPK_LOUT1+
SPK_LOUT1SPK_ROUT1+
SPK_ROUT1-
4
3
2
1
5 6
SPK1
MLX-CON4-U
21.D0010.104
R644
From ICH4
MUTE
2
IN
Q55
47K
R1
R2
DTC144EUA
100KR2
1 2
OUT
3
GND
1
EAPD 24
From Codec From HP Jack
2
IN
Q56
47K
R1
R2
DTC144EUA
OUT
3
GND
1
SPK_SHUTDOWN#
HP_NB_SENSE 24 MUTE 17
2
IN
Q57
47K
R1
R2
DTC144EUA
SPK_SHUTDOWN# 24
OUT
3
GND
1
G768D_PWROK 17,30
12
13
SB: 2004/03/09 To solve speaker pop sound issue
14 7
U46D
11
TSLCX08-U
SPK_SDN#
1 2
R680
100KR2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
AUDIO ( 2 of 2 ) --Phone Jack
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
25 39 Thursday, April 15, 2004
SC
of
Page 26
A
DUMMY-0R5
R482
5V_S0
4 4
U43
NC
A
GND3Y
NC7SZ14-U
R200
10KR2
SIDE_IRQ15 16
SIDE_IORDY 16
R172
1 2
10KR2
VCC
BAY_IN_LOOP
1
Q11_G
Q29
G
2N7002
1
SIDE_IRQ15
SIDE_IORDY
2
5V_BAY_S0
1 2
BAY_PWROFF# 16
SIDE_IRQ15_1
SIDE_IORDY_1
Q28
S
2 3
G
2N7002
3 3
1
S
D
2 3
D
1 2
U77
SI3445DV-U
S
G
3
D27
S1N4148-U
1 2
BAY_IN_LOOP
D
1 2
4
1 2
C395
SCD1U16V
BAY_EN#
5V_S0
5
BAYOFF
4
CDROM
2 2
1 1
TP175
TP177
TPAD28
TPAD28
SIDE_DREQ 16
SIDE_IOR# 16
SIDE_DACK# 16
BAY_ID0 28
BAY_ID1 28
SIDE_A2 16
SIDE_CS3# 16
5V_BAY_S0 5V_BAY_S0
C194
SCD1U16V
CD_AUDR
CD_AGND
SIDE_D8
SIDE_D9
SIDE_D10
SIDE_D11
SIDE_D12
SIDE_D13 SIDE_D3
SIDE_D14
SIDE_D15
SIDE_DREQ
SIDE_IOR#
SIDE_DACK#
BAY_ID0
BAY_ID1
SIDE_A2
SIDE_CS3#
1 2
1 2
1 2
SCD1U16V
C201
C193
SCD1U16V
Optical Bay ID,00 CDROM;01 2nd-HDD
USBP3 16
USBN3 16
A
53
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
54
B
6
5
2
1
5V_BAY_1_S0
1 2
C200
SC3D3U10V5ZY
U42
MAX809MEUR-T-U
RSTDRV#_5
3D3V_S0
1
2
IDE1
51
FOX-CONN50-2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CSEL
25
52
B
BC225
SCD1U16V
VCC
RESET#
GND
14 7
5V_BAY_S0
3
2
1
R198
1 2
DUMMY-0R2-0
U46A
BAY_IN#_1
3
TSLCX08-U
CD_AUDL
CD_RST#
SIDE_D7
SIDE_D6
SIDE_D5
SIDE_D4
SIDE_D2
SIDE_D1
SIDE_D0
SIDE_IOW#
SIDE_IORDY_1
SIDE_IRQ15_1
SIDE_A1
SIDE_A0
SIDE_CS1#
CDROM_LED#
BAY_IN_LOOP
F6
1 2
FUSE-2A6V
BC221
SC10U10V5ZY
CD_RST#
R171
1 2
10KR2
5V_BAY_S0
2
R147
1 2
100R2
TP176
TPAD28
SIDE_IOW# 16
SIDE_A1 16
SIDE_A0 16
SIDE_CS1# 16
TP181 TPAD28
2222K
K
SIDE_D[15..0] 16
5V_S0
SIDE_IORDY_1
SIDE_DREQ
Pull high at ICH4 side
3 1
Q27
DTC124EUA-U1
BAY_IN# 28
C
5V_BAY_S0
1 2
R150
DUMMY-R2
1 2
R151
DUMMY-R2
BAY_PWROK# 17
C
1 2
470R2
PIDE_CS3# 16
5V_S0
R602
DUMMY-1KR2
02/10/2004
R77
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15
HDD_CSEL
PIDE_A2
PIDE_CS3#
1 2
D
HDD CONN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1 2
C339
SCD1U10V2MX-1
D
CN9
SYN-CONN44D-4
20.F0510.044
C340
SC4D7U10V5ZY
45
MH1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
MH2
46
Title
Size Document Number Rev
Date: Sheet
A3
RSTDRV#_5
PIDE_D7
PIDE_D6
PIDE_D5
PIDE_D4
PIDE_D3
PIDE_D2
PIDE_D1
PIDE_D0
PIDE_DREQ
PIDE_IOW#
PIDE_IOR#
PIDE_IORDY
PIDE_DACK#
PIDE_IRQ14
PIDE_A1
PIDE_A0
PIDE_CS1#
HDD_LED#
1 2
C491
SC10U10V5ZY
RSTDRV#_5 18
PIDE_DREQ 16
PIDE_IOW# 16
PIDE_IOR# 16
PIDE_IORDY 16
PIDE_DACK# 16
PIDE_IRQ14 16
PIDE_CS1# 16
HDD_LED# 14
D32
SSM34A
2 1
CLOSE TO PIN
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
HDD/CD ROM
MOLOKAI
E
E
PIDE_D[0..15] 16
PIDE_A[0..2] 16
26 39 Thursday, April 15, 2004
SC
of
Page 27
A
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
B
C
D
E
4 4
PCIRST#_3 7,15,17,18,19,20,21,23,28
R262
10R2
FWH_WP# 16
3D3V_S0 3D3V_S0
R240
10KR2
63.10334.1D1
3 3
PCLK_FWH 3
SC10P50V2JN-1
BC163
1 2
PCLK_FWH_2
1 2
RN29
6
7
8
SRN10K-2
SELECT_FWH
FWH_FGPI4
1 2
FWH_FGPI3
FWH_FGPI2 LPC_LAD0
FWH_FGPI1
FWH_FGPI0
SELECT_FWH
4 5
FWH_FGPI4
3
2
1
1 2
R585
68R2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
U55
NC
NC
NC
VSS
IC
A10/FGPI4
R/C#(CLK)
VDD
NC
RST#
A9(FGPI3)
A8(FGPI2)
A7(FGPI1)
A6(FGPI0)
A5(WP#)
A4(TBL#)
49LF004A-33
RN28
6
7
8
SRN10K-2
FWH_FGPI3
4 5
FWH_FGPI2
3
2
FWH_FGPI1
1
FWH_FGPI0
SB: Because new add R684
is 330 ohm so need change
R260 from 1K to 4.7K to
make FWH_INIT# low level
be correct
32
VSS
FWH_INIT#
31
30
NC
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#/INIT#
WE#/FWH4
DQ7/RES
DQ6/RES
DQ5/RES
DQ4/RES
DQ3/LAD3
DQ2/LAD2
DQ1/LAD1
DQ0/LAD0
A0/ID0
A1/ID1
A2/ID2
A3/ID3
Unused FGPI pins must not be float
3D3V_S0 1D5V_S0
R260
4K7R2
Q33
1
FWH_INT_Q
MMBT3904-1-U
84.03904.B11
CC_INIT1#
LPC_LAD[3..0] 17,28
1 2
R259
1K5R2
R684
1 2
330R2
SB: for SIV pass
LPC_LAD3
LPC_LAD2
LPC_LAD1
1 2
3
2
LPC_LFRAME# 17,28
CC_INIT# 5,17
2 2
DUMMY-SC10U10V5ZY
1 1
BC162
A
1 2
78.10492.4B1 78.10492.4B1 78.10492.4B1 78.10492.4B1
BC149
SCD1U10V2MX-1
1 2
BC158
SCD1U10V2MX-1
3D3V_S0 3,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,26,29,30,31,32,36,38,39
5V_S0 13,14,17,18,19,20,24,26,28,30,32,34,36,38,39
1D5V_S0 7,8,9,15,16,18,38,39
1 2
BC157
SCD1U10V2MX-1
B
3D3V_S0
1 2
BC150
SCD1U10V2MX-1
3D3V_S0
5V_S0
1D5V_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
C
D
Date: Sheet
FWH/Debug Port
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
27 39 Thursday, April 15, 2004
E
SC
of
Page 28
A
BAT_IN_KBC#
AD_IN_KBC
5V_S0
4 4
3D3V_RTC
R361
10KR2
PM_SLP_S4# 17,31,34,35,36
BC222
SCD1U16V
CN3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
C453SC100P50V2JN
C454SC100P50V2JN
C455SC100P50V2JN
C456SC100P50V2JN
C457SC100P50V2JN
C458SC100P50V2JN
C459SC100P50V2JN
C460SC100P50V2JN
C461SC100P50V2JN
C462SC100P50V2JN
C463SC100P50V2JN
C464SC100P50V2JN
C465SC100P50V2JN
C466SC100P50V2JN
C467SC100P50V2JN
C468SC100P50V2JN
C473SC100P50V2JN
C474SC100P50V2JN
C475SC100P50V2JN
C476SC100P50V2JN
C477SC100P50V2JN
C478SC100P50V2JN
C479SC100P50V2JN
C480SC100P50V2JN
1
G
1 2
PCIRST#_3
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
3 3
Internal KeyBoard Connector
29
2 2
30
MLX-CON28-1
20.K0004.028
1 1
1 2
2 3
MATRIX2
MATRIX1
R48
10KR2
D
Q17
2N7002
S
KCOL16
KCOL3
KCOL1
KCOL4
KCOL12
KCOL9
KCOL10
KCOL8
KCOL13
KCOL2
KCOL7
KCOL6
KCOL14
KCOL15
KCOL11
KROW3
KROW4
KROW1
KCOL5
KROW2
KROW8
KROW6
KROW5
KROW7
A
1
3D3V_S5
KCOL4
KCOL1
KCOL3
KCOL16
KCOL8
KCOL10
KCOL9
KCOL12
KCOL6
KCOL7
KCOL2
KCOL13
KROW3
KCOL11
KCOL15
KCOL14
KROW2
KCOL5
KROW1
KROW4
KROW7
KROW5
KROW6
KROW8
3D3V_S3
G
14
12
11
7
MATRIX2
MATRIX1
1 2
R344
10KR2
RTC_IN
D
Q16
2N7002
S
2 3
U76B
10
9
Q
VCC
PR
D
CLK
GND
CL
13
3D3V_S5
MATRIX1
MATRIX2
Q
8
TSLCX74-U
C191
SC15P50V2JN
Keyboard Matrix
US
MATRIX1
LOW
For EMI
KBRESET_S3#
RN54
8
7
6
SRN10K
FLASH_GPIO1 35
FLASH_GPIO2 35
SCROLL_LED# 14
ICH_A20GATE 17
C192
SC15P50V2JN
JAP
LOW
HIGH MATRIX2 LOW
CAPS_LED# 14
NUM_LED# 14
BAY_ID0 26
BAY_ID1 26
RCIN# 17
PCLK_KBC 3
Europe
HIGH
LOW
3D3V_S3
TP178 TPAD28
B
RN23
1
1
2
3
4 5
8
2
7
3
6
4 5
SRN10K
MUTE_LED#
RTC_IN
KBCFLASH
MATRIX1
MATRIX2
BAY_ID0
BAY_ID1
ICH_A20GATE
ECSCI
CLK_RUN#
LPC_LAD0 17,27
LPC_LAD1 17,27
LPC_LAD2 17,27
LPC_LAD3 17,27
LPC_LFRAME# 17,27
PCIRST#_3 7,15,17,18,19,20,21,23,27
PCI_SERIRQ 17,19,21
1 2
SC10P50V2JN-1
BC219
1 2
SB:03/05/2004 change pin
define for one layer FPC
B
MUTE_LED#
BAY_ID0
BAY_ID1
802.11LED#
KCOL1
P0-054P0-153P0-252P0-351P0-450P0-549P0-648P0-747P1-046P1-145P1-244P1-343P1-442P1-5
38
P2-0/CMPREF
37
P2-1
36
P2-2
35
P2-3
34
P2-4(LED-0)
33
P2-5(LED-1)
32
P2-6(LED-2)
31
P2-7(LED-3)
27
P4-0/XCOUT
26
P4-1/XCIN
23
P4-2/INT-0
22
P4-3/INT-1
21
P4-4/RXD
20
P4-5/TXD
19
P4-6/SCLK
18
P4-7/SRDY#/CLKRUN#
P8-0/LAD-070P8-1/LAD-169P8-2/LAD-268P8-3/LAD-3
R477
10R2
1 2
BC218
SC68P50V2JN
TouchPad Connector
1 2
TCLK_5
TDATA_5
1 2
BC224
SC47P50V2JN
KCOL3
KCOL2
R480
10KR2
KCOL5
KCOL4
KCOL6
P8-4/LFRAME#
P8-5/LRESET#
66
65
67
KBC_SCL_5 30
KBC_SDA_5 30
KCOL9
KCOL7
KCOL8
KCOL10
P8-7/SERIRQ
P8-6/LCLK
63
64
1 2
R479
10KR2
1 2
BC223
SC47P50V2JN
KCOL11
KCOL12
5V_S0
KCOL14
KCOL13
41
KCOL15
KCOL16
40
P1-739P1-6
P7-7/SCL
P7-6/SDA
P7-5/INT-414P7-4/INT-315P7-3/INT-21
2
3
KBCLK_5
1 2
BC114
SCD1U16V
KROW2
KROW1
62
61
P3-0/PWM-00
6
MCLK_5
KBDATA_5
678
4 5
C
KROW6
KROW5
KROW4
KROW3
P3-260P3-359P3-458P3-557P3-656P3-7
P3-1/PWM-10
P7-27P7-18P7-0
9
MDATA_5
TDATA_5
TCLK_5
RN67
SRN10K
123
BC115
SC1U10V3ZY
CN2
8
1
2
3
4
5
6
7
MOLEX-CON6-1
20.K0010.006
C
3D3V_S3
KROW7
KROW8
55
P5-1/INT-20
P5-2/INT-30
P5-3/INT-40
P5-4/CNTR-0
P5-5/CNTR-1
P5-6/DA-1/PWM-01
P5-7/DA-2/PWM-11
CNVSS
VSS
RESET#
24
30
25
CNVSS
KBRESET_S3#
R481
0R2-0
BC220
SC10U10V5ZY
71
VCC
P6-0/AN-0
P6-1/AN-1
P6-2/AN-2
P6-3/AN-3
P6-4/AN-4
P6-5/AN-5
P6-6/AN-6
P6-7/AN-7
P5-0/INT-5
XIN
XOUT
VREF
AVSS
73
M38859FFHP
Use 38857 symbol
and change to
38859 P/N
R168
4K7R2
KBC_SDA_5
KBC_SCL_5
5V_S0
1 2
U75
1
USB_EN#
AD_IN_KBC
80
BAT_IN_KBC#
79
78
802.11LED#
77
X_BTM#
76
KBC_P65
75
74
17
16
ECSMI
15
ECSWI
14
13
12
BL2_1#
11
10
28
29
72
1 2
78.10492.4B1
5V_S0 5V_S0
1 2
1 2
1 2
XIN_KBC
XOUT_KBC
KBC_REF
BC217
SCD1U16V
R169
4K7R2
2 3
Q23 2N7002
G
2 3
S
Q24 2N7002
BC216
SCD1U16V
(3.3V)
1 2
15KR3F
R149
(2.5V)
1
KBC_REF_1
1 2
R170
47KR3F
G
1
S
D
1
D
D
RN57
1
2
3
4 5
SRN10K
3D3V_S3
TP179TPAD28
TP22TPAD28
TP180TPAD28
AD_OFF 37
SW_THRM_SDN 30
BAY_IN# 26
ECSMI 17
ECSWI 17
PM_SUS_STAT# 17
COVERUP 14,30
BRIGHTNESS 14
KBC_SPKR 14,25 ECSCI 17
R476
DUMMY-R2
R148
1 2
470R2
63.47134.151
3
D23
APL431-U
74.00431.F3B
2
D
8
7
6
R590
DUMMY-10KR2
1 2
R591
DUMMY-10KR2
1 2
1 2
5V_S0
KBCFLASH
E
R645 10KR2
ECSWI
ECSMI
CLK_RUN#
ECSCI
USB_EN# 29
1 3
KBC_P65
2
X7
RESON-8MHZ-U
82.10009.001
Q22
47K
R1
2
IN
R2
DTC144EUA
84.00144.B1K
BT_SDA_5 35,37
BT_SCL_5 35,37
Title
Size Document Number Rev
Custom
Date: Sheet
1 2
BL2# 35
BAT_IN#
AD_IN 31,36,37
RN56
8
7
6
SRN10K
KROW7
KROW5
KROW6
KROW8
BAT_IN# 35,37
(NEAR M38859)
Q21
OUT
3
GND
1
IN
2
CNVSS_2
DTA124EE
84.00124.01H
KBC/KB&TPAD CONN
MOLOKAI
3D3V_S3
1 2
D10 S1N4148-U
1 2
D38 S1N4148-U
AD_IN
3D3V_S3
R2
R1
1 2
D39 S1N4148-U
RN55
1
1
2
2
3
3
4 5
4 5
SRN10K
5V_S0
1
GND
3
OUT
CNVSS_1
CNVSS
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
E
3D3V_S3
1 2
BL2_1#
BAT_IN_KBC#
AD_IN_KBC
8
KROW2
7
KROW1
6
KROW4
KROW3
R167
1 2
DUMMY-R2
D24S1N4148-U
1 2
BC123
SCD1U16V
28 39 Thursday, April 15, 2004
R31
10KR2
1 2
10KR2
of
R166
1 2
SC
Page 29
1
2
3
4
5
MDC CONN
CN10
Voice Modem
A A
3D3V_LAN_S5AC
MDC_AC_DOUT 16
MDC_AC_RST# 16
B B
3D3V_S0
SCD1U16V
C515
1 2
SC4D7U10V5ZY
TP96 TPAD28
TP95 TPAD28
TP97 TPAD28
TP94 TPAD28
TP98 TPAD28
1 2
C220
C206
SCD1U16V
31
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
33
AMP-CONN30A-1
20.F0099.030
35
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
34
36
TP99 TPAD28
TP80 TPAD28
AC_DIN1B_R
MDC_BITCLK
3D3V_LAN_S5AC
1 2
R652
10KR2
1 2
R501 22R2
1 2
R499 0R2-0
R502
100KR2
MDC_AC_SYNC 16
AC_DIN1 16
AC_BTCLK_MDC 24
1 2
1 2
C402
SC22P50V2JN-1
USB PORT
USB0_VCC
C391
C C
SC22U10V6ZY-U
C390
SC22U10V6ZY-U
SB:03/05/2004 Add C389 and
C390 for USB Droop test
C170
pass
1 2
SCD1U10V2MX-1
NEAR CONNECTOR
SKT2
USBN0 USB0-
USBN0 16
USBP0 16
D D
1 2
R649 0R3-U
1 2
USBP0
R651 0R3-U
L7
1
DY-DLW21SN900SQ2-U
1
USB0+
2
3 4
A1
A2
A3
A4
SKT-USB-61
22.10218.C81
USB1_VCC
Layout trace 40 mil
C169SCD1U10V2MX-1
C388
1 2
4
1
B1
B2
B3
B4
2
3
USB4USB4+
2
R648 0R3-U
R650 0R3-U
C389
SC22U10V6ZY-U
SC22U10V6ZY-U
1 2
1 2
L24
2
3 4
DY-DLW21SN900SQ2-U
C520
SCD1U16V3KX
USB_EN# 28
USBN4
USBP4
1
USBN4 16
USBP4 16
3
Dual USB switch
5V_S3
U86
C521
SC10U10V5ZY
SB:03/03/2004
1
GND
2
IN
3
EN1#
EN2#4OC2#
TPS2062D
4
8
OC1#
7
OUT1
6
OUT2
5
Title
Size Document Number Rev
A3
Date: Sheet
USB0_VCC
1 2
C519
SCD1U10V2MX-1
USB_OC#0 16
USB_OC#4 16
USB1_VCC
1 2
C522
SCD1U10V2MX-1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MDC CONN & USB CONN
MOLOKAI
5
29 39 Thursday, April 15, 2004
SC
of
Page 30
A
B
C
D
E
240 ms after VCC_G768 > 4.38v
13
C349
VCC
HYST
U25D
TSAHCT125
G768D_PWROK
6
5
4
Check default setting,
default enable is
preferred
R235
1 2
DUMMY-R2
HW_THRM_SDN
Q32
R1
1
R2
PDTC124EU
5V_AUX
1 2
CPU_TH_HYST PURE_HW_THRM_SDN#
R417
DUMMY-R2
5V_AUX
THRM_SDN_EN# 16
5V_S0
1 2
R236
10KR2
3
2
1 2
R106
0R2-0
1 2
R418
DUMMY-R2
U66
14
12
11
3
5
4
9
6
DXP1
DXP2
DXN
CLK
SMBCLK
SMBDATA
RESET#
ALERT#
G768D
4 4
G768D_PWROK 17,25
R419
100KR2
5V_S0
1 2
THERMDP1
THERMDN
D31
S1N4148-U
SC470P50V3JN
FAN
Conn.
CN8
3 3
3
2
1
CON3-4
20.D0012.103
1 2
R321
4K7R2
FAN_FB
VCC_FAN
BC169
SC4D7U10V5ZY
C300
1 2
DUMMY-C2
BC173
SCD1U16V
1 2
BC196
SC2200P50V2KX
THERMDP2
C362
THERMDN
THERMDP2
THERMDN
3
2
1 2
BC197
SC2200P50V2KX
Q42
MMBT3904-U1
1
SYSTEM SENSOR
3D3V_S0
U46C
14 7
TSLCX08-U
8
1 2
PM_THRM# 8,17
THERMDP1/DP2/THERMDN ON THE SAME LAYER
W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS
CAPS CLOSE TO G768D
9
10
THERMDP1 5
THERMDN 5
KBC_SCL_5 28
KBC_SDA_5 28
R420
1 2
100R2
THERMDP2
CLK32_G768
FANVCC
TH_SHUT
VCC
VCC
AGND
DGND
1
16
2
15
8
7
10
FG
13
NC
VCC_FAN
G768_HW_SHDN
FAN_FB
1 2
C351
SCD1U16V
5V_S0
5V_S0
12 11
C166
SC10U10V5ZY
14
7
put together
SC:change TEMP
setting from 85
3D3V_S5
32K suspend clock output
U28
PM_SLP_S3# 17,24,33,34,36
PM_SUS_CLK 8,17
2 2
1
OE
2
A
GND3Y
NC7SZ126-U
VCC
5
4
1 2
1 2
C144
SCD1U16V
R112
1 2
10R2
R120
240KR3
CLK32_G768 32KHZ
PURE_HW_THRM_SDN# 31
to 105 degree.
R393
1 2
15KR3F
CPU_THSET
HW thermal shut down tempature
setting 105 degree . Put Near vent
out .
U65
1
SET
2
GND
3
OUT#
MAX6510HAUT-T-U
SCD1U16V3KX
OUTSET
12
13
3D3V_S5
5V_AUX
14 7
3
R221
U44D
TSAHCT32
11
HW_THRM_SDN_1
1 2
COVER SWITCH
3D3V_S3
1 2
R13
10KR2
TO KBC
COVERUP 14,28
1 1
A
1 2
R14
100R2
BC9
SC1000P50V
3
1
2 4
SW1
SW-SIZ011NST
62.40060.011
BL3 33,38
HW_THRM_SDN
1 2
R203
10KR2
B
D28
470KR2
BAT54-1
2
1
SCD1U16V3KX
RESUME RESET
RSMRST#_1
BC148
D
1
G
S
2 3
Q30
2N7002
C
3D3V_S5 3D3V_S5
U56A
14 7
1 2
TSAHCT14
D
1
G
Q31
2N7002
1 2
S
2 3
R222
10KR2
SW_THRM_SDN 28
D
14 7
3 4
U56B
TSAHCT14
Title
Size Document Number Rev
A3
Date: Sheet
TO SB
RSMRST# 17
G768D
MOLOKAI
RSMRST# is RTC power plane
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
30 39 Thursday, April 15, 2004
E
SC
of
Page 31
A
B
C
5V_AUX
D
E
Q
Q
1 2
1 2
C370
SCD1U16V
10
PR
CL
13
R459
10KR2
U73B
TSAHCT74
VCC
D
CLK
GND
1 2
R363
1 2
1KR2
3D3V_S5
1 2
1 2
To SB
C719
SCD1U16V
R474
10KR2
5V_AUX
1 2
R362
10KR2
From PWRBTN
PWRBTN#
SB_PWRBTN# 17
5V_AUX
14
12
11
7
TSAHCT14
R464
1 2
47KR2
U71D
14 7
1 2
C373
SCD1U16V
9 8
5V_AUX
U71E
14 7
TSAHCT14
11 10
2
1
4
3
PWRBTN#_RC
D37
S1N4148-U
PWRBTN
PWRBTN#
SW3
PUSH-SW31-U
5 6
1 2
C321
SCD1U16V
1 2
Power ON Circuit
4 4
5V_AUX
MAX1999_ON 33
D1
PURE_HW_THRM_SDN# 30
3 3
1 2
S1N4148-U
R201
1 2
220KR2J
6
14 7
U44B
TSAHCT32
4
5
3
5V_AUX
U44A
14 7
TSAHCT32
1
2
AD_IN 28,36,37
PM_SLP_S4#
1 2
R202
100KR2
PM_SLP_S4# 17,28,34,35,36
3D3V_S0
1 2
R458
51KR2
1
G
9
8
5V_AUX
R460
22KR2J
D
Q43
2N7002
S
2 3
2 2
1 1
A
B
C
D
SB: 2004/03/05
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
POWER ON CIRCUIT
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
E
31 39 Thursday, April 15, 2004
SC
of
Page 32
A
Deep Sleep
100k/(100k+1.21k)=98.79%
OffSet= 1.21%
Active Deep Deeper
DPRSLPVR 0 0 1
STP_CPU# 1 0 0
4 4
1 2
C99
SCD027U50V3KX
H_VID[5..0] 5
6217_DACOUT
1 2
R88
1K21R2F
1 2
R89
100KR2F
PWRCH Low ==> One Phase
R87
1 2
243KR2F
R86 1KR2
3 3
5V_S0
1 2
R85
DUMMY-R2
1 2
C98
DUMMY-C2
IMVP IV
Load Line Slope :3mR
32A=> 96mV
2 2
Rdroop = 96mV /
32uA
1 1
VGATE 17
CLK_PWD# 3
CPUCORDE_ON_DELAY
DPRSLPVR 17
PM_STPCPU# 3,17
1 2
CLK_PWD#
A
1 2
VGATE
C96
DUMMY-C2
3D3V_S0
1
G
R84
1 2
5K11R3F
SC: change for
load line test
pass
1 2
R101
15KR3F
1 2
C95
SC2200P50V2KX
1 2
R83
DUMMY-R2
1 2
DUMMY-C2
1 2
R397
10KR2
1
D
Q38
2N7002
S
2 3
C94
G
1 2
2 3
R395
1KR2F
VGATE
D
Q37
2N7002
S
CPUCORE_ON_1 CPUCORE_ON
6217_DSV
6217_FSET
DPRSLPVR
PM_STPCPU#
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
6217_EA+
6217_CONP
6217_FB
6217_SOFT
1 2
R82
3K57R3F
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
1 2
C97
SCD015U50V3KX
VCC_IO_S0
1 2
VCC_IO_S0-->Delay 3 mS-->CPUCOR DE_O N_DE LAY
5V_S0
1 2
1 2
C100
SC1U10V3KX
U27
VDD
DACOUT
DSV
FSET
N/C
EN
DRSEN
DSEN#
VID0
VID1
VID2
VID3
VID4
VID5
PGOOD
EA+
COMP
FB
SOFT
ISL6218CV-T
R377
10KR2
R90
0R2-0
B
DCBATOUT
SC:Change
for VTT
test pass
ISL6218
3D3V_S0
2
B
1 2
1 2
SCD1U50V3KX
VBAT
ISEN1
PHASE1
BOOT1
VSSP1
VDDP
VSEN
DRSV
OCSET
1 2
R376
10KR2
3 1
Q36
S2N3904-U2
R105
100R5
6217_VBAT
C128
38
37
36
35
UG1
34
33
32
LG1
31
30
N/C
29
N/C
28
N/C
27
N/C
26
N/C
25
N/C
24
23
22
STV
21
20
VSS
G11
1 2
GAP-CLOSE
SC2200P50V2KX
5V_S0
1 2
6217_ISEN1
6217_BOOT1
6217_LG1
1 2
C123
V_OCSET = 1.75V
V_DRSV = 0.75716V
V_BOOT =1.2611V
I_OCSET = 12.5uA =>
OCP =125% ~ 175%
3D3V_S0
1 2
R401
3K3R2
CPUCORE_ON
3 1
Q39
2
S2N3904-U2
SB: 2004/03/01
C
IFL=(RISEN*32uA*n) / Rds(on)=
1.96k*32uA*2 / 5mR =25.157A
FDS7088N3 Rds(on)=5mR
C126
SC2D2U10V3ZY
1
1 2
1 2
1 2
1 2
C124
SC560P
2
R104
1R2J
3
C127
SCD33U16V3ZY
6217_UG1
6217_DRSV
6217_STV
6217_OCSEL
C125
SC1U10V3KX
1 2
14 7
5 6
D33
BAT54-1
DUMMY-R2
1 2
R103
1 2
1 2
1 2
R102
54K9R3F
R396
45K3R3
R111
75KR2F
U6C
TSLCX14-U
R400
2K55R3F
3D3V_S0 3D3V_S0
9 8
C
9
U64
14 7
9
678
D
G
4 5
D
G
4 5
U6D
TSLCX14-U
SSS
678
DCBATOUT
U24
FDS7096N3
9
123
FDS7088N3
9
SSS
123
D
G
4 5
D
G
4 5
678
678
U26
FDS7096N3
SSS
123
CPU_CORE_1
U63
FDS7088N3
SSS
123
2 1
C91
SCD1U50V3ZY
1 2
C92
SC2200P50V2KX
1 2
R394
2D2R3-1-U
D19
DUMMY-B340LA
1 2
C343
SC1000P50V
MAX=14A
1 2
C119
SC10U35V0ZY-U
L21
1 2
IND-D68UH-4-U
For Banias/ULV CPU:
Active Mode:
1.Highest Frequency:
VID=1.484V/1.00V
2.Lowest Frequency:
VID=0.956V/0.85V
Deep Sleep Mode:
1.Highest Frequency: VID=1.484V,Offset=
-1.2%->VID=1.466
2.Lowest Frequency: VID=0.956V,Offset=
-1.2%->VID=0.945
Deeper Sleep Mode:
VID=0.748V
U6E
14 7
R375
1 2
1KR2
C334
SC1U10V3KX
1 2
TSLCX14-U
11 10
D
1 2
3D3V_S0 3D3V_S0
13 12
D
SC:
populate
C341 for
VTT test
pass
1 2
C120
C341
SC10U35V0ZY-U
SC10U35V0ZY-U
MAX=21A
Vf=0.7V
SCD1U16V3KX
D18
MMSZ4681T1
2 1
U6F
TSLCX14-U
14 7
E
1 2
C342
SC10U35V0ZY-U
VCC_CORE_S0
C122
SCD1U16V3KX
C121
CPUCORDE_ON_DELAY
Title
Size Document Number Rev
A3
Date: Sheet
SC:
populate
TC10 for
VTT test
pass
ST220U2VDM-1
ST220U2VDM-1
ST220U2VDM-1
1 2
1 2
TC10
TC7
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1 2
TC9
ST220U2VDM-1
1 2
TC4
IMVP IV-CPU POWER-ISL6218
MOLOKAI
32 39 Thursday, April 15, 2004
E
of
ST220U2VDM-1
1 2
TC5
SC
Page 33
A
B
C
D
E
SYSTEM DC/DC
U17
SI4800DY
U21
SI4892DY
1 2
1 2
SC: change to
fix 3D3V output
and not using
adjustment mode.
DCBATOUT
SC4D7U35V-U
1 2
C36
MAX1999_V+
SCD1U50V3ZY
C8
MAX1999_BST3
SCD1U16V3KX
C11
1 2
0R2-0
BST3
MAX1999_FB3
MAX1999_ON_1
MAX1999_ON_1
MAX1999_SHDN#
MAX1999_TON
MAX1999_REF
MAX1999_SKIP#
3D3V_AUX
C35
R11
28
26
27
24
22
7
3
4
6
13
8
12
SC47P50V2JN
C9
R295
2MR2
1 2
R36
4D7R5
1 2
R582
4D7R5
MAX1999_DH3
MAX1999_LX3
MAX1999_DL3
DY-SC100P50V2JN
1 2
C281
1 2
1 2
1 2
R10
0R2-0
SCD22U10V3KX
R288
DUMMY-R3
C7
30mA MAX.
MAX1999_VCC
DUMMY-R2
1 2
R33
MAX1999_TON
1 2
R32
0R2-0
Ton = VCC : 200KHz/300KHz
Ton = GND : 400KHz/500KHz
(5V/3D3V)
B
BST3
DH3
LX3
DL3
OUT3
FB3
ON3
ON5
SHDN#
TON
REF
SKIP#
5V_AUX MAX1999_VCC
SC1U10V3ZY
20
V+
3
1
U2
MAX1999EEI
LDO3
25
SC1U10V3KX
1 2
C10
1 2
R35
10R2
D2
BAW56-1
2
MAX1999_ON 31
C
17
VCC
BST5
DH5
LX5
DL5
OUT5
FB5
PRO#
NC
ILIM5
ILIM3
PGOOD
GND
LDO5
18
SC1U10V3KX
1 2
30mA MAX.
C33
MAX1999_VCC
MAX1999_V+
C34
SC1U10V3ZY
MAX1999_BST5
14
16
MAX1999_DH5
MAX1999_LX5
15
MAX1999_DL5
19
21
MAX1999_FB5
9
10
1
MAX1999_ILIM5
11
5
MAX1999_ILIM3
2
23
5V_AUX
1 2
1 2
BL3 30,38
1 2
PRO#
R286
DUMMY-R2
R289
0R2-0
R34
0R2-0
SC: change to
fix 5V output
and not using
adjustment
mode.
SCD1U16V3KX
C32
DUMMY-R3
1 2
1 2
R12
R293
10KR2
R294
100KR2
1
G
1 2
1 2
R9
0R2-0
DY-SC100P50V2JN
1 2
MAX1999_VCC
DUMMY-2N7002
D
Q5
S
2 3
C282
1 2
SC47P50V2JN
1 2
2MR2
1 2
10KR2F-U
R311
D
4 5
5
C30
4
R309
R310
18KR2F
1 2
1 2
R291
10KR2F-U
1 2
24KR2
R290
MAX1999_ON_1
MAX1999_SHDN#
SCD1U50V3ZY
C6
DCBATOUT
SC4D7U35V-U
C55
1 2
U18
SI4800DY
1 2
U22
SI4892DY
MAX1999_VCC
Title
Size Document Number Rev
A3
Date: Sheet
G D
678
G
3
DDD
SSS
123
D8D7D6D
S1S2S
SC10U35V0ZY-U
1 2
C54
OCP:7.5A~10.5A
L3
IND-4D7UH-16
SCD1U16V3KX
BC54
MAX1999_VCC DCBATOUT
3
Q53
1 2
PRO#
R292
1 2
TP0610T
470KR2
C451
SCD1U10V2MX-1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MAX1999/3D3V_S5/5V_S5
MOLOKAI
E
5V_S5
1 2
ST150U6D3VM-U
TC2
33 39 Thursday, April 15, 2004
1 2
1 2
R586
470KR2
R587
470KR2
of
SC
3D3V_S5/5V_S5
4 4
DCBATOUT
SC4D7U35V-U
SCD1U50V3ZY
1 2
C52
C39
678
OCP:6A~8A
3D3V_S5
L2
IND-4D7UH-16
1 2
ST150U6D3VM-U
3 3
2 2
1 1
BC27
SCD1U16V3KX
PM_SLP_S3# 17,24,30,34,36
SKIP# = VCC : PWM MODE
SKIP# = GND : SKIP MODE
SKIP# = REF/FloatING : Ultrasonic MODE
(25KHz min)
1 2
SC:Change for
Derating pass
MAX1999_VCC
1
G
MAX1999_SKIP 38
A
TC1
1 2
2 3
R312
100KR2
MAX1999_SKIP
D
Q51
2N7002
S
MAX1999_VCC
1
G
DDD
SSS
GD
123
4 5
5
D8D7D6D
S1S2S
3
4
MAX1999_REF
1 2
R313
100KR2
MAX1999_SKIP#
D
Q52
2N7002
S
2 3
G
Page 34
A
B
C
D
E
SYSTEM DC/DC
2D5V_S3/1D35V_S0
4 4
OCP:7.5A~9.5A
1D35V_S0
G16
GAP-CLOSE-PWR
G15
GAP-CLOSE-PWR
1 2
1 2
3 3
1D35V_DC_S0
1 2
TC17
ST220U2D5VBM
BC198
SCD1U16V3KX
DCBATOUT
SC4D7U35V-U
1 2
L22
IND-2D2UH-6
1 2
SC47P50V2JN
SC100P50V2JN
1 2
1 2
C364
1 2
PM_SLP_S4# 17,28,31,35,36
SCD1U50V3ZY
BC116
BC214
1 2
C167
D21
R124
2MR2
2 1
1 2
BC207
SC2200P50V2KX
1 2
3K48R3F
R447
R448
10KR2F-U
678
DDD
SSS
GD
123
D8D7D6D
S1S2S
3
DUMMY-SSM5819S
4 5
5
G
4
1V
For MGM+,set to
1.35V
2 2
U30
SI4800DY
U29
SI4892DY
5V_S0
R122
DUMMY-R2
1 2
M1715VCCF
R118
1 2
3D3R2J
1 2
R443
100KR2
SC1U10V3ZY
3D3V_S3
1 2
4
V+
28
R126
10KR2
N.C.
15
VCC21VDD
N.C.
SCD1U50V3ZY
BC101
1 2
R117
0R2-0
M1715_VDD
20
SKIP#
BST2
DH2
LX2
DL2
OUT2
FB2
ILIM2
TON
REF
N.C.
23
M1715SKIP#
1 2
M1715BST1
6
18
17
16
19
14
13
12
5
9
SCD1U10V2MX-1
M1715BST2
M1715DH2
M1715LX2
M1715DL2
M1715FB2
M1715ILIM2
M1715TON
M1715REF
1 2
R121
10KR2
1 2
BC100
SCD1U16V3KX
1 2
R600
BC206
2D2R2J
M1715DH1
M1715LX1
M1715DL1
M1715FB1
M1715ILIM1
1 2
R445
300KR2F
R119
10R2
1D2V_ON
2D5V_ON
U69
MAX1715EEI-U2
25
BST1
26
DH1
27
LX1
24
DL1
1
OUT1
2
FB1
3
ILIM1
8
AGND
22
PGND
7
PGOOD
11
ON110ON2
1 2
PM_SLP_S3#
R125
0R2-0
5V_S5
BC205
SC4D7U10V5ZY
U32
SI4800DY
BAW56-1
3
C363
R601
2D2R2J
SCD22U10V3KX
D34
1
2
R134
1 2
3D3R2J
SCD1U16V3KX
1 2
BC211
1 2
1 2
DUMMY-R2
DUMMY-R2
R123
BC208
1 2
PM_SLP_S3# 17,24,30,33,36
678
DDD
SSS
G D
123
4 5
5
D8D7D6D
S1S2S
G
3
4
1 2
R444
330KR2F
R446
SCD1U50V3ZY
BC213
1 2
1 2
BC117
BC209
BC118
SC4D7U35V-U
SC4D7U35V-U
SCD1U50V3ZY
OCP:8.5A~10.5A
L23
IND-4D7UH-16
1 2
U31
D22
SI4892DY
2 1
DUMMY-SSM5819S
1 2
SC2200P50V2KX
1 2
BC212
DUMMY-SC100P50V2JN
1 2
C369
R461
DUMMY-15KR2
ST220U4VDM-6
1 2
1 2
R462
0R2-0
2D5V_S3
D42
TC18
SSM34A
2 1
SC: Change D42 to
SSM34A for 2.5V
undershoot issue
BC210
SCD1U16V3KX
1D25V_DDRVREF_S3 need 10 mil and must near NB/DIMM
2D5V_S3
3D3V_S3
R402
470R2F
1 2
1 2
C346
1 1
A
SCD1U10V2MX-1
B
1 2
R403
470R2F
1 2
C348
SCD1U10V2MX-1
5
6
1 2
8 4
U67B
+
-
LMV822MM
R404
DUMMY-0R2-0
C359
1 2
SCD1U16V
7
C
1 2
C344
SCD1U10V2MX-1
1D25V_DDRVREF_S3
1 2
BC190
SCD47U10V3ZY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
D
Date: Sheet
MAX1715/2D5V_S3/1D35V_S0
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
34 39 Thursday, April 15, 2004
E
SC
of
Page 35
CHARGER CIRCUIT
BAT_IN#
R30
DUMMY-R3
CHARGE_OFF 16
R280
100KR2
SC: Change
constant
current to
2.94A all
the time
PM_SLP_S4# 17,28,31,34,36
DY-2N7002
BC6
SC1U10V3KX
BC5
SCD01U50V3KX
BT+SENSE 37
BAT_IN# 28,37
BT_SCL_5 28,37
BT_SDA_5 28,37
System constant power setting 98%
VCLS=4.096(VREF)*{16.2K(R7)/[40.2k(R6)+16.2K(R7)]}=1.1765V
Imax=1.1765/(20V*20m ohm)=2.94A
constant power setting=2.94*20=58.8W
BC4
D
Q3
1
2N7002
G
1 2
S
2 3
D
Q1
1
2N7002
G
1 2
S
2 3
R7
16K2R3F
R8
1 2
Q2
D
DY-52K3R3F
1
G
S
2 3
R6
1 2
40K2R3F
BC3
SCD01U50V3KX
1 2
R305
8K2R2
1 2
R5
10KR2
5V_AUX
BC2
SCD1U16V3KX
1 2
1645_CCV_1
SCD01U50V3KX
5V_AUX 5V_AUX 5V_AUX
1 2
R2
8K2R2
AD+
S1N4148-U
BC8
SC1U50V5ZY
1645_DAC
BC1
1 2
R3
100KR2
1 2
R29
1 2
DUMMY-R3
D9
LDO_VCC
BC7
SC1U50V5ZY
R4
10KR2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
5V_AUX
U10
DCIN
LDO
CLS
REF
CCS
CCI
CCV
GND
BATT
DAC
VDD
THM
SCL
SDA
MAX1645BEEI
0x12
1 2
BC170
SC1500P50V2KX
1645_DCIN
1645_CLS
1645_REF
1645_CCS
1645_CCI
1645_CCV
2ND source PN:74.01645.07S
SC1U50V5ZY
1645_TH
1 2
1 2
R27
DUMMY-R3
BC26
SCD1U50V3ZY
CVS
PDS
CSSP
CSSN
BST
DHI
LX
DLOV
DLO
PGND
CSIP
CSIN
PDL
INT#
FLASH_GPIO1
R25
1KR2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1 2
1645_CVS
1645_BST
1645_DH1_1
1645_LX
1645_DLOV
1645_DLO_1
1645_CSIP
1645_CSIN
1645_PDL
1645_ALERT#
BC21
SCD1U50V3ZY
1645_ALERT#
R346
1 2
1KR2
D13
S1N4148-U
BC23
SCD1U16V3KX
1 2
G13
1 2
GAP-CLOSE
FLASH1
1645_PDS
1645_CSSP
1645_CSSN
1 2
BC20
SCD1U50V3ZY
R306
8K2R2
BC25
SC1U50V5ZY
BC22
SCD1U16V3KX
R51
0R2-0
1 2
R47
1 2
0R2-0
5V_AUX
R307
100KR2
R308
1KR2
2
1 2
R345
10KR2
6
7
8
R49
1 2
33R2
1645_DLO_2
5V_AUX
1 2
ATTINY12_RST_1
1 2
FLASH1_1
3 1
Q13
S2N3904-U2
D12
2 1
DUMMY-SSM34
U15
SI4425DY
D
D
D S
BC24
SC1U50V5ZY
LDO_VCC
1645_DH1_2
CHARGE_LED# 14
R28
1 2
0R2-0
1 2
C298
SCD1U16V
DCBATOUT
R45
R26 4D7R3
DUMMY-R3
(10R3)
1 2
1 2
R46
DUMMY-R3
1645_LX_ 1
1 2
BC19
DUMMY-C3
L1
1 2
1 2
IND-15UH-27
1645_LX _2
1 2
BC45
DUMMY-C3
D02R7520F
1 2
(10R3) (SC1000P100V3KX)
02/09/2004
R52 4D7R3
BC43
1645_LX1
1 2
1 2
BC44
SC4D7U35V-U
SC10U35V0ZY-U
R1
1 2
D02R7520F
R23
R24
1R2J
1R2J
1 2
BC18
SCD1U50V3ZY
123
4 5
SSGD
U7
SI4425DY
DDD S
678
1 2
1 2
1 2
C4
SC10U25VKX-1-U1
4 5
GD
3
1645_AD+_1
S
2
S
1
1 2
5
D8D7D6D
S1S2S
G
4
3
U8
SI4892DY
R50
5
D8D7D6D
S1S2S
G
4
3
U9
SI4892DY
(SC1000P100V3KX)
notice sense resistor noise and trace
BL2#
CHARGE_LED#
Q7
2N7002
1
G
2 3
FLASH_GPIO1
FLASH_GPIO2
U1
2
XTAL1/PB3
3
XTAL2/PB4
1
RESET#/PB5
4
GND
ATTINY12L-4SI-8
BAT_IN#
1 2
C47
DUMMY-C2
PB1/MISO/INT0/AIN1
PB0/MOSI/AIN0
PB2/SCK/T0
(SCD1U10V2MX-1)
6
5
7
8
VCC
FLASH_GPIO2
ATTINY12_PB0
AD_IN_C 37
1 2
FLASH_GPIO1 28
FLASH_GPIO2 28
BL2# 28
ATTINY12_RESET
D
S
BT+
1 2
C5
SC10U25VKX-1-U1
BT_SCL_5
BT_SDA_5
1 2
C280
SCD1U10V2MX-1
R282
1KR2
Title
Size Document Number Rev
Custom
Date: Sheet
1 2
C26
C27
SCD01U50V3KX
5V_AUX
R283
1 2
20KR2
2
FLASH2
1 2
R281
10KR2
CHARGER&MicroP
SCD01U50V3KX
ATTINY12_PB0_1
3 1
1 2
Q4
S2N3904-U2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
R284 20KR2
of
35 39 Thursday, April 15, 2004
SC
Page 36
A
LAN Power
B
C
D
E
SCD1U50V3KX
1 2
BC124
U23
S
1
S
2
S
3
GD
4 5
SI4800DY
U11
S
1
S
2
S
3
GD
4 5
SCD1U10V2MX-1
SI4800DY
1 2
C31
3D3V_LAN_S5AC
1 2
R174
330KR2
D
8
D
7
D
6
D
8
D
7
D
6
U37
S
1
2
3
4 5
D
S
S
GD
SI4800DY
8
D
7
D
6
3D3V_S5
SCD1U10V2MX-1
1 2
C203
5V_S5 5V_S3
U88
S
D
S
S
GD
SI4800DY
U16
S
S
S
GD
SI4800DY
8
D
7
D
6
01/29/04
3D3V_S5
D
8
D
7
D
6
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Size Document Number Rev
A3
Date: Sheet
PWR Plane SW / VCC_IO_S0
Taipei Hsien 221, Taiwan, R.O.C.
MOLOKAI
36 39 Thursday, April 15, 2004
E
of
SC
DCBATOUT
C
R55
10KR2
1 2
R54
330KR2
1 2
1
2
3D3V_S3
1 2
3
4 5
1
2
3
4 5
SCD1U10V2MX-1
C49
SCD1U10V2MX-1
1 2
C723
Q12
TP0610T
1 2
SCD1U50V3ZY
1 2
1KR2
D
S
R53
Q11
2N7002
1 2
3
1 2
1
G
2 3
R56
330KR2
D14
C48
RLZ12B
1 2
D
VCC
DCBATOUT
3D3V_S5
5
4
R176
10KR2
1 2
R177
330KR2
1 2
LAN_PWR_EN
Q25
TP0610T
1 2
3
1 2
R175
1KR2
D
Q26
1
2N7002
G
S
2 3
4 4
U38
PM_SLP_S4#
AD_IN 28,31,37
3 3
1
A
2
B
GND3Y
NC7SZ32-U
Run Power Suspend Power
5V_S0 5V_S5
2 2
SCD1U10V2MX-1
1 2
DCBATOUT
R348
10KR2
1 2
R350
330KR2
1 2
1 1
PM_SLP_S3# 17,24,30,33,34 PM_SLP_S4# 17,28,31,34,35
A
Q18
TP0610T
1 2
3
1 2
R349
1KR2
D
Q15
1
2N7002
G
S
2 3
1 2
SCD1U50V3KX
C69
1 2
R69
330KR2
1 2
C70
D17
RLZ12B
3D3V_S0 3D3V_S5
B
Page 37
A
TV BD Conn
AD+_CONN
SCD1U50V3ZY
4 4
3D3V_LAN_S5AC
SCD1U16V
1 2
C485
3 3
SCD1U50V3ZY
C15
C16
LAN_LINK100 23
LAN_TX/RX 23
RJ45_6 23
RJ45_3 23
RJ45_6
RJ45_3
CN7
1
MH1
3
5
7
9
11
13
15
17
19
21
23
25
27
MH2
29
SPD-CONN30D-4
20.F0578.030
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
CRMA
LUMA LAN_LINK10
RJ45_2
RJ45_1
CRMA 15
LUMA 15 LAN_LINK10 23
RJ45_2 23
RJ45_1 23
C
BAT_IN#
BT_SDA_5
BT_SCL_5
3
3
3
D6
BAV99-2
D7
BAV99-2
D8
BAV99-2
BT+SENSE 35
5V_AUX
2
1
2
1
2
1
BT+
R19
0R2-0
D
E
Battery Conn
BAT1
8
1
1 2
C25
SC47P50V2JN
2
3
4
5
6
7
9
SYN-CON7-7
20.80203.A07
R21 100R2
BT_SCL_5 28,35
BT_SDA_5 28,35
BAT_IN# 28,35
SCD1U50V3ZY
C22
C21
1 2
SC1000P50V
1 2
R20 100R2
1 2
R22 100R2
1 2
1 2
C23
SC1000P100V3KX
C20 DUMMY-C2
1 2
1 2
C24
SC47P50V2JN
Adaptor In Circuit
D11
U13
S
P-MOS
S
S
G
SI4435DY
FET
C
HZM24NBZ
2 3
D
D
D
D
8
7
6
5
AD+_CONN
2 2
AD_OFF 28
1 1
A
AD_OFF
SCD1U50V3ZY
C43
1 2
2
D
Q10
1
2N7002
G
1 2
S
R320
100KR2
2 3
B
2222K
Q6
DTA124EUA-U1
1 2
K
3 1
R298
100KR2
SC1U50V5ZY
1 2
C14
1
2
3
4
1 2
R299
47KR2
1 2
R319
100KR2
AD+
1 2
SCD1U50V3ZY
C41
LDO_VCC
1 2
R584
10KR2
R583
1 2
10KR2
5V_AUX
14 7
13 12
D
U71F
TSAHCT14
5V_AUX
1 2
R57
100KR2
D
Q14
1
G
2N7002
S
2 3
Title
Battery Conn/TV BD Conn/Adaptor In Circuit
Size Document Number Rev
A3
Date: Sheet
AD_IN 28,31,36
5V_AUX
U44C
TSAHCT32
14 7
9
10
MOLOKAI
8
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
37 39 Thursday, April 15, 2004
E
AD_IN_C 35
of
SC
Page 38
A
B
C
D
E
DCBATOUT 5V_AUX
BATRERY LOW3 DETECTOR
Set 12V
DUMMY-649KR2F
4 4
At Dothan CPU application, POWER is 1.5V or 1.8V.
3D3V_S0 --> 1D8V_VCCA_S0
3 3
(For CPU VCCA)
3D3V_S0
SC1U10V3ZY
BC110
I max = 150 mA
U33
G913C-U
1
SHDN#
2
GND
3
IN
SET
OUT
5
4
1D8V_VCCA_S0
1 2
SC1U10V3ZY
BC107
SC20P50V2JN-U
1 2
R137
22KR3F
BC109
1 2
R138
49K9R3F
3D3V_S5 --> 1D5V_S5
1D5V_S5
I max = 150 mA
U78
G913C-U
1
SHDN#
2
GND
3
IN
1 2
SC10U6D3V5MX
C450
SET
OUT
5
4
SC1U10V3ZY
SC1U10V3ZY
BC232
3D3V_S5
SC20P50V2JN-U
1 2
1 2
BC129
R193
12K4R3D
1 2
R162
60K4R3F
BC131
1 2
R318
S-80840_VDD
DUMMY-SCD1U50V3ZY
1 2
BC28
R317
DUMMY-357KR3F-1
3D3V_S0
BC16
DUMMY-10KR2
1 2
R316
U3
1
NC
BL3#
1
OUT
NC
2
VDD
3
VSS
NC
U12
DUMMY-S-80840CNMC
5
4
2
A
GND3Y
DUMMY-NC7SZ14-U
S-80840 VDD Min 4.04V
3D3V_S0 → 1D5V_S0
U5
APL1085
SC1U10V3ZY
I max = 3 A
ADJ
VOUT
1
2
3
VIN
1 2
R18
110R3F
1 2
R17
22R3F
Vo=1.25*((R626+R629)/R626) = 1.5V
5
VCC
4
1D5V_S0
1 2
BC33
SC10U6D3V5YZ
5V_AUX
1 2
R285
10KR2
BL3 30,33
2D5V_S3 → 1D25V_S0
2 2
1D25V_S0
SC1U10V3ZY
ST100U4VBM
1 2
C381
TC19
1 1
MAX1999_SKIP 33
A
1 2
U72
4
VOUT
8
NC
7
NC
NC5GND
APL5331KAC-TR
SC10U10V5ZY
VCNTL
MAX1999_SKIP
C376
VIN
VREF
GND
2D5V_S3
1 2
C452
SCD1U16V
APL533_VREF
SCD1U50V3ZY
1 2
APL533_VREF
D
Q54
2N7002
S
2D5V_S3
1 2
R588
1KR2F
1 2
R589
C382
1KR2F
CLOSE TO U72
PIN3
B
SCD1U16V
1 2
C377
5V_S0
1
3
6
2
9
1
G
2 3
1D35V_S0 → VCC_IO_S0(1.05V)
GAP-CLOSE-PWR
G21
1 2
SCD1U16V
1 2
BC215
GAP-CLOSE-PWR
G20
1 2
ST100U4VBM
1 2
TC20
SC4D7U10V-U
1 2
VIO_S0
C
C383
1D35V_S0 VCC_IO_S0
1 2
D
3 2
S
1 2
GAP-CLOSE-PWR
G22
Q44
SUD50N03-11
1
G
1 2
BC111
SC20P50V2JN-U
1 2
DUMMY-R2
R139
SC100P50V2JN
1 2
R141
1KR2F
1 2
R140
1K5R2
SCD1U16V
BC112
5V_S0
BC121
MAX1999_REF
(2V)
U34
G1211X-U1
5
VDD
4
1 2
OUT
1
G1211_IN+
IN+
2
VSS
3
IN-
D
SCD1U16V
1 2
BC113
G1211_IN-
Title
Size Document Number Rev
A3
Date: Sheet
3D3V_S0
1 2
DUMMY-R2
1 2
R143
R142
4K75R2F
(1.05V)
DUMMY-R2
1 2
1 2
R144
R145
2K26R2F
BATTERY/LDO/Adaptor In
MOLOKAI
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
38 39 Thursday, April 15, 2004
E
of
SC
Page 39
A
B
C
D
E
3D3V_S0
4
5
4 4
U71C
TSAHCT14
3 3
6
TSLCX08-U
5V_AUX 5V_AUX 5V_AUX
U67A
1
LMV822MM
U71B
TSAHCT14
14 7
3 4
3D3V_S3
3
+
2
-
14 7
5 6
8 4
U46B
14 7
4
5
Q
PR
6
Q
CL
1
U71A
14 7
TSAHCT14
1 2
U73A
TSAHCT74
VCC
D
CLK
GND
5V_AUX
14
2
3
7
VCC_CORE_S0
3D3V_S5 3D3V_S5
U56E
14 7
11 10
TSAHCT14
C29 DUMMY-SCD1U50V3KX
1 2
C50 DUMMY-SCD1U50V3KX
1 2
AD+ DCBATOUT
C51
1 2
C46
1 2
DCBATOUT
1D5V_S0
C68 DUMMY-SCD1U50V3KX
1 2
C67
1 2
C409 DUMMY-SCD1U16V
1 2
C198
1 2
C157 DUMMY-SCD1U16V
1 2
C164
1 2
C183
1 2
C189
1 2
13 12
FOR EMI MOAT
3D3V_S0 AD+
DUMMY-SCD1U50V3KX
DUMMY-SCD1U50V3KX
5V_S0
DUMMY-SCD1U50V3KX
3D3V_S0
DUMMY-SCD1U16V
VCC_IO_S0
DUMMY-SCD1U16V
DUMMY-SCD1U16V
DUMMY-SCD1U16V
U56F
14 7
TSAHCT14
3D3V_S5
1D5V_S0 1D35V_S0
VCC_CORE_S0
3D3V_S5 3D3V_S5
U56C
14 7
5 6
TSAHCT14
C421 DUMMY-SCD1U16V
1 2
C403
DUMMY-SCD1U16V
1 2
C393
DUMMY-SCD1U16V
1 2
C356 DUMMY-SCD1U16V
1 2
C187 DUMMY-SCD1U16V
1 2
C62 DUMMY-SCD1U16V
1 2
C366 DUMMY-SCD1U16V
1 2
C93 DUMMY-SCD1U16V
1 2
9 8
3D3V_S0
1D35V_S0 2D5V_S3
3D3V_S0 1D35V_S0
3D3V_S0 VCC_IO_S0
3D3V_S0
U56D
14 7
TSAHCT14
1 2
1 2
1 2
SCD1U16V
C296
SCD1U16V
C320
SCD1U50V3ZY
C44
SCD1U50V3ZY
1 2
FOR EMI
SCD1U16V
C327
1 2
SCD1U16V
C326
1 2
SCD1U50V3ZY
1 2
C168
AD+
C37
1 2
SCD1U16V
1 2
SCD1U16V
1 2
SCD1U50V3ZY
1 2
SCD1U50V3ZY
C28
C367
1 2
C361
1 2
DCBATOUT
1 2
C45
SCD1U50V3ZY
1 2
SCD1U16V
C118
5V_S0
SCD1U16V
C423
SCD1U50V3ZY
C38
C490
1 2
1 2
1 2
SCD1U16V
C410
SCD1U16V
C199
SCD1U50V3ZY
C171
1 2
1 2
1 2
3D3V_S0
SCD1U16V
C397
SCD1U16V
C486
SCD1U50V3ZY
C392
SCD1U16V
SCD1U16V
C374
1 2
SCD1U16V
C487
1 2
1 2
SCD1U50V3ZY
1 2
C190
SCD1U16V
C188
C279
1 2
1 2
1D35V_S0 VCC_CORE_S0
SCD1U16V
C488
SCD1U50V3ZY
1 2
SCD1U16V
SCD1U16V
C132
C195
1 2
1 2
SCD1U50V3ZY
1 2
C115
C489
SB: New add
left to
power button
HOLE
2 2
1 1
H7
1
K4
GNDPADS
HOLE
H12
1
K5
GNDPADS
1
1
34.41P23.001
BOT SIDE
A
HOLE
H8
1
K6
GNDPADS
HOLE
H5
1
K3
GNDPADS
1
1
K1
GNDPADS
1
34.41D14.001
TOP SIDE
HOLE
K2
GNDPADS
1
B
H11
1
K7
GNDPADS
1
34.41P18.001
TOP SIDE
HOLE
H16
1
34.41Q08.001
BOT SIDE
34.41P25.001
TOP SIDE
K8
GNDPADS
1
K9
GNDPADS
1
HOLE
H15
1
K10
GNDPADS
GNDPADS
1
34.45V04.001
BOT SIDE
HOLE
H20
K11
1
C
1
K12
GNDPADS
1
HOLE
H10
K13
GNDPADS
1
1
34.34S02.001
BOT SIDE
HOLE
H3
HOLE
HOLE
H1
1
H9
1
SB: Change by ME
HOLE
H17
1
D
1
34.42P15.001
TOP SIDE
HOLE
HOLE
HOLE
H6
H2
1
1
5 6
1
Title
Size Document Number Rev
A3
Date: Sheet
4
3 2
HOLE
H14
H13
1
1
H4
BEETLE4
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MISC
MOLOKAI
E
HOLE
H19
1
02/02/2004
39 39 Thursday, April 15, 2004
of
SC