Dell 3646 Schematics

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PCB Number: 14003-A00

PAGE

01
02
03 Power Delivery

D D

04
05
06
07
08
09
10
11
12
13
14 CPU_VCC_CORE(NEW)
15
16
17
18
19

C C

20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

B B

36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

A A

52

53
54
55
56

57
58

TITLE
Cover Page
Block Diagram

Power Good & Reset Diagram
Clock Diagram
Power Sequence
GPIO TABLE
CPU_DDRIIIA(NEW)
CPU_DDRIIIB(NEW)
CPU_SATA/SD/PCIE/AZ(NEW)
CPU_DISPLAY(NEW)
CPU_CLK/GPIO/RTC/MISC(NEW)
CPU_USB/LPC/SMBus(NEW)

CPU_POWER(NEW)
CPU_POWER CAP1(NEW)
CPU_POWER CAP2(NEW)
CPU_ (VSS)(NEW)
CPU_(STRAP)(NEW)
LEVEL SHIFT(NEW)
DIMM_A(New)
TBD
DEBUG/XDP(NEW)
VGA(New)
TBD
TBD
USB HUB(NEW)
USB/USB30(New)
TBD
LAN_RTL8151GD
AUDIO ALC3600
TBD
TBD
WIRELESS
SATA/LED/BTN
FAN CIRCUITS/HOLE
TBD
SIO_ITE8732(NEW)
DC IN
PWR_3P3V / 5P0V
PWR_12V
1D35V_0D675_TPS51363(NEW)
1P5_S0&1P05_S0&1P8V_S0(NEW)
LDO_CPU 1V_S0&CPU 1V_S5
CPU CORE&VNN(NEW)
Run PWR/USB PWR(NEW)
DSW_POWER_CTL
PWROK(NEW)
GPU(1/5):PCI Express(NEW)
GPU(2/5): IFB(IO)(NEW)
GPU(3/5):MEMORY FBA(NEW)
GPU(4/5):GPIO/STRAP(NEW)
GPU(5/5):PWR/GND(NEW)
GPU_DDR3 128MX16(NEW)

GPU_POWER Sequence
GPU_CTF/PPLAY/LDO/MVDD
DC to DC_1D8V_RT8237(NEW)

GPU_VDDC_NCP81172

5

4

Quantity

BOM Configuration
(R):Unmount
(G):GPU
(U):UMA
(D):Debug used
(C):HDMI Level Shift
(H):HDMI Driver IC

PCB BOARD SIZE
6 Layers
185mm X 244mm

SA BUILD

INTEL Bay Trail Platform

LAN : Gb LAN RTL8151GD
AUDIO: ALC3600
SIO_EC:ITE8732

PCB1
PCB

(348.01D02.00SA)

PCB

(348.01D03.00SA)

PCB3
PCB

(348.01D04.00SA)

3

LBL1
LABEL

(45.3E702.001)

LANID :
F80F4105EB9A

LBL2
LABEL

(40.3EQ13.011)PCB2

LANID :
F80F4105EB9A

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Cover Page

Cover Page

Cover Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom
Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

1 58Tuesday, April 15, 2014

1 58Tuesday, April 15, 2014

1 58Tuesday, April 15, 2014

1

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A00

A00

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Project Name: Saffron
Project Code: 3PD01D010001
PCB Version: A00
PCB Number : 14003-1

D D

PCB BOARD SIZE
180mm x 244mm
6 Layer

Internal Slot/Header

Front/Rear IO

Chipset

VGA PORT

GPU (N15V-GM)

RGB

PCIEx2

Intel CPU

Bay Trail-D

1.35V
DDR3L

PCIEx1

CHA

DDR3L-SODIMM

LAN RTL8151GD

RJ45+USB CONN

(Rear)

BGA1170
TDP: 10W

Package

C C

HDMI

HDMI

Level Shift

HDMI

25*27*1.4

USB2.0 x2

Port1,2

USB3.0

USB3.0

(Rear)

PS8407

USB2.0

BOM Option

HDD & ODD PORT

B B

8MB SPI ROM

SATA2.0

SPI

ETHERNET (10/100/1000Mb)
USB 3.0/2.0 ports (4)
High Definition Audio
SATA ports (2)
PCIe ports (4)
LPC I/F

Port0

PCIEx1

Port3

USB2.0

WLAN(Mini Card)
BT

U2x1

USB HUB GL852G

U2x2

SD Card USB2.0x1
Pin Header

U2x1

USB2.0x2

(Front)

Pin Header

SIO ITE8732

LPC

Azalia

ALC3600

A A

FAN

<Variant Name>

<Variant Name>

<Variant Name>

Pin Header Line out

Title

Title

Title

Block Diagram

Block Diagram

(Front) (Rear)

5

4

3

2

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C
Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

2 58Tuesday, April 15, 2014

2 58Tuesday, April 15, 2014

2 58Tuesday, April 15, 2014

A00

A00

A00

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AC/DC ADAPTER

POWER: ADP-90WB
INPUT: 100~240V(1.5A)
OUTPUT: 19.5V(4.62A)

ADP_19V

SLP_S3_N

5

D D

PWR_3_5V_DCBATOUT

C C

VCC3

ISL95833

PWM

EN

Page 45

RT8243B

PWM

EN

Page 40 Page 44

1 2

NCP81172
PWM

EN

12

TPS51363

SLP_S4_N

4

CPU 1V_S5_RUNPWROK

B B

A A

NCP1589A

SIO_PSON_N

5

SWITCH

EN

CONVERTOR

EN

Page 42

RT8237C

PWM

EN

3

Page 57

SIR172DP*1

SIRA12DP*1

SI4214DDY*1

FDS8884*1
FDS6690*1

FDS8884*1
FDS6690*1

SIRA14DP*2
SIRA10DP*2

DDR_VDDQ

Imax = 6A

VCC12

Imax = 0.3A

4

SIR172ADP*1

SIRA12DP*1

SIR172ADP*1

SIRA12DP*1

12

8

1D8V_S5

Imax = 9A

4

V_3P3_A

Imax = 2.5A

V_5P0_A

Imax = 6.5A

+V_VGA_CORE

0.6V - 1.2V
TDC 26A

VCC

1D05V_RUNPWROK

LDO
APL5337

Switch
AO4468L

DGPU_PWROK

1.5V_S0_PWRGD

VNN_GFX_PWRGD

+1.5V_GPU_PG

SIO_EUP_EN#

1D8V_S0

11

SIO_EUP_EN#

1D8V_S0

11

13

10

1D35V_S0

9

1D0V_S0

7

6

14

Page 42

Page 42

VCORE_VCC

1.00V
TDC 12A

VGFX_VNN

1.00V
TDC 14A

Switch
AO4468L

Switch
AO6402A

Switch
AO6402A

Switch
AO4468L

Imax = 0.445A

LDO
APL5912

Switch
AO4468L

LDO
APL5930

LDO
APL5930

LDO
APL5912

LDO
APL5912

VDD_VTT

Imax = 1A

1D35V_S0

Page 56

Page 43

Page 43

Page 43

Page 44

Page 56

3

Page 46

Page 46

3

SB3V

Imax = 1.5A

VCC3

Imax = 0.71A

SB5V

VCC

Imax = 6.23A

+V_1P5_VGA

Imax = 2.8A

1D8V_S0

Imax = 0.018A

1D5V_S0

Imax = 0.39A

1D05V_S0

Imax = 1.1A

1D0V_S0

Imax = 3A

+V_1P05_VGA

Imax = 1.1A

SB3V

LDO
APL5930

EN

2

1D0V_S5

Imax = 0.35A

2

V_3P0_BAT_VREG

1

VCORE

VGFX

VDDQ

1D0V_S5

1D8V_S5

V_3P3_A

1D0V_S0

1D05V_S0

1P35V_S0

1D8V_S0

VCC3

VDD_VTT

19V_AMP_PVCC

V_3P3_PCIVAUX

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Bay Trail SoC

VCC

0.40 - 1.14V ; 12A TDC

VNN

0.50 - 1.05V ; 14A TDC

VDDQ 1.35V ; 1.25A

V1P0A 1.00V ; 0.35A

V1P8A 1.80V ; 0.065A

V3P3A 3.30V ; 0.055A

V1P0S

V1P05S 1.05V ; 1.1A

V1P35S 1.35V ; 0.445A

V1P8S

V3P3S

VDDQ_VTT 0.675V ; 1A

VRTC

DDR_VDDQ
VDD_VTT

VCC
V_3P3_A

1D8V_SPI

VCC12

VCC5_USB

VCC5_USB

V_3P3_LAN
V_1P05_LAN

3V_VA
V_5_CODEC

DVCC33_2136
SWR_V12

VCC3

V_1P5_PCIE

VCC3_CAM

HUB_VCC

V_5HDD

V_5HDD

Power Delivery

Power Delivery

Power Delivery

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

1

1.00V ; 3A

1.80V ; 0.018A

3.30V ; 0.03A

3V ; 100uA (Avg. 6uA)

SO-DIMM

V_MEM_S
V_MEM_VTT

SIO- IT8732

3.3V; 20mA

3.3V; 9.37mA

BIOS ROM

1.8V; 67mA

CPU FAN

12V; 300mA

USB2.0 VBUS

5V; 500mA

USB3.0 VBUS

5V; 900mA

LAN- RTL8151GD

3.3V; 70mA

(Internal Switch)

1.05V;300mA

HD CODEC ALC3661-CG

3.3V; 50mA
5V; 50mA

AMP TPA3131

19V; 270mA

DPtoLVDS_ RTD2136R

3.3V; 180mA

1.2V; 210mA (Internal Switch)

Card Reader RTS5170-GR

3.3V; 120mA

PCI-E Mini Card

3.3V; 1.1A

1.5V; 0.38A

WEBCAM

3.3V; 240mA

USB HUB - GL850-G

5V; 52.4mA

HDD

5V; 1.1A

Slim ODD

5V; 1.5A

TDP = 10W

1.35V ; 3.75A

0.675V ; 1A

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

3 58Tuesday, April 15, 2014

3 58Tuesday, April 15, 2014

3 58Tuesday, April 15, 2014

X3

A00

A00

A00

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Bay-Trail Soc

D D

Battery

1

RTC_VCC

RTC_RST#

PMC_RSMRST#

PMC_PWRBTN#

Codec

RESET#

11

DDR3_DRAM_PWROK

19

SYS_PWRGD

C C

2

DCBATOUT

B B

11b

VNN_GFX_PWRGD

12

1D0V_S0

21b

AZ_RST_N_M

V_5P0_A

V_3P3_A

1D0V_S0

1D05V_S0

HDA_RST#

DRAM_VDD_S4_PWROK

PMC_CORE_PWROK

4

SIO_EUP_EN#

13

1D05V_RUNPWROK

14

1D35V_S0

PMC_SLP_S4#

PMC_SLP_S3#

PMC_PLTRST#

SB3V

8

SLP_S4_N

9

SLP_S3_N

20

PLTRST_N

SB3V

1D0V_S5

1D35V_S0

1D5V_S0

5a

5b

1D0V_S5SB5V

1D8V_S5

15

1.5V_S0_PWRGD

16 VCC3

1D8V_S0

8a

SLP_S4_N

10

SIO_PSON_N

1D8V_S0

VCC

6

RSMRST_N

7

SW_ON_N_SIO

10 21a

SIO_PSON_N

DDR_VDDQ

12V_S0

SIO - ITE8732

RSMRST#

PWRON#

SUSC#

SUSB#

LRESET#

PSON#

9a

SLP_S3_N

17a
VCC

VNN_GFX
VCORE

PANSWH#

5VSB_CTRL#

SYS_3VSB

ATXPG

PCIRST1#

PCIRST3#

PWROK1

DDR_0D675V

VCORE_PWRGD

SLP_S3_N

PWRGD_3V

4

SIO_EUP_EN#

21a

PCIRST1#

PCIRST3#

18

PWRGD_3V

11a

9b

18

AND

SYS_PWRGD

3

PWRBTN_N

5

SB3V

17

VCC3

19

Power Button

GPU

Giga LAN

WirelessCard

17b

A A

+V_3P3_VGA DGPU_PWROK

VGA_CORE

19a

+V_1P5_VGA

+V_1P05_VGA

<Variant Name>

<Variant Name>

5

<Variant Name>

T

T

Title

itle

itle

Power Good & Reset Diagram

Power Good & Reset Diagram

Power Good & Reset Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

4 58Tuesday, April 15, 2014

4 58Tuesday, April 15, 2014

4 58Tuesday, April 15, 2014

A00

A00

A00

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Bay-Trail Soc

D D

C C

DRAM0_CKP_0(M50)
DRAM0_CKN_0(M48)

DRAM0_CKP_2(P50)
DRAM0_CKN_2(P48)

DRAM1_CKP_0(AV50)
DRAM1_CKN_0(AV48)

DRAM1_CKP_2(AT50)
DRAM1_CKN_2(AT48)

PCIE_CLKN_0(AF6)

PCIE_CLKP_1(AF7)
PCIE_CLKN_1(AF9)

PCIE_CLKP_2(AK6)
PCIE_CLKN_2(AK4)

PCIE_CLKP_3(AM6)
PCIE_CLKN_3(AM4)

ILB_LPC_CLK_0(BG15)

ILB_LPC_CLK_0(BH14)

PCU_SPI_CLK(C22)

CK_M_DDR0_A_DP/CK_M_DDR0_A_DN
CK_M_DDR1_A_DP/CK_M_DDR1_A_DN

100MHzPCIE_CLKP_0(AF4)

100MHz

100MHz

25MHz

25MHz

24MHz/48MHz/100MHz

DIMM1

GPU (N15S-GM)

Mini PCIE WLAN+BT

LAN RTL8151GD

SIO IT8732F

PCICLK(47)

LPC Debug Port

SPI ROM

CLKIN(37)

27MHz

25MHz

48MHz

Rs

24MHz

AUDIO ALC3661

HDA_CLK(BJ21)

B B

ICLK_ICOMP(AD14)
ICLK_RCOMP(AD13)

ICLK_OSCIN

25MHz

32.768KHz

A A

5

ICLK_OSCOUT

ILB_RTC_X1

ILB_RTC_X2

ICLK_DDI_TERMP(AM3)
ICLK_DDI_TERMN(AM2)

ICLK_SATA_TERMP(BB10)
ICLK_SATA_TERMN(BC10)

ICLK_USB_TERMP(D10)
ICLK_USB_TERMN(F10)

ICLK_PCIE_TERMP(BB7)
ICLK_PCIE_TERMN(BB5)

4

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Clock Diagram

Clock Diagram

Clock Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

5 58Tuesday, April 15, 2014

5 58Tuesday, April 15, 2014

5 58Tuesday, April 15, 2014

A00

A00

A00

5

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Source Destination Signal

RTC Battery CPU/SIO

D D

RTC Battery CPU/SIO

Adaptor

VRs CPU/SIO
Button SIO

SIO VRs SIO_EUP_EN#

RTC_VCC

RTC_TEST#
RTC_RST#

DCBATOUT

MB

V_3P3_A
PWRBTN_N

SB3V/SB5VVRs MB

VRs MB

VRs MB

1D0V_S5

1D8V_S5

RSMRST_NSIO CPU

C C

CPU MB

PMC_SUSCLKCPU SIO

PMC_SUSPWRDNACK

SIO CPU PMC_PWBTN_N

CPU SIO / VRs

VRs MB

SLP_S4#

DDR_VDDQ

DDR3_DRAM_PWROKCPUMB

SLP_S3#

SIO / VRsCPU

SIO VRs

SIO_PSON#

VCC12VRs MB

VNN/VCOREVRs CPU

B B

VRs

VRs

1D0V_S0

MB

1D05V_S0

MBVRs

1D35V_S0

MB

VRs 1D5V_S0MB

VRs

VRs

1D8V_S0

MB

VCC3/VCC5

MBVRs

V_SM_VTTSO-DIMM

PWRGD_3VSIO MB

SIO PMC_CORE_PWROKCPU

A A

SIO CPU

CPU MB

CPU MB

5

DRAM_CORE_PWROK

PMC_SUS_STAT#

PMC_PLTRST#

4

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

Power Sequence

Power Sequence

Power Sequence

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

6 58Tuesday, April 15, 2014

6 58Tuesday, April 15, 2014

6 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

D D

C C

4

3

2

1

B B

<Variant Name>

<Variant Name>

A A

5

4

3

2

<Variant Name>

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

TBD

TBD

TBD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

7 58Tuesday, April 15, 2014

7 58Tuesday, April 15, 2014

7 58Tuesday, April 15, 2014

1

A00

A00

A00

5

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DDR_VDDQ

MEM_A0MEM_A1

M_DATA_A[0..63]21

D D

C C

B B

A A

M_DATA_A63
M_DATA_A62
M_DATA_A61
M_DATA_A60
M_DATA_A59
M_DATA_A58
M_DATA_A57
M_DATA_A56
M_DATA_A55
M_DATA_A54
M_DATA_A53
M_DATA_A52
M_DATA_A51
M_DATA_A50
M_DATA_A49
M_DATA_A48
M_DATA_A47
M_DATA_A46
M_DATA_A45
M_DATA_A44
M_DATA_A43
M_DATA_A42
M_DATA_A41
M_DATA_A40
M_DATA_A39
M_DATA_A38
M_DATA_A37
M_DATA_A36
M_DATA_A35
M_DATA_A34
M_DATA_A33
M_DATA_A32
M_DATA_A31
M_DATA_A30
M_DATA_A29
M_DATA_A28
M_DATA_A27
M_DATA_A26
M_DATA_A25
M_DATA_A24
M_DATA_A23
M_DATA_A22
M_DATA_A21
M_DATA_A20
M_DATA_A19
M_DATA_A18
M_DATA_A17
M_DATA_A16
M_DATA_A15
M_DATA_A14
M_DATA_A13
M_DATA_A12
M_DATA_A11
M_DATA_A10
M_DATA_A9
M_DATA_A8
M_DATA_A7
M_DATA_A6
M_DATA_A5
M_DATA_A4
M_DATA_A3
M_DATA_A2
M_DATA_A1
M_DATA_A0

M_MAA_A[0..15]21

M_MA_DM[7..0]21

M_DQS_A_DP[0..7]21

M_DQS_A_DN[0..7]21

M_SBS_A221
M_SBS_A121
M_SBS_A021

CK_M_DDR0_A_DP21
CK_M_DDR0_A_DN21
CK_M_DDR1_A_DP21
CK_M_DDR1_A_DN21

M_SCS_A_N021
M_SCS_A_N121

M_ODT_A021
M_ODT_A121

M_SCKE_A021
M_SCKE_A121

M_CAS_A_N21
M_WE_A_N21
M_RAS_A_N21

DDR3_DRAMRST_N21
DDR3_DRAM_PWROK48
DDR3_VCCA_PWRGD48

4

DDR_VDDQ 14,16,21,42,48

CK_M_DDR0_A_DP
CK_M_DDR0_A_DN
CK_M_DDR1_A_DP
CK_M_DDR1_A_DN

M_SCS_A_N0
M_SCS_A_N1

M_ODT_A0
M_ODT_A1

M_SCKE_A0
M_SCKE_A1

M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_MAA_A15

M_MA_DM0
M_MA_DM1
M_MA_DM2
M_MA_DM3
M_MA_DM4
M_MA_DM5
M_MA_DM6
M_MA_DM7

M_DQS_A_DP7
M_DQS_A_DP6
M_DQS_A_DP5
M_DQS_A_DP4
M_DQS_A_DP3
M_DQS_A_DP2
M_DQS_A_DP1
M_DQS_A_DP0

M_DQS_A_DN7
M_DQS_A_DN6
M_DQS_A_DN5
M_DQS_A_DN4
M_DQS_A_DN3
M_DQS_A_DN2
M_DQS_A_DN1
M_DQS_A_DN0

M_SBS_A2
M_SBS_A1
M_SBS_A0

1 2

R526

1 2

R529

1 2

R527

1 2

R535

1 2

R534

DDR3_VREF

ICLK_DRAM_TERMN

100KR2F-L1-GP

ICLK_DRAM_TERMN_AF42

100KR2F-L1-GP

DRAM_RCOMP_0

23D2R2F-GP

DRAM_RCOMP_1

29D4R2F-GP

DRAM_RCOMP_2

162R2F-GP

3

M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_MAA_A15

M_MA_DM0
M_MA_DM1
M_MA_DM2
M_MA_DM3
M_MA_DM4
M_MA_DM5
M_MA_DM6
M_MA_DM7

M_RAS_A_N
M_CAS_A_N
M_WE_A_N

M_SBS_A0
M_SBS_A1
M_SBS_A2

M_SCS_A_N0
M_SCS_A_N1

M_SCKE_A0
M_SCKE_A1

M_ODT_A0
M_ODT_A1

CK_M_DDR0_A_DP
CK_M_DDR0_A_DN

CK_M_DDR1_A_DP
CK_M_DDR1_A_DN

DDR3_DRAMRST_N

DDR3_VREF

ICLK_DRAM_TERMN
ICLK_DRAM_TERMN_AF42

DDR3_DRAM_PWROK
DDR3_VCCA_PWRGD

DRAM_RCOMP_0
DRAM_RCOMP_1
DRAM_RCOMP_2

CPU1A

K45

DRAM0_MA_0

H47

DRAM0_MA_1

L41

DRAM0_MA_2

H44

DRAM0_MA_3

H50

DRAM0_MA_4

G53

DRAM0_MA_5

H49

DRAM0_MA_6

D50

DRAM0_MA_7

G52

DRAM0_MA_8

E52

DRAM0_MA_9

K48

DRAM0_MA_10

E51

DRAM0_MA_11

F47

DRAM0_MA_12

J51

DRAM0_MA_13

B49

DRAM0_MA_14

B50

DRAM0_MA_15

G36

DRAM0_DM_0

B36

DRAM0_DM_1

F38

DRAM0_DM_2

B42

DRAM0_DM_3

P51

DRAM0_DM_4

V42

DRAM0_DM_5

Y50

DRAM0_DM_6

Y52

DRAM0_DM_7

M4 5

DRAM0_RAS

M4 4

DRAM0_CAS

H51

DRAM0_WE

K47

DRAM0_BS_0

K44

DRAM0_BS_1

D52

DRAM0_BS_2

P44

DRAM0_CS_0

P45

DRAM0_CS_2

C47

DRAM0_CKE_0

D48

RESERVED_D48

F44

DRAM0_CKE_2

E46

RESERVED_E46

T41

DRAM0_ODT_0

P42

DRAM0_ODT_2

M5 0

DRAM0_CKP_0

M4 8

DRAM0_CKN_0

P50

DRAM0_CKP_2

P48

DRAM0_CKN_2

P41

DRAM0_DRAMRST

AF44

DRAM_VREF

AH42

ICLK_DRAM_TERMN

AF42

ICLK_DRAM_TERMN_AF42

AD42

DRAM_VDD_S4_PWROK

AB42

DRAM_CORE_PWROK

AD44

DRAM_RCOMP_0

AF45

DRAM_RCOMP_1

AD45

DRAM_RCOMP_2

AF40

RESERVED_AF40

AF41

RESERVED_AF41

AD40

RESERVED_AD40

AD41

RESERVED_AD41

BAY-TRAIL-GP

(71.00BAY.C0U)

BAY TRAIL-M/D SOC

2

1 OF 13

DRAM0_DQ_0
DRAM0_DQ_1
DRAM0_DQ_2
DRAM0_DQ_3
DRAM0_DQ_4
DRAM0_DQ_5
DRAM0_DQ_6
DRAM0_DQ_7
DRAM0_DQ_8

DRAM0_DQ9_C32

DRAM0_DQ_10
DRAM0_DQ_11
DRAM0_DQ_12
DRAM0_DQ_13
DRAM0_DQ_14
DRAM0_DQ_15
DRAM0_DQ_16
DRAM0_DQ_17
DRAM0_DQ_18
DRAM0_DQ_19
DRAM0_DQ_20
DRAM0_DQ_21
DRAM0_DQ_22
DRAM0_DQ_23
DRAM0_DQ_24
DRAM0_DQ_25
DRAM0_DQ_26
DRAM0_DQ_27
DRAM0_DQ_28
DRAM0_DQ_29
DRAM0_DQ_30
DRAM0_DQ_31
DRAM0_DQ_32
DRAM0_DQ_33
DRAM0_DQ_34
DRAM0_DQ_35
DRAM0_DQ_36
DRAM0_DQ_37
DRAM0_DQ_38
DRAM0_DQ_39
DRAM0_DQ_40
DRAM0_DQ_41
DRAM0_DQ_42
DRAM0_DQ_43
DRAM0_DQ_44
DRAM0_DQ_45
DRAM0_DQ_46
DRAM0_DQ_47
DRAM0_DQ_48
DRAM0_DQ_49
DRAM0_DQ_50
DRAM0_DQ_51
DRAM0_DQ_52
DRAM0_DQ_53
DRAM0_DQ_54
DRAM0_DQ_55
DRAM0_DQ_56
DRAM0_DQ_57
DRAM0_DQ_58
DRAM0_DQ_59
DRAM0_DQ_60
DRAM0_DQ_61
DRAM0_DQ_62
DRAM0_DQ_63

DRAM0_DQSP_0
DRAM0_DQSN_0
DRAM0_DQSP_1
DRAM0_DQSN_1
DRAM0_DQSP_2
DRAM0_DQSN_2
DRAM0_DQSP_3
DRAM0_DQSN_3
DRAM0_DQSP_4
DRAM0_DQSN_4
DRAM0_DQSP_5
DRAM0_DQSN_5
DRAM0_DQSP_6
DRAM0_DQSN_6
DRAM0_DQSP_7
DRAM0_DQSN_7

DDR_VDDQ

12

DDR3_VREF_R

12

M_DATA_A0

M3 6

M_DATA_A1

J36

M_DATA_A2

P40

M_DATA_A3

M4 0

M_DATA_A4

P36

M_DATA_A5

N36

M_DATA_A6

K40

M_DATA_A7

K42

M_DATA_A8

B32

M_DATA_A9

C32

M_DATA_A10

C36

M_DATA_A11

A37

M_DATA_A12

C33

M_DATA_A13

A33

M_DATA_A14

C37

M_DATA_A15

B38

M_DATA_A16

F36

M_DATA_A17

G38

M_DATA_A18

F42

M_DATA_A19

J42

M_DATA_A20

G40

M_DATA_A21

C38

M_DATA_A22

G44

M_DATA_A23

D42

M_DATA_A24

A41

M_DATA_A25

C41

M_DATA_A26

A45

M_DATA_A27

B46

M_DATA_A28

C40

M_DATA_A29

B40

M_DATA_A30

B48

M_DATA_A31

B47

M_DATA_A32

K52

M_DATA_A33

K51

M_DATA_A34

T52

M_DATA_A35

T51

M_DATA_A36

L51

M_DATA_A37

L53

M_DATA_A38

R51

M_DATA_A39

R53

M_DATA_A40

T47

M_DATA_A41

T45

M_DATA_A42

Y40

M_DATA_A43

V41

M_DATA_A44

T48

M_DATA_A45

T50

M_DATA_A46

Y42

M_DATA_A47

AB40

M_DATA_A48

V45

M_DATA_A49

V47

M_DATA_A50

AD48

M_DATA_A51

AD50

M_DATA_A52

V48

M_DATA_A53

V50

M_DATA_A54

AB44

M_DATA_A55

Y45

M_DATA_A56

V52

M_DATA_A57

W51

M_DATA_A58

AC53

M_DATA_A59

AC51

M_DATA_A60

W53

M_DATA_A61

Y51

M_DATA_A62

AD52

M_DATA_A63

AD51

M_DQS_A_DP0

J38

M_DQS_A_DN0

K38

M_DQS_A_DP1

C35

M_DQS_A_DN1

B34

M_DQS_A_DP2

D40

M_DQS_A_DN2

F40

M_DQS_A_DP3

B44

M_DQS_A_DN3

C43

M_DQS_A_DP4

N53

M_DQS_A_DN4

M5 2

M_DQS_A_DP5

T42

M_DQS_A_DN5

T44

M_DQS_A_DP6

Y47

M_DQS_A_DN6

Y48

M_DQS_A_DP7

AB52

M_DQS_A_DN7

AA51

R545
4K7R2F-GP

R542
4K7R2F-GP

1A 0115 Allen modify

R539 0R0402-PAD-2-GP

12

12

C372
SCD1U16V2KX-3GP

1

DDR3_VREF

12

C385
SCD1U16V2KX-3GP

(R)

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

8 58Tuesday, April 15, 2014

8 58Tuesday, April 15, 2014

8 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

D D

C C

B B

AY45
BB47

AW41

BB44
BB50

BC53

BB49
BF50

BC52

BE52
AY48
BE51

BD47

BA51
BH49
BH50

BD38
BH36
BC36
BH42

AT5 1
AM42

AK50

AK52

AV45

AV44

BB51

AY47

AY44

BF52

AT4 4

AT4 5

BG47

BE46
BD44

BF48

AP41

AT4 2

AV50

AV48

AT5 0

AT4 8

AT4 1

CPU1B

DRAM1_MA_0
DRAM1_MA_1
DRAM1_MA_2
DRAM1_MA_3
DRAM1_MA_4
DRAM1_MA_5
DRAM1_MA_6
DRAM1_MA_7
DRAM1_MA_8
DRAM1_MA_9
DRAM1_MA_10
DRAM1_MA_11
DRAM1_MA_12
DRAM1_MA_13
DRAM1_MA_14
DRAM1_MA_15

DRAM1_DM_0
DRAM1_DM_1
DRAM1_DM_2
DRAM1_DM_3
DRAM1_DM_4
DRAM1_DM_5
DRAM1_DM_6
DRAM1_DM_7

DRAM1_RAS
DRAM1_CAS
DRAM1_WE

DRAM1_BS_0
DRAM1_BS_1
DRAM1_BS_2

DRAM1_CS_0
DRAM1_CS_2

DRAM1_CKE_0
RESERVED_BE46
DRAM1_CKE_2
RESERVED_BF48

DRAM1_ODT_0
DRAM1_ODT_2

DRAM1_CKP_0
DRAM1_CKN_0

DRAM1_CKP_2
DRAM1_CKN_2

DRAM1_DRAMRST

BAY TRAIL-M/D SOC

2 OF 13

DRAM1_DQ_0
DRAM1_DQ_1
DRAM1_DQ_2
DRAM1_DQ_3
DRAM1_DQ_4
DRAM1_DQ_5
DRAM1_DQ_6
DRAM1_DQ_7
DRAM1_DQ_8

DRAM1_DQ_9
DRAM1_DQ_10
DRAM1_DQ_11
DRAM1_DQ_12
DRAM1_DQ_13
DRAM1_DQ_14
DRAM1_DQ_15
DRAM1_DQ_16
DRAM1_DQ_17
DRAM1_DQ_18
DRAM1_DQ_19
DRAM1_DQ_20
DRAM1_DQ_21
DRAM1_DQ_22
DRAM1_DQ_23
DRAM1_DQ_24
DRAM1_DQ_25
DRAM1_DQ_26
DRAM1_DQ_27
DRAM1_DQ_28
DRAM1_DQ_29
DRAM1_DQ_30
DRAM1_DQ_31
DRAM1_DQ_32
DRAM1_DQ_33
DRAM1_DQ_34
DRAM1_DQ_35
DRAM1_DQ_36
DRAM1_DQ_37
DRAM1_DQ_38
DRAM1_DQ_39
DRAM1_DQ_40
DRAM1_DQ_41
DRAM1_DQ_42
DRAM1_DQ_43
DRAM1_DQ_44
DRAM1_DQ_45
DRAM1_DQ_46
DRAM1_DQ_47
DRAM1_DQ_48
DRAM1_DQ_49
DRAM1_DQ_50
DRAM1_DQ_51
DRAM1_DQ_52
DRAM1_DQ_53
DRAM1_DQ_54
DRAM1_DQ_55
DRAM1_DQ_56
DRAM1_DQ_57
DRAM1_DQ_58
DRAM1_DQ_59
DRAM1_DQ_60
DRAM1_DQ_61
DRAM1_DQ_62
DRAM1_DQ_63

DRAM1_DQSP_0
DRAM1_DQSN_0
DRAM1_DQSP_1
DRAM1_DQSN_1
DRAM1_DQSP_2
DRAM1_DQSN_2
DRAM1_DQSP_3
DRAM1_DQSN_3
DRAM1_DQSP_4
DRAM1_DQSN_4
DRAM1_DQSP_5
DRAM1_DQSN_5
DRAM1_DQSP_6
DRAM1_DQSN_6
DRAM1_DQSP_7
DRAM1_DQSN_7

BG38
BC40
BA42
BD42
BC38
BD36
BF42
BC44
BH32
BG32
BG36
BJ37
BG33
BJ33
BG37
BH38
AU36
AT3 6
AV40
AT4 0
BA36
AV36
AY42
AY40
BJ41
BG41
BJ45
BH46
BG40
BH40
BH48
BH47
AY52
AY51
AP52
AP51
AW51
AW53
AR51
AR53
AP47
AP45
AK40
AM41
AP48
AP50
AK42
AH40
AM45
AM47
AF48
AF50
AM48
AM50
AH44
AK45
AM52
AL51
AG53
AG51
AL53
AK51
AF52
AF51

BF40
BD40
BG35
BH34
BA38
AY38
BH44
BG43
AU53
AV52
AP42
AP44
AK47
AK48
AH52
AJ51

BAY-TRAIL-GP

(71.00BAY.C0U)

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

9 58Tuesday, April 15, 2014

9 58Tuesday, April 15, 2014

9 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

1D8V_S0

VCC3

1D8V_S0 12,13,15,17,19,23,25,30,35,38,43,46
VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,38,39,46,56

X2 GPU

PEG_RXP049

D D

PEG_RXN049

PEG_TXP049
PEG_TXN049

PEG_RXP149
PEG_RXN149

PEG_TXP149
PEG_TXN149

Wireless

HSI_C_DP234

HSI_C_DN234

HSO_C_DP234
HSO_C_DN234

Giga LAN

HSI_LAN_DP330
HSI_LAN_DN330

C C

HDD

ODD

B B

HSO_C_LAN_DP330
HSO_C_LAN_DN330

SATA 2.0

SATAHDR_TX_DP035
SATAHDR_TX_DN035
SATAHDR_RX_DN035
SATAHDR_RX_DP035

SATAHDR_TX_DP135
SATAHDR_TX_DN135
SATAHDR_RX_DN135
SATAHDR_RX_DP135

LANCLK_REQ_N30

SB 1129 Allen modify

0808 Allen modify

SATAHDR_TX_DP0
SATAHDR_TX_DN0

HDD

ODD

0R0402-PAD-2-GP

R518
R517

remove OSD_UP/DN (Patrick)

R519 402R2F-GP

remove Panel select pin (Patrick)

remove PWRCN_DET_N_C (Patrick)

1 2

49D9R2F-GP

12
12

0R0402-PAD-2-GP

12

R520

SATAHDR_RX_DP0
SATAHDR_RX_DN0

SATAHDR_TX_DP1
SATAHDR_TX_DN1

SATAHDR_RX_DP1
SATAHDR_RX_DN1

ICLK_SATA_TERMP

ICLK_SATA_TERMN

APU_SATA_LED_N
SATA_RCOMP_DP

SATA_RCOMP_DN

MMC1_RCOMP

SD

1 2

R533

LPE_I2S2_DATAOUT19

LPE_I2S2_FRM19

APU_SATA_LED_N35

A A

APU_PROCHOT#39,45,52

HDA BUS

AUD_LINK_SDO31
AUD_LINK_SYNC31
AUD_LINK_BCLK31

AUD_LINK_RST_N31

AUD_LINK_SDIN31

5

49D9R2F-GP

AUD_LINK_SYNC AZ_SYNC_M
AUD_LINK_SDO AZ_SDOUT_M
AUD_LINK_BCLK AZ_BCLK_M
AUD_LINK_RST_N

12

(R)

C86
SCD01U25V2KX-3GP

Follow Nadia ESD
02/23

4

SD3_RCOMP

RN1

1
2
3
4 5

SRN33J-4-GP

CPU1D

BF6

SATA_TXP_0

BG7

SATA_TXN_0

AU16

SATA_RXP_0

AV16

SATA_RXN_0

BD10

SATA_TXP_1

BF10

SATA_TXN_1

AY16

SATA_RXP_1

BA16

SATA_RXN_1

BB10

ICLK_SATA_TERMP

BC10

ICLK_SATA_TERMN

BA12

SATA_GP0

AY14

SATA_GP1

AY12

SATA_LED

AU18

SATA_RCOMP_P_AU18

AT18

SATA_RCOMP_N_AT18

AT22

MMC1_CLK

AV20

MMC1_D0

AU22

MMC1_D1

AV22

MMC1_D2

AT20

MMC1_D3

AY24

MMC1_D4

AU26

MMC1_D5

AT26

MMC1_D6

AU20

MMC1_D7

AV26

MMC1_CMD

BA24

MMC1_RST

AY18

MMC1_RCOMP

BA18

SD2_CLK

AY20

SD2_D0

BD20

SD2_D1

BA20

SD2_D2

BD18

SD2_D3_CD

BC18

SD2_CMD

AY26

SD3_CLK

AT28

SD3_D0

BD26

SD3_D1

AU28

SD3_D2

BA26

SD3_D3

BC24

SD3_CD#

AV28

SD3_CMD

BF22

SD3_1P8EN

BD22

SD3_PWREN

BF26

SD3_RCOMP

BAY-TRAIL-GP

(71.00BAY.C0U)

8
7
6

AZ_RST_N_M

3

BAY TRAIL-M/D SOC

PCIE_RCOMP_P_AP14

PCIE_RCOMP_N_AP13

LPE_I2S2_DATAOUT

4 OF 13

PCIE_TXP_0
PCIE_TXN_0

PCIE_RXP_0
PCIE_RXN_0

PCIE_TXP_1
PCIE_TXN_1

PCIE_RXP_1
PCIE_RXN_1

PCIE_TXP_2
PCIE_TXN_2

PCIE_RXP_2
PCIE_RXN_2

PCIE_TXP_3
PCIE_TXN_3

PCIE_RXP_3
PCIE_RXN_3

VSS_BB7
VSS_BB5

PCIE_CLKREQ_0
PCIE_CLKREQ_1
PCIE_CLKREQ_2
PCIE_CLKREQ_3

SD3_WP_BD5

RESERVED_BB4
RESERVED_BB3

RESERVED_AV10

RESERVED_AV9

HDA_LPE_RCOMP

HDA_RST

HDA_SYNC

HDA_CLK
HDA_SDO
HDA_SDI0
HDA_SDI1

HDA_DOCKRST

HDA_DOCKEN
LPE_I2S2_CLK

LPE_I2S2_FRM

LPE_I2S2_DATAIN

RESERVED_P34
RESERVED_N34

RESERVED_AK9
RESERVED_AK7

PROCHOT

P_GFX_TXP0

AY7

P_GFX_TXN0

AY6
AT14

AT13

P_GFX_TXP1

AV6

P_GFX_TXN1 PEG_TXN1

AV4
AT10

AT9

C_GPP_TXP2 HSO_C_DP2

AT7

C_GPP_TXN2

AT6
AP12

AP10

HSO_LAN_DP3

AP6

HSO_LAN_DN3

AP4
AP9

AP7

1A 0115 Allen modify

VSS_BB7_TP

BB7

VSS_BB5_TP

BB5
BG3

BD7
BG5
BE3
BD5

AP14
AP13

BB4
BB3
AV10
AV9

BF20
BG22
BH20
BJ21
BG20
BG19
BG21
BH18
BG18

BF28
BA30
BC30
BD28

P34
N34

AK9
AK7

C24

PCIE_CLKREQ_0
PCIE_CLKREQ_1
PCIE_CLKREQ_2
LANCLK_REQ_N

PCIE_RCOMP_P_AP14_AP14
PCIE_RCOMP_N_AP13_AP13

HDA_LPE_RCOMP

12

2

1 2

C325 SCD1U16V2KX-3GP(G)

1 2

C322 SCD1U16V2KX-3GP(G)

1 2

C324 SCD1U16V2KX-3GP(G)

1 2

C328 SCD1U16V2KX-3GP(G)

1 2

C54 SCD1U16V2KX-3GP

1 2

C56 SCD1U16V2KX-3GP

1 2

C315 SCD1U16V2KX-3GP

1 2

C316 SCD1U16V2KX-3GP

PR219 0R0402-PAD-2-GP
PR218 0R0402-PAD-2-GP

1A 0115 Allen modify

R490 0R0402-PAD-2-GP

C313
SC47P50V2JN-3GP

(R)

12
12

R510 10KR2J-3-GP
R512 10KR2J-3-GP
R515 10KR2J-3-GP

remove OSD MENU (Patrick)

12

R513 402R2F-GP

1 2

R522 49D9R2F-GP

LPE_I2S2_FRM
LPE_I2S2_DATAOUT

12

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

09_FT3_PCIE

09_FT3_PCIE

09_FT3_PCIE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

PEG_TXP0
PEG_TXN0

PEG_RXP0
PEG_RXN0

PEG_TXP1

PEG_RXP1
PEG_RXN1

12
12
12

APU_PROCHOT#APU_PROCHOT#_R

HSO_C_DN2
HSI_C_DP2

HSI_C_DN2
HSO_C_LAN_DP3

HSO_C_LAN_DN3
HSI_LAN_DP3

HSI_LAN_DN3

AZ_RST_N_M
AZ_SYNC_M
AZ_BCLK_M
AZ_SDOUT_M
AUD_LINK_SDIN
HDA_SDI1_TP

Wireless

Giga LAN

1D8V_S0

0808 Allen modify

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

10 58Tuesday, April 15, 2014

10 58Tuesday, April 15, 2014

10 58Tuesday, April 15, 2014

1

X2 GPU

1

TP10

A00

A00

A00

5

Vinafix.com

4

3

2

1

1D8V_S0

1D8V_S0 10,12,13,15,17,19,23,25,30,35,38,43,46

HDMI

D D

C C

B B

DDSP_C_TX_DP_025
DDSP_C_TX_DN_025
DDSP_C_TX_DP_125
DDSP_C_TX_DN_125
DDSP_C_TX_DP_225
DDSP_C_TX_DN_225
DDSP_C_TX_DP_325
DDSP_C_TX_DN_325

DDSP_C_HPD25
DDPC_CTRL_CLK25

DDPC_CTRL_DATA19,25

DDI1_DDCDATA19

Debug VGA

XDP

VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC_3V
VGA_VSYNC_3V
VGA_FCH_DDCSCL
VGA_FCH_DDCSDA

VGA_RED24
VGA_GREEN24
VGA_BLUE24
VGA_HSYNC_3V24

VGA_VSYNC_3V24
VGA_FCH_DDCSCL24
VGA_FCH_DDCSDA24

GPIO_S0_NC1319

DBG1523
DBG1423
DBG1323
DBG1223
DBG1123
DBG1023
DBG923
DBG823
OBSFN_C023

Add HDMI function (Patrick)

DDSP_C_TX_DP_0
DDSP_C_TX_DN_0
DDSP_C_TX_DP_1
DDSP_C_TX_DN_1
DDSP_C_TX_DP_2
DDSP_C_TX_DN_2
DDSP_C_TX_DP_3
DDSP_C_TX_DN_3

DDSP_C_HPD
DDPC_CTRL_DATA

DDPC_CTRL_CLK

402R2F-GP
R503

DDI0_RCOMP_N

1 2

1A 0115 Allen modify

PR216 0R0402-PAD-2-GP
PR217 0R0402-PAD-2-GP

DDI0_RCOMP_P

12
12

GPIO_S0_NC13
GPIO_S0_NC14_TP

1

TP7

GPIO_S0_NC12_TP

1

TP8

VSS_AM3_TP
VSS_AM2_TP

AM14
AM13

AK13
AK12

AB14

AV3
AV2
AT2
AT3
AR3
AR1
AP3
AP2

AL3
AL1

D27
C26

C28
B28

C27
B26

AM3
AM2

T2

T3
AB3
AB2

Y3

Y2

W3
W1

V2

V3

R3

R1
AD6
AD4
AB9
AB7

Y4

Y6

V4

V6
A29
C29

B30
C30

CPU1C

DDI0_TXP_0
DDI0_TXN_0
DDI0_TXP_1
DDI0_TXN_1
DDI0_TXP_2
DDI0_TXN_2
DDI0_TXP_3
DDI0_TXN_3

DDI0_AUXP
DDI0_AUXN

DDI0_HPD
DDI0_DDCDATA

DDI0_DDCCLK
DDI0_VDDEN

DDI0_BKLTEN
DDI0_BKLTCTL

DDI0_RCOMP
DDI0_RCOMP_P
RESERVED_AM14
RESERVED_AM13
VSS_AM3
VSS_AM2

RESERVED_T2
RESERVED_T3
RESERVED_AB3
RESERVED_AB2
RESERVED_Y3
RESERVED_Y2
RESERVED_W3
RESERVED_W1
RESERVED_V2
RESERVED_V3
RESERVED_R3
RESERVED_R1
RESERVED_AD6
RESERVED_AD4
RESERVED_AB9
RESERVED_AB7
RESERVED_Y4
RESERVED_Y6
RESERVED_V4
RESERVED_V6
GPIO_S0_NC13
GPIO_S0_NC14_C29
RESERVED_AB14
GPIO_S0_NC12
RESERVED_C30

BAY-TRAIL-GP

(71.00BAY.C0U)

BAY TRAIL-M/D SOC

3 OF 13

DDI1_TXP_0
DDI1_TXN_0
DDI1_TXP_1
DDI1_TXN_1
DDI1_TXP_2
DDI1_TXN_2
DDI1_TXP_3
DDI1_TXN_3

DDI1_AUXP
DDI1_AUXN

DDI1_HPD

DDI1_DDCDATA

DDI1_DDCCLK

DDI1_VDDEN

DDI1_BKLTEN

DDI1_BKLTCTL

RESERVED_AH14
RESERVED_AH13
RESERVED_AF14
RESERVED_AF13

VSS_AH3
VSS_AH2

VGA_RED

VGA_BLUE

VGA_GREEN

VGA_IREF

VGA_IRTN

VGA_HSYNC
VGA_VSYNC

VGA_DDCCLK

VGA_DDCDATA

RESERVED_T7

RESERVED_T9
RESERVED_AB13
RESERVED_AB12

RESERVED_Y12
RESERVED_Y13
RESERVED_V10

RESERVED_V9

RESERVED_T12
RESERVED_T10
RESERVED_V14
RESERVED_V13
RESERVED_T14
RESERVED_T13

RESERVED_T6

RESERVED_T4

RESERVED_P14

RESERVED_K34

GPIO_S0_NC26

GPIO_S0_NC25

GPIO_S0_NC24

GPIO_S0_NC23

GPIO_S0_NC22

GPIO_S0_NC21

GPIO_S0_NC20

GPIO_S0_NC18

GPIO_S0_NC17

GPIO_S0_NC16

GPIO_S0_NC15

AG3
AG1
AF3
AF2
AD3
AD2
AC3
AC1

AK3
AK2

K30
P30

G30
N30

J30
M3 0

AH14
AH13
AF14
AF13
AH3
AH2

BA3
AY2
BA1
AW1
AY3

BD2
BF2

BC1
BC2

T7
T9
AB13
AB12
Y12
Y13
V10
V9
T12
T10
V14
V13
T14
T13
T6
T4
P14

K34
D32
N32
J34
K28
F28
F32
D34
J28
D28
M3 2
F34

remove DP to LVDS (Patrick)

None use link to GND

VSS_AH3_TP
VSS_AH2_TP

VGA_RED
VGA_BLUE
VGA_GREEN
VGA_IREF

VGA_HSYNC
VGA_VSYNC

VGA_FCH_DDCSCL
VGA_FCH_DDCSDA

R109 15R2F-2-GP
R110 15R2F-2-GP

1A 0115 Allen modify

12

PR215 0R0402-PAD-2-GP

12

PR214 0R0402-PAD-2-GP

1 2

R104
357R2F-GP

1 2
1 2

DBG11

DBG15
DBG14
DBG13
DBG12
DBG10
DBG9
DBG8
OBSFN_C0

VGA_HSYNC_3V
VGA_VSYNC_3V

DDI1_DDCDATA

R107

150R2F-1-GP

1 2

1 2

150R2F-1-GP

R105

R108

150R2F-1-GP

1 2

TO VGA

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

CPU LGA 1155_1

CPU LGA 1155_1

CPU LGA 1155_1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

11 58Tuesday, April 15, 2014

11 58Tuesday, April 15, 2014

11 58Tuesday, April 15, 2014

A00

A00

A00

1D8V_S0

Vinafix.com

1D8V_S5
1D0V_S0
SB5V

V_3P0_BAT_VREG

V_3P3_A

VBAT2
VCC3

SB3V

D D

CLOCK

CK_GLAN_DP30
CK_GLAN_DN30

CK_PE_100M_16PORT_DP49
CK_PE_100M_16PORT_DN49

CK_PCIEX1_WLAN_DP34
CK_PCIEX1_WLAN_DN34

XDP

XDP_H_TCK23
XDP_H_TRST_N23
XDP_H_TMS23

XDP_H_TDI23

TAP_PREQ#23
XDP_H_TDO23
TAP_PRDY#23

OBSFN_C123
DBG023
DBG123
DBG223
DBG323
DBG423

C C

DBG523
DBG623
DBG723

SLP_S3_N20,38,45

PM_SLP_S3#_CPU20
PM_SLP_S4#_CPU20

PWRGD_3V38

THERMA L_SHUT#38

SIO_PWNBTN_N38

RSMRST_N23,38,57

PLT_RST#_CPU20

COREPWROK23,39

PSTBTN_N23
PWRBTN_N23,35,38

PCIE_WAKE#_CPU20

FP_AUD_DETECT31

SYS_PWRGD48,52

B B

A A

THERMAL

PIN Header DET

FB_USBF1_DET28
FB_USBF2_DET28

CHASSIS_ID_035
CHASSIS_ID_135
MTST_ID35

LPC_PME_N38
IO_SMI_N38

PCH_RTCTEST_PULLUP23

MINICARD

W1_DETECT_USB_H34
W1_DETECT_PE34

VR_SVID_ALERT#45
VR_SVID_CLK45

VR_SVID_DATA45

5

1D8V_S0 10, 13,15,17,19,23,25,30,35,38, 43,46
1D8V_S5 15, 17,20,23,28,30,34,38,43,44, 56,57
1D0V_S0 15, 17,43,44,45
SB5V 27,31, 35,38,39,41,42,43,44,45,47, 57
V_3P0_BAT_VREG 15
V_3P3_A 20,23, 35,38,40,46,47,57
VBAT2 38
VCC3 13,15,17,20,21,23,24,25, 30,31,34,35,36,38,39,46,56
SB3V 15,17, 20,30,34,35,38,43,44,45,47, 48,57

1D8V_S5

1 2

R1255 10KR2J-3-GP

1 2

R1256 10KR2J-3-GP

1 2

R1244 10KR2J-3-GP

1 2

R1245 2K2R2J-2-GP

1 2

R1254 2K2R2J-2-GP

1 2

R1246 2K2R2J-2-GP

NEW GPIO Pull high (Patrick)

1D8V_S5

1D8V_S5

1D8V_S5

10KR2J-3-GP

APU_PWNBTN_N_R

SB 1128 Allen modify

12

SPI_CS0_N

WP# function is not supported when

W1_DETECT_USB_H
W1_DETECT_PE

SPI ROM is used on descriptor mode.

5

ICLK_ICOMP

1 2

R500

4K02R2F-GP

ICLK_RCOMP

1 2

R501

47D5R2F-1-GP

FB_USBF1_DET
FB_USBF2_DET
CHASSIS_ID_0
CHASSIS_ID_1
FP_AUD_DETECT
MTST_ID

XDP_H_TCK

1 2

R466
51R2J-2-GP

XDP_H_TRST_N

1 2

R456
51R2J-2-GP

XDP_H_TMS

1 2

R458
51R2J-2-GP

XDP_H_TDI

1 2

R457
51R2J-2-GP

XDP_H_TDO

1 2

R473

SPI ROM

51R2J-2-GP

Level shift
0828 Allen Add

1D8V_S51D8V_S5

V_3P3_A

12

R56

Joey_SA_0515

C55
SC12P50V2JN-3GP

SPI ROM

R55
2K2R2J-2-GP

R57

SIO_PWNBTN_B

Q18

1 2

X2

10KR2J-3-GP

(R)

1 2

23

12

R169

10KR2J-3-GP

1 2

CBE

MMBT3904-4-GP

NOTE:The 1Mohm Damping Resistor
Use 0603 and Can't change to 0402!

R96 1MR3F-GP

4 1

XTAL-25MHZ-181-GP

SMT
+- 20ppm CL:12P

1 2

R171 22R2F-1-GP

1 2

R170 22R2F-1-GP

GPU

WLAN

GLAN

SIO_PWNBTN_N

R664

1 2

0R2J-2-GP

(R)

XTAL_25M_PCH_IN
XTAL_25M_PCH_OUT

12

C53
SC12P50V2JN-3GP

1D8V_SPI

SPI_CS0_N_ROM_1
SPI_MISO_ROM_1SPI_DATAIN
SPI_WP#

XTAL_25M_PCH_IN
XTAL_25M_PCH_OUT

ICLK_ICOMP
ICLK_RCOMP

CK_PE_100M_16PORT_DN
CK_PE_100M_16PORT_DP

CK_PCIEX1_WLAN_DN
CK_PCIEX1_WLAN_DP

CK_GLAN_DN
CK_GLAN_DP

XDP_H_TCK
XDP_H_TRST_N
XDP_H_TMS
XDP_H_TDI
XDP_H_TDO
TAP_PRDY#
TAP_PREQ#

SPI_CS0_N
SPI_DATAIN

SPI_DATAOUT
SPI_CLK

IO_SMI_N
PW_CLEAR

LPC_PME_N

W1_DETECT_PE_C
W1_DETECT_USB

PWRBTN_N

1025 Allen modify
Power plane from 1D8V_S0 change to 1D8V_S5

12

R172

10KR2J-3-GP

4

PCH_RTCRST_PULLUP

AT34_TP

1

TP39

1

TP1407

TP32

Remove WEBCAM,LVDS DET

FB_USBF1_DET
FB_USBF2_DET
CHASSIS_ID_0

CHASSIS_ID_1
MTST_ID

Add new GPIO (Patrick)

FP_AUD_DETECT

GPIO_RCOMP18

1 2

R504

49D9R2F-GP

1A 0115 Allen modify

SYS_PWRGD

W1_DETECT_PE_C W1_DETECT_PE

R178
0R0402-PAD-2-GP

SOP8 for 8Mb

U8

1

CS#

2

DO/IO1

3

WP#/IO2

4

GND

W25Q64FWSSIG-GP

SRCON1

1
3 6

425

SKT-G6179-GP-U

62.10076.011

62.10089.001

8

VCC

7

HOLD#/RESET#/IO3

6

CLK

5

DI/IO0

8
7

(D62.10089.121)

SPI socket mount in SA stage

4

AH12
AH10

AD9

AD14
AD13

AD10
AD12

AF6
AF4

AF9
AF7

AK4
AK6

AM4
AM6

AM10

AM9

BH7
BH5
BH4
BH8
BH6

BJ9

C12
D14

G12

F14

F12
G16
D18

F16

AT34

C23
C21
B22

A21
C22

B18
B16
C18

A17
C17
C16
B14
C15

C13

A13
C19

N26

0R0402-PAD

SST_HOLDJ_1
SPI_CLK_1
SPI_MOSI_1

CPU1E

ICLK_OSCIN
ICLK_OSCOUT

RESERVED_AD9
ICLK_ICOMP

ICLK_RCOMP
RESERVED_AD10

RESERVED_AD12
PCIE_CLKN_0

PCIE_CLKP_0
PCIE_CLKN_1

PCIE_CLKP_1

PCIE_CLKN_2
PCIE_CLKP_2

PCIE_CLKN_3
PCIE_CLKP_3

RESERVED_AM10
RESERVED_AM9

PMC_PLT_CLK_0
PMC_PLT_CLK_1
PMC_PLT_CLK_2
PMC_PLT_CLK_3
PMC_PLT_CLK_4
PMC_PLT_CLK_5
ILB_RTC_RST

TAP_TCK
TAP_TRST
TAP_TMS
TAP_TDI
TAP_TDO
TAP_PRDY
TAP_PREQ
RESERVED

PCU_SPI_CS_0
PCU_SPI_CS_1
PCU_SPI_MISO
PCU_SPI_MOSI
PCU_SPI_CLK

GPIO_S5_0
GPIO_S5_1
GPIO_S5_2
GPIO_S5_3
GPIO_S5_4
GPIO_S5_5
GPIO_S5_6
GPIO_S5_7

GPIO_S5_8
GPIO_S5_9
GPIO_S5_10

GPIO_RCOMP

BAY-TRAIL-GP

(71.00BAY.C0U)

12

12

R443

1D8V_SPI

VCC3

12

1 2

12

R186

10KR2J-3-GP

1 2

R188 22R2F-1-GP

1 2

R187 22R2F-1-GP

R184

10KR2J-3-GP

COREPWROK

C111
SCD1U16V2KX-3GP

(R)

C116
SCD1U16V2KX-3GP

1 2

BAY TRAIL-M/D SOC

R713
0R0402-PAD-2-GP

SPI_CLK
SPI_DATAOUT

12

1A 0115 Allen modify

SIO_UART1_RXD
SIO_UART1_TXD
SIO_UART1_RTS
SIO_UART1_CTS

SIO_UART2_RXD

SIO_UART2_TXD
SIO_UART2_RTS
SIO_UART2_CTS

PMC_SUSPWRDNACK

PMC_SUSCLK0_G24

PMC_SLP_S0IX

PMC_SLP_S4
PMC_SLP_S3

GPIO_S514_J20

PMC_ACPRESENT

PMC_WAKE_PCIE_0

PMC_BATLOW
PMC_PWRBTN

PMC_RSTBTN

PMC_PLTRST
GPIO_S517_J24
PMC_SUS_STAT

ILB_RTC_TEST

PMC_RSMRST

PMC_CORE_PWROK

ILB_RTC_X1
ILB_RTC_X2

ILB_RTC_EXTPAD

SVID_ALERT

SVID_DATA

SVID_CLK

SIO_PWM_0
SIO_PWM_1

GPIO_S5_22
GPIO_S5_23
GPIO_S5_24
GPIO_S5_25
GPIO_S5_26
GPIO_S5_27
GPIO_S5_28
GPIO_S5_29
GPIO_S5_30

SIO_SPI_CS
SIO_SPI_MISO
SIO_SPI_MOSI

SIO_SPI_CLK

1D8V_S51D8V_SPI

5 OF 13

AU34
AV34
BA34
AY34

BF34
BD34
BD32
BF32

D26
G24
F18
F22
D22
J20
D20
F26
K26
J26
BG9
F20
J24
G18

C11

B10
B7

C9
A9
B8

B24
A25
C25

AU32
AT32

K24
N24
M20
J18
M18
K18
K20
M22
M24

AV32
BA28
AY28
AY30

VCCRTC

PW_CLEAR

12

12

3

SKEW1
SKEW2
SKEW3
BOARD1

BOARD2
BOARD3

SUS_PWR_ACK_CPU
SUSCLK_SIO_C
SLP_SLP_S0
PM_SLP_S4#_CPU
PM_SLP_S3#_CPU

AC_PRESENT_CPU
WAKE_N_APU PCIE_WAKE#_CPU
PMC_BATLOW#

PSTBTN_N
PLT_RST#_CPU

PMC_SUS_STAT

BVCCRTC_EXTPAD

1 2

SVID_DATA_L

1 2

SVID_CLK_L

1 2

R491 10KR2J-3-GP
R69 0R0402-PAD-2-GP
R492 20KR2J-L2-GP
R70 0R0402-PAD-2-GP
R1208 10KR2J-3-GP(R)

1A 0112 Allen modify

1

TP35

PCH_RTCTEST_PULLUP

1 2

C49
SCD1U10V2KX-5GP

R98 20R2F-GP
R494 16D9R2F-1-GP
R497 0R2J-2-GP

1A 0115 Allen modify

1 2
1 2
1 2
2

SCD01U25V2KX-3GP

RSMRST_N
COREPWROK

0812 Vcore IC check

VR_SVID_ALERT#SVID_ALERT#_L

VR_SVID_DATA
VR_SVID_CLK RSMRST_N

9/2: Add PH resistor (MARK)

OBSFN_C1

DBG0
DBG1
DBG2
DBG3
DBG4
DBG5
DBG6
DBG7

VBAT1

R561

10KR2J-3-GP

(R)

R557
10KR2J-3-GP

3

TP14
TPAD28

1

+

12

BT1
BAT-AAA-BAT-029-K01-GP

12

R554

10KR2J-3-GP

12

R552
10KR2J-3-GP

TP13

TPAD28

R199

1

1 2

1KR2J-1-GP

D6

RB551V30-GP

VBAT2

12

R88

0R0402-PAD

1D8V_S01D8V_S0 1D8V_S0

12

R556

10KR2J-3-GP

(R)

(R)

BOARD3BOARD1 BOA RD2

12

R553
10KR2J-3-GP

12

1

12

(R)

C42

SB 1126 Allen modify

PCH_RTCX1
PCH_RTCX2

Power VID control

VR_SVID_ALERT#

1 2

69D8R2F-GP

Battery Socket
ST: 22.70017.051
FLAT: 22.70017.061

Battery (CR2032):

23.22063.001

V_3P3_A

VBAT1_R

2

3

K A

PW_CLEAR_H

Board ID Settings

MB Version Board1

SA 0

SB 0

-1A 1

-1 001

SB 1201 Allen modify

APU_PWNBTN_N_RAPU_PWNBTN_N

R487

1

D5
BAS40C-2-GP

V_3P0_BAT_VREG

1
1
1

1 2

TP36
TP34
TP33

C44
SC150P50V2KX-1-GP

1D0V_S0

1D8V_S5

R89

10KR2J-3-GP

1 2

1D8V_S5

1D8V_S5

W/T CAP
W/O CAP

BAT1
BATTERY CR2032

(23.22063.001)

R499
10KR2J-3-GP

SUS_PWR_ACK_CPU

1 2

1 2

R94

1 2

R181

NORMAL(DEFAULT)
CLR PASSWORD

PASSWORD CLEAR

PSWD1

2
1

JOWLE-CON2-5-GP

(21.63045.102)

Board2

Board3

0

0

1

0

0

1

2

0828 Allen Add

100KR2J-1-GP

COREPWROK

100KR2J-1-GP(R)

THERMA L_SHUT#

12

R287

10KR2J-3-GP(R)

Need to check the GPIO
portion

SB 1128 Allen modify

CLEAN CMOS

12

12

R563

R567

10KR2J-3-GP

10KR2J-3-GP

(R)

12

12

R560

R562

10KR2J-3-GP

10KR2J-3-GP

W1_DETECT_USB W1_DETECT_USB_H

2

1

PCH_RTCX2

X1

RTCX_L PCH_RTCX1

1

12

R77

0R0402-PAD

12

C45
SC15P50V3JN-DLGP

1A 0115 Allen modify

SLP_S3_N

PWRGD_3V

1 GND
2 RTC_RST

1 2

R87 20KR2F-L-GP

V_3P0_BAT_VREG

Debug Only

1 2

R91 20KR2F-L-GP

V_3P0_BAT_VREG

1D8V_S01D8V_S0 1D8V_S0

12

R558

10KR2J-3-GP

(G)

SKEW3SKEW1 SKEW 2

12

R555
10KR2J-3-GP

(R)

(U)

12

R78

0R0402-PAD

Skew ID Settings

MB Version Board1

GPU 0

UMA 0

Level shift
0828 Allen Add

(84.2N702.J31)
SLP_S3_N_G

1 2

R724
0R0402-PAD-2-GP

1A 0115 Allen modify

1 2

R723
0R0402-PAD-2-GP

12

12

(84.2N702.J31)
PWRGD_3V_G

C50
SC1U10V2KX-1GP

C52
SC1U10V2KX-1GP

Board2

<Variant Name>

<Variant Name>

<Variant Name>

Title

T

itle

T

itle

Size D ocument Number R ev

Size D ocument Number R ev

Size D ocument Number R ev
Custo m

Custo m

Custo m
Date : Sheet of

Date : Sheet of

Date : Sheet of

4

2 3

XTAL-32D768KHZ-65-GP

R81

12

10MR3F-GP

Q78

2N7002H-GP

Q77

2N7002H-GP

12

R92
0R2J-2-GP

(R)

1

0

FT3_ACPI/SD/AZ/GPIO/RTC/MISC

FT3_ACPI/SD/AZ/GPIO/RTC/MISC

FT3_ACPI/SD/AZ/GPIO/RTC/MISC

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

1

12

C43
SC15P50V3JN-DLGP

SB3V

12

R717
10KR2J-3-GP

SYS_PWRGD_G

G

S D

PWRGD_3V_D

G

S D

SB 1121 Allen modify

PCH_RTCRST_PULLUP
PCH_RTCRST_DOWN

12

1A 0115 Allen modify

R86
0R0402-PAD-2-GP

PCH_RTCTEST_PULLUP
PCH_SRTTEST_DOWN

12

R729
0R0402-PAD-2-GP

Board3

1

1

G

JOWLE-CON2-5-GP

JOWLE-CON2-5-GP

1A 0115 Allen modify

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

SYS_PWRGD

Q79
2N7002H-GP

(84.2N702.J31)

S D

CMCLR1

2

(R)

1

CMCLR2

2
1

A00

A00

A00

12 5 8Tuesday, April 15, 2014

12 5 8Tuesday, April 15, 2014

12 5 8Tuesday, April 15, 2014

5

Vinafix.com

4

3

2

1

2

6 OF 13

RESERVED_M10

RESERVED_M9
RESERVED_P7

RESERVED_P6

RESERVED_M7

USB3_REXT0

RESERVED_P10
RESERVED_P12

RESERVED_M4
RESERVED_M6

USB3_RXP0
USB3_RXN0

USB3_TXP0
USB3_TXN0

RESERVED_H8
RESERVED_H7

RESERVED_H5
RESERVED_H4

GPIO_S0_SC_55
GPIO_S0_SC_56
GPIO_S0_SC_57
GPIO_S0_SC_58
GPIO_S0_SC_59
GPIO_S0_SC_60
GPIO_S0_SC_61

ILB_8254_SPKR

SIO_I2C0_DATA

SIO_I2C0_CLK

SIO_I2C1_DATA

SIO_I2C1_CLK

SIO_I2C2_DATA

SIO_I2C2_CLK

SIO_I2C3_DATA

SIO_I2C3_CLK

SIO_I2C4_DATA

SIO_I2C4_CLK

SIO_I2C5_DATA

SIO_I2C5_CLK

SIO_I2C6_DATA

SIO_I2C6_CLK

GPIO_S0_SC_92
GPIO_S0_SC_93

M1 0
M9

P7
P6

M7
M1 2

P10
P12

M4
M6

D4
E3

K6
K7

H8
H7

H5
H4

BD12
BC12
BD14
BC14
BF14
BD16
BC16

BH12

BH22
BG23

BG24
BH24

BG25
BJ25

BG26
BH26

BF27
BG27

BH28
BG28

BJ29
BG29

BH30
BG30

USB3_P1_REXT

GPIO_S0_SC_56

APU_SPKR

TP_BH30
TP_BG30

R493

1 2

1K24R2F-GP

USB30_RXP0
USB30_RXN0

USB30_TXP0
USB30_TXN0

remove GPIO56,57,60 (BIST,INV_DET)
Patrick

1

TP11 TPAD28

1

TP12 TPAD28

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

CPU LGA 1155_3

CPU LGA 1155_3

CPU LGA 1155_3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

USB3.0 Port

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

13 58Tuesday, April 15, 2014

13 58Tuesday, April 15, 2014

13 58Tuesday, April 15, 2014

A00

A00

A00

1D8V_S0
VCC3

OC

D D

USBOC0130
USBOC0228

1D8V_S0 10,12,15,17,19,23,25,30,35,38,43,46
VCC3 12,15,17,20,21,23,24,25,30,31,34,35,36,38,39,46,56

GLAN

CK_GLAN_DP12,30
CK_GLAN_DN12,30

USB3.0 SIDE I/O
Rear USB
Rear USB

USB HUB

F_USB3P27
F_USB3N27

Rear USB

F_USB1P30
F_USB1N30

C C

F_USB2P30
F_USB2N30

USB HUB

USBOC01 --- Rear IO USB2.0
USBOC02 --- USB3.0

USB3.0

F_USB0P28
F_USB0N28

USB30_RXP028
USB30_RXN028

USB30_TXP028
USB30_TXN028

LPC

CK_25M_SIO

12

C80

SC100P50V2JN-3GP (R)

12

Follow VIC

C84

SC100P50V2JN-3GP(R)

1 2

R116 22R2J-2-GP

1 2

R118 22R2J-2-GP

Remove
TCM_CLK_RUN
(Patrick)

LPC

LAD0_FWH023,38
LAD1_FWH123,38

B B

A A

LAD2_FWH223,38
LAD3_FWH323,38

LFRAMEJ_FW423,38

INT_SERIRQ_CPU38

LPC_CLK123
CK_25M_SIO38

1D8V_S0

SMBUS

SMB0_CLK21,23,38,52
SMB0_DATA21,23,38,52

2 1

VCC3

12

R120

2K2R2J-2-GP

(R)

SMB0_DATA SMB0_CLK

SMB0_DATA_C SMB0_CLK_C

C570

SCD1U10V2KX-5DLGP

U3

1

SDA_B

2

GND

3

VCCA
SDA_A4SCL_A

TCA9406DCUR-GP

SCL_B

VCCB

OE

2K2R2J-2-GP

8
7
6
5

R121

SMBUS_OE

SB 1124 C570, C569 Allen modify

GPIO

APU_SPKR31

GPIO_S0_SC_5619

5

4

VCC3

12

(R)

Avoid routing next to
clock/high speed signals.

Connected to package ground.

LAD0_FWH0
LAD1_FWH1
LAD2_FWH2
LAD3_FWH3
LFRAMEJ_FW4
LPC_CLK0_R
LPC_CLK1_RLPC_CLK1

INT_SERIRQ_CPU

SMB0_DATA_C
SMB0_CLK_C
SMB0_ALERT#

VCC3

TP4
TP3

TP31
TP6

1D8V_S0

12

C569
SCD1U10V2KX-5DLGP

2 1

F_USB0P
F_USB0N

F_USB1P
F_USB1N

F_USB2P
F_USB2N

F_USB3P
F_USB3N

ICLK_USB_TERMN_0
ICLK_USB_TERMN_1

USBOC01
USBOC02

USB_RCOMP

USB_PLL_MON

USB_HSIC_0_DATA

1

USB_HSIC_0_STROBE

1

USB_HSIC_1_DATA

1

USB_HSIC_1_STROBE

1

USB_HSIC_RCOMP

RCOMP_LPC_HVT

R124
8K2R2F-1-GP

1D8V_S0

3

CPU1F

G2

GPIO_S5_31

M3

GPIO_S5_32

L1

GPIO_S5_33

K2

GPIO_S5_34

K3

GPIO_S5_35

M2

GPIO_S5_36

N3

GPIO_S5_37

P2

GPIO_S5_38

L3

GPIO_S5_39

J3

GPIO_S5_40

P3

GPIO_S5_41

H3

GPIO_S5_42

B12

GPIO_S5_43

M1 6

USB_DP0

K16

USB_DN0

J14

USB_DP1

G14

USB_DN1

K12

USB_DP2

J12

USB_DN2

K10

USB_DP3

H10

USB_DN3

D10

ICLK_USB_TERMN_D10

F10

ICLK_USB_TERMN

C20

USB_OC_0

B20

USB_OC_1

D6

USB_RCOMPO

C7

USB_RCOMPI

M1 3

USB_PLL_MON

B4

USB_HSIC0_DATA

B5

USB_HSIC0_STROBE

E2

USB_HSIC1_DATA

D2

USB_HSIC1_STROBE

A7

USB_HSIC_RCOMP

BF18

LPC_RCOMP

BH16

ILB_LPC_AD_0

BJ17

ILB_LPC_AD_1

BJ13

ILB_LPC_AD_2

BG14

ILB_LPC_AD_3

BG17

ILB_LPC_FRAME

BG15

ILB_LPC_CLK_0

BH14

ILB_LPC_CLK_1

BG16

ILB_LPC_CLKRUN

BG13

ILB_LPC_SERIRQ

BG12

PCU_SMB_DATA

BH10

PCU_SMB_CLK

BG11

PCU_SMB_ALERT

BAY-TRAIL-GP

(71.00BAY.C0U)

R486

1 2

R488

1 2

R489

1 2

R496

(R)

1 2

R85

1 2

R524

1 2

12
12

(R)

12

(R)

ICLK_USB_TERMN_0

1KR2F-3-GP

ICLK_USB_TERMN_1

1KR2F-3-GP

USB_RCOMP

45D3R2F-L-GP

USB_PLL_MON

0R2J-2-GP

USB_HSIC_RCOMP

45D3R2F-L-GP

RCOMP_LPC_HVT

49D9R2F-GP

R113 2K2R2J-2-GP
R111 2K2R2J-2-GP
R112 2K2R2J-2-GP

SMB0_ALERT#
SMB0_CLK_C
SMB0_DATA_C

BAY TRAIL-M/D SOC

5

Vinafix.com

4

3

2

1

DDR_VDDQ
VCORE
VNN_GFX

D D

C C

B B

A A

5

DDR_VDDQ 8,16,21,42,48
VCORE 16,38,45
VNN_GFX 16,45

VCC_SENSE45
VSS_SENSE45

1A 0115 Allen modify

VSS_AXG_SENSE45

DDR_VDDQ

VCORE

TP38

1

TPAD28

VCC_SENSE
VSS_SENSE

VSS_AXG_SENSE

TP_CORE_V1P05_S4

reserve the 0402 0.1u caps on reset for EMI.

VCC_SENSE
VCC_AXG_SENSE
VSS_SENSE

4

VCC_SENSE
VSS_SENSE
VSS_AXG_SENSE
VCC_AXG_SENSE

1 2

R440 100R2F-L1-GP-U

1 2

R434 100R2F-L1-GP-U

12

R448
0R0402-PAD-2-GP

CPU1G

P28

CORE_VCC_SENSE_P28

BB8

UNCORE_VNN_SENSE

N28

CORE_VSS_SENSE_N28

AD38

DRAM_VDD_S4_AD38

AF38

DRAM_VDD_S4_AF38

A48

DRAM_VDD_S4

AK38

DRAM_VDD_S4_AK38

AM38

DRAM_VDD_S4_AM38

AV41

DRAM_VDD_S4_AV41

AV42

DRAM_VDD_S4_AV42

BB46

DRAM_VDD_S4_BB46

AA27

CORE_VCC_S0IX_AA27

AA29

CORE_VCC_S0IX_AA29

AA30

CORE_VCC_S0IX_AA30

AC27

CORE_VCC_S0IX_AC27

AC29

CORE_VCC_S0IX_AC29

AC30

CORE_VCC_S0IX_AC30

AD27

CORE_VCC_S0IX_AD27

AD29

CORE_VCC_S0IX_AD29

AD30

CORE_VCC_S0IX_AD30

AF27

CORE_VCC_S0IX_AF27

AF29

CORE_VCC_S0IX_AF29

AG27

CORE_VCC_S0IX_AG27

AG29

CORE_VCC_S0IX_AG29

AG30

CORE_VCC_S0IX_AG30

P26

CORE_VCC_S0IX_P26

P27

CORE_VCC_S0IX_P27

U27

CORE_VCC_S0IX_U27

U29

CORE_VCC_S0IX_U29

V27

CORE_VCC_S0IX_V27

V29

CORE_VCC_S0IX_V29

V30

CORE_VCC_S0IX_V30

Y27

CORE_VCC_S0IX_Y27

Y29

CORE_VCC_S0IX_Y29

Y30

CORE_VCC_S0IX_Y30

AF30

TP_CORE_V1P05_S4

BAY-TRAIL-GP

(71.00BAY.C0U)

VCORE

C330

(R)

C284

(R)

C283

(R)

C312

(R)

1
1
1
1

VCC_AXG_SENSE45

2

SCD1U10V2KX-5GP

2

SCD1U10V2KX-5GP

2

SCD1U10V2KX-5GP

2

SCD1U10V2KX-5GP

BAY TRAIL-M/D SOC

3

VCC_AXG_SENSE

VNN_GFX

12

R485
100R2F-L1-GP-U

DRAM_VDD_S4_BD49
DRAM_VDD_S4_BD52
DRAM_VDD_S4_BD53

DRAM_VDD_S4_BF44

DRAM_VDD_S4_BG51

DRAM_VDD_S4_BJ48

DRAM_VDD_S4_C51
DRAM_VDD_S4_D44
DRAM_VDD_S4_F49
DRAM_VDD_S4_F52
DRAM_VDD_S4_F53
DRAM_VDD_S4_H46
DRAM_VDD_S4_M41
DRAM_VDD_S4_M42
DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38

UNCORE_VNN_S3_AA24
UNCORE_VNN_S3_AC22
UNCORE_VNN_S3_AC24
UNCORE_VNN_S3_AD22
UNCORE_VNN_S3_AD24

UNCORE_VNN_S3_AF22

UNCORE_VNN_S3_AF24
UNCORE_VNN_S3_AG22
UNCORE_VNN_S3_AG24

UNCORE_VNN_S3_AJ22

UNCORE_VNN_S3_AJ24

UNCORE_VNN_S3_AK22

UNCORE_VNN_S3_AK24

UNCORE_VNN_S3_AK25

UNCORE_VNN_S3_AK27

UNCORE_VNN_S3_AK29

UNCORE_VNN_S3_AK30

UNCORE_VNN_S3_AK32
UNCORE_VNN_S3_AM22

TP2_CORE_VCC_S0IX

7 OF 13

DDR_VDDQ

BD49
BD52
BD53
BF44
BG51
BJ48
C51
D44
F49
F52
F53
H46
M41
M42
V38
Y38

VNN_GFX

AA24
AC22
AC24
AD22
AD24
AF22
AF24
AG22
AG24
AJ22
AJ24
AK22
AK24
AK25
AK27
AK29
AK30
AK32
AM22

TP2_CORE_VCC_S0IX

AA22

Title

Title

Title

CPU (VCC_CORE)

CPU (VCC_CORE)

CPU (VCC_CORE)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

TP37

1

TPAD28

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

14 58Tuesday, April 15, 2014

14 58Tuesday, April 15, 2014

14 58Tuesday, April 15, 2014

1

A00

A00

A00

5

Vinafix.com

1D0V_S0
1D05V_S0
1D5V_S0
1D8V_S0
1D8V_S5

D D

1D35V_S0
V_3P0_BAT_VREG
V_3P3_A
VCC3
1D0V_S5
SB3V

C C

B B

A A

1D0V_S0 12,17,43,44,45
1D05V_S0 17,43
1D5V_S0 17,31,34,43
1D8V_S0 10,12,13,17,19,23,25,30,35,38,43,46
1D8V_S5 12,17,20,23,28,30,34,38,43,44,56,57
1D35V_S0 17,42,43
V_3P0_BAT_VREG 12
V_3P3_A 12,20,23,35,38,40,46,47,57
VCC3 12,13,17,20,21,23,24,25,30,31,34,35,36,38,39,46,56
1D0V_S5 17,44
SB3V 12,17,20,30,34,35,38,43,44,45,47,48,57

1D0V_S0

CRB󲋮1.05V

1D05V_S0

SB 1126 Allen modify

SB 1126 Allen modify

5

1D35V_S0

1D35V_CRT_S0

VGA_1P35V

R734
0R2J-2-GP

R735
0R2J-2-GP

Bogis 20131104
Add power solution for 1D35V_CRT_S0

1D05V_S0 POK

1D05V_RUNPWROK20,42,43

1D0V_S5

1D0V_S0

1D05V_S0

1D0V_S0

1D0V_S5

1D35V_S0

12

12

(R)

4

VGA_1P35V

R730 0R2J-2-GP

12

(R)

4

V32

BJ6
AD35
AF35
AF36
AA36

AJ36
AK35
AK36

Y35

Y36
AK19
AK21

AJ18

AM16

U22

V22
AN29
AN30
AF16
AF18

Y18

G1

AM21

AN21
AN18

AN19
AA33
AF21
AG21

V24

Y22

Y24

M14

U18

U19
AN25

Y19

C3
C5
B6

AC32

Y32

U36
AA25
AG32

V36

BD1
AF19
AG19

AJ19

AG18
AN16

U16

SB3V

(R)

12

PC2124
SC10U10V5KX-2GP

Hi:1.4V
Lo:0.4V

PWR_1D35V_CRT_EN

(R)

12

PC2123
SCD1U10V2KX-5GP

CPU1H

SVID_V1P0_S3_V32
VGA_V1P0_S3_BJ6
DRAM_V1P0_S0IX_AD35
DRAM_V1P0_S0IX_AF35
DRAM_V1P0_S0IX_AF36
DRAM_V1P0_S0IX_AA36
DRAM_V1P0_S0IX_AJ36
DRAM_V1P0_S0IX_AK35
DRAM_V1P0_S0IX_AK36
DRAM_V1P0_S0IX_Y35
DRAM_V1P0_S0IX_Y36
DDI_V1P0_S0IX_AK19
DDI_V1P0_S0IX_AK21
DDI_V1P0_S0IX_AJ18
DDI_V1P0_S0IX_AM16
UNCORE_V1P0_G3_U22
UNCORE_V1P0_G3_V22
VIS_V1P0_S0IX_AN29
VIS_V1P0_S0IX_AN30
UNCORE_V1P0_S3_AF16
UNCORE_V1P0_S3_AF18
UNCORE_V1P0_S3_Y18
UNCORE_V1P0_S3_G1
PCIE_V1P0_S3_AM21
PCIE_V1P0_S3_AN21

PCIE_GBE_SATA_V1P0_S3_AN18
SATA_V1P0_S3_AN19
CORE_V1P05_S3_AA33
UNCORE_V1P0_S0IX_AF21
UNCORE_V1P0_S0IX_AG21
VIS_V1P0_S0IX_V24
VIS_V1P0_S0IX_Y22
VIS_V1P0_S0IX_Y24
USB_V1P0_S3_M14
USB_V1P0_S3_U18
USB_V1P0_S3_U19
GPIO_V1P0_S3_AN25
USB3_V1P0_G3_Y19
USB3_V1P0_G3_C3
UNCORE_V1P0_G3_C5
UNCORE_V1P0_G3_B6
CORE_V1P0_S3_AC32
CORE_V1P0_S3_Y32
UNCORE_V1P35_S0IX_F4_U36
UNCORE_V1P35_S0IX_F5_AA25
UNCORE_V1P35_S0IX_F2_AG32
UNCORE_V1P35_S0IX_F3_V36
VGA_V1P35_S3_F1_BD1
UNCORE_V1P35_S0IX_F6
UNCORE_V1P35_S0IX_F1_AG19
ICLK_V1P35_S3_F1_AJ19

ICLK_V1P35_S3_F2
VSSA_AN16
USB_VSSA_U16

BAY-TRAIL-GP

(71.00BAY.C0U)

PU2101
AME8818DEEVADJZ-GP

1
2

(R)

BAY TRAIL-M/D SOC

IN

OUT
GND
EN3ADJ

3

DRAM_V1P35_S0IX_F1_AD36

HDA_LPE_V1P5V1P8_S3_AM32

UNCORE_V1P8_S3_AM30

UNCORE_V1P8_S3_AN32

LPC_V1P8V3P3_S3_AM27

SD3_V1P8V3P3_S3_AN27

USB_HSIC_V1P2_G3_V18
UNCORE_V1P8_G3_AA18

5
4

PWR_1D35V_CRT_ADJ

3

8 OF 13

UNCORE_V1P8_G3_U24

USB_V3P3_G3_N18
USB_V3P3_G3_P18

UNCORE_V1P8_S3_U38

VGA_V3P3_S3_AN24

PCU_V1P8_G3_V25
PCU_V3P3_G3_N22

VSS_AD16
VSS_AD18

RTC_VCC_P22

USB_V1P8_G3_N20

PMU_V1P8_G3_U25

CORE_V1P05_S3_AF33
CORE_V1P05_S3_AG33
CORE_V1P05_S3_AG35

CORE_V1P05_S3_U33
CORE_V1P05_S3_U35
CORE_V1P05_S3_V33

VSS_A3

VSS_A49

VSS_A5
VSS_A51
VSS_A52

VSS_A6

VSS_B2
VSS_B52
VSS_B53
VSS_BE1

VSS_BE53

VSS_BG1

VSS_BG53

VSS_BH1
VSS_BH2

VSS_BH52
VSS_BH53

VSS_BJ2
VSS_BJ3

VSS_BJ5
VSS_BJ49
VSS_BJ51
VSS_BJ52

VSS_C1

VSS_C53

VSS_E1

VSS_E53

RESERVED_F1
PCIE_V1P0_S3_AK18
PCIE_V1P0_S3_AM18

Vo(cal.)=1.36V

12

(R)

PR2124
7K68R2F-GP

R1

12

(R)

PR2125
20KR2F-L-GP

R2

AD36
AM32
AM30
AN32
AM27
U24
N18
P18
U38
AN24
V25
N22

SD3_V1P8V3P3_S3_AN27

AN27
AD16
AD18

USB_HSIC_V1P2_G3_V18

V18
AA18
P22
N20
U25
AF33
AG33
AG35
U33
U35
V33
A3
A49
A5
A51
A52
A6
B2
B52
B53
BE1
BE53
BG1
BG53
BH1
BH2
BH52
BH53
BJ2
BJ3
BJ5
BJ49
BJ51
BJ52
C1
C53
E1
E53
F1
AK18
AM18

(R)

12

PC2125

SC100P50V2JN-3GP

1D35V_S0

1D35V_CRT_S0

(R)

12

PC2126

Vout = 0.98 * (1 + R1/R2)
= 0.98 * (1 + 7.68K/20K)

SC22U6D3V3MX-1-GP

= 1.356V

2

1D5V_S0

1D0V_S0

2

1D8V_S0

VCC3

SB3V
1D8V_S0

VCC3
SB3V

V_3P0_BAT_VREG

1D05V_S0

1

1D8V_S5

1D8V_S5

1D8V_S5

SD3_V1P8V3P3_S3_AN27

USB_HSIC_V1P2_G3_V18

1A 0115 Allen modify

Title

Title

Title

CPU (POWER)

CPU (POWER)

CPU (POWER)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

R523 0R2J-2-GP

1 2
1 2

R548 0R2J-2-GP(R)

R508 0R0402-PAD-2-GP

1

12

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

15 58Tuesday, April 15, 2014

15 58Tuesday, April 15, 2014

15 58Tuesday, April 15, 2014

VCC3
1D8V_S0

1D0V_S5

5

Vinafix.com

4

3

2

1

VCORE

VNN_GFX

DDR_VDDQ

D D

VCORE

VCORE

12

VDDQ_CPU

DDR_VDDQ

C305

SC22U6D3V5MX-2GP

VCORE 14,38,45

VNN_GFX 14,45

DDR_VDDQ 8,14,21,42,48

12

C304

SC22U6D3V5MX-2GP

DDR_VDDQ

VCORE

SB 1125 C340, C355 and C341 Allen modify

12

12

12

C301

SC10U6D3V3MX-GP

12

C300

C33

SC10U6D3V3MX-GP

SC4D7U6D3V2MX-GP-U

reserve the 0402 0.1u caps
on reset for EMI(5/9).

DDR_VDDQ

12

12

C32

C340

SC4D7U6D3V2MX-GP-U

SC22U6D3V3MX-1-DL-GP

C341

12

C355

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

reserve the 0402 0.1u caps
on reset for EMI(5/9).

VCORE

12

C46

(R)

SCD1U10V2KX-5GP

SB 1128 Allen modify

12

C51

(R)

12

12

C36

SCD1U10V2KX-5GP

SC22U6D3V3MX-1-DL-GP

C34

SC22U6D3V3MX-1-DL-GP

close to pin AD38 & AF38

12

C C

12

C384

C361

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

12

12

C335

C366

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

12

12

C387

C388

(R)

(R)

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C386

C383

(R)

(R)

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C379

C337

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

12

C356

(R)

12

C346

(R)

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C358

(R)

SCD1U10V2KX-5GP

VCOREG

VNN_GFX VNN_GFX VNN_GFX

VNN_GFX

12

12

C307

C308

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

B B

A A

SB 1120 C334, C342, C348, C567 Allen modify

5

12

12

C39

12

C40

C306

SC22U6D3V5MX-2DLGP

SC22U6D3V5MX-2DLGP

SC10U6D3V5KX-5DLGP

12

12

C334

SC22U6D3V3MX-1-DL-GP

C342

12

C567

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

4

12

12

12

12

C348

C37

C41

SCD1U10V2KX-5GP

SC22U6D3V3MX-1-DL-GP

12

C58

C57

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

CPU (Power CAP1)

CPU (Power CAP1)

CPU (Power CAP1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Hsichih, Taipei

A00

A00

16 58Tuesday, April 15, 2014

16 58Tuesday, April 15, 2014

1

16 58Tuesday, April 15, 2014

A00

5

Vinafix.com

1D0V_S0
1D0V_S5
1D05V_S0
1D5V_S0
1D8V_S0
1D8V_S5
1D35V_S0

D D

V_3P3_A
VCC3
SB3V

1D0V_S0 12,15,43,44,45
1D0V_S5 15,44
1D05V_S0 15,43
1D5V_S0 15,31,34,43
1D8V_S0 10,12,13,15,19,23,25,30,35,38,43,46
1D8V_S5 12,15,20,23,28,30,34,38,43,44,56,57
1D35V_S0 15,42,43
V_3P3_A 12,20,23,35,38,40,46,47,57
VCC3 12,13,15,20,21,23,24,25,30,31,34,35,36,38,39,46,56
SB3V 12,15,20,30,34,35,38,43,44,45,47,48,57

+3P3V_AUX

SB3V

close to pin

N22

+1P8V_DUAL

1D8V_S5

close to pin
AA18

12

C C

C321

SC1U6D3V2KX-GP

N18 & P18

12

12

C317

C318

SC1U6D3V2KX-GP

1D8V_S5

U24 & V25 & N20 & U25

12

C319

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

4

3

+3P3V_MAIN

VCC3

AM27 & AN24

12

C354

1D8V_S0 1D5V_S0

close to pin
U38

SB 1128 Allen modify

1D8V_S0

12

1D05V_S0

12

SC1U6D3V2KX-GP

12

C339

SC1U6D3V2KX-GP

AA25 & AG32

AA33

C353

C382

SC1U6D3V2KX-GP

12

C359

12

C370

SC1U6D3V2KX-GP

close to pin AD36

12

12

C374

SC1U6D3V2KX-GP

CRB

close to pin
AM30 & AN32

12

C369

12

C373

SC1U6D3V2KX-GP

󱌳󲒇󰵉󵞏

SC1U6D3V2KX-GP

close to pin V36

12

C375

C343

SC1U6D3V2KX-GP

close to pin U36

SC1U6D3V2KX-GP

0.47uF

1D5V_S0

12

AM32

C362

SC1U6D3V2KX-GP

AJ19 x 2 & AG18

12

C331

2

1D35V_S01D35V_S01D35V_S0

12

C333

close to pin
AG19

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

close to pin
AF19

12

12

C327

C376

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1

VGA_1P35V

12

close to pin
BD1

C329

SC2D2U6D3V2MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

close to pin
AN18

12

SC1U6D3V2KX-GP

AJ36 & AK35 & AK36

12

C364

C350

close to pin
AA36 & Y35 & Y36

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

close to pin
AN25

12

C349

C320

SC1U6D3V2KX-GP

1D0V_S01D0V_S0

SC1U6D3V2KX-GP

close to pin
V32

close to pin
AD35 & AF35

12

C368

SC1U6D3V2KX-GP

3

close to pin

close to pin AF36

U18 & U19

12

12

C371

C363

close to pin

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AK18 & AM18

close to pin
AF21 & AG21

1D0V_S0

1D0V_S01D0V_S01D0V_S0

12

C311

close to pin
Y18 & G1

SCD01U50V2KX-1GP

12

12

C344

SCD1U10V2KX-5GP

AN29 & AN30 & V24 & Y22 & Y24

12

12

C357

SC1U6D3V2KX-GP

C332

C365

close to pin AJ18close to pin

1D0V_S0

close to pin BJ6

12

C336

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

2

SC1U6D3V2KX-GP

12

12

C352

C360

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C351

SC1U6D3V2KX-GP

12

C367

SC22U6D3V5MX-2GP

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

CPU (Power CAP2)

CPU (Power CAP2)

CPU (Power CAP2)

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

17 58Tuesday, April 15, 2014

17 58Tuesday, April 15, 2014

17 58Tuesday, April 15, 2014

1

SC1U6D3V2KX-GP

close to pin

close to pin
AM16

4

AF16 & AF18

12

C326

12

C347

1D0V_S5 1D0V_S01D0V_S0 1D0V_S01D0V_S01D0V_S0

12

B B

C310

close to pinC5close to pin

A A

5

close to pin
Y19 & C3

12

12

12

SC1U6D3V2KX-GP

B6

C309

C25

SC1U6D3V2KX-GP

SCD01U50V2KX-1GP

close to pin
V22

close to pin
M14

C23

SC1U6D3V2KX-GP

1D0V_S0

12

C323

SC1U6D3V2KX-GP

close to pin
U22

12

C314

SC1U6D3V2KX-GP

5

Vinafix.com

4

3

2

1

12 OF 13

VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280

E8
F19
F2
F24
F27
F30
F35
F5
F7
G10
G20
G22
G26
G28
G32
G34
G42
H19
H27
H35
J1
J16
J19
J22
J27
J32
J35
J40
J53
K14
K22
K32
K36
K4
K50

CPU1M

K9
L13
L19
L27
L35

M19
M26
M27
M34
M35
M38
M47
M51

N1

N16
N38
N51

P13
P16
P19
P20
P24
P32
P35
P38

P4
P47
P52

P9
T40

U1

U11
U12
U14
U21

BAY-TRAIL-GP

(71.00BAY.C0U)

BAY TRAIL-M/D SOC

VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315

13 OF 13

VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350

U3
U30
U32
U40
U42
U43
U45
U46
U48
U49
U5
U51
U53
U6
U8
U9
V12
V16
V19
V21
V35
V40
V44
V51
V7
Y10
Y14
Y16
Y21
Y25
Y33
Y41
Y44
Y7
Y9

BF30
BF36

BF4
BG31
BG34
BG39
BG42
BG45
BG49

BJ11
BJ15
BJ19
BJ23
BJ27
BJ31
BJ35
BJ39
BJ43
BJ47

BJ7
C14
C31
C34
C39
C42
C45
C49
D12
D16
D24
D30
D36
D38

E19

E35

CPU1L

BAY TRAIL-M/D SOC

VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245

BAY-TRAIL-GP

(71.00BAY.C0U)

10 OF 13

VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140

AH47
AH48
AH50
AH51
AH6
AM44
AM51
AM7
AN1
AN11
AN12
AN14
AN22
AN3
AN33
AN35
AN36
AN38
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN5
AN51
AN53
AN6
AN8
AN9
AP40
AT12
AT16
AT19

AT24
AT27
AT30
AT35
AT38

AT4
AT47
AT52

AU1

AU24

AU3
AU30
AU38
AU51
AV12
AV13
AV14
AV18
AV19
AV24
AV27
AV30
AV35
AV38
AV47
AV51

AV7

AW13
AW19
AW27

AW3

AW35

AY10
AY22
AY32

CPU1K

BAY TRAIL-M/D SOC

VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175

BAY-TRAIL-GP

(71.00BAY.C0U)

11 OF 13

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210

AY36
AY4
AY50
AY9
BA14
BA19
BA22
BA27
BA32
BA35
BA40
BA53
BB19
BB27
BB35
BC20
BC22
BC26
BC28
BC32
BC34
BC42
BD19
BD24
BD27
BD30
BD35
BE19
BE2
BE35
BE8
BF12
BF16
BF24
BF38

AG38

AH4
AH41
AH45

AH7

AH9

AJ1
AJ16
AJ21
AJ25
AJ27
AJ29

AJ3
AJ30
AJ32
AJ33
AJ35
AJ38
AJ53

AK10
AK14
AK16
AK33
AK41
AK44
AM12
AM19
AM24
AM25
AM29
AM33
AM35
AM36
AM40

M28

CPU1J

BAY TRAIL-M/D SOC

VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105

BAY-TRAIL-GP

(71.00BAY.C0U)

CPU1I

D D

C C

B B

A11
A15
A19
A23
A27
A31
A35
A39
A43
A47

AA1
AA16
AA19
AA21

AA3
AA32
AA35
AA38
AA53
AB10

AB4
AB41
AB45
AB47
AB48
AB50
AB51

AB6
AC16
AC18
AC19
AC21
AC25
AC33
AC35

BAY TRAIL-M/D SOC

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35

BAY-TRAIL-GP

(71.00BAY.C0U)

9 OF 13

VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70

AC36
AC38
AD19
AD21
AD25
AD32
AD33
AD47
AD7
AE1
AE11
AE12
AE14
AE3
AE4
AE40
AE42
AE43
AE45
AE46
AE48
AE50
AE51
AE53
AE6
AE8
AE9
AF10
AF12
AF25
AF32
AF47
AG16
AG25
AG36

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

5

4

3

2

Title

Title

Title

CPU (VSS)

CPU (VSS)

CPU (VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

Rosa_BayTrail_DT A00

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

18 58Tuesday, April 15, 2014

18 58Tuesday, April 15, 2014

18 58Tuesday, April 15, 2014

1

5

Vinafix.com

1D8V_S0

STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC
SHOULD BE PLACED OUTSIDE KOZ AREA

1D8V_S0 10,12,13,15,17,23,25,30,35,38,43,46

4

3

2

1

D D

Description

BIOS Boot Selection

GPIO_S0_SC[063]

1D8V_S0 1D8V_S01D8V_S0 1D8V_S01D8V_S0 1D8V_S0

12

R546
10KR2F-2-GP

Schematic

C C

12

LPE_I2S2_FRM 10 GPIO_S0_NC13 11LPE_I2S2_DATAOUT 10 DDPC_CTRL_DATA 11,25

R538
10KR2F-2-GP

(R)

Security Flash
Descriptors

GPIO_S0_SC[065] MDSI_DDCDATA

Follow CRB

12

R541
10KR2F-2-GP

(R)

12

R544
1KR2J-1-GP

LPE_I2S2_DATAOUT_1

TXE1

1
2

JOWLE-CON2-5-GP

DDI0 Detect DDI1 Detect

DDI1_DDCDATA

Has pull high on
HDMI side(page25)

12

R97
2K2R2J-2-GP

(R)

12

R99

(R)

0R2J-2-GP

1A 0115 Allen modify

12

R507

(R)

2K2R2J-2-GP

DDI1_DDCDATA 11

12

R511
0R2J-2-GP

DDI1 Detect

12

R102
10KR2F-2-GP

(R)

12

R103
10KR2F-2-GP

Top swap

GPIO_S0_SC [56]GPIO DDI0_DDCDATA

12

R528
10KR2F-2-GP

(R)

12

R531
10KR2F-2-GP

(R)

GPIO_S0_SC_56 13

R544 -> 1k ohm

High

Low

SPI

LPC

Normal Operation

Override

DDI0 detected

DDI0 not detected

DDI1 detected

DDI1 not detected

DDI1 detected

DDI1 not detected

B B

LPE_I2S2_DATAOUT_1

1A 0107 Allen modify

Q26

2N7002

G

SFD_GPIO38

A A

5

4

SOT-23

(84.2N702.J31)

S D

3

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

1

Hsichih, Taipei

19 58Tuesday, April 15, 2014

19 58Tuesday, April 15, 2014

19 58Tuesday, April 15, 2014

Title

Title

Title

CPU (STRAP)

CPU (STRAP)

CPU (STRAP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT A00

A3

Rosa_BayTrail_DT A00

A3

Rosa_BayTrail_DT A00

A3

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

Vinafix.com

4

3

2

1

1D8V_S0

PM_SLP_S4#_CPU12
PM_SLP_S3#_CPU12

SLP_S3_N12,38,45
SLP_S4_N38,42,46,48

PCIE_WAKE#_CPU12

WAKE_N30,34

D D

C C

PLTRST_N23,38

PLT_RST#_CPU12

1D8V_S5
SB3V
V_3P3_A
VCC3

PM_SLP_S4#_CPU PM_SLP_S4#_CPU_G

PM_SLP_S3#_CPU PM_SLP_S3#_CPU_G

1D8V_S0 10,12,13,15,17,19,23,25,30,35,38,43,46
1D8V_S5 12,15,17,23,28,30,34,38,43,44,56,57
SB3V 12,15,17,30,34,35,38,43,44,45,47,48,57
V_3P3_A 12,23,35,38,40,46,47,57
VCC3 12,13,15,17,21,23,24,25,30,31,34,35,36,38,39,46,56

1D8V_S5

R63
10KR2J-3-GP

(R)

1 2

R62
10KR2J-3-GP

12

12

1D8V_S5

R49
10KR2J-3-GP

(R)

1 2

R48
10KR2J-3-GP

12

12

SB 1126 Allen modify

V_3P3_A

1 2

6

2

1

C31
SC1U10V2KX-1GP

(R)

V_3P3_A

1 2

6

2

1

C30
SC1U10V2KX-1GP

(R)

R66
10KR2J-3-GP

PM_SLP_S4#_CPU_D

Q17A
MMBT3904DW-GP

(75.03904.A7C)

R51
10KR2J-3-GP

PM_SLP_S3#_CPU_D

Q16A
MMBT3904DW-GP

(75.03904.A7C)

SB3V

5

SB3V

5

R67
10KR2J-3-GP

1 2

SLP_S4_N

3

Q17B
MMBT3904DW-GP

(75.03904.A7C)

4

SB 1126 Allen modify

R54
10KR2J-3-GP

1 2

SLP_S3_N

3

Q16B
MMBT3904DW-GP

(75.03904.A7C)

4

1D8V_S5

12

R72
2K2R2J-2-GP

(R)

R75

PLT_RST#_CPU PLT_RST#_CPU_G

10KR2J-3-GP

12

1D8V_S5 SB3V

R59

10KR2J-3-GP

PLT_RST#_D

1 2

Q19
2N7002H-GP

(84.2N702.J31)

PCIE_WAKE#_CPU WAKE_N

12

R65
10KR2J-3-GP

6

2

Q20A
MMBT3904DW-GP

(75.03904.A7C)

1

SB 1126 Allen modify

SB3V

R58
10KR2J-3-GP

1 2

PCIE_WAKE#_CPU_B

G

SD

Bogis 20130719
Un-mount R1848
Del Q1807, add Q1819
(Change from 3904 to 2N7002)

VCC3V_3P3_A

12

5

R60
10KR2J-3-GP

1 2

PCIEx1 wake

R64
1KR2J-1-GP

For x1 / mini-PCIE / debug card / SIO

PLTRST_N

3

Q20B
MMBT3904DW-GP

(75.03904.A7C)

4

G

Q82
2N7002A-7-GP

(84.2N702.J31)

G

Q81
2N7002A-7-GP

VNN_GFX_PWRGD

S D

(84.2N702.J31)

S D

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

TBD

TBD

TBD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

G

Q84

2N7002A-7-GP

1D05V_RUNPWROK

S D

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

20 58Tuesday, April 15, 2014

20 58Tuesday, April 15, 2014

20 58Tuesday, April 15, 2014

A00

A00

A00

1.5V_S0_EN

B B

remove Panel select pin (Patrick)

SIO_PSON_N

G

Q83

S D

2N7002A-7-GP

(84.2N702.J31)

1.5V_S0_PWRGD 1D05V_S0_EN

1A 0107 Allen modify

SIO_PSON_N

remove LVDS DET pin (Patrick)

1A 0107 Allen modify

SIO_PSON_N38,41,46

A A

VNN_GFX_PWRGD44,45

1.5V_S0_EN43

1.5V_S0_PWRGD43
1D05V_S0_EN43

1D05V_RUNPWROK15,42,43

5

4

3

S0: L
S3/S4/S5: H

G

Q80

2N7002A-7-GP

(84.2N702.J31)

S D

(84.2N702.J31)

2

5

Vinafix.com

4

3

2

1

DDR_0D675V
DDR_VDDQ

VCC3

D D

DDR DATA

DDR CMD/ADD

DDR CTRL

C C

DDR CLOCK

DDR_0D675V 42
DDR_VDDQ 8,14,16,42,48
VCC3 12,13,15,17,20,23,24,25,30,31,34,35,36,38,39,46,56

M_DATA_A[0..63]8

M_DQS_A_DP[0..7]8

M_DQS_A_DN[0..7]8

M_MA_DM[7..0]8

M_MAA_A[0..15]8

M_WE_A_N8
M_CAS_A_N8
M_RAS_A_N8

M_SBS_A08
M_SBS_A18
M_SBS_A28

M_SCS_A_N08
M_SCS_A_N18
M_SCKE_A08
M_SCKE_A18
M_ODT_A08
M_ODT_A18

CK_M_DDR0_A_DP8
CK_M_DDR0_A_DN8
CK_M_DDR1_A_DP8
CK_M_DDR1_A_DN8

DDR OTHERS

DDR3_DRAMRST_N8

SMB0_CLK13,23,38,52
SMB0_DATA13,23,38,52

SIO_MEM_EVENT_L38

B B

A A

0524 0613 Eric change DIMM connector back

VREF_CA_DIMM1

1A 0115 Allen modify

DDR3_DRAMRST_N

VREF_DQ_DIMM1

12

R82 0R0402-PAD-2-GP

12

DDR_0D675V

(R)

C47

SCD1U10V2KX-5GP

M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_MAA_A15
M_SBS_A2

M_SBS_A0
M_SBS_A1

M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63

M_DQS_A_DN0
M_DQS_A_DN1
M_DQS_A_DN2
M_DQS_A_DN3
M_DQS_A_DN4
M_DQS_A_DN5
M_DQS_A_DN6
M_DQS_A_DN7

M_DQS_A_DP0
M_DQS_A_DP1
M_DQS_A_DP2
M_DQS_A_DP3
M_DQS_A_DP4
M_DQS_A_DP5
M_DQS_A_DP6
M_DQS_A_DP7

M_ODT_A0
M_ODT_A1

DDR3_DRAMRST_N_A_1

SB 0730 Eric modify

5

4

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78
79

109
108

5

7
15
17

4

6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70

129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

10
27
45
62

135
152
169
186

12
29
47
64

137
154
171
188

116
120

126

1
30

203
204

DIMM1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

ODT0
ODT1

VREF_CA
VREF_DQ

RESET#

VTT1
VTT2

DDR3-204P-80-GP

RAS#
CAS#
CS0#

CS1#
CKE0

CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1
NC#2

NC#/TEST

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

WE#

NP1

NP1

NP2

NP2

M_RAS_A_N

110

M_WE_A_N

113

M_CAS_A_N

115

M_SCS_A_N0

114

M_SCS_A_N1

121

M_SCKE_A0

73

M_SCKE_A1

74

CK_M_DDR0_A_DP

101

CK0

CK_M_DDR0_A_DN

103

CK_M_DDR1_A_DP

102

CK1

CK_M_DDR1_A_DN

104

M_MA_DM0

11

DM0

M_MA_DM1

28

DM1

M_MA_DM2

46

DM2

M_MA_DM3

63

DM3

M_MA_DM4

136

DM4

M_MA_DM5

153

DM5

M_MA_DM6

170

DM6

M_MA_DM7

187

DM7

SMB0_DATA

200

SDA

SMB0_CLK

202

SCL

MEM_MA_EVENT_L

198
199

DIMM1_SA0

197

SA0

DIMM1_SA1

201

SA1

77
122
125

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

DDR_VDDQ

SCD1U16V2KX-3GP

VCC3

SCD1U16V2KX-3GP

DDR_VDDQ

12

C68

DDR_VDDQ

SC10U6D3V3MX-GP

12

C62

VCC3

12

C398

DIMM1_SA0
DIMM1_SA1

Note:
If SA0 DIM0 = 0, SA1 _ DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 0, SA1 _ DIM0 = 1
SO-DIMMA SPD Address is 0xA4
SO-DIMMA TS Address is 0x34

C66

SCD1U16V2KX-3GP

R579 10KR2J-3-GP
R581 10KR2J-3-GP

DDR_VDDQ

SIO_MEM_EVENT_L SIO_MEM_EVENT_L_C

12

C81
SCD1U10V2KX-5GP

SCD1U16V2KX-3GP

12

C77

SC10U6D3V3MX-GP

12

SCD1U16V2KX-3GP

12

C399
SCD1U16V2KX-3GP

(R)

1 2
1 2

1 2

R565

(R)

0R2J-2-GP

12

C82

12

C70

1KR2J-1-GP
R572

1 2

(R)

VREF_DQ_DIMM1VREF_CA_DIMM1

12

C302
SCD1U10V2KX-5GP

1A 0115 Allen modify

R119 0R0402-PAD-2-GP

C71

SC10U6D3V3MX-GP

12

SCD1U16V2KX-3GP

12

C67

C78

SC10U6D3V3MX-GP

12

SCD1U16V2KX-3GP

12

C64

C61

SC10U6D3V3MX-GP

12

SCD1U16V2KX-3GP

0829 Allen modify

VCC3

R576

SIO_MEM_EVENT_L_B

CBE

Q51

MMBT3904-4-GP

VREF_CA_0VREF_CA_DIMM1 VREF_DQ_0VREF_DQ_DIMM1

12

10KR2J-3-GP

1 2

(R)

MEM_MA_EVENT_L

DDR_VDDQ DDR_VDDQ

12

R117
4K7R2F-GP

12

R122
4K7R2F-GP

For Intel Recommend Close to DIMM1 (Bay Trail)For Intel Recommend Close to DIMM1 (Bay Trail)

SCD1U16V2KX-3GP

12

12

SC10U6D3V3MX-GP

C79

12

SCD1U16V2KX-3GP

DDR_0D675V

12

C407

12

C303

C63

SC1U6D3V2KX-GP

C60

12

C76

SC10U6D3V3MX-GP

12

C69

SCD1U16V2KX-3GP

Place these caps
close to VTT1 and
VTT2.

12

12

C404

C408

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1A 0115 Allen modify

12

R482 0R0402-PAD-2-GP

SC10U6D3V3MX-GP

12

C65

0829 Allen modify

12

12

C403

12

C406

C405

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

R484
4K7R2F-GP

12

R483
4K7R2F-GP

close to DIMM slot pin 126 close to DIMM slot pin 1

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

DIMM_A

DIMM_A

DIMM_A

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

A00

A00

21 58Tuesday, April 15, 2014

21 58Tuesday, April 15, 2014

1

21 58Tuesday, April 15, 2014

A00

5

Vinafix.com

D D

C C

4

3

2

1

B B

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

itle

itle

T

T

TBD

TBD

TBD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: S heet of

Date: S heet of

4

3

2

Date: S heet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

22 58Tuesday, April 15, 2014

22 58Tuesday, April 15, 2014

22 58Tuesday, April 15, 2014

A00

A00

A00

1D8V_S0

Vinafix.com

1D8V_S5
V_3P3_A
VCC
VCC3

LPC DEBUG PORT

D D

LAD0_FWH013,38
LAD1_FWH113,38
LAD2_FWH213,38
LAD3_FWH313,38

LFRAMEJ_FW413,38

PLTRST_N20,38
LPC_CLK113

5

1D8V_S0 10,12,13,15,17,19,25,30,35,38,43,46
1D8V_S5 12,15,17,20,28,30,34,38,43,44,56,57
V_3P3_A 12,20,35,38,40,46,47,57
VCC 24,25,35,38,39,42,46,56,58
VCC3 12,13,15,17,20,21,24,25,30,31,34,35,36,38,39,46,56

LPC DEBUG PORT

LPC_CLK1
PLTRST_N

LAD0_FWH0
LAD1_FWH1
LAD2_FWH2
LAD3_FWH3

LFRAMEJ_FW4

FOX-CONN14A-S1-GP

0502 Eric modified from Dallas/kelia

COREPWROK12,39

PCH_RTCTEST_PULLUP12

PSTBTN_N12
RSMRST_N12,38,57

C C

B B

PWRBTN_N12,35,38

SMB0_CLK13,21,38,52
SMB0_DATA13,21,38,52

XDP

DBG1511
DBG1411
DBG1311
DBG1211
DBG1111
DBG1011
DBG911
DBG811
OBSFN_C011
XDP_H_TCK12
XDP_H_TRST_N12

XDP_H_TMS12
XDP_H_TDI12

TAP_PREQ#12
XDP_H_TDO12
TAP_PRDY#12

OBSFN_C112
DBG012
DBG112
DBG212
DBG312
DBG412
DBG512
DBG612
DBG712

4

LPC1

1
3

5
7
9

11
13

(D)

INIT_3V

2
4

FWH_ID0

6
8
10
12
NP1
14

Pin height 2.3mm

Follow Eagle

VCC3

Layout Close SIO

12

R324
4K7R2J-2-GP

(D)

VCC3
VCC

1 2

(R)

R317
10KR2J-3-GP

3

(D)

12

(D)

12

C28

C26

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

TP2

TPAD28

TAP_PREQ#_R
TAP_PRDY#

DBG0
DBG1

DBG2
DBG3

DBG4
DBG5

DBG6
DBG7

RSMRST_N_XDP
XDP_PLTRST_N

1

COREPWROK_XDP
SRTC_RST#_XDP

SMB0_DATA
SMB0_CLK

XDP_H_TCK

2

XDP1

1
3

5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

SMC-CONN60A-GP

(D)

1D8V_S01D8V_S51D8V_S51D8V_S0

MH 1
2

OBSFN_C0

4

OBSFN_C1

6
8
10

DBG8

12

DBG9

14
16

DBG10

18

DBG11

20
22
24
26
28

DBG12

30

DBG13

32
34

DBG14

36

DBG15

38
40
42
44

PLT_RST#_XDP

46

PSTBTN_N

48
50

XDP_H_TDO

52

XDP_H_TRST_N

54

XDP_H_TDI

56

XDP_H_TMS

58
60

MH 2

1

R46

1KR2J-1-GP

1 2

(D)

PLTRST_N

Debug Header

PSTBTN_N

12

SCD1U16V2KX-3GP

12

C27

(R)

SCD1U10V2KX-5GP

C24

R36
100KR2J-1-GP

(R)

1 2

SRTC_RST#_XDP_D

3 4
2
1

Q6

(R75.27002.D7C)

2N7002KDW-GP

COREPWROK_XDP

COREPWROK

V_3P3_AV_3P3_A

R35
1KR2J-1-GP

(R)

1 2

5
6

SRTC_RST#_XDP

12

C22
SCD1U10V2KX-5GP

(R)

PCH_RTCTEST_PULLUP

12

R472 1KR2J-1-GP

R477 1KR2J-1-GP

R47 0R2J-2-GP

1 2

TAP_PREQ#_R

12

C35

(D)

12

1D8V_S5

SCD1U10V2KX-5GP

(D)

(D)

(D)

12

RSMRST_N_XDPRSMRST_N

XDP_PLTRST_NPWRBTN_N

R43
220R2F-GP

(D)

U2

1

NC#1

2

A
GND3Y

SN74AUP1G34DBVR-GP

(R)

1 2

R34 0R2J-2-GP

1D8V_S5

5

VCC

TAP_PREQ#

4

(D)

Change to (R)

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

TBD

TBD

TBD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

23 58Tuesday, April 15, 2014

23 58Tuesday, April 15, 2014

23 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

VCC
VCC3

D D

VCC 23,25,35,38,39,42,46,56,58
VCC3 12,13,15,17,20,21,23,25,30,31,34,35,36,38,39,46,56

Debug VGA

RGB

VGA_RED11

VGA_GREEN11

VGA_BLUE11

SYNC

VGA_HSYNC_3V11
VGA_VSYNC_3V11

DDC

VGA_FCH_DDCSDA11
VGA_FCH_DDCSCL11

DETECT

VGA_DET38

C C

B B

ESD Diode

BLUE_CRT

GREEN_CRT

DDC_DATA/DDC_CLK;
LOCATE PULL-UPS
ANYWHERE ON ROUTE
OF TRACE

VSYNC_3P3V

HSYNC_3P3 V

Joey_SA_0424

U22

1
2

AZC099-04S-1-GP

1A 0115 Allen modify

Joey_SA_0424

(R)

U28

1

I/O1

2

GND
I/O23I/O3

AZC099-04S-1-GP

I/O1
GND
I/O23I/O3

I/O4
VDD

+5V_VGA

12

C252

(R)

I/O4

VDD

1A 0115 Allen modify

VGA_FCH_DDCSDA G_H_DDCDA

VGA_FCH_DDCSCL G_H_DDCSCL

6
5
4

SCD1U16V2KX-3GP

RED_CRT

6
5

VGA_DET

4

R406 0R0402-PAD-2-GP

12

R407 0R0402-PAD-2-GP

VGA_DDC_PU

12

C266
SCD1U16V2KX-3GP

5VDDCDA

5VDDCCL

12

4

2K2R2J-2-GP

R412

VCC3

12

VCC3

12

VGA_HSYNC_3V

VGA_VSYNC_3V

R410
2K2R2J-2-GP

2N7002EDW-2-GP

VCC3

U26

3 4
2
1

SC100P50V2JN-3GP

1A 0113 Allen modify

5
6

2K2R2J-2-GP

C246

R413

(R)

12

12

12

VCC

AK

R1213
1KR2J-1-GP

12

D11
1SS355GP-GP

VGA_DDC_PU

OE*

R714
1KR2J-1-GP

8/27 Allen Add

12

R418
2K2R2J-2-GP

VGA_RED

VGA_GREEN

VGA_BLUE

G_H_DDCDA_1
G_H_DDCSCL_1

12

(R)

C250
SC100P50V2JN-3GP

remove

U45

1

5

OE#

VCC

2

A

4

GND3Y

74AHCT1G125GW-1-GP

U44

1

5

OE#

VCC

2

A

4

GND3Y

74AHCT1G125GW-1-GP

150R2F-1-GP

VCC

VGA_HSYNC_3V_C

VCC

VGA_VSYNC_3V_C

R416

1 2

R417

150R2F-1-GP

1 2

150R2F-1-GP

1 2

R715 0R2J-2-GP

1 2

R716 0R2J-2-GP

3

R411

1 2

12

C244

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP

12

12

C245

SC3D3P50V2CN-GP

L11

1 2

FCM1005MF-750T03-GP

L17

1 2

FCM1005MF-750T03-GP

L16

1 2

FCM1005MF-750T03-GP

1 2
1 2

C241

R423 100R2F-L1-GP-U
R425 100R2F-L1-GP-U

12

C260

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP

VGA_RED_C_L

VGA_GREEN_C_L

VGA_BLUE_C_L

12

12

C258

SC3D3P50V2CN-GP

L12

1 2

FCM1005KF-750T04-GP

(63.R0034.1DL)

L14

1 2

FCM1005KF-750T04-GP

(63.R0034.1DL)

L15

1 2

FCM1005KF-750T04-GP

(63.R0034.1DL)

(R)

C270

12

SC100P50V2JN-3GP

(R)

SC15P50V2JN-DL-GP

12

C259

SC10P50V2JN-4GP

SC10P50V2JN-4GP

C269

12

C264

C254

(R)

SC100P50V2JN-3GP

Change to 15pF by Victoria test result (Patrick)

(R)

12

12

C257

SC10P50V2JN-4GP

HSYNC_3P3 V

VSYNC_3P3V

12

12

2

RED_CRT

GREEN_CRT

BLUE_CRT

5VDDCDA
5VDDCCL

(R)

C253

C265
SC15P50V2JN-DL-GP

VCC3 VCC3

R427
1KR2J-1-GP

(R)

1 2

1 2

R420
1KR2J-1-GP

(R)

VGA_DET

VGA1

NC#44VCC_CRT

11

NC#11

5

GND

6

GND

7

GND

8

GND

10

GND

16

GND

17

GND

D-SUB-15-134-GP

(20.20951.015)

DDCDATA_ID1

DDCCLK_ID3

CRT_RED

CRT_GREEN

CRT_BLUE

VSYNC
HSYNC

1

VCC

12

C262
SCD1U16V2KX-3GP

(R)

F10
POLYSW-1D5A8V-3-GP

(69.41501.051)

1 2

V_5P0_CONN_CRT_L

12

L13
MHC1608S800QBP-GP

(63.00000.00L)

9

12

5VDDCDA

15

5VDDCCL
RED_CRT

1

GREEN_CRT

2

BLUE_CRT

3

VSYNC_3P3V

14

HSYNC_3P3V

13

12

C261
SCD1U16V2KX-3GP

+5V_VGA

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

T

T

Title

itle

itle

VGA

VGA

VGA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

24 58Tuesday, April 15, 2014

24 58Tuesday, April 15, 2014

24 58Tuesday, April 15, 2014

A00

A00

A00

VCC3

Vinafix.com

VCC

1D8V_S0

DDSP_C_HPD11
DDPC_CTRL_CLK11

DDPC_CTRL_DATA11,19

DDSP_C_TX_DP_011
DDSP_C_TX_DN_011
DDSP_C_TX_DP_111
DDSP_C_TX_DN_111
DDSP_C_TX_DP_211
DDSP_C_TX_DN_211
DDSP_C_TX_DP_311
DDSP_C_TX_DN_311

V_1P5

U55

VIN

VOUT

GND

LD1117AG-AD-AA3-A-R-1-GP

(H)

VCC3 12,13,15,17,20,21,23,24,30,31,34,35,36,38,39,46,56
VCC 23,24,35,38,39,42,46,56,58
1D8V_S0 10,12,13,15,17,19,23,30,35,38,43,46

DDSP_C_TX_DP_0
DDSP_C_TX_DN_0

DDSP_C_TX_DP_1
DDSP_C_TX_DN_1

DDSP_C_TX_DP_2
DDSP_C_TX_DN_2

DDSP_C_TX_DP_3
DDSP_C_TX_DN_3

VCC3

C3367
SC10U10V5KX-2GP

1 2

12

R1

(H)

12

R1591

R2

180R3F-GP

1117 ADJ

(H)

R1592
36R3F-GP

(H)

Vout = 1.25*(1+R1/R2)

12

C3366
SCD1U16V2KX-3GP

(H)

3
2
1

For layout routing 󴅐 C800~C807 TOP& Botton

C595 SCD1U10V2KX-4GP
C598 SCD1U10V2KX-4GP

C596 SCD1U10V2KX-4GP
C599 SCD1U10V2KX-4GP

C597 SCD1U10V2KX-4GP
C601 SCD1U10V2KX-4GP

C602 SCD1U10V2KX-4GP
C600 SCD1U10V2KX-4GP

HDMI_LANE0_DN_C_RDS

12

(C)

HDMI_LANE1_DP_C_RDS

12

(C)

HDMI_LANE1_DN_C_RDS

12

(C)

HDMI_LANE2_DP_C_RDS

12

(C)

HDMI_LANE2_DN_C_RDS

12

(C)

HDMI_LANE3_DP_C_RDS

12

(C)

HDMI_LANE3_DN_C_RDS

12

(C)

HDMI_LANE0_DP_C_RDS

12

(C)

Place near HDMI Connector

1 2

R41 100KR2J-1-GP(C)

VCC3

DDSP_C_TX_DP_2
DDSP_C_TX_DN_2
DDSP_C_TX_DP_1
DDSP_C_TX_DN_1
DDSP_C_TX_DP_0
DDSP_C_TX_DN_0

DDSP_C_TX_DP_3
DDSP_C_TX_DN_3

For layout routing 󴅐C595~C602 TOP& Botton

V_1P5_HDMI

V_1P5_HDMI V_1P5_HDMI V_1P5_HDMI VCC3

R1589

2K2R2J-2-GP

DDPC_CTRL_CLK

DDPC_CTRL_DATA

DDSP_D_TX_N2

C800 SCD1U10V2KX-4GP

12

C801 SCD1U10V2KX-4GP

12

C802 SCD1U10V2KX-4GP

12

C803 SCD1U10V2KX-4GP

12

C804 SCD1U10V2KX-4GP

12

C805 SCD1U10V2KX-4GP

12

C806 SCD1U10V2KX-4GP

12

C807 SCD1U10V2KX-4GP

12

12

C3370
SCD1U16V2KX-3GP

(H)

1D8V_S0

12

12

R1590
2K2R2J-2-GP

12

󳙁󳓓

12

R1229
470R2J-2-GP

(C)

DS

G

V_1P5_HDMI

(H)
(H)
(H)
(H)
(H)
(H)

(H)
(H)

󳙁󳓓

12

Q4
2N7002K-1-GP

(C84.2N702.J31)

12

R1230
470R2J-2-GP

(C)

VCC3

HDMI_LANE0_DP_C_IC
HDMI_LANE0_DN_C_IC
HDMI_LANE1_DP_C_IC
HDMI_LANE1_DN_C_IC
HDMI_LANE2_DP_C_IC
HDMI_LANE2_DN_C_IC

HDMI_LANE3_DP_C_IC
HDMI_LANE3_DN_C_IC

DCIN_EN
DDCBUF

EQ
CFG

REXT

R1603
4K99R2F-L-GP

(H)

12

R1231
470R2J-2-GP

(C)

12

12

R1232
470R2J-2-GP

(C)

U54

11

VDD33

37

VDD33

12

VDDRX

40

VDDRX

19

VDDTA

20

VDDTX

31

VDDTX

6

IN_D0P

7

IN_D0N

4

IN_D1P

5

IN_D1N

1

IN_D2P

2

IN_D2N

I2C_CTL_EN

9

IN_CKP

10

IN_CKN

13

DCIN_EN/SCL_CTL

14

DDCBUF/SDA_CTL

17

EQ/I2C_ADDR0

23

CFG/I2C_ADDR1

18

REXT

PS8401ATQFN40GTR2-A4-1-GP

(H071.08407.0003)

PS8407 A1

R61
470R2J-2-GP

(C)

OUT_CKN
OUT_CKP

OUT_D0P
OUT_D0N
OUT_D1P
OUT_D1N
OUT_D2P
OUT_D2N

SCL_SNK
SDA_SNK
HPD_SNK

SCL_SRC
SDA_SRC
HPD_SRC

PRE
ISET
PD#

GND
GND
GND

change to 4.99K 02/10

C3375
SCD1U16V2KX-3GP

(H)

12

C3374
SCD1U16V2KX-3GP

(H)

12

C3373
SCD01U16V2KX-3GP

(H)

12

C3368
SCD01U16V2KX-3GP

(H)

Near Pin 20, 31Near Pin 19 Near Pin 12, 40 Near Pin 11, 37

VCC

AK

D45
1SS355-4-GP

(83.00355.F1F)

1D8V_S0

G

DS

Q60
NDS331N-1-GP

G

(84.00301.A31)

DS

Q90
NDS331N-1-GP

(84.00301.A31)

Change to low VGS parts

2K2R2J-2-GP

12

R17

12

R1233
470R2J-2-GP

(C)

21
22

25
24
27
26
30
29

32
33
28

38
39
3

8
16
34
36

15
35
41

12

C3369
SCD1U16V2KX-3GP

(H)

VCC5_DDC_HDMI

12

R18
2K2R2J-2-GP

12

R1234
470R2J-2-GP

(C)

DDSP_D_TX_N0

HDMI_LANE 3_DN_I C
HDMI_LANE3_DP_IC

HDMI_LANE2_DP_IC
HDMI_LANE 2_DN_I C
HDMI_LANE1_DP_IC
HDMI_LANE 1_DN_I C
HDMI_LANE0_DP_IC
HDMI_LANE 0_DN_I C

DDPC_CTRL_CLK_CONN_IC
DDPC_CTRL_DATA_CONN_IC
DDSP_C_HPD_CONN

TP51_1

1

TP52_1

1

DDSP_C_HPD_RE

12

C604
SC470P50V2KX-3GP

12

C603
SC470P50V2KX-3GP

TR1

(C)

HDMI_LANE0_DP

1342

1342

(C)

1342

(C)

(C)

1342

HDMI_LANE0_DN

HDMI_LANE1_DP
HDMI_LANE1_DN

HDMI_LANE2_DP
HDMI_LANE2_DN

HDMI_LANE3_DP
HDMI_LANE3_DN

12

R1235
470R2J-2-GP

(C)

FILTER-4P-61-GP
FILTER-4P-61-GP

TR11
FILTER-4P-61-GP

TR12

TR13

FILTER-4P-61-GP

For layout routing 󴅐 TR14,TR15,TR16,TR17 TOP& Botton

For layout routing 󴅐 TR1,TR11,TR12,TR13 TOP& Botton

HDMI_LANE0_DP_IC
HDMI_LANE0_DN_IC

HDMI_LANE1_DP_IC

R1628

12

12

HDMI_LANE1_DN_IC

2K2R2J-2-GP

R1608

(H)

2K2R2J-2-GP

(H)

HDMI_LANE2_DP_IC
HDMI_LANE2_DN_IC

HDMI_LANE3_DP_IC
HDMI_LANE3_DN_IC

VCC3

12

C3371
SCD1U16V2KX-3GP

(H)

Route DDC_DATA at least 1" longer than DDC_CLK

TP51
TP52

From source side

PRE
ISET

12

C3372
SCD01U16V2KX-3GP

(H)

C605
SCD1U10V2KX-4GP

1 2

DDPC_CTRL_CLK_CONN

(R)

DDPC_CTRL_DATA_CONN

(R)

VCC VCC

TR14

(H)

1342

FILTER-4P-61-GP
TR15

(H)

1342

FILTER-4P-61-GP
TR17

(H)

1342

FILTER-4P-61-GP
TR16

1342

FILTER-4P-61-GP

(H)

(H)

1 2

R1594 4K7R2F-GP

1 2

R1599 4K7R2F-GP

(R)

1 2

R1593 4K7R2F-GP

(R)

1 2

R1596 4K7R2F-GP

(R)

1 2

R1598 4K7R2F-GP

(H)

1 2

R1600 4K7R2F-GP

(R)

󳙁󳓓

HDMI_LANE0_DP
HDMI_LANE0_DN

HDMI_LANE1_DP
HDMI_LANE1_DN

HDMI_LANE2_DP
HDMI_LANE2_DN

HDMI_LANE3_DP
HDMI_LANE3_DN

CFG

DCIN_EN

EQ

1 2

R1595 4K7R2F-GP

(R)

ISET

1 2

R1597 4K7R2F-GP

(R)

DDCBUF

1 2

R1601 4K7R2F-GP

(R)

PRE

1 2

R1602 4K7R2F-GP

(R)

VCC

C594
SCD1U10V2KX-4GP

1 2

󳙁󳓓

(69.41501.051)

F17

12

POLYSW-1D5A8V-3-GP

HDMI_LANE0_DP
HDMI_LANE0_DN

HDMI_LANE1_DP
HDMI_LANE1_DN

HDMI_LANE2_DP
HDMI_LANE2_DN

HDMI_LANE3_DP
HDMI_LANE3_DN

DDPC_CTRL_CLK_CONN
DDPC_CTRL_DATA_CONN

L40

V_5P0_HDMI_CONN_L

HDMI_LANE2_DP HDMI_LANE2_DP
HDMI_LANE2_DN

HDMI_LANE3_DP
HDMI_LANE3_DN

HDMI_LANE0_DP
HDMI_LANE0_DN

HDMI_LANE1_DP
HDMI_LANE1_DN

DDPC_CTRL_CLK_CONN DDPC_CTRL_CLK_CONN

DDPC_CTRL_DATA_CONN
DDSP_C_HPD_CONN DDSP_C_HPD_CONN

To CPU

To CPU

0R0805-PAD

DDSP_C_HPD

12

1
2
3
4
5

1
2
3
4
5

1
2
3
4
5

DDSP_C_HPD

V_5P0_HDMI_CONN
DDSP_C_HPD_CONN

C4
SCD1U10V2KX-4GP

1 2

ESD

U48

LINE_1

NC#10

LINE_2

NC#9

GND

GND

LINE_3

NC#7

LINE_4

NC#6

AZ1045-04F-R7G-GP

U50

LINE_1

NC#10

LINE_2

NC#9

GND

GND

LINE_3

NC#7

LINE_4

NC#6

AZ1045-04F-R7G-GP

U49

LINE_1

NC#10

LINE_2

NC#9

GND

GND

LINE_3

NC#7

LINE_4

NC#6

AZ1045-04F-R7G-GP

1D8V_S0

1 2

S D

1D8V_S0

1 2

S D

10
9
8
7
6

10
9
8
7
6

10
9
8
7
6

R498
10KR2J-3-GP

(C)

Q46
2N7002A-7-GP

(C84.2N702.J31)

G

R1634
10KR2J-3-GP

(H)

Q85
2N7002A-7-GP

(H84.2N702.J31)

G

HDMI1

2021

2223

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

SKT-HDMI19P-57-GP

(62.10078.641)

HDMI_LANE2_DN
HDMI_LANE3_DP

HDMI_LANE3_DN

HDMI_LANE 0_DP
HDMI_LANE 0_DN

HDMI_LANE 1_DP
HDMI_LANE 1_DN

DDPC_CTRL_DATA_CONN

Lever shift HPD (Patrick)

From HDMI CONN

DDSP_C_HPD_CONN

12

R1630
100KR2F-L1-GP

(C)

Re-Driver IC HPD 02/10

From Re Driver IC

DDSP_C_HPD_RE

12

R1635
100KR2F-L1-GP

(R)

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

HDMI

HDMI

HDMI

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

25 58Tuesday, April 15, 2014

25 58Tuesday, April 15, 2014

25 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

D D

C C

B B

Remove DP to LVDS CIRCUIT

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

Title

TNAitle

TNAitle

NA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Rosa_BayT rail_DT

D

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

26 58Tuesday, April 15, 2014

26 58Tuesday, April 15, 2014

26 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

GL850G
Enable/Disable USB output port: D+/D- pull high 1K to disable USB port

1A 0115 Allen modify

SB5V HUB_VCC

1 2

SB5V

D D

VCC3

From CPU

F_USB3P13
F_USB3N13

USB2.0 Front

F_USB3P_H28
F_USB3N_H28

F_USB0P_H28

C C

F_USB0N_H28
USBOC0328
HUSBOC0128

SB5V 31,35,38,39,41,42,43,44,45,47,57

VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,38,39,46,56

HUB_DVDD

12

12

R157 0R0805-PAD

L3

1 2

MHC1608S601LBP-GP
C93
SCD1U16V3KX-3GP

HUB_RESET#

C101
SC1U16V3KX-2GP

Co-lay GL850G and GL852G
GL850G: 71.0850G.003 (USB2.0 STT 1 to 4)

HUB_VCC

HUB_AVDD

HUB_DVDD_RHUB_DVDD

HUB_DVDD

HUB_X1
HUB_X2

HUB_RREF
HUB_PSELF

HUB_PGANG
HUB_TEST/SCL

HUB_SDA

Set USB port to be internal (non-removable): set OC pin is floating
Set USB port to be external (removable): set OC pin is non-floating (pull high 10K to 3.3V or USB OC#)

GL852G

2014/03/18 fixed for Saffron front panl USB test eye digram

Enable/Disable USB output port: setting by EEPROM
Set USB port to be internal (non-removable) or external (removable): setting by EEPROM

U6

5

AV D D

9

AV D D

14

AV D D

21

DVDD

27

V5

28

V33

10

X1
X211OVCUR1#/SMC

8
17
22
23

18
26

OVCUR2#/SMD
RREF
RESET#
PSELF
PGANG

TEST/SCL
SDA

GL850G-OHY31-GP

DM0
DM1
DM2
DM3
DM4

OVCUR3#
OVCUR4#

GND

DP0
DP1
DP2
DP3
DP4

USB_PN3_L

1

F_USB1P_H

4

F_USB1N_H

3

F_USB2P_H

7

F_USB2N_H

6

F_USB0P_H

13

F_USB0N_H

12

F_USB3P_H

16

F_USB3N_H

15
25

HUSBOC01

24
20

USBOC03

19

Front usb header OC (Patrick)

29

USB_PP3_L

2

USB_PN3_L

USB2.0 Card Reader DP/N2
USB2.0 BT DP/N1

USB2.0 Front DP/N0,3

TR 3

1 2

FILTER-4P-137-GP

Individual Mode

12

34

R155
100KR2J-1-GP

F_USB3N
F_USB3PUSB_PP3_L

HUB_DVDD HUB_DVDD

12

R575
10KR2J-3-GP

HUB_RESET#

12

R578
47KR2J-2-GP

(R)

HUB_RREF

HUB_PSELFHUB_PGANG

HUB_PSELF = 1 if self-powered
HUB_PSELF = 0 if bus-powered

12

R569
10KR2J-3-GP

12

R156
10KR2J-3-GP

(R)

12

R174
619R2F-L1-GP

GL852G: 71.00852.A03 (USB2.0 MTT 1 to 4)

USB2.0 BT

F_USB2P_H34
F_USB2N_H34

USB2.0 Card Reader

F_USB1P_H28
F_USB1N_H28

B B

Internal Power

(Hub Internal VR output from pin 28 V33 = HUB_DVDD)

HUB_DVDD HUB_AVDD

R577

1 2

0R0603-PAD

12

TC 4

SC10U10V5KX-2GP

close to PIN28

12

12

12

C402

12

C105

SC1U16V3KX-2GP

SCD1U16V3KX-3GP

C94

C397

SCD1U16V3KX-3GP

SCD1U16V3KX-3GP

Close to pin 5 Close to pin 9 Close to pin 14

12

12

C400

C401

SC1U16V3KX-2GP

SCD1U16V3KX-3GP

Xtal accuracy: +/- 20ppm

C106
SC33P50V2JN-3DLGP

1 2

SB 1118 Allen Modify

1 2

SC33P50V2JN-3DLGP
C107

A A

5

Close to GL850G pin10/11

4

HUB_X1

12

X3
XTAL-12MHZ-21GP

HUB_X2

EEPROM

EEPROM is used for customized VID, PID, String, Configuration
The purpose is to set 4 USB ports to be internal/external
Default settings: 4 ports are external ports

U9

1

E0

VCC

2

E1

WC#

3

E2

SCL

VSS4SDA

M24C02-WMN6TP-GP-U

(R)

3

8
7
6
5

EEPROM_WP
HUB_TEST/SCL
HUB_SDA

1 2

R158 10KR2J-3-GP

(R)

HUB_DVDD

(R)

12

C393
SCD1U16V3KX-3GP

EEPROM_WP

2

HUB_DVDD

12

R180
0R2J-2-GP

(R)

12

R179
0R2J-2-GP

(R)

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

1

Hsichih, Taipei

27 58Tuesday, April 15, 2014

27 58Tuesday, April 15, 2014

27 58Tuesday, April 15, 2014

Title

Title

Title

USB HUB

USB HUB

USB HUB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

A0 0

A0 0

A0 0

5

Vinafix.com

4

3

2

1

V_5P0_A

1D8V_S5

D D

C C

USB2.0 HUB

F_USB1P_H2 7
F_USB1N_H27

USBOC0327
USB_EN28,30,46

F_USB3P_H2 7
F_USB3N_H27

F_USB0P_H2 7
F_USB0N_H27

HUSBOC0127

F_USB0P13
F_USB0N1 3

FB_USBF2_DET12
FB_USBF1_DET12

V_5P0_A 30,31,40,46,47

1D8V_S5 12,15,17,20,23,30,34,38,43,44,56,57

USB_EN28,30,46

USB 3.0

USBOC0213

USB30_TXP01 3

USB30_TXN01 3
USB30_RXP013
USB30_RXN013

USB HUB

USB_Power

1A 0115 Allen modify

USB_EN

R1638 0R0402-PAD-2-GP

F_USB1P_H
F_USB1N_H

USBVCC01
USB2N_C_EXT

USB2P_C_EXT

12

C581
SCD1U16V2ZY-2GP

(R)

V_5P0_A

12

C3383

SC1U10V2KX-1GP

12

C3385

12

SCD1U16V2KX-3GP

(R)

TR1 0

1 2

FILTER-4P-137-GP

12

USB2P_C_EXT
USB2N_C_EXT

34

C58 2
SCD1U16V2ZY-2GP

(R)

USB_EN_1

PIN-CONN10A-SFP-2-GP

For Card Reader

HUSBOC01

1 2
3 4

5 6
7 8
9 10

BLACK

USBVCC01

USB F1

X

U57

1

GND

2

IN# 2

3

IN# 3
EN4FLG

AP2311M8G-13-GP

12

R1640
30KR2J-4-GP

12

R1639
30KR2J-4-GP

NC#8
OUT#7
OUT#6

USB2N_C_EXT
USB2P_C_EXT

8
7
6
5

FB_USBF1_DET

Add for card reader

C3384

SC10U10V5KX-2GP

12

1 2

USBVCC01

C3376
SCD1U16V2KX-3GP

1 2

Add ESD (Patrick)

USBVCC01

C3386

SCD1U16V2KX-3GP

1 2

D51

5
6

IP4223CZ6-1-GP

C3387

SC10U10V5KX-2GP

(R)

USB2N_C_EXTUSB2P_C_EXT

34
2
1

(75.04285.07C)

1A 0115 Allen modify

USB_EN

V_5P0_A

12

C98

SC1U10V2KX-1GP

12

R16 6 0R0402-PAD-2-GP

F_USB3P_H
F_USB3N_H

F_USB0P_H F_USB0P_H_EXT
F_USB0N_H

1 2

FILTER-4P-137-GP

1 2

FILTER-4P-137-GP

EMI

12

C584
SCD1U16V2ZY-2GP

(R)

C10 2

12

SCD1U16V2KX-3GP

(R)

TR6

TR8

34

34

F_USB3P_H_EXT
F_USB3N_H_EXT

F_USB0N_H_EXT

USB VCC0 2

F_USB0P_H_EXT

12

C585
SCD1U16V2ZY-2GP

(R)

U5

1
2

USB_EN_1

USBOC03

PIN-CONN10A-SFP-2-GP

3

USBVCC02

AP2311M8G-13-GP

12

R167
30KR2J-4-GP

12

R161
30KR2J-4-GP

By vendor suggestion 2/10

USBF2

1 2
3 4

5 6
7 8
9 10

X

(21.62736.205)

GND
IN# 2

OUT#7

IN# 3

OUT#6

EN4FLG

USBVCC02

C409
SCD1U16V2KX-3GP

1 2

F_USB3N_H_EXTF_USB0N_H_EXT
F_USB3P_H_EXT

8

NC#8

7
6
5

FB_USBF2_DET

TC3

12

ST100U6D3VBM-7GP

D4

5
6

IP4223CZ6-1-GP

12

C586
SCD1U16V2ZY-2GP

(R)

C92

SC10U10V5KX-2GP

12

1 2

C91

SCD1U16V2KX-3GP

(R)

34
2
1

(75.04285.07C)

12

USBVCC02

C11 3

SC10U10V5KX-2GP

1 2

F_USB3N_H_EXTF_USB3P_H_EXT

F_USB0N_H_EXTF_USB0P_H_EXT

C58 7
SCD1U16V2ZY-2GP

(R)

BLUE

USB3.0

B B

USB_EN

V_5P0_A

12

12

R1228 0R0402-PAD-2-GP

1A 0115 Allen modify

C588

SC1U10V2KX-1GP

C592

12

SCD1U16V2KX-3GP

(R)

USB_EN_2

10KR2J-3-GP

USBOC02

1D8V_S5

R1227

U46

1

GND

2

IN# 2

3

IN# 3
EN4FLG

AP2311M8G-13-GP

1 2

OUT#7
OUT#6

8

NC#8

7
6
5

(09.1071D.D5L)

C58 9

TC1 1

SC10U10V5KX-2GP

12

E100U16VM-32-GP

1 2

(R)

USBVCC00

C590

C59 1

12

SCD1U16V2KX-3GP

SC10U10V5KX-2GP

1 2

(R)

(R)

For Front USB

USBP0P_EXT
USBP0N_EXT

ITE concern change to this part

SIDE_USB3_RX0-

A A

5

SIDE_USB3_RX0+
SIDE_USB3_TX0-

SIDE_USB3_TX0+

D49

1

LINE_1

2

LINE_2

3

GND

4

LINE_3

5

LINE_4

AZ1045-04F-R7G-GP

U7

1

LINE_1

2

LINE_2

3

GND

4

LINE_3

5

LINE_4

AZ1045-04F-R7G-GP

4

NC#10

NC#9
NC#7

NC#6

10
9
8

GND

7
6

10

NC#10

9

NC#9

8

GND

7

NC#7

6

NC#6

C10 4

1 2

C10 3

1 2

TR4

1 2

FILTER-4P-137-GP

SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

L4

4 3

FILTER-4P-123-GP

L5

4 3

FILTER-4P-123-GP

34

3

USB30_TXP0 USB3_TX0_EMI_DP

EMI

USB3_TX0_EMI_DN

USB30_RXP0 SIDE_USB3_RX0+
USB30_RXN0 SIDE_USB3_RX0-

F_USB0N
F_USB0P

(66.R0036.04L)

(66.R0036.04L)

USBP0N_EXT
USBP0P_EXT

USB3_TX0_EMI_DNUSB30_TXN0

SIDE_USB3_TX0+USB3_TX0_EMI_DP
SIDE_USB3_TX0-

21

21

Change to Dogfish part (Patrick)

Side USB 3.0

SSUSB1

USBVCC00

USBP0N_EXT
USBP0P_EXT

1

VBUS

2

D-

3

D+

GND_DRAIN

10

10

11

11

SKT-USB11-129-G P

2

SSRX-

SSRX+

SSTX-

SSTX+

SIDE_USB3_RX0-

5

SIDE_USB3_RX0+

6

SIDE_USB3_TX0-

8

SIDE_USB3_TX0+

9

7
4

GND

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Tit l e

itle

itle

USB/USB30

USB/USB30

USB/USB30

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Cus to m

Rosa_BayTrail_DT

Cus to m

Rosa_BayTrail_DT

Cus to m

Dat e: Shee t o f

Dat e: Shee t o f

Dat e: Shee t o f

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

28 5 8Tuesday, Apr il 15, 2014

28 5 8Tuesday, Apr il 15, 2014

28 5 8Tuesday, Apr il 15, 2014

A0 0

A0 0

A0 0

5

Vinafix.com

D D

4

3

2

1

Remove Card Reader

C C

B B

<Variant Name>

<Variant Name>

A A

5

4

3

2

<Variant Name>

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

NA

NA

NA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Rosa_BayTrail_DT

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

29 58Tuesday, April 15, 2014

29 58Tuesday, April 15, 2014

29 58Tuesday, April 15, 2014

1

A00

A00

A00

1D8V_S0

Vinafix.com

1D8V_S5
SB3V

V_3P3_A

VCC3

SB5V

D D

V_5P0_A

OTHERS

C C

From CPU

F_USB1P13
F_USB1N13

F_USB2P13
F_USB2N13

B B

A A

USB_EN28,46
USBOC0113

HSO_C_LAN_DP310
HSO_C_LAN_DN310

PLTRST_LAN_N38

LAN_DISABLE_N38
LANCLK_REQ_N10

CK_GLAN_DP12
CK_GLAN_DN12

HSI_LAN_DP310
HSI_L AN_DN310

WAKE_N20,34

V_5P0_A 28,31,40,46, 47

5

1D8V_S0 10, 12,13,15,17,19,23,25,35,38, 43,46
1D8V_S5 12, 15,17,20,23,28,34,38,43,44, 56,57
SB3V 12,15,17,20, 34,35,38,43,44,45,47,48, 57

V_3P3_A 12,20, 23,35,38,40,46,47,57

VCC3 12,13,15,17,20,21,23,24,25,31, 34,35,36,38,39,46,56

SB5V 27,31,35,38, 39,41,42,43,44,45,47,57

V_1P05_LAN

V_1P05_LAN

25MHz XTAL

XTAL-25MHZ-181-GP

X4

4 1

1 2

R369 1MR3F-G P(R)

12

C212
SC15P50V2JN-2-GP

R350

0R0603-PAD

R1210

0R0603-PAD

R1211

0R0603-PAD

LAN_1P05_OUT

12

C202
SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

vendor advice 4.7UF X5R

Connector

10Mb: Green
100Mb: Green
1Gb: Orange
Active: Yellow Light flash

5

R377

1 2

2K49R2F-GP

Layout Note: near pin46.

LAN_MDI0_DP
LAN_MDI0_DN

LAN_MDI1_DP
LAN_MDI1_DN
LAN_MDI2_DP
LAN_MDI2_DN

LAN_XTALO

LAN_XTALI

23

12

C205
SC12P50V2JN-3GP

12

12

12

12

12

(R)

C190

V_3P3_LAN

V_3P3_LAN

12

C554

SCD1U16V2KX-3G P

Layout Note:Close to RTL8111E
Pin 12,27,39,42,47,48

USBVCC11
USB1N_H_EXT

USB1N_EXT
USB1P_H_EXT
USB1P_EXT

V_1P05_LAN

V_3P3_LAN

LAN_RSET

LAN_XTALI

LAN_XTALO

LLLIIINNNKKK___AAACCCTTTIIIVVVIIITTTYYY__ _NNN

SSSPPPEEEEEEDDD___1 110000 00___NNN

32

31

30

28

27

U2 0

33

GND

1

MDIP0

2

MDIN0

3

AVDD10

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

8

AVDD10

(71.08151.M06)

26

LED0

RSET

AVDD33

AVDD10

CKXTAL229CKXTAL1

HSIP13HSIN14REFCLK_P15REFCLK_N

CLKREQ#

MDIP39MDIN3

AVDD33

12

10

11

CK_GLAN_DP

LAN_MDI3_DN

LAN_MDI3_DP

HSO_C_LAN_DP3

HSO_C_LAN_DN3

LANCLK_REQ_U_N

0507 Eric modify

V_3P3_LAN

1A 0115 Allen modify

V_1P05_LAN

Layout Note : Close to LA N_IC Pin3, 6, 9, 1 3, 29, 41, 45.

12

12

12

C538

C537

SCD1U16V2KX-3G P

12

(R)

C221

SC4D7U6D3V3KX- GP

RJ45

G8
G4

G6

U5
U1
U6
U2
U7
U3
U8
U4

G5
G3

G7

SKT-RJ45-USB-9-GP

C544

SCD1U16V2KX-3G P

SCD1U16V2KX-3G P

12

(R)

C220

SC4D7U6D3V3KX- GP

ORANGE

YELLOW

C191
SCD1U16V2KX-3GP

(R)

12

SSSPPPEEEEEEDDD___1 110000 00000_ __NNN

25

LED2

LED1/GPO

REGOUT
VDDREG
DVDD10

LANWAKE #

ISOLATE#

PERST#

HSON
HSOP

16

CK_GLAN_DN

12

C547

C548

SCD1U16V2KX-3G P

SCD1U16V2KX-3G P

G2

SPEED_1000*_CON

L4

GREEN

SPEED_100*_CON

L3
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
L2

LAN_LEDACT_R# LINK_A C T IVITY_N

L1
G1

LAN_1P05_OUT

24
23
22

WAKE_N

21

RTL_ISOLATE_N

20

PLTRST_LAN_N

19
18

HSI_LAN_DP1_R

17

V_3P3_LAN

12

R372

2KR2F-3-GP

12

R368

1KR2J-1-GP

R671

1 2

0R0603-PAD

R408 330R3J-L-GP

R409 330R3J-L-GP

LAN_MDI3_DN
LAN_MDI3_DP
LAN_MDI2_DN
LAN_MDI2_DP
LAN_MDI1_DN
LAN_MDI1_DP
LAN_MDI0_DN
LAN_MDI0_DP
LAN_CONN_CVT

V_3P3_LAN

SB 1201 Allen modify

R678 330R3J-L-GP

4

1 2

C201 SCD1U16V2KX-3GP

1 2

C204 SCD1U16V2KX-3GP

RTL_ISOLATE_N_1

5

12

(R)

C207

SC1U10V2KX-1GP

(R)

C195

SCD1U25V3KX-GP

12

12

12

12

4

V_3P3_LAN_VDDSREG

V_1P05_LAN

vendor advice add

0.1uf Cap and near IC

SB3V

12

R329
8K2R2J-3-GP

RTL_ISOLATE_N_2

2

3

4

Q35B
MMBT3904DW-GP

(75.03904.A7C)

12

C534
SCD1U16V2KX-3G P

Layout Note : Close to Pin2 1.

12

12

SPEED_1000_N

SPEED_100_N

UC103
SC1U10V3KX-3GP

(R)

HSI_L AN_DN3HSI_LAN_DN1_R
HSI_LAN_DP3

VCC3

12

6

12

Q35A
MMBT3904DW-GP

(75.03904.A7C)

1

12

C533

SC1U10V3KX-3GP

V_3P3_LAN_VDDSREG

(R)

C194

SC4D7U6D3V3KX-GP

vendor advice change
22UF to 4.7UF X5R

12

UC104
SCD1U10V2KX-4GP

S0 S3 S5HDS
HHH

SB 1128 Allen modify

R331

LAN_DISABLE_C

1KR2J-1-GP

RTL_ISOLATE_N

R332
15KR2F-GP

For SWR Mode:

1.Mount L16, C329, C330, C332, C334

2.Un-mount C686

For LDO Mode:

1.Reserve C351 0.1u cap on LAN_1P05_OUT

2.Use 0 ohm resistor to connect
LAN_1P05_OUT and V_1P05_LAN

3.Un-mount C686

LINK_ACTIVITY_N

SPEED_100_N

SPEED_1000_N

12

(R)

C546
SC470P50V3JN-2GP

12

(R)

C230
SC470P50V3JN-2GP

12

(R)

C242
SC470P50V3JN-2GP

10KR2J-3-GP

(R)

R739

3

V_3P3_LAN POWER Control

V_3P3_LAN

12

R675
10KR2J-3-GP

Discharge resistor

SB3V

1 2

1 2

KA

KA

KA

R378
10KR2J-3-GP

1 2

R704

LAN_DISABLE_N_1

10KR2J-3-GP

SC1U10V2KX-1GP

D17
AZ5013-01HDR7G-GP

(R83.ESD5Z.0AF)

D9
AZ5013-01HDR7G-GP

(R83.ESD5Z.0AF)

D10
AZ5013-01HDR7G-GP

(R83.ESD5Z.0AF)

SB3V

B

12

C558

(R)

R701

1 2

0R2J-2-GP

3

12

(R)

R702
8K2R2J-3-GP

LAN_DISABLE_N_2

C

Q74
MMBT3904-4-GP

(R)

E

LAN_MDI0_DN

LAN_MDI1_DP

LAN_MDI2_DN

LAN_MDI3_DP

R705

B

U2 3

1
2
3 4

IP4223CZ6-1-GP

(75.04285.07C)

U2 4

1
2
3 4

IP4223CZ6-1-GP

(75.04285.07C)

R679

(R)

1 2

0R5J-5-GP

SB3V

12

SB3V

12

8K2R2J-3-GP

LAN_DISABLE_N_3

C

Q75
MMBT3904-4-GP

E

C562

SCD1U16V2KX-3G P

VCC3

1 2
12

(R)

LAN_DISABLE_V3

(84.03413.B31)

AO3413L-GP

12

12

PC163

C540

SC1U10V2KX-1GP

SC2D2U10V3KX-1G P

R706

1 2

39K2R2F-L-GP

R707
10KR2J-3-GP

C

B

Q76
MMBT3904-4-GP

E

C561

SC1U10V2KX-1GP

LAN_DISABLE_N LAN _D ISAB LE_C

R505

10KR2J-3-GP

1 2

LANCLK_REQ_N

6
5

6
5

LAN_MDI0_DP

LAN_MDI1_DN

LAN_MDI2_DP

LAN_MDI3_DN

PMBS3904-1-GP

12

C553
SCD1U16V2KX-3GP

12

C556
SCD1U16V2KX-3GP

G

LAN_DISABLE_N _4

12

R374

0R0402-PAD

1D8V_S01D8V_S0

312

Q47

(R)

V_3P3_LAN

V_3P3_LAN

P-MOS

Q39

DS

(R)

C559
SC1U10V2KX-1GP

12

12

R502
2K2R2J-2-GP

(R)

LANCLK_REQ_B

C536

2

V_3P3_LAN

12

1

C232

SC2D2U10V3KX-1G P

2

SCD1U16V2KX-3G P

Level shift
0828 Allen Add

Level shift
0828 Allen Add

VCC3

R516
10KR2J-3-GP

(R)

1 2

LANCLK_REQ_U_N

2

1 2

V_5P0_A

12

C3377

SC1U10V2KX-1GP

1A 0115 Allen modify

USB_EN

12

R1605 0R0402-PAD-2-GP

C3379

12

SCD1U16V2KX-3GP

(R)

Add new USB LDO power (Patrick)

USBVCC11

C271
SCD1U16V2KX-3GP

F_USB2P
F_USB2N

F_USB1P
F_USB1N

USB1P_EXT

USB1P_H_EXT

USB_EN_3

10KR2J-3-GP

USBOC01

1D8V_S5

R1604

U5 6

1
2
3

AP2311M8G-13-GP

1 2

1

TR5

USB1P_H_EXT

1 2

USB1N_H_EXT

34

FILTER-4P-137-GP

FILTER-4P-137-GP

USB1P_EXT

1 2

USB1N_EXT

34

TR7

D13

5
6

IP4223CZ6-1-GP

GND
IN#2
IN#3
EN4FLG

USB1N_E XT

34
2

USB1N_H_ EXT

1

(75.04285.07C)

8

NC# 8

7

OUT#7

6

OUT#6

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

T

itle

T

itle

Size D ocument Number R ev

Size D ocument Number R ev

Size D ocument Number R ev

Date : Sheet of

Date : Sheet of

Date : Sheet of

TC15

12

LAN RTL8151GD

LAN RTL8151GD

LAN RTL8151GD

Rosa_BayTrail_DT

Custo m

Rosa_BayTrail_DT

Custo m

Rosa_BayTrail_DT

Custo m

1

ST100U6D3VBM-7GP

C3378

SC10U10V5KX-2GP

1 2

C3380

12

(R)

USBVCC11

C3381

SCD1U16V2KX-3GP

1 2

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

SC10U10V5KX-2GP

A00

A00

A00

30 5 8Tuesday, April 15, 2014

30 5 8Tuesday, April 15, 2014

30 5 8Tuesday, April 15, 2014

V_3P3_A

Vinafix.com

V_5P0_A
VCC
VCC3
1D5V_S0

SB5V

AUD_LINK_SDIN10

AUD_LINK_SDO10
AUD_LINK_BCL K10
AUD_LINK_SYNC10

AUD_LINK_RST _N10

HD_LINK

APU_SPKR13,31

SB5V 27,35,38,39,41,42,43,44,45,47,57

V_3P3_A 12,20,23,35,38,40,46,47,57

V_5P0_A 28,30,40,46,47
VCC 23,24,25,35,38,39,42,46,56,58
VCC3 12,13,15,17,20,21,23,24,25,30,34,35,36,38,39,46,56
1D5V_S0 15,17,34,43

From APU

12

AGND

1D5V_S0

12

VCC3

12

C2
SC22U6D3V5MX-2GP

C3335
SC10U10V5KX-2GP

C900
SC10U10V5KX-2GP

V_5_CODEC

Line-in

Line-out

Mic-in 1

Mic-in 2 pin16/17

HP-out

Front Panel

FP_MIC1_L

C29 SC4D7U6D3V3KX-GP

1 2

FP_MIC1_R

C16 SC4D7U6D3V3KX-GP

1 2

1 2

TC12 E100U16VM-22-GP

FP_OUT_L

1 2

TC13 E100U16VM-22-GP

AUD_AVDD

12

12

C17

C13

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Change power rail to 1.5V
because CPU audio link is 1.5V rail.

TP1

12

C3332
SCD1U10V2KX-4GP

12

C901
SCD1U10V2KX-4GP

AUD_IN_L
AUD_IN_R
FP_OUT_L
FP_OUT_R

LINE2_VREFO

1

FP_MIC1_L
FP_MIC1_R
AUD_MIC2_L
AUD_MIC2_R

MIC1_VREFO_R
MIC1_VREFO_L
MIC2-VREFO

12

C3330
SCD1U10V2KX-4GP

U52

23

LINE1_L/PORT_C_L

24

LINE1_R/PORT_C_R

14

LINE2_L/PORT_E_L

15

LINE2_R/PORT_E_R

29

LDO_IN

31

LINE2_VREFO

21

MIC1_L/PORT_B_L

22

MIC1_R/PORT_B_R

16

MIC2_L/PORT_F_L

1

7

MIC2_R/PORT_F_R

32

MIC1_VREFO_R

28

MIC1_VREFO_L

30

MIC2_VREFO

ALC662VD

pin23/24

pin35/36

pin21/22

FP_OUT_R_C

FP_OUT_L_C

AGND

MIC1_VREFO_L

R3 1KR2J-1-GP

1 2

R1560 1KR2J-1-GP

1 2

R1557 2K2R2J-2-GP

1 2

R1558 47R2F-GP

1 2

R1551 47R2F-GP

1 2

pin14/15

FP_MIC1_LL_1
FP_MIC1_RR_1

MIC1_VREFO_R

1

9

11

12

25

38

BEEP

DVDD

DVDD_IO

LDO_OUT1

LDO_OUT2

DVSS

AVSS126VREF

AVSS2

7

27

42

AGND

AUDIO_VREF

12

C3331
SC10U10V5KX-2GP

AGND

1 2

R9 2K2R2J-2-GP

FP_MIC1_LL
FP_MIC1_RR

12

R7
22KR2J-GP

AUD_BEEP_C
AUD_LINK_RST_N
AUD_LINK_SYNC
AUD_LINK_BCLK

12

C3336

(R)

SC22P50V2JN-4GP

6

10

33

34

43

44

SYNC

BITCLK

RESET#

LINE1_VREFO

LFE/PORT_G_R

CENTER/PORT_G_L

SURR_L/PORT_A_L

SURR_R/PORT_A_R

FRONT_L/PORT_D_L

FRONT_R/PORT_D_R

GPIO02REGREF3GPIO1

CD_L18CD_GND19CD_R

PIN37_VREFO

JDREF

4

20

37

40

JDREF

AUD_REGREF

ANTI-POP_GPIO1

12

R12
20KR2F-L-GP

2012/11/28 Bead Down size

L1 MCB1005S121FBP-GP

1 2

L2 MCB1005S121FBP-GP

1 2

12

R6
22KR2J-GP

AGND

FP_OUTR_RRFP_OUT_R

FP_OUTR_LL

12

12

R1553

R130

22KR2J-GP

22KR2J-GP

AGND

SENSE_B

1 2

R5 20KR2F-L-GP
R8 39K2R2F-L-GP

1 2

R1562 5K1R2-GP

1 2

SENSE_A

R1552 10KR2F-2-GP

1 2
1 2

R1554 20KR2F-L-GP

Layout: Near Codec

13

SENSE_A

SENSE_B

AUD_LINK_SDO

5

SDATA_O UT

AUD_LINK_SDIN_ 1

8

SDATA_IN

48

S/PDIF_OUT

EAPD_DEPOP

47

EAPD

45

DMIC_DATA

46

DMIC_CLK

39
41

AUDAMPIN_L

35

AUDAMPIN_R

36

ALC662-VD-GR-GP

DM Part ALC 3600

(71.03600.00G)

C3338 SC10U10V5KX-2GP

1 2

TP49

1

12

C6
SC100P50V2JN-3GP

AGND

2012/11/28 Bead Down size

FL3 MCB1005S121FBP-GP

1 2

FL4 MCB1005S121FBP-GP

1 2

12

C5
SC100P50V2JN-3GP

12

C3337
SC100P50V2JN-3GP

MIC 2_J D
LINE2_JD

FRONT_JD
LINEIN_JD
MIC1_JD

R1556 33R2J-2-GP

1 2

1

TP50

12

C3334
SC100P50V2JN-3GP

AGND

MIC1_L
MIC1_R

FP_OUTR_R
FP_OUTR_L

AUD_LINK_SDIN

MIC

AUD_MIC2_L

C3343 SC10U10V5KX-2GP

AUD_MIC2_R

C3344 SC10U10V5KX-2GP

LINE IN (BLUE)

AUD_IN_L

C11 SC10U10V5KX-2GP

1 2

AUD_IN_R

1 2

C7 SC10U10V5KX-2GP

FRONT OUT (GREEN)

1 2

TC14 E100U16VM-22-GP

AUDAMPIN_R

1 2

TC6 E100U16VM-22-GP

AUDIOF1

1 2

AGND

FP_AUDIO_PRE SENCE*_C

3 4

MIC1_JD

5 6
7 8

AGND

X

LINE2_JD

9 10

TCN-CONN10A-SFP -1-GP-U

MIC1_L
MIC1_R

FP_OUTR_R
FP_OUTR_L

2

R1571 0R3J-0-U-GP

1 2

12

C3333
SC100P50V2JN-3GP

(R)

AGND

1

D46
AZ5125-02S-R7G-GP

(R)

3

2

3

MIC2-VREFO

1 2
1 2

AUD_IN_LL_1

AUD_IN_RR_1

AUDAMPIN_L_CAUDAMPIN_L

AUDAMPIN_R_C

1

D47
AZ5125-02S-R7G-GP

(R)

FP_MICVREF_D1

12

3

(75.00054.R7D)

BAT54A-12-GP
D48

FP_MICVREF_D2

AUD_MIC2_R_C

R1568 75R2F-2-GP

1 2

1 2

R1565 75R2F-2-GP

R53 75R2F-2-GP

1 2

R52 75R2F-2-GP

1 2

FP_AUD_DETECT

1 2

R1569 4K7R2J-2-GP

1 2

R27 4K 7R2J-2-GP

R1570 75R2F-2-GP

1 2

R26 75R2F-2-GP

1 2

2012/11/28 Bead Down size

AUD_IN_LL

L41 MCB1005S121FBP-GP

1 2

AUD_IN_RR

1 2

L42 MCB1005S121FBP-GP

12

12

R1567

R1564

22KR2J-GP

22KR2J-GP

AGND

FB_AUDOUTR_L

FB_AUDOUTR_R

12

R1566
22KR2J-GP

FP_AUD_DETECT 12

2012/11/28 Bead Down size

MIC2_LLAUD_MIC2_L_C

FL1 MCB1005S121FBP-GP

MIC2_RR

FL2 MCB1005S121FBP-GP

12

C3341
SC100P50V2JN-3GP

AGND

2012/11/28 Bead Down size

L43 MCB1005S121FBP-GP

1 2

L44 MCB1005S121FBP-GP

1 2

12

12

C38

SC100P50V2JN-3GP

R44
22KR2J-GP

AGND

1 2
1 2

12

C3340
SC100P50V2JN-3GP

AUDIN_R

AUDIN_L

C3342
SC100P50V2JN-3GP

1 2

AGND

FB_AUDOUT_L

FB_AUDOUT_R

12

C3339
SC100P50V2JN-3GP

AUD_MIC_2L

AUD_MIC_2R

C73
SC100P50V2JN-3GP

1 2

ESD

AUDIN_R
AUDIN_L

FB_AUDOUT_R
FB_AUDOUT_L

AUD_MIC_2R
AUD_MIC_2L

2

3

Jim Modify 06/04

1

12

R777
10KR2J-3-GP

D43
AZ5125-02S-R7G-GP

(R)

V_5_CODEC

12

AGND

AGNDAGND

2

C3
SCD1U10V2KX-4GP

AUDIN_L
LINEIN_JD

AUDIN_R
FB_AUDOUT_L

FRONT_JD
FB_AUDOUT_R

AUD_MIC_2L
MIC2_JD

AUD_MIC_2R

1

3

AGND

D44
AZ5125-02S-R7G-GP

(R)

K A

12

NP1

D2
AZ2015-01H-GP

L8

1 2

MHC1608S800QBP-GP

2012/11/28 Bead Down size

C8
SC10U10V5KX-2GP

AUDJK1

32
33
34

BLUE

35
22

23
24

LIME

25

2
3

PINK

4
5
1

G1
G2
G3
G4

AUDIO-JK187-GP

(22.10088.J41)

2

3

AGND

1

V_5_AVDD

D42
AZ5125-02S-R7G-GP

(R)

R582 0R5J-5-GP

1 2

(R)

R1563 0R5J-5-GP

1 2

Line in

Mic

V_5P0_A

SB5V

R11 0R3J-0-U-GP (R)

1 2

R29 0R3J-0-U-GP (R)

1 2

Layout: separately place round AGND

AGND

AGND

R1555 0R3J-0-U-GP

1 2

R1561 0R3J-0-U-GP

1 2

R1559 0R3J-0-U-GP (R)

1 2

AGND

AGND

AGND

AUD_BEEP_C

C3329

1 2

SCD1U25V2KX-GP

AUD_BEEP_R

AGND

R1550

APU_SPKR

1 2

47KR2J-2-GP

R1260
4K7R2J-2-GP

1 2

APU_SPKR 13,31

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

AUDIO ALC3600

AUDIO ALC3600

AUDIO ALC3600

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

31 58Tuesday, April 15, 2014

31 58Tuesday, April 15, 2014

31 58Tuesday, April 15, 2014

A00

A00

A00

Remove AMP circuit

Vinafix.com

<Variant Name>

<Variant Name>

<Variant Name>

Title

TNAitle

TNAitle

NA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

32 58Tuesday, April 15, 2014

32 58Tuesday, April 15, 2014

32 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

D D

4

3

2

1

Remove Webcam circuit

C C

B B

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

NA

NA

NA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

1

A00

A00

33 58Tuesday, April 15, 2014

33 58Tuesday, April 15, 2014

33 58Tuesday, April 15, 2014

A00

5

Vinafix.com

1D5V_S0
SB3V
1D8V_S5
VCC3

D D

0515 Eric modify net name

Wireless Card

CK_PCIEX1_WLAN_DN12

CK_PCIEX1_WLAN_DP12

From USB HUB

F_USB2N_H27
F_USB2P_H27

HSO_C_DN210
HSO_C_DP210

HSI_C_DN210
HSI_C_DP210

WAKE_N20,30

SMB1_CLK38
SMB1_DATA38

1D5V_S0 15,17,31,43
SB3V 12,15,17,20,30,35,38,43,44,45,47,48,57
1D8V_S5 12,15,17,20,23,28,30,38,43,44,56,57
VCC3 12,13,15,17,20,21,23,24,25,30,31,35,36,38,39,46,56

From PCH...TX
From PCH...RX

F_USB2N_H USB_W_DP2_NN
F_USB2P_H USB_W_DP2_PP

4

Wireless Card

V_3P3_PCIVAUX

TR 2

1 2

34

FILTER-4P-137-GP

V_3P3_PCIVAUX

SMB1_CLK
SMB1_DATA M1_SMB_DATA

1D8V_S5

V_3P3_PCIVAUX

V_3P3_PCIVAUX

USB_W_DP2_NN
USB_W_DP2_PP

R4 10KR2J-3-GP

2
2

1 2

1
1

TP 26TPAD28

PCIE_RST#

M1_SMB_CLK

R130R2J-2-GP (R)
R100R2J-2-GP (R)

1 2

R1 1KR2J-1-GP

W1_DETECT_USB_H

M1_BLUETOOTH_LED

1

1 2

(R)

R24 0R2J-2-GP

WIRELESS_LED*

W1_DISABLE*_RMPCIE_DISABLE_N

V_1P5_PCIE

TP 27

TPAD28

3

2
4

6

8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42

1

TP 39

44
46
48
50
52

SKT-MINI52P-16-GP-U

WIFI1

53
NP1
1

3
5
7
9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

H:8mm

TP_M1 _BT_A CTIVE

TP_M1_WLAN_ACTIVE

MINI_CLKREQ#
CLKSRC_MINIPCIE_N

MINI_PCIE_RXN
MINI_PCIE_RXP

MINI_PCIE_TXN
MINI_PCIE_TXP

W1_DETECT_PE

V_3P3_PCIVAUX

2

1
1
1

2

TP 30 TPAD28
TP 29 TPAD28

TP 28 T PA D 28

1

(R)

12

R37 0R0402-PAD

12

R38 0R0402-PAD

TP_BT_DISABLE*M1_BT_DISABLE*

R4320R2J-2-GP

WAKE_N

CK_PCIEX1_WLAN_DN
CK_PCIEX1_WLAN_DPCLKSRC_MINIPCIE_P

R44210KR2J-3-GP

1

TP 25 TPAD28

12

R22 0R0402-PAD

12

R23 0R0402-PAD

12

R14 0R0402-PAD

12

R15 0R0402-PAD

12

1D8V_S5

HSI_C_DN2
HSI_C_DP2

HSO_C_DN2
HSO_C_DP2

1

PCH_GPIO

PCIE_RST#38

MPCIE_DISABLE_N38

C C

Mini_Power_CTRL38

W1_DETECT_USB_H12

W1_DETECT_PE12

MPCIE_DISABLE_N

W1_DETECT_USB_H
W1_DETECT_PE

G1

1 2

GAP-CLOSE-PWR-2U-GP

G3

1 2

GAP-CLOSE-PWR-2U-GP

G4

1 2

GAP-CLOSE-PWR-2U-GP

G2

1 2

GAP-CLOSE-PWR-2U-GP

MINI CARD HOLE

V_1P5_PCIE1D5V_S0

H7
STF256R107H219-GP

V_1P5_PCIE

12

SCD1U16V2KX-3GP

12

C273

(R)

SCD1U16V2KX-3GP

12

C279

C293
SC10U10V5KX-2GP

V_3P3_PCIVAUX DUAL

V_3P3_PCIVAUX

12

R474
10KR2J-3-GP

Discharge resistor

0726 Eric CC modify F7 and add 0 RES

1A001 1128 Eric CC modify

P-MOS

R478

(R)

2

1

0R5J-5-GP

PC145

SC1U6D3V2KX-GP

AO3401AL-GP

G

Q43

V_3P3_PCIVAUX

DS

12

C282

C278

12

C1

C277

12

12

SC10U6D3V3MX-GP

(R)

12

TC 1
SE220U6D3VM-8GP

SC10U6D3V3MX-GP

SB3V

12

12

C296

12

C297

1

B B

Mini_Power_CTRL

A A

5

4

3

S5S3S0 DS
LHH

SB3V

12

R479
8K2R2J-3-GP

Q44

G

2N7002A-7-GP

S D

L

VREG_PCIAUX_PCH

(84.2N702.J31)

VCC3

R481
10KR2J-3-GP

1 2

VREG_PCIAUX_PCH_B

12

C298

SC1U10V2KX-1GP

(R)

SCD1U16V2KX-3GP

(78.22523.5BL)

39K2R2F-L-GP

C

B

E

SC2D2U10V3KX-L-GP

R480

1 2

Q45
MMBT3904-4-GP

(R)

2

12

C299
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

VREG_PCIAUX_PCH_1

SC2D2U10V3KX-L-GP

(78.22523.5BL)

<Variant Name>

<Variant Name>

<Variant Name>

Title

T

itle

T

itle

WIRELESS BT

WIRELESS BT

WIRELESS BT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai W u Rd

21F, 88, Hsin Tai W u Rd

21F, 88, Hsin Tai W u Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

34 58Tuesday, April 15, 2014

34 58Tuesday, April 15, 2014

34 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

1D8V_S0
SB3V
SB5V
V_3P3_A

VC C
VCC3

VCC12

D D

1D8V_S0 10,12,13,15,17,19,23,25,30,38,43, 46
SB3V 12, 15,17,20,30,34,38, 43,44,45,47,48,57
SB5V 27, 31,38,39,41,42,43, 44,45,47,57
V_3P3_A 12,20,23,38,40,46,47,57

VC C 23,24,25,38, 39,42,46,56,58
VCC3 12,13,15,17,20,21,23,24, 25,30,31,34,36,38,39, 46,56

VCC12 36,38,41

SATA

Layout: Please put them together

Pin1(VCC12)

SATA

SATAHDR_RX_DP010

SATAHDR_RX_DN010
SATAHDR_TX_DN010

SATAHDR_TX_DP01 0
SATAHDR_RX_DP110

SATAHDR_RX_DN110
SATAHDR_TX_DN110

SATAHDR_TX_DP11 0

Power Botton/Reset

PWRBTN_N12,23,38

PWRBTN_N

VCC12_HDD

SATAP1

NP1

5
6

7
8

NP2

MLX-CONN8F-3-GP

(20.82108.008)

1

VCC12_HDD

2

V_5HDDV_5HDD

3

VCC3_HDDVCC3_HDD

4

4

VC C1 2

12

C390
SC10U25V5KX-GP

VC C V _5HD D

VC C3

12

C411
SC10U10V5KX-2GP

(R)

F9

1 2

FUSE-3A15V-GP

R183

1 2

0R5J-5-GP
R185

1 2

0R5J-5-GP

(R)

SC1U10V3KX-3GP

12

C410

(R)

F8

1 2

FUSE-3A15V-GP

R573

1 2

0R5J-5-GP
R580

1 2

0R5J-5-GP

R182

1 2

0R5J-5-GP (R)

VCC12_HDD

12

12

C112

SC10U10V5KX-2GP

VCC3_HDD

C394
SC1U25V3KX-1-GP

12

C110

SC1U25V3KX-1-GP

3

12

C109

SC10U6D3V3MX-GP

12

(R)

TC5
E220U16VM-25-GP

SATA_ODD

SATAHDR_RX_D P1
SATAHDR_RX_D N1

SATAHDR_TX_DN1
SATAHDR_TX_ DP1

SATA_HDD

SATAHDR_RX_DP0
SATAHDR_RX_DN0

SATAHDR_TX_DN0
SATAHDR_TX_D P0

B

l ackco

C11 9 SCD01U16V2KX-3GP

1 2

C11 8 SCD01U16V2KX-3GP

1 2

C11 5 SCD01U16V2KX-3GP

1 2
1 2

C11 4 SCD01U16V2KX-3GP

Blue color

C15 1 SCD01U16V2KX-3GP

1 2

C14 9 SCD01U16V2KX-3GP

1 2

C14 2 SCD01U16V2KX-3GP

1 2
1 2

C14 1 SCD01U16V2KX-3GP

2

l o

r

SATA__RXP1_C
SATA__RXN1_C

SATA__TXN1_C
SATA__TXP1_C

SATA__RXP0_ C
SATA__RXN0_C

SATA__TXN0_C
SATA__TXP0_C

ODD1

9
7
6
5
4
3
2

1
8

MLX-CON7-10-GP

(20.81112.007)

HDD1

9
7
6
5
4
3
2

1
8

MLX-CON7-10-GP

(20.81111.007)

1

Black

Use KORTAK vendor

Blue

TO SIO

HD_LED

C C

APU_SATA_LED_N1 0

SIO_HDD_LED38

SIO_YELLOW38

SIO_GREEN38

10KR2J-3-GP

R514

LOW ACTIVE

B B

remove OSD UP/DN/MENU circuit (Patrick)

A A

5

4

1D8V_S0

1 2

HDD LED

R342

1 2

10KR2J-3-GP

SIO_HDD_LED

VC C

12

R340
10KR2J-3-GP

PCH_SATA_LED_1

12

R362
10KR2J-3-GP

B

R364

1 2

10KR2J-3-GP

C

Q37
MMBT3904-4-GP

E

SIO_HDD_LED_1

SIO_GREEN

APU_SATA_LED_BAPU_SATA_LED_ N

VCC3

B

PCH_SATA_LED_2

C

Q36
MMBT3904-4-GP

E

SIO_YELLOW

B

C

Q38
MMBT3904-4-GP

E

SB3V

3

12

R665
4K7R2J-2-GP

SB3V

12

R659
4K7R2J-2-GP

V_3P3_A

12

R37 0
10KR2F-2-GP

3

D7

(R)

1

2

D7_1

C20 9

12

(R)

SB5V

1A 0116 Allen modify

12

R352
75R3F-GP

PWR_LED_YELLOW_C2

12

R351
75R3F-GP

WHITE/GREEN(PWR_LED)

PWR_LED_Y

ORANGE/YELLOW(SUS_LED)

PWRBTN_N PB_IN_SW1

(R)

C213

SCD1U16V2KX-3GP

R66 3
0R2J-2-GP

(R)

1 2

12

R661
0R2J-2-GP

(R)

1 2

G

G

R373

12

33R2J-2-GP

SB5V

12

SUS_LED_GREEN_C2

12

S D

Q65
2N7002A-7-GP

(84.2N702.J31)

S D

R67 3
165R3F-GP

R66 7
165R3F-GP

BAV99GP-GP

V_3P3_A

SCD1U16V2KX-3GP

PWR_LED_G

Q68
2N7002A-7-GP

(84.2N702.J31)

ORANGE(SUS_LED)

WHITE(PWR_LED)

2

VC C

12

R339
10KR5F-2-GP

HDD_LED_5V
PCH_SATA_LED_2

CHASSIS_ID_112
MT ST _ I D12

Same as Victoria- I circuit

LED_GREENLED_YELLOW

HL
LH

LEDH 1

PWR_LED_Y

11

12
10

8
6
4

2

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Tit l e

itle

itle

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Cus to m

Cus to m

Cus to m

Dat e: Shee t o f

Dat e: Shee t o f

Dat e: Shee t o f

PWR_LED_G

9

PB_IN_SW1

7
5
3

X

1

PIN-CONN12A-SFP2-GP

SATA/LED/BTN

SATA/LED/BTN

SATA/LED/BTN

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

1

CHASSIS_ID_0 12

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

35 5 8Tuesday, Apr il 15, 2014

35 5 8Tuesday, Apr il 15, 2014

35 5 8Tuesday, Apr il 15, 2014

A0 0

A0 0

A0 0

VCC3

Vinafix.com

VCC12

SIO FAN CONTROL

CPU_FAN_CTRL_SIO38

CPU_FAN_TACH_SIO38

FAN_TAC238
FAN_CTL238

VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,38,39,46,56
VCC12 35,38,41

CPU FAN

4 PINS FAN CONTROL

CPU 12V FAN
R80:4.7K, R76:20K, R73:8.2K

CPU 5V FAN
R80:4.7K, R76:8.2K, R73:20K

CPU_FAN_CTRL_SIO

R68

1 2

100R2F-L1-GP-U

F4

(R)

VCC3

12

1 2

POLYSW-2A8V-1-GP-U

R79

1 2

0R6J-L-GP

D1
1SS355GP-GP

A K

12

VCC12 VCC_FAN

R71

2K2R2J-2-GP

VCC_FAN

C48
SC10U25V5KX-GP

CPU_FAN_TACH1_1
CPU_FAN_PWM1_1

Remove 5V Fuse & Res

VCC_FAN

12

R80
4K7R2J-2-GP

R76

20KR2J-L2-GP

FANC2

1
2

3
4 MH 1

TYCO-CON4-S3-GP

Change name Fanc3 to Fanc2

Change sys fan circuit same as Great Bear circuit and fan conn (Patrick)

CPU_FAN_TACH1_2

12

12

1A 0115 Allen modify

R74 0R0402-PAD-2-GP

R73
8K2R2F-1-GP

12

CPU_FAN_TACH_SIO

GENS315R158-8-F-A-GP

GENS315R158-8-F-A-GP

SYS FAN

VCC3

12

R640

2K2R2J-2-GP

FAN_CTL2

H1

2

3

4

5

6

7

2

3

4

5

6

7

4

1

5

8

GENS315R158-8-F-A-GP

H4

1
8

GENS315R158-8-F-A-GP

4

5

R641

1 2

100R2F-L1-GP-U

H2

2

3

1
8

6

7

H5

2

3

1
8

6

7

3

4

5

6

GENS315R158-8-F-A-GP

3

4

5

6

GENS315R158-8-F-A-GP

2

1
8

7

2

1
8

7

Option for 3PIN CTRL

D16
1SS355GP-GP

A K

SYSTEM_FAN_PWM3_1 SYSTEM_FAN_PWM2_2

H3

H6

H9
HOLE

1

R135
10KR2J-3-GP

12

H8
HOLE

1

12

C3382
SC1U16V3KX-2GP

H11
HOLE

CPU Heatsink screw hole.

BY vendor

gnd, 󰸮󵕻noise cover audio

󰵖󲋮󰹄󰺞

VCC12 VCC12VCC12

12

R137
10KR3J-L1-GP

SYS_FAN_3P_2_G

3

1

Q14

(84.T3904.C11)

PMBS3904-1-GP

2

12

R142
330R2F-GP

H10
HOLE

1

1

R143

1 2

1K5R3F-GP

12

TC18
E220U16VM-27-GP

12

R141

(R)

0R3J-0-U-GP

3

BCP69-GP

1

Q11

(84.DCP69.01B)

2

SYS_FAN_3P_2_POWERSYS_FAN_2_FB

TC17

E220U16VM-L8-GP

12

(R09.2271D.0JL)

SYS_FAN_TACH3_1 SYS_FAN_TACH3_2 FAN_TAC2

FANC1

1
2

3

JWT-CON3-S2-GP

(21.63219.103)

4K7R2J-2-GP

VCC12

12

R90

R83

1 2

20KR2J-L2-GP

1 2

R302

0R0402-PAD-2-GP

R84
8K2R2F-1-GP

1 2

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

FAN CIRCUITS/HOLE

FAN CIRCUITS/HOLE

FAN CIRCUITS/HOLE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

36 58Tuesday, April 15, 2014

36 58Tuesday, April 15, 2014

36 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

D D

4

3

2

1

Remove TPM Function

C C

B B

<Variant Name>

<Variant Name>

<Variant Name>

A A

Title

itle

itle

T

T

TPM

TPM

TPM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

37 58Tuesday, April 15, 2014

37 58Tuesday, April 15, 2014

37 58Tuesday, April 15, 2014

1

A0 0

A0 0

A0 0

5

Vinafix.com

VCORE
DCBATOUT
SB3V
SB5V
1D8V_S5
V_3P3_A
VBAT2
VCC
VCC3
VCC12
VCORE
1D8V_S0

D D

FAN

CLOCK

LPC

C C

SMBUS

OTHERS

Power Manager

B B

0523 Ericc modify

GPIO

ADAPTOR_PSID_SIO39

LED

SIO_HDD_LED35

SIO_YELLOW35

SIO_GREEN35

Power Botton/Reset

SIO_PWNBTN_N12

A A

GPU

GPU_DPLUS52
GPU_DMINUS52

CPU_FAN_TACH_SIO36

CPU_FAN_CTRL_SIO36

FAN_TAC236
FAN_CTL236

CK_25M_SIO13

LAD0_FWH013,23
LAD1_FWH113,23
LAD2_FWH213,23
LAD3_FWH313,23,38

LFRAMEJ_FW413,23

LPC_PME_N12

LAD3_FWH313,23,38

SMB1_CLK34
SMB1_DATA34

SMB0_CLK13,21,23,52
SMB0_DATA13,21,23,52

VGA_DET24

INT_SERIRQ_CPU13

LAN_DISABLE_N30
SIO_MEM_EVENT_L21
THERMAL_SHUT#12
SIO_EUP_EN#47
SFD_GPIO19

SLP_S3_N12,20,45
SLP_S4_N20,42,46,48

RSMRST_N12,23,57
PWRGD_3V12

PLTRST_N20,23

PLTRST_SL_N49

PLTRST_LAN_N30

SIO_PSON_N20,41,46

PCIE_RST#34

IO_SM I_N12

MPCIE_DISABLE_N34

Mini_Power_CTRL34
ADAPTOR_LIMIT39

PWRBTN_N

PWRBTN_N12,23,35

SIO_PWNBTN_N

VCORE 14,16,38,45
DCBATOUT 39,40,41,42,43,45,46,47,57,58
SB3V 12,15,17,20,30,34,35,43,44,45,47,48,57
SB5V 27,31,35,39,41,42,43,44,45,47,57
1D8V_S5 12,15,17,20,23,28,30,34,43,44,56,57
V_3P3_A 12,20,23,35,40,46,47,57
VBAT2 12
VCC 23,24,25,35,39,42,46,56,58
VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,39,46,56
VCC12 35,36,41
VCORE 14,16,38,45
1D8V_S0 10,12,13,15,17,19,23,25,30,35,43,46

HW Monitor

VCORE

12

G5
COPPER-CLOSE-GP-U

HM_VCCP

12

R653
10KR2F-2-GP

C525
SCD1U16V2KX-3GP

1 2

SIO_AGND

1A 0115 Allen modify

REMINE LAYOUT

0R0402-PAD-2-GP

R384

SIO_AGND

DCBATOUT

12

R273
100KR2J-1-GP

PWRGD_PS_L SIO_ATXPGPWRGD_PS_L2

12

R274
20KR2J-L2-GP

SPI Interface

SB 0815 Eric modify BOM for EUP SB 0815 Eric modify BOM for EUP

SIO_CE_N
SIO_SO

SB 1128 Allen modify

1. layout trace is as far as possible short

2. Pull-up resistor 1Kohm near SPI Flash

SLP_S3_N_R3

EUP Control for 3D3V_S5 & 5V_S5 Disable / Enable

V_3P3_A

1 2

EC_EUP

EC_EUP
H: EUP disable
L: EUP enable

PWROK3_1_R

PWROK3_2_R

5

SIO_VIN3

SCD1U16V2KX-3GP

SIO_VIN4

SCD1U16V2KX-3GP

HM_VCCP_R

For AC OFF SEQUENCE

SB3V

R270
10KR2F-2-GP

1 2

12

R676
100KR2J-1-GP

R304
10KR2J-3-GP

R305

1 2

0R0402-PAD-2-GP

VCC3

R277 1KR2J-1-GP

12

1 2

R269 4K7R2F-GP

C174
SCD1U16V2ZY-2GP

1 2

(R)

R275
10KR2F-2-GP

1 2

R725 0R2J-2-GP

EC_EUP_EN

1

C180

(

SCD1U16V2ZY-2GP

R

2

)

12

1KR2J-1-GP
R293

0R0402-PAD-2-GP

1 2

(R)

SIO_VIN5

SCD1U16V2KX-3GP

SIO_VIN2

SCD1U16V2KX-3GP

(63.47234.1DL)

R279
10KR2F-2-GP

1 2

SIO_WP#

D18

AK

1SS355GP-GP

(R)

12

G

R283

1 2

RSMRST*_R

Michael

2011/12/15

For 5VSB Monitor

12

R655

C527

10KR2F-2-GP

1 2

SIO_AGND

12

R656

C528

10KR2F-2-GP

1 2

SIO_AGND

12

R657

C529

10KR2F-2-GP

1 2

SIO_AGND

12

R654

C526

10KR2F-2-GP

1 2

SIO_AGND

PWRGD_PS_L1

5

6

123 4

U15

1

CS#

2

SO

3

WP#
GND4SI

MX25L5121EMC-20G-GP

SLP_S3_N

V_3P3_A

(R)

R296
10KR2J-3-GP

1 2

SIO_EUP_EN#

EC_EUP_EN#
H: EUP disable

Q31

L: EUP enable

2N7002

SOT-23

(R84.2N702.J31)

S D

SB 1122 Allen modify

Power Good 3V

SB3V

12

R268
1KR2J-1-GP

(R)

PWRGD_3V_B_1

5

6

123 4

SB5V

R648
17K8R2F-GP

1 2

VCC3

R649
6K49R2F-1-GP

1 2

VCC

R650
17K8R2F-GP

1 2

VCC12

R647
56KR2F-GP

1 2

0529 Eric modify for BOM

Q29
2N7002EDW-2-GP

V_3P3_A

8

VCC

SIO_HOLD#

7

NC#7

6

SCLK

5

2012/10/4 David
Add for ITE debug

PWRBT Signal

PWRBTN_N

SW_ON_N_SIO

12

R278
1KR2J-1-GP

(R)

Q30

(R)

2N7002KDW-GP

PWRGD_3V_LL

R280

1 2

0R0402-PAD-2-GP

R271
10KR2F-2-GP

1 2

(R)

C175

SCD1U16V2ZY-2GP (R)

SIO_CLK_DB
SIO_DAT_DB

R668

1 2

0R0402-PAD-2-GP

R662

0R2J-2-GP

1 2

0R0402-PAD-2-GP
R395

12

C176
SC100P50V2JN-3GP

4

SIO_VREF

VRD

REMOTE1+

C211

SCD1U16V2KX-3GP

1 2

1 2

REMOTE1-

R400

0R0402-PAD-2-GP

SIO_AGND SIO_AGND

WLAN
LAN
GPU

VCC3

R276
10KR2F-2-GP

1 2

12

V_3P3_A

PB_IN_N_1

C530

(R)

1 2

SIO_PWNBTN_N

PLTRST_N

PCIE_RST#
PLTRST_LAN_N
PLTRST_SL_N

R281
10KR2F-2-GP

(63.10334.1DL)

1 2

R282
10KR2F-2-GP

1 2

SIO_SCK

SIO_SI

4

RN6
SRN10KJ-5-GP

1

2 3

PIN-CON4-SFP-GP

4
3
2

X

1

CN1

(R)

12

SCD1U16V2KX-3GP

0.8VCC3-> S0_PWR_GOOD
SIO delay:
23h<3:2>

00b

400ms / 15ms / 200ms

PWRGD_3V

12

R284
20KR2J-L2-GP

4

Layout Note: place it
near CPU VORE MOS

Reset signals

R337 33R2J-2-GP

R1205

1
2
3
4 5

10b01b

SIO_VREF

SCD1U16V2KX-3GP

1 2

R399

0R0402-PAD-2-GP

SIO_AGND

PLTRST*_SIO

PLTRST*_SIO1

PCIRST3#
PCIRST1#

remove PCH_AUD_RST_N to AMP (Patrick)

C182

1 2

SCD1U16V2KX-3GP

Note:
*Place C405, C406, C407 close to IT8732

R321

OCS_48M_2

1 2

100KR2J-1-GP

V_3P3_A

C185

1 2

SCD1U16V2KX-3GP

V_3P3_A

R338
100KR2J-1-GP

DIMM

C231

remove SIO_LVDS_BL_ADJ (Patrick)

remove SMBUS_ISP to DP IC (Patrick)

remove SIO_GREEN_PWM (Patrick)

GP25
THERMAL_SHUT#

ADAPTOR_LIMIT

VCC3

1A 0115 Allen modify

1 2

1 2

1 2

R404

10KR2F-2-GP

1 2
12

RT3
NTC-10K-19-GP-U

12

12

0R2J-2-GP
RN3

8
7
6

SRN33J-7-GP-U

V_3P3_A

SCD1U16V2KX-3GP

V_3P3_A

C183

Level shift

1D8V_S0 VCC3 1D8V_S0

12

12

R645

C522

10KR2J-3-GP

SCD1U10V2KX-5GP

INT_SERIRQ_OE

12

R646
1KR2J-1-GP

(R)

1 2

DIMM_TMPIN2-

Layout Note: place it
near PCH

V_3P3_A

SIO_SCK

R310 10KR2J-3-GP(R)

C181
SC2D2U6D3V2MX-GP

(R)

CK_48M_SIO

OCS_48M_1

1 2

MHC1608S181NBP-GP
L7

12

C189
SC1U16V3KX-2GP

U35

6

VCCB

5

OE

4

B

G2129TL1U-GP

VCCA should not exceed VCCB

73.02129.02J

R312 33R2J-2-GP

R309 33R2J-2-GP

(R)

VCCA

GND

A

R397

10KR2F-2-GP

1 2
12

RT1
NTC-10K-19-GP-U

C179
SCD1U16V2KX-3GP

1 2

1 2

R298 0 R2J-2-GP(R)

12

12

1 2

PCIRST1#

12

R349 0R0402-PAD-2-GP

CK_48M_SIO CLK_48M_SIO_C

1 2

R318
0R0402-PAD-2-GP

OSC2

1

TRI-STATE

2

GND

3

OUTPUT

4

VDD

OSC-48MHZ-16GP

For EC domain,
reset after power up

12

C523
SCD1U10V2KX-5GP

1
2

INT_SERIRQ_CPUSER_ IRQ

3

SIO_VREF

GPU

GPU_DPLUSDIMM_TMPIN2+

C524

SC2200P50V2KX-2DLGP

1 2

R651

0R0402-PAD-2-GP

VCC3

(R)

(R)

R335

R334

1 2

1 2

10KR2J-3-GP

10KR2J-3-GP

1

TP23

1

TP21

1

TP22

EC_EUP
SIO_PCIRSTIN#

LDRQ#

ADAPTOR_PSID_SIO

CPU_FAN_TACH_SIO
CPU_FAN_C TRL_SIO
FAN_TAC2
FAN_CTL2
IO_SMI_N
GP36
SIO_HDD_LED
SIO_YELLOW
GP33
GPU_THERMAL_INT

SIO_ATXPG
PLTRST*_SIO1
GP26

THERMAL_SHUT#_S IO
SIO_SI
SIO_SCK_R
SIO_GREEN

SPI_WP_R_N
SIO_AMD SVID_EN
SIO_CE_N
GP14
PWROK3_1PWROK3_1_R

PWRGD_3V_SIOPWRGD_3V

SIO_VCORE

Remove for TPM (Patrick)

LPC I/F

SER_IRQ
LFRAMEJ_FW4
LAD0_FWH0
LAD1_FWH1
LAD2_FWH2
LAD3_FWH3
KBRST
A20GATE
CK_25M_SIO
SIO_SO
PLTRST*_SIO
SIO_WRST#

3

SC14 Eric modify

R658

(R)

10KR2F-2-GP

1 2
12

12

RT2
NTC-10K-19-GP-U(R)

GPU_DMINUS

Layout Note: place it
near GPU

VCC

CN2

1

SIO_DEBUG_TX

2

SIO_DEBUG_RX

3
4

PIN-CON4-S8-GP

(D)

(R)

R325

1 2

10KR2J-3-GP

SIO_DEBUG_TX

SIO_DEBUG_RX

SIO_K8PWR_EN

COM port

128

127

126

125

124

123

122

121

120

119

118

PD7

PD6

RI1#

DTR1#

RTS1#

DCD1#

DSR1#

FAN_CTL4

SIN1/D_RX1

SOUT1/D_TX1

SERIRQ39LFRAME#40LAD041LAD142LAD243LAD344KRST#/GP6245GA2046PCICLK47SO/GP5048LRESET#49WRST#50SMCLK151SMDAT152PCH_D1/SST/A MDTSI_D53GP77/KSO554PECI/AMDTSI_C55GP76/KSO456GP75/KSO357GP74/KSO258GP73/KSO159GP72/KSO060GP71/KSI161GP70/KSI062GP86/SMCLK063IO_SCI#/GP85/SMDA T0

SIO_CLK_DB
SIO_DAT_DB

VCC3 VCC3

12

R149
10KR2J-3-GP

(R)

LFRAMEJ_FW4

12

R146
2KR2J-1-GP

(R)

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

Debug USE

1
2
3
4
5
6
7
8
9

(71.08732.A0E)

U19

CTS1#
5VSB_CTRL#/CIRRX2/GP16
PCIRSTIN#/CIRTX2/GP15/CPU_PG
3VSB
LDRQ#
SLP_SUS#/VLDT_EN/GP63
GNDD
FAN_TAC1
FAN_CTL1
FAN_TAC2/GP52
FAN_CTL2/GP51
FAN_TAC3/GP37
FAN_CTL3/GP36
FAN_TAC4/GP35
SUSWARN#/GP34
SUSACK#/GP33
DPWROK/GP32
PWMOUT/GP31
ATXPG/GP30
SIN2/GP27
SOUT2/GP26
DSR2#/GP25
RTS2#/GP24
SI/GP23
SCK/GP22
DCD2#/GP21
CTS2#/GP20
RI2#/GP17
DTR2#
CE_N/CIRTX1
VCORE_EN/PCH_C1/GP14
PWROK1/GP13
PCIRST1#/GP12
PCIRST2#/GP11
3VSB
VCORE
CLKIN
GNDD

3

Print port

117

116

115

114

PD5

PD4

PD3

PD2

PD1

2

1 2

KBRST

R330 10KR2J-3-GP

1 2

A20GATE

R333 10KR2J-3-GP

LAD3_FWH3

1

RN5 SRN10KJ-6-GP

LAD2_FWH2

2

LAD1_FWH1

3

LAD0_FWH0

4 5

PLTRST*_SIO

(R)

C571

SCD1U10V2MX-3DLGP

2 1

113

112

111

110

109

108

107

106PE105

104

103

PD0

INIT#

STB#

AFD#

SLCT

ERR#

ACK#

SLIN#

BUSY

HSCK

VIN4/VLDT_12

VIN5/5VDUAL

RSMRST#/CIRRX1/GP5 5

PCIRST3#/GP10

MCLK/GP56
MDAT/GP57
KCLK/GP60
KDAT/GP61

3VSBSW#/GP40

PWROK2/GP41

SUSC#/GP53
PSON#/GP42

PANSWH#/GP43

PME#/GP54

PWRON#/GP44

SYS_3VSB

COPEN#

D_RX0/SMCLK2/GP46
D_TX0/SMDAT2/GP47

64

SMB0_DATA
SMB0_CLK

SIO_MEM_EVENT_L

SIO_PSON_N

HMOSI
HMISO
HSCE#
A3VSB

VIN0
VIN1
VIN2
VIN3

VCC3

VREF
TMPIN1
TMPIN2
TMPIN3

TSD-

GNDA

GNDD

SUSB#

VBAT

3VSB

GP70
LAN_DISABLE_N
EUP_DSW_SEL
MPCIE_DISABLE_N
Mini_Power_CTRL
LVDS_BL_EN_1

GP76

G

102
101
100
99

HM_VCC P_R

98

TP_SIO_VIN0

97

SIO_VIN2

96

SIO_VIN3

95

SIO_VIN4

94

SIO_VIN5

93

SIO_MAIN_VCC3

92

SIO_VREF

91
90

REMOTE1+
DIMM_TMPIN2+

89

GPU_DPLUS

88
87
86
85
84

PCIRST3#

SFD_GPIO

83

VGA_DET

82
81

KBCLK

80

KDAT

SLP_S3_N_R3

79
78

SLP_S4_N_C

77

SIO_PSON_N

76

PB_IN_N_1

75
74

LPC_PME_N

73

SW_ON_N_SIO

72

SLP_S3_N

71

SYS_3VSB

70

VBAT_SIO

69

SIO_COPEN#

68
67
66
65

From Soc

remove SPKR_DET (Patrick)

SB 1129 Allen modify

R644
330R3J-L-GP

(R)

1 2

SIO_PSON_D

Q66

2N7002
SOT-23

(R84.2N702.J31)

S D

For Power monitor function

1

TP46

R375 1KR2J-1 -GP

1 2

C535 SC1U10V2KX-1GP

R386 0R0402-PAD-2-GP
R385 0R0402-PAD-2-GP

1 2

R382

100R2F-L1-GP-U

1 2

R677 1KR2J-1-GP

SIO_SMB2_CLK

SIO_SMB2_DATA

SCD1U16V2KX-3GP

R380
0R2J-2-GP

SMB1_CLK

12

(R)

SMB1_DATA

12

(R)

0R2J-2-GP
R379

To Mini-PCIe

1 2

Note
VREF follow Moussy

SIO_AGND

R387 0R0402-PAD-2-GP

1 2
1 2

C218 SC1U10V2KX-1GP

SB3V

1 2

0R0402-PAD-2-GP

C217

1 2

SIO_AVCC3

VCC3

SIO_AGND

12

1 2

R381

C216

1

S

2

C

2

Note:

2

*Place C869,C883 close to IT8732

U

6

*Recommended net "V_3P3_A" minimum trace width 12mils.

D

SC1U10V2KX-1GP

RSMRST_NICH_RSMRST_N_R

1A 0115 Allen modify

PWROK3_2_RPWROK3_2
SLP_S4_N

V_3P3_A

3

V

5

M

X

­2

G

P

2

C214

VBAT2

12

12

L9

1 2

MHC1608S181NBP-GP

C215
SC22U6D3V5MX-2GP

Note:
Place C398,C399 close
to IT8732

Case Open Detection

Note :

V_3P3_A

COPEN# should be connected to GND
when this function is not be used .

If without use these pins, Please pull-up to 3.3V.
Don't let it floating
Pin19/24/25/30/48/57/71/75/77/80~83/96/95

1 2

R336 1KR2J-1-GP

(R)

LPC_PME_N

R392 2K2R2J-2-GP

IO_ SM I_N

R642 2K2R2J-2-GP

GP33
GP14

LDRQ#
GPU_THERMAL_INT
SER_IRQ
PWROK3_2_R

GP76

RN8
SRN10KJ-6-GP

SFD_GPIO

1

VGA_DET

2
3

KBCLK

4 5

KDAT

ADAPTOR_LIMIT

SW_ON_N_SIO
RSMRST_N
SIO_MEM_EVENT_L

SPI_WP_R_N

GP70

GP36
THERMAL_SHUT#_S IO

GP25
SIO_PCIRSTIN#

GP26

MPCIE_DISABLE_N
Mini_Power_CTRL

SIO_PSON_N

R300 10KR2J-3-GP

R391 10KR2J-3-GP
R390 10KR2J-3-GP
R348 10KR2J-3-GP

1 2

R311 10KR2J-3-GP(R)

1 2

R388 10KR2J-3-GP

1 2

R316 1KR2J-1-GP

1 2

R286 1KR2J-1-GP

PCIRST3#
PCIRST1#

SIO_SMB2_CLK
SIO_SMB2_DATA

R313

1 2

R285

1 2

R727

1 2

RN7
SRN10KJ-5-GP

R669

12

4K7R2J-2-GP

12

12
12
12

10KR2J-3-GP
10KR2J-3-GP

10KR2J-3-GP

1234

IT8732 Power On Strapping Options

JP1

Pin60

10KR2F-2-GP

LVDS_BL_EN_1

DSW_EUP_SEL

SB3V

12

R354

0607 Eric delete

1

0

12

12

R297 10KR2J-3-GP
R1207 10KR2J-3-GP

R303 10KR2J-3-GP

R323 10KR2J-3-GP(R)

R272 10KR2J-3-GP

R726 10KR2J-3-GP

EUP
DSW

8
7
6

12
12

1 2
1 2

R314 10KR2J-3-GP

1 2
1 2

1 2

8
7
6

SB3V

SB3V

RN2

(R)

1234

SRN10KJ-5-GP

RN9

1234

SRN10KJ-5-GP

V_3P3_ASB3V

12

R289

R288

0R3J-0-U-GP

0R0603-PAD

(R)

1 2

SCALAR_SIO_PU

V_3P3_A

12

EUP_DSW_SEL

12

1

VCC3

1D8V_S5

VCC3

VCC3

SB5V

SB3V

2012/11/01 David
Pisa leakage issue,
change to 3D3V_A

1A 0115 Allen modify

R363
10KR2F-2-GP

R366
10KR2F-2-GP

(R)

DescriptionSymbol value

<Variant Name>

<Variant Name>

<Variant Name>

Title

itle

itle

T

T

ITE8732

ITE8732

ITE8732

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hs in Tai Wu Rd

21F, 88, Hs in Tai Wu Rd

21F, 88, Hs in Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

38 58Tuesday, April 15, 201 4

38 58Tuesday, April 15, 201 4

38 58Tuesday, April 15, 201 4

A00

A00

A00

5

Vinafix.com

4

3

2

1

DCBATOUT
SB5V
VCC
VCC3

D D

DCBATOUT 38,40,41,42,43,45,46,47,57,58
SB5V 27,31,35,38,41,42,43,44,45,47,57
VCC 23,24,25,35,38,42,46,56,58
VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,38,46,56

Adaptor in to generate DCBATOUT

DCIN1

9

8
3

NP2

4

5

1

NP1

2

7

6

DC-JACK318-GP-U

C C

B B

DC in

12

JACK_PSID

AD_JK

C564
SCD1U50V3KX-GP

0513 Eric modify from POWER team

AD_JK

(R)

C240

12

12

12

R422
15KR2F-GP

PSID_D

R424
100KR2J-1-GP

SCD01U50V2KX-1GP

2N7002A-7-GP

(84.00301.A31)

PSID_D_1

R405

100KR2J-1-GP

G

Q42

VCC

12

C

B

E

D12
P6SMB27A-1-GP

(83.P6SBM.CAG)

A K

0719 Eric modify

Joey_1128

L22

1 2

BLM15BD102SN1D-GP

For layout top and bottom the same
U33

R981 R982 R983

R1718

U25

1

S

D

S

D

2

S

D

3

AD+_2

G D

4 5

12

12

PSID_G

SD

R421
10KR2J-3-GP

Q40

MMBT3904-4-GP

C237

SC1U25V3KX-1-GP

12

AO4407AL-GP

0521 Eric delete

R401

11A,11mohm <14mohm

56KR3F-GP

Vgs=-20 , 14mohm <18
mohm Vgs=-10

0721Eric CC modify power

1016 Eric part change

R426

ADAPTOR_PSID_R_RADAPTOR_PSID_R

1 2

33R2J-2-GP

8
7
6

SCD1U50V3KX-GP

VCC3

2

3

DC_19V

12

C233

1

D14
BAV99GP-GP

1A 0115 Allen modify

12

R398
10KR3J-L1-GP

(R)

VCC3

SB 1124 R430 Allen modify

12

R430
1K5R2J-3-GP

BIOS GPIO

R322
0R0402-PAD-2-GP

SB 0719 Eric modify

0705 Eric modify

DCBATOUT DC_19V

SB5V

12

ADAPTOR_PSID_SIO 38

1 2

R394 0R0805-PAD

1 2

R708 0R0805-PAD
R710 0R0805-PAD

1 2
1 2

R700 0R0805-PAD
R696 0R0805-PAD

1 2

Rshunt

R402

1 2

D01R2512F-3-GP

(R)

R603-PAD-NSP-GP

INA99B_OUT

R3 R4

R703
3K92R2F-GP

1 2

(R)

1 2

R691

10KR2F-2-GP (R)

(R)

R2

R698

12

1 2

(R)

R699
120KR2F-L-GP

(R)

R692
9K1R2F-1-GP

R1

R695

0R3J-0-U-GP

NSP

LMV393IN+
LMV393IN-

DCBATOUTDC_19V

SB 0719 Eric modify

0610 Eric modify

C557
SCD1U25V3KX-GP

INA991_IN_P

12

12

(R)

INA991_IN_N

12

SB5V

(R)

COREPWROK12,23

52

1

+

3

-

LMV331IDCKRG4-GP

U39
INA199A1-GP

+

-

6

(R)

U38

4

G

Q70
2N7002A-7-GP

(R84.2N702.J31)

2345
1

(R)

DC_19V

12

S D

R687
100KR2F-L1-GP

SB5V

12

C563
R402-PAD-NSP- GP

NSP

0611 ERic modify

OCP_6

G

12

R684
100KR2F-L1-GP(R)

SB5V

R697
10KR2F-2-GP

1 2

(R)

OCP_7

Q73
2N7002A-7-GP

(R84.2N702.J31)

S D

R688

0R2J-2-GP

1 2

(R)

R690

1 2

(R)

OCP_7_1

Q72
2N7002A-7-GP

G

(R84.2N702.J31)

S D

0R2J-2-GP

APU_PROCHOT# 10,45,52

ADAPTOR_LIMIT 38

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

Title

Title

Title

DC IN

DC IN

DC IN

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai W u Rd

21F, 88, Hsin Tai W u Rd

21F, 88, Hsin Tai W u Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

39 58Tuesday, April 15, 2014

39 58Tuesday, April 15, 2014

39 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

DCBATOUT

V_3P3_A

D D

C C

B B

V_5P0_A

DCBATOUT 38,39,41,42,43,45,46,47,57,58

V_3P3_A 12,20,23,35,38,46,47,57
V_5P0_A 28,30,31,46,47

PWR_3_5V_DCBATOUT

VIN RIPPLE CURRENT Imax=0.95A

PC116

12

SC10U25V6KX-4DL-GP

Iomax=2.5A
OCP>3.75A
Freq=375KHz

3P3V_PWR

12

12

PTC17
SE220U6D3VM-8GP

220uF/6.3V, ESR=13~15mohm
Ripple Current =3110mA

V_3P3_A 3P3V_PWR

1 2

PR147 0R0805-PAD

1 2

PR146 0R0805-PAD

1 2

PR143 0R0805-PAD

3.3V(RT8243B)
L=3.3uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 3.3)*3.3}/(19*3.3u*375K)=2.2A

PC110
SCD1U50V3KX-GP

PC117

12

SC10U25V6KX-4DL-GP

3.3uH, DCR=28~30mohm, Idc=6A, Isat=13.5A

PR122
6K65R2F-GP

12

PG11
GAP-CLOSE-PWR-2U-GP

3P3_PWR_VO2

12

12

PR127
10KR2F-2-GP

12

PC115
SCD1U25V3KX-GP

PL8

1 2

IND-3D3UH-1 16-GP

PC94

12

SC22P50V2JN-4GP

3P3_PWR_COMP2

3P3_PWR_COMP2

12

PR126

(R)

0R2J-2-GP

V0=2*(1+R1/R2)
Vo(cal.)=3.30V

PC111
SC1800P50V3KX-GP

(R)

3P3_PWR_SN2

PR150
2D2R5J-1-GP

UG-84.08884.B37 FDS8884
Vgs @ 4.5V,
Id = 7.5A,
Rds(on) = 30.0mohm,
Qg = 5.0~7.0nC

LG-84.06690.G37 FDS6690AS
Vgs @ 4.5V,
Id = 10A,
Rds(on) = 15.0mohm,
Qg = 9.0~13nC

567

8

DDD

D

PQ18
FDS8884-G-GP

3P3_PWR_UG2_R 5P0_PWR_UG1

4

G

SSS

12

123

PR149
10KR2J-3-GP

12

567

8

DDD

D

12

4

G

SSS

123

PQ17
FDS6690AS-G-GP

3P3V_PWR

1 2

1 2

3P3V_AUX_LDO

PR134
10KR2J-3-GP

5V_AUX_LDO

PR151
2D2R5J-1-GP

3P3_PWR_UG2

3P3_PWR_BT2_R 3P3_PWR_BT2

1 2

PC104
SCD1U50V3KX-GP

1

TP20

3V_5V_POK

PR129 130KR2F-GP

PR131 51KR2F-L-GP

PC102
SCD1U16V2KX-3GP

12

DCBATOUT PWR_3_5V_DCBATOUT

PG6
GAP-CLO SE-PWR -2U-GP

8243_LDO5

1 2

PC108

12

SC4D7U16V5KX-1-GP

PR140
2D2R5J-1-GP

1 2

PG5

1 2

GAP-CLOSE-PWR-2U-GP

12

PC106
SC4D7U16V5KX-1-GP

1 2

1 2

1 2

PR160 0R0805-PAD

1 2

PR159 0R0805-PAD

1 2

PR158 0R0805-PAD

PU10
RT8243BZQW-GP

14

LDO5

7

BOOT2

3P3_PWR_UG2

8

UGATE2

3P3_PWR_LX2

9

PHASE2

3P3_PWR_LG2

10

LGATE2

3P3_PWR_FB2

5

FB2

8243_LDO3

15

LDO3

6

PGOOD

8243_CS1

2

ENTRIP1

8243_CS2

4

ENTRIP2

UG-84.08884.B37 FDS8884
Vgs @ 4.5V,
Id = 7.5A,
Rds(on) = 30.0mohm,
Qg = 5.0~7.0nC

LG-84.06690.G37 FDS6690AS
Vgs @ 4.5V,
Id = 10A,

PWR_3_5V_DCBATOUT

12

PR144
2D2R5J-1-GP

8243_VIN

12

PC107

12

ENLDO

11

VIN

19

BOOT1

18

UGATE1

17

PHASE1

16

LGATE1

1

FB1

20

BYP1

13

SECFB

3

TON

GND

21

SCD1U25V3KX-GP

PR141

2D2R5J-1-GP

1 2

5P0_PWR_UG1
5P0_PWR_LX1

5P0_PWR_LG1

5P0_PWR_FB1
5P0_PWR_BYP

5V_AUX_LDO

8243_SECFB

12

PR128
68KR2F-GP

5.08V(RT8243B)
L=3.3uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 5.08)*5.08}/(19*3.3u*320K)=3.52A

12

1 2

PR145
21K5R2F-GP

PR142
10KR2F-2-GP

(R)

PR153
2D2R5J-1-GP

1 2

5P0_PWR_BT1_R5P0_PW R_BT1

PC105
SCD1U50V3KX-GP

12

PC103
SC1U10V3KX-4GP-U

Rds(on) = 15.0mohm,
Qg = 9.0~13nC

VIN RIPPLE CURRENT Imax=2.9A

567

8

DDD

D

G

5P0_PWR_UG1_R

4

SSS

12

PQ19

FDS6690AS-G-GP

PR152
10KR2J-3-GP

4

123

567

8

DDD

D

G

SSS

123

1 2

12

PQ20

FDS8884-G-GP

3.3uH, DCR=10.8mohm, Idc=10A, Isat=16A

12

PC112
SC1800P50V3KX-GP

5P0_PWR_SN1

12

PR148
2D2R5J-1-GP

5P0_PWR_FB1

V0=2*(1+R1/R2)
Vo(cal.)=5.08V

PC118
SCD1U25V3KX-GP

PL9
IND-3D3UH-135-GP

12

47uF/25V, ESR=30mohm
Ripple Current=2800mA

12

GAP-CLOSE-PWR-2U-GP

12

PC101
SC22P50V2JN-4GP

5P0_PWR_COMP18243_TON

12

PR123

(R)

0R2J-2-GP

PWR_3_5V_DCBATOUT

PC119
SC10U25V6KX-4DL-GP

12

PG12

(R)

12

12

12

PTC19
SE47U25VM-14-GP

PC113

12

SCD1U50V3KX-GP

220uF/6.3V, ESR=13~15mohm
Ripple Current=3110mA

PR137
15K4R2F-GP

PR130
10KR2F-2-GP

Iomax=6.5A
OCP>10A
Freq=321KHz

5V_PWR

PC114

12

12

PTC18

SC10U6D3V5KX-4GP

SE220U6D3VM-8GP

5V_PWR V_5P0_A

1 2

PR154 0R0805-PAD

1 2

PR155 0R0805-PAD

1 2

PR156 0R0805-PAD

1 2

PR157 0R0805-PAD

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

T

T

Title

itle

itle

NCP1589-> +12V

NCP1589-> +12V

NCP1589-> +12V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Rosa_BayTrail_DT

D

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

40 58Tuesday, April 15, 2014

40 58Tuesday, April 15, 2014

40 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

VCC12
DCBATOUT

SB5V

D D

C C

B B

VCC12 35,36,38
DCBATOUT 38,39,40,42,43,45,46,47,57,58

SB5V 27,31,35,38,39,42,43,44,45,47,57

PR106

2K21R3F-L-GP

PC86

SCD01U50V2KX-1GP

1589_FB1

1 2

1 2

R1

PR103

PR108
158R2F-GP

R2

2K21R3F-L-GP

12

Vout=0.8*(R1+R2)/R2

PR109

158R2F-GP

PC84

1 2

SCD22U16V2KX-GP

SC1KP50V2KX-1GP

12

PR101

75R2F-2-GP

12

1589_CP1

12

1589_FB
1589_VOS

12

PC90
SCD01U16V2KX-3GP

(R)

PR102
3K3R2F-2-GP

12

PC85

12V_PWR_SENSE

8

FB

9

VOS

10

PGOOD

5

GND

11

GND

NCP1589AMNTWG-GP-U1

12

SIO_PSON_N20,38,46

PU9

VCC

BOOT

LX

UG

LG

COMP/EN#

SC1U10V2KX-1GP

PR110

2D2R5J-1-GP

PC89

12

SC1U16V3KX-5GP

6

1
2
3
4
7

(R)

C517

SB5V

12

1589_VCC

1589_BOOT
1589_LX
1589_UG
1589_LG
1589_COMP

12

PD1
RB551V30-1-GP

K A

1589_BT1

PC100

PR117

2D2R5J-1-GP

1 2

G

S D

SCD1U50V3KX-GP

1 2

1589_LG12

1 2

PR136

0R0805-PAD-2-GP-U

12

RP125
8K2R2F-1-GP

OCP SETTING

Rocset=Iocth*Rdson/Iocset
Rocset=1.5A*72.5mohm/10uA=11.3Kohm

12V_PWR_COMP
H: enable
L: disable

Q62

2N7002A-7-GP

(84.2N702.J31)

DCBATOUT_1589DCBATOUT

PR247 0R0805-PAD-2-GP-U

12
12

PR248 0R0805-PAD-2-GP-U

Vin ripple current Imax=1.4A

12

PR250
10KR2J-3-GP

PR249
2D2R5J-1-GP

12

DCBATOUT_1589

PC161

SCD1U50V3KX-GP

84.04214.037 SI4214DDY
Vgs @ 4.5V,
Id = 5.9A,
Rds(on) = 19.0~23.0mohm,

PQ21

S1

1

12

1589_LG12

1589_LX
1589_UG1

G1

2

S2

3

G2

4

SI4214DDY-GP

(75.04214.A71)

PC160

12

SC10U25V6KX-4DL-GP

D1

8

D1

7

D2

6

D2

5

PC372

12

SC10U25V6KX-4DL-GP

12

PR251
2D2R5J-1-GP

1589_LX1_SNB

12

PC162
SC1500P50V3KX-GP

5.6uH,
DCR=45~50mohm,
Idc=5A
Iset=9A

PL7

1 2

IND-5D6UH-45-GP

Iomax=3A
OCP>4.5A

12V_PWR VCC12

PR139 0R0805-PAD-2-GP-U

PR138 0R0805-PAD-2-GP-U

Change to 5.6 uH.

12

PR107
10R2F-L-GP

12
12

12V_PWR

12

PC109
SC10U25V6KX-4DL-GP

100uF/16V,
ESR=24.0mohm,
Ripple Current= 2490 mA

12

PTC16
E100U16VM-105-GP

(09.1071D.D5L)

SIO_PSON_N
S0: L
S3/S4/S5: H

A A

5

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

PWR_1P5V/0P75V_RT8237A

PWR_1P5V/0P75V_RT8237A

PWR_1P5V/0P75V_RT8237A

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Hsichih, Taipei

A00

A00

41 58Tuesday, April 15, 2014

41 58Tuesday, April 15, 2014

1

41 58Tuesday, April 15, 2014

A00

5

Vinafix.com

4

3

2

1

1D35V_S0
DCBATOUT

DDR_0D675V
DDR_VDDQ
SB3V
SB5V
VCC

D D

C C

B B

PD Internally Limit
(125'c - 25'c)/55 =1.82W

PD=(Vin-Vout)*Iomax
=(1.5-0.75)*1A=0.75W

A A

1D35V_S0 15,17,43
DCBATOUT 38,39,40,41,43,45,46,47,57,58

DDR_0D675V 21
DDR_VDDQ 8,14,16,21,48
SB3V 12,15,17,20,30,34,35,38,43,44,45,47,48,57
SB5V 27,31,35,38,39,41,43,44,45,47,57
VCC 23,24,25,35,38,39,46,56,58

V_SM_VTT

12

PC146
SC1U10V3KX-3DLGP

1 2

PR222 0R0805-PAD

DDR_1.35V

Vin Ripple current = 1.54A

DDR3_MEM_VTT
0D675V

DDR_VDDQ

PR220
1KR2F-3-GP

PR221
1KR2F-3-GP

DDRVTT_REF

12

0D675V_LDO

12

PC147
SC10U10V5KX-2DLGP

DDR_VDDQ

12

12

0D675V_LDODDR_0D675V

PC48

TRIP=GND, OCP=8A
TRIP= 5V, OCP=12A

1 2

PR68 0R0805-PAD

1 2

PR67 0R0805-PAD

PU12

1
2
3

APL5337KAI-TRG-GP

Iomax=1.0A

PC148
SC10U10V5KX-2DLGP

SC2700P25V2JX-GP

12

1A 0115 Allen modify

VIN
GND
VREF
VOUT4NC#5

PC149

12

SC1U16V3KX-5GP

VCNTL

SLP_S4_N20,38,46,48

1D35V_PWR

PR60

0R2J-2-GP

1D05V_RUNPWROK15,20,43

PR61

(R)

12

51363_BT_R

1A 0115 Allen modify

12

PR62

(R)

10KR2J-3-GP

PC44

12

SC1U16V3KX-5GP

PC42

12

SCD1U25V3KX-GP

R566 0R0402-PAD-2-GP

1D35V_S3_PWRGD 48

1A 0107 Allen modify

(R)

Float : 800KHz
GND: 400KHz

0.82uH, DCR=6.7~8mohm, Idc=13A, Isat=24A

1 2

PL4 IND-D82UH-19-GP

12

PC43
SC1800P50V3KX-GP

51363_SNB

12

PR63
2D2R5J-1-GP

DCBATOUT

12

R559
100KR2J-1-GP

1D35V_S0_EN1

12

100KR2J-1-GP

1D35V_S0_EN

12

PC39

12

SC1U16V3KX-5GP

PR56 0R0402-PAD

1 2

PR55

1 2

0R0402-PAD

Connect GSNS to output capacitor
ground and VSNS to positive terminal
of output capacitor, run these two
trace as differential

Q50

1D35V_S0_EN2

2345
1

6

2N7002EDW-2-GP

R564

C389
SCD1U50V3KX-GP

12

(R)

IMAX=6A, OCP>9A

1D35V_PWR

PTC10
E820U2D5VM-7-GP

12

51363_GSNS

51363_VSNS

DCBATOUT

12

R570
47KR2J-2-GP

R571

1D35V_S0_EN_G

1 2

10KR2J-3-GP

12

R568

C395

100KR2J-1-GP

SCD1U50V3KX-GP

12

820uF/2.5V
ESR= 7 m ohm

DDR_VDDQ

DS

G

Ripple Current =5600mA

Q52
AO3418L-GP

12

R574
4K7R2J-2-GP

12

SC10U10V5KX-2GP

1D35V_S0

C392

(R)

1.35V(TPS51363)
L=0.82uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 1.35)*1.35}/(19*0.82u*800K)=1.91A

12

C391

(R)

SCD1U50V3KX-GP

1 2

PR45 0R0805-PAD

1 2

PR42 0R0805-PAD

1 2

PR44 0R0805-PAD

1 2

PR43 0R0805-PAD

V1D35_S0

Imax = 0.445A

12

C396

SCD1U16V2KX-3GP

DDR_VDDQ1D35V_PWR

TC2
E820U2D5VM-7-GP

12

(R)

PR64

PC49

12

(R) 0R2J-2-GP

VCC

12

PR224
2D2R5J-1-GP

12

PC150
SC1U10V2KX-1DLGP

0R0402-PAD-2-GP

1 2

(R)

12

PC45
SCD1U16V3KX-3GP

PR66

PC50

1 2

1 2

SC2D2U16V5KX-1GP

12

PC51

SC10U25V6KX-4DL-GP

SB5V

12

PR223
2D2R5J-1-GP

(R)

PC47

1 2

SCD22U16V2KX-GP

51363_GSNS

51363_VSNS

12

PC46
SCD01U50V2KX-1GP

51363_EN

51363_VREF

51363_SS

51363_TRIP

PU5

28

EN

27

NU#27

26

VREF

25

REFIN

24

REFIN2

23

GSNS

22

VSNS

21

SLEW

20

TRIP

19

GND

18

V5

17

VIN

16

VIN

15

VIN

TPS51363RVER-GP

1

PGOOD

2

NU#2

51363_MODE

3

MODE

4

NC#4

51363_BT

5

1 2

BST

0R5J-5-GP

51363_LX

6

SW#6

7

SW#7

8

SW#8

9

SW#9

10

PGND

11

PGND

12

PGND

13

PGND

14

PGND

GND

29

1A 0107 Allen modify

SB5V

PR65 0R0402-PAD-2-GP

19_1D35VDCBATOUT

12

SC10U25V6KX-4DL-GP

9

GND

8

NC#8

7

NC#7

+DDR3_VTT_VCNTL

6
5

5

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

itle

itle

T

T

1D35V_0D675_TPS51363

1D35V_0D675_TPS51363

1D35V_0D675_TPS51363

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Hsichih, Taipei

42 58Tuesday, April 15, 2014

42 58Tuesday, April 15, 2014

42 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

1D0V_S0

1D05V_S0
1D8V_S0
1D8V_S5

D D

C C

1D35V_S0
DCBATOUT
SB3V
SB5V
1D5V_S0

1D0V_S0 12,15,17,44,45

1D05V_S0 15,17
1D8V_S0 10,12,13,15,17,19,23,25,30,35,38,46
1D8V_S5 12,15,17,20,23,28,30,34,38,44,56,57
1D35V_S0 15,17,42
DCBATOUT 38,39,40,41,42,45,46,47,57,58
SB3V 12,15,17,20,30,34,35,38,44,45,47,48,57
SB5V 27,31,35,38,39,41,42,44,45,47,57
1D5V_S0 15,17,31,34

1.8V_S0

DCBATOUT

12

R153
100KR2J-1-GP

1D8V_S0_EN1

12

R151

100KR2J-1-GP

1A 0115 Allen modify

1.5V_S0_PWRGD 1D8V_S0_EN

R165 0R0402-PAD-2-GP

12

Q23

5
6

2N7002EDW-2-GP

34
2
1

C100
SCD1U50V3KX-GP

12

(R)

DCBATOUT

12

R163
47KR2J-2-GP

10KR2J-3-GP

12

R162

100KR2J-1-GP

R164

1 2

1D8V_S0_EN_G1D8V_S0_EN2

C96
SCD1U50V3KX-GP

12

C97

(R)

SCD1U50V3KX-GP

1D8V_S5

DS

Q24
AO3418L-GP

G

12

12

R152
4K7R2J-2-GP

Iomax=0.018A

12

C90

SC10U10V5KX-2GP

1D8V_S0

(R)

12

C89

SCD1U16V2KX-3GP

1.5V_S0

Pd=(1.8-1.5)*0.4=0.12W

1 2

1D8V_S5

PG4 GAP-CLOSE-PWR

1 2

PG3 GAP-CLOSE-PWR

Iomax=0.4A

1 2

1D5V_S0

B B

PG2 GAP-CLOSE-PWR

1 2

PG1 GAP-CLOSE-PWR

(R)

12

PC4
SC10U10V5KX-2DLGP

5930_VOUT_M

12

PC7
SC10U10V5KX-2DLGP

1 2

PR8

8K87R2F-2-GP

R1

1 2

PC9 SCD01U16V2KX-3GP

(R)

5930_VIN_M

12

PC11
SC10U10V5KX-2DLGP

5930_FB_M

R2

12

PR7
10KR2F-2-GP

12

APL5930KAI-TRG-1-GP

5

VIN# 5

4

VOUT#4

VCNTL

3

VOUT#3

POK

2

FB

1

Vo(cal.)=1.5096V
Vo=0.8*(1+(R1/R2))

EN

GND

VIN# 9

PU1

PC8
SC1U10V2KX-1GP

6
7
8
9

SB5V

12

PR5
10KR2F-2-GP

1.5V_S0_PWRGD

1.5V_S0_EN

5930_VIN_M

1.5V_S0_PWRGD 20

12

PC10

SCD1U16V2KX-3DLGP

1.5V_S0_EN 20

1D35V_S0

PR16

10KR2J-3-GP

1D35V_S0_PG

12

2

1

(

5

C15
SC1U10V2KX-1GP

R

)

SB3V

12

3

4

PR9
10KR2J-3-GP

1D35V_S0_PG#

Q3B
MMBT3904DW-GP

(75.03904.A7C)

SB3V

12

PR10
10KR2J-3-GP

1.5V_S0_EN

6

2

Q3A
MMBT3904DW-GP

(75.03904.A7C)

1

SB3V

12

PR76
100KR2J-1-GP

V1P05_S0
MAX=1.1A

1D05V_S0

PR71

1 2

0R0805-PAD

PR72

1 2

0R0805-PAD

A A

5

Pd=(1.8-1.05)*1.1=0.825W

1D05V_LDO

12

PC58
SC10U10V5KX-2DLGP

12

PC59
SC10U10V5KX-2DLGP

(R)

12

PC60
SC10U10V5KX-2DLGP

12

(R) SC100P50V2JN-3GP

12

PR73
3K16R2F-GP

R1

12

PR69
10KR2F-2-GP

R2

4

PC54

1D8V_S5

12

PC61
SC10U10V5KX-2DLGP

APL5930KAI-TRG-1-GP

5

VIN# 5

4

VOUT#4

3

VOUT#3

2

FB

1

LDO_1D05V_FB

GND

PU6

Vout = 0.8*(1+R1/R2)=1.0528V

SB5V

12

PC55
SC1U25V3KX-1-GP

6

VCNTL

LDO_1D05V_PG

7

POK

LDO_1D05V_EN 1D05V_S0_EN

8

EN

9

VIN# 9

1D8V_S5

LDO_1D05V_PG

12

PC52
SCD1U16V2KX-3DLGP

3

12

1 2

PR70

0R0402-PAD

1 2

PR74

0R0402-PAD

PC53
SCD1U16V2KX-3DLGP

1D05V_RUNPWROK 15,20,42

1D0V_S0

1D05V_S0_EN 20

2

R175

1 2

10KR2J-3-GP

1D0V_S0_PG

SB3V

12

R176
10KR2J-3-GP

1D0V_S0_PG#

3

5

4

Q25B

C108

MMBT3904DW-GP

SC1U10V2KX-1GP

1 2

(75.03904.A7C)

(R)

Title

Title

Title

8_V1P5_S0&1.8V_CPU&V1P05

8_V1P5_S0&1.8V_CPU&V1P05

8_V1P5_S0&1.8V_CPU&V1P05

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C
Date: Sheet of

Date: Sheet of

Date: Sheet of

SB3V

12

R168
10KR2J-3-GP

1D05V_S0_EN

6

2

Q25A
MMBT3904DW-GP

(75.03904.A7C)

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

1

A00

A00

43 58Tuesday, April 15, 2014

43 58Tuesday, April 15, 2014

43 58Tuesday, April 15, 2014

A00

5

Vinafix.com

4

3

2

1

1D0V_S0
1D0V_S5
1D8V_S5

SB3V
SB5V

D D

C C

1D0V_S0 12,15,17,43,45
1D0V_S5 15,17
1D8V_S5 12,15,17,20,23,28,30,34,38,43,56,57

SB3V 12,15,17,20,30,34,35,38,43,45,47,48,57
SB5V 27,31,35,38,39,41,42,43,45,47,57

VNN_GFX_ PWRG D20,45

1A 0115 Allen modify

CPU 1V_S0

10KR2J-3-GP

12

R106 0R0402-PAD-2-GP

PR40

SB3V

12

CPU_1V_S0_PG

12

PC27
SCD1U16V2KX-3DLGP

CPU_1V_S0_EN

12

PC30
SCD1U16V2KX-3DLGP

Pd=(1.8-1.0)*3=2.4W

PU3

1

GND

2

FB

3

VOUT
VOUT4VIN

APL5912-KAC-TRG-GP

9

VIN

8

EN

7

POK

6

VCNTL

5

SB 1126 Allen modify

CPU_1V_S0_FB_M

SB5V

12

PC25
SC1U16V3KX-2GP

1A 0115 Allen modify

CPU 1V_S5_LDO_PG

12

PC26
SC10U10V5KX-2DLGP

CPU_1V_S0_FB_M1

12

12

PR51
25K5R2F-GP

R1

12

PR49

R2

100KR2F-L1-GP

SB3V

12

12

PR24 0R0402-PAD-2-GP

12

1D8V_S5

12

PC24
SC10U10V5KX-2DLGP

PR52

1 2

10R2F-L-GP

PC36
SC27P50V2JN-2-GP

Vo(cal.)=1.004V
Vo=0.8*(1+(R1/R2))

PR19
10KR2J-3-GP

(R)

PC17

SCD1U16V2KX-3DLGP

12

PC35
SC10U10V5KX-2DLGP

1P8V_PWR_EN 57

12

PC38
SC10U10V5KX-2DLGP

Iomax=3.0A

1D0V_S0

12

PC37
SC10U10V5KX-2DLGP

B B

A A

MAX=0.35A

1D0V_S5

PR23

1 2

0R0805-PAD

Pd=(3.3-1.0)*0.35=0.805W

CPU 1V_S5_LDO

12

PC13
SC10U10V5KX-2DLGP

(R)

12

PC14
SC10U10V5KX-2DLGP

(R) SC100P50V2JN-3GP

12

PR25

2K55R2F-GP

R1

12

PR21
10KR2F-2-GP

R2

CPU 1D0V_S5

5

4

SB3V

12

PC19

CPU 1V_S5_LDO_FB

Vout =0.8*(1+R1/R2)=1.004V

12

PC12
SC10U10V5KX-2DLGP

5
4
3
2
1

APL5930KAI-TRG-1-GP

VIN#5
VOUT#4

VCNTL

VOUT#3

POK
FB
GND

VIN#9

PU2

SB5V

12

PC15
SC1U25V3KX-1-GP

6

CPU 1V_S5_LDO_PG

7

CPU 1V_S5_LDO_EN CPU 1V_S5_LDO_EN_SB

8

EN

9

SB3V

3

1 2

0R0402-PAD

12

PC20

SCD1U16V2KX-3DLGP

PR26

PR27

10KR2J-3-GP

SB3V

12

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

DC to DC_1D0V_TPS51363

DC to DC_1D0V_TPS51363

DC to DC_1D0V_TPS51363

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D
Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

Hsichih, Taipei

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

A00

A00

A00

44 58Tuesday, April 15, 2014

44 58Tuesday, April 15, 2014

44 58Tuesday, April 15, 2014

1D0V_S0

Vinafix.com

SB3V
SB5V
VCORE

VNN_GFX

DCBATOUT

D D

C C

B B

A A

1D0V_S0 12,15,17,43,44

SB3V 12,15,17,20,30,34,35,38,43,44,47,48,57
SB5V 27,31,35,38,39,41,42,43,44,47,57
VCORE 14,16,38

VNN_GFX 14,16

DCBATOUT 38,39,40,41,42,43,46,47,57,58

5

NTC PLACE NEAR H/S MOSFET

VSUM+

PR17 place near to choke PL1

VSUM-

VSUMG-

PR18 place near to choke PL2

VSUMG+

5

2K61R2F-1-GP

VCORE_ISUMP_1

PR17

1 2

NTC-10K-33-GP-U

(69.60013.121)

PR164

VR_SVID_ALERT#12

12

12

12

1 2

SCD1U25V3KX-GP

1 2

NTC-10K-33-GP-U

Vnn_ISUMP_1

VR_SVID_DATA12

11KR2F-L-GP

PC132

(69.60013.121)

PR179

2K61R2F-1-GP

VR_SVID_CLK12

SLP_S3_N12,20,38

12

PR175

PC123
SCD1U25V3KX-GP

PR18

PC120
SC1U16V5KX-3GP

12

1D0V_S0

1 2

PR162

PR163

1 2

1 2

R433

APU_PROCHOT#10,39,52

12

PC122
SCD068U16V2KX-DL-GP

1 2

PR176

VCORE_ISUMN_1

1 2

649R2F-GP

PR184

1 2

649R2F-GP

PR178

PC125

11KR2F-L-GP

SCD068U16V2KX-DL-GP

1 2

1 2

2014/04/10
PC125 Need change to 33nF,33nF part apply.

VR_SVID_DATA

69D8R2F-GP

VR_SVID_CLK

69D8R2F-GP

69D8R2F-GP

NTCG _R

PR167

12

3K83R2F-GP

NTC_ R

12

PR165

3K83R2F-GP

SB5V

1A 0116 Allen modify

SB 1125 PC121 and PR180 Allen modify

PC121

SCD1U16V2KX-3DLGP

1A 0109 PR180 Allen modify

PR180 330R2F-GP

1 2

PC128

1 2

SC2200P50V2KX-2DLGP

PC129

Vnn_ISUMNG_1

1 2

SC2200P50V2KX-2DLGP

PR181 430R2F-GP

1 2

12

PC126
SCD1U16V2KX-3DLGP

1A 0107 Allen modify

PR168 0R0402-PAD-2-GP

1A 0109 PR181 Allen modify

TP48

1

VNN_GFX_PWRGD20,44

4

12

PC2128

SCD1U16V2KX-3DLGP

(R)

1A 0116 Allen modify

SLP_S3_N

12

PR173 0R0402-PAD-2-GP

VR_SVID_CLK

12

PR172 20R2F-GP

VR_SVID_ALERT#

12

PR171 0R0402-PAD-2-GP

VR_SVID_DATA

12

PR17016D9R2F-1-GP

12

PR6 NTC-470K-9-GP-U
PR174 27K4R2F-GP

12

NTCG

12

PR13 NTC-470K-9-GP-U
PR169 27K4R2F-GP

NTC

12

12

ISEN2

ISUMN

ISUMNG

SB3V

12

PR198
1K91R2F-1-GP

SB3V

12

PR200
1K91R2F-1-GP

FSW=450K and AND ICCMAX_GT = 18A

4

VR_ON_R

SCLK
ALERT#
SDA

2D2R5J-1-GP

SB5V

PR202

1 2

12

PU11

2

VR_ON

3

SCLK

4

ALERT#

5

SDA

6

VR_HOT#

1

NTCG

7

NTC

9

ISEN1

8

ISEN2

10

ISUMP

11

ISUMN

31

ISUMNG

32

ISUMPG

15

PGOOD

27

PGOODG

ISL95833HRTZ-GP

SC560P50V2KX-2DLGP

VCORE_VDD

PC143
SC1U10V3KX-4GP-U

GND

33

PC140

22

VCCP

COMPG

28

COMPG

12

21

VDD

FBG29RTNG

FBG

PC137

1 2

PR195
21KR2F-GP

30

1 2

SC47P50V2JN-5DLGP

Vnn_COMPG

DCBATOUT

12

PC1 SCD1U50V3KX-GP

20

PWM2

16

BOOT1

BOOT1

19

LGATE1

LGATE1

18

PHASE1

PHASE1

17

UGATE1

UGATE1

14

COMP

COMP

13

FB

FB

12

RTN

SC 0109 PR185 Allen modify SC 0109 PC138 and PR191 Allen modify

26

BOOTG

BOOTG

25

UGATEG

UGATEG

24

PHASEG

PHASEG

23

LGATEG

LGATEG

Vnn_FBG

1 2

PC135
SC82P50V3JN-DLGP

1 2

12

PR192

3K4R2F-GP

82KR2F-1-GP

12

PR193

2KR2F-3-GP

SB 1120 PR196, PC137, PC140, PR190, PC135 Allen modify

FBG_R

12

PC141
SC5600P25V2KX-1-DL-GP

SB 1125 PC141 Allen modify

1 2

PR1 0R0805-PAD

1 2

PR2 0R0805-PAD

1 2

PR4 0R0805-PAD

1 2

PR3 0R0805-PAD

PR186

1 2

680R2F-GP

PR185 2K49R2F-GP

1 2

SB 1125 PR185 and PC134 Allen modify

PR190

SC330P50V2KX-3-DL-GP

1 2

1KR2F-3-GP

R196

1A 0109 PR196 Allen modify1A 0109 PC140 Allen modify

VCORE_IN19V

VNNGFX_IN1 9V

PC134

VCORE_FB

SC82P50V2JN-3-DL-GP

PC130

SC330P50V2KX-3-DL-GP

PC127
SCD01U50V2KX-1DLGP

PC131

1 2

PC139

1 2

1 2

1 2

1 2

SCD01U50V2KX-1GP

(R)

1 2

82KR2F-1-GP

1 2

2KR2F-3-GP

(R)

10R2F-L-GP

3

VBOOT=1.1V, and AND ICCMAX_CORE = 18A

PR194

1 2

64K9R2F-1-GP

1A 0109 PC136 Allen modify

1 2

PC136 SC33P50V2JN-3DLGP

PR191

VCORE_COMP

1 2

PC138 SC1KP50 V2JN-DL-GP

PR189

FB_RC

1 2

PC133

SC6800P25V2KX-1DLGP

1A 0109 PC133 Allen modify

PR188

12

VCORE

10R2F-L-GP

PR197

10R2F-L-GP

10R2F-L-GP

PR187

12

12

PR182

12

VSS_AXG_SENSE 14

VCC_AXG_SENSE 14

VNN_GFX

3

VCC_SENSE 14

VSS_SENSE 14

84.00172.A37 SIR172ADP
Vgs @ 4.5V,
Id = 12.9A,
Rds(on) = 8.5~10.5mohm,

UGATEG

1 2

BOOTG

PHASEG

LGATEG

UGATE1

BOOT1

PHASE1

LGATE1

84.SRA12.037 SIRA12DP
Vgs @ 4.5V,
Id = 20A,
Rds(on) = 4.4~6.0mohm,

PR12

1 2

2D2R5J-1-GP

PR199

BOOTG_R

2D2R5J-1-GP

SCD22U25V3KX-GP

PR11

1 2

2D2R5J-1-GP

PR201

BOOT1_R

1 2

2D2R5J-1-GP

SCD22U25V3KX-GP

UGATEG_R

PC144

1 2

PC142

1 2

SIR172ADP-T1-GE3-GP

12

PR15
10KR2J-3-GP

SIRA12DP-T1-GE3-GP

SIR172ADP-T1-GE3-GP

UGATE1_R

SIRA12DP-T1-GE3-GP

12

PQ1

PQ4

PQ2

PR14
10KR2J-3-GP

PQ3

567

8

DDD

D

G

4

SSS

123

567

8

SIRA12DP-T1-GE3-GP

DDD

D

G

4

LGATEG

SSS

123

567

8

DDD

D

G

4

SSS

123

567

8

SIRA12DP-T1-GE3-GP

DDD

D

G

4

LGATE1

SSS

123

2

Vin =19V&Iout=14A, Iripple=3.12A

PC2

12

SC1U25V5KX-1GP

8

D

SSS

123

12

95833_VNN_SNB

12

PC18
SC1KP50V3KX-DLGP

SC10U25V6KX-4DL-GP

PC3

12

SC1U25V5KX-1GP

47uF/25V,
ESR=30mohm
Ripple Current =2800mA

PQ6

(R)

567

DDD

G

4

Vin =19V&Iout=12A, Iripple=2.68A

0.36uH, DCR=1.05~1.2mohm, Idc=30A, Isat=60A

PQ5

(R)

12

567

8

PR20

DDD

D

2D2R5J-1-GP

G

4

SSS

95833_VCORE_SNB

123

12

PC16
SC1KP50V3KX-DLGP

VSUM+

VSUM-

2

VNNGFX_IN1 9V

PC5

PC366

PC367

12

12

SC10U25V6KX-4DL-GP

SC10U25V6KX-4DL-GP

47uF/25V,
ESR=30mohm
Ripple Current =2800mA

0.36uH, DCR=1.05~1.2mohm, Idc=30A, Isat=60A

PR22
2D2R5J-1-GP

VSUMG+

VSUMG-

12

PC6

VCORE_IN19V

12

1 2

PC369

12

SC10U25V6KX-4DL-GP

1 2

IND-D36UH-19-GP

PG9
COPPER-CLOSE-GP-U

VSUMG+_R

PR177
3K65R5F-GP

PL2

PC370

12

SC10U25V6KX-4DL-GP

PC368

12

12

SC10U25V6KX-4DL-GP

SC10U25V6KX-4DL-GP

12

PG10
COPPER-CLOSE-GP-U

VSUMG-_R

PR183
1R2F-GP

1 2

1.0V
L=0.36uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 1.0)*1.0}/(19*0.36u*450K)=5.85A

For layout HIGH limit change to MLCC CAP(1POS CAP ->2MLCC) Patrick 02/10

PL1

1 2

IND-D36 UH-19- GP

12

PG7
COPPER-CLOSE-GP-U

VSUM+_R

PR161
3K65R5F-GP

1 2

12

PG8
COPPER-CLOSE-GP-U

VSUM-_R

PR166
1R2F-GP

1 2

PTC5

12

E820U2D5VM-7-GP

1.0V
L=0.36uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 1.0)*1.0}/(19*0.36u*450K)=5.85A

1

For layout HIGH limit change to MLCC CAP(1POS CAP ->3MLCC) Patrick 02/10

Imax=14A

VNN_GFX_ PWR

PTC4

12

E820U2D5VM-7-GP

PTC6

12

E820U2D5VM-7-GP

PTC7

12

E820U2D5VM-7-GP

820uF/2.5V
ESR= 7 m ohm
Ripple Current =5600mA

PTC3

12

E820U2D5VM-7-GP

820uF/2.5V
ESR= 7 m ohm
Ripple Current =5600mA

820uF/2.5V
ESR= 7 m ohm
Ripple Current =5600mA

1 2

PR33 0R0805-PAD

1 2

PR34 0R0805-PAD
PR32 0R0805-PAD

1 2
1 2

PR210 0R0805-PAD

1 2

PR207 0R0805-PAD

1 2

PR35 0R0805-PAD

1 2

PR208 0R0805-PAD
PR209 0R0805-PAD

1 2

1 2

PR204 0R0805-PAD

1 2

PR29 0R0805-PAD

1 2

PR205 0R0805-PAD
PR28 0R0805-PAD

1 2
1 2

PR203 0R0805-PAD

1 2

PR31 0R0805-PAD

1 2

PR30 0R0805-PAD

1 2

PR206 0R0805-PAD

Title

Title

Title

CPU_CORE&VNN_(ISL95833)

CPU_CORE&VNN_(ISL95833)

CPU_CORE&VNN_(ISL95833)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

1

PTC8

12

E820U2D5VM-7-GP

Imax=12A

VCORE_PWR

VNN_GFXVNN_GFX_ PWR

VCOREVCORE_PWR

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

45 58Tuesday, April 15, 2014

45 58Tuesday, April 15, 2014

45 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

D D

4

3

2

1

1D8V_S0
DCBATOUT

V_3P3_A
V_5P0_A
VCC
VCC3

1D8V_S0 10,12,13,15,17,19,23,25, 30,35,38,43
DCBATOUT 38,39,40,41,42,43,45,47,57,58
V_3P3_A 12,20,23,35,38,40,47,57
V_5P0_A 28,30,31,40,47
VCC 23,24,25,35, 38,39,42,56,58
VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,38, 39,56

Run Power(5V_S0,3.3V_S0,1.5V_S0,1.8V_S0)

V_5P0_A

DCBATOUT

C C

1D8V_S0

V_3P3_A

R660
10KR2J-3-GP

(R)

1 2

R670

RUNPWR_R6

1 2

4K7R2J-2-GP

C206

SCD1U50V3KX-GP

(R)

SIO_PSON_N20, 38,41

SIO_PSON_N
S0: L
S3/S4/S5: H

B B

USB_EN28,30

G

Q69

S D

2N7002A-7-GP

(84.2N702.J31)

0R0402-PAD-2-GP

SLP_S4_N20,38,42,48

R341

1A 0115 Allen modify

12

RUN_EN1

C

B

12

E

12

R683
100KR2J-1-GP

12

Q67

MMBT3904-4-GP

USB_EN

G

R674
100KR2J-1-GP

12

S D

R685
470KR2F-GP

1MR2J-1-GP
Q71
2N7002A-7-GP

(84.2N702.J31)

RUN_EN2

R686

C550

(R)

RUN_EN_5V

12

C555
SCD01U50V2KX- 1DLGP

RUN_EN_3V

12

C188
SCD01U50V2KX- 1DLGP

SCD1U25V3KX-GP

1 2

SB 1108 Allen modify

SB 1108 Allen modify

R694

1 2

10KR2J-3-GP

12

R343

1 2

10KR2J-3-GP

U37
AO4468L-GP

1

S
S

2

S

3

G D

4 5

U18

D

1
2

D

3 4

G

AO6402A-GP

D
D
D

D
D
S

SCD1U16V2KX- 3GP

V_5P0_A

8
7
6

VCC

12

EC1

(R)

closed to U8

5V_S0=6.23A

V_3P3_A

R672

1KR2J-1-GP

6
5

1 2

VCC3

3D3V_S0=2A

R353

1KR2J-1-GP

1 2

1

(

R

2

)

SC10U10V5KX-2G P

12

(R)

SC10U10V5KX-2G P

12

C59

C532

SCD1U16V2KX- 3GP

12

C196

C197

SCD1U16V2KX- 3GP

A A

5

4

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Titl e

itle

itle

Run PWR/USB PWR

Run PWR/USB PWR

Run PWR/USB PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

46 58Tuesday, April 15, 2014

46 58Tuesday, April 15, 2014

46 58Tuesday, April 15, 2014

A00

A00

A00

8

Vinafix.com

7

6

5

4

3

2

1

DCBATOUT
SB3V
SB5V
V_3P3_A
V_5P0_A

D D

C C

DCBATOUT 38,39,40,41,42,43,45,46,57,58
SB3V 12,15,17,20,30,34,35,38,43,44,45,48,57
SB5V 27,31,35,38,39,41,42,43,44,45,57
V_3P3_A 12,20,23,35,38,40,46,57
V_5P0_A 28,30,31,40,46

SIO_EUP_EN#38

EC_EUP_EN#
H: EUP disable
L: EUP enable

R320

EUP_R6

1 2

4K7R2J-2-GP

0516 Eric modify

SCD01U50V2KX-1GP

DCBATOUT

C184

SB 0815 Eric modify BOM for EUP

12

R307
470KR2F-GP

R319
1MR2J-1-GP

R326

1 2

10KR2J-3-GP

R299

1 2

10KR2J-3-GP

EUP_EN4

EUP_EN3

12

R328
100KR2J-1-GP

EUP_EN1

G

Q34
2N7002A-7-GP

(R)

12

(84.2N702.J31)

S D

G

12

R327

100KR2J-1-GP

S D

EUP_EN2

Q33
2N7002A-7-GP

(84.2N702.J31)

12

C186
SCD1U25V3KX-GP

1 2

(R)

SB Eric 0805 modify

SCD01U50V2KX-1GP

0523 Eric wrap SB3V,5V

12

12

C177

1
2
3
4 5

C187
SCD01U50V2KX-1GP

U16

D

1
2

D

3 4

G

AO6402A-GP

U17
AO4468L-GP

S
S
S
G D

6

D

5

D
S

SB3V

V_5P0_A

V_3P3_A

8

D
D

7

D

6

SB5V

0527 Eric modify

VCC5SB LED

B B

A A

8

7

12

R294
1K5R3-GP

(R)

LED_V_5P0_A

AK

LED1
LED-O-23-GP

(R83.01921.S70)

6

SB5VV_5P0_A

12

R306
1K5R3-GP

LED_5VSB

AK

LED2
LED-O-23-GP

(D83.01921.C70)

(G)

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

PCH_1D05V

PCH_1D05V

PCH_1D05V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Rosa_BayTrail_DT

C

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

47 58Tuesday, April 15, 2014

47 58Tuesday, April 15, 2014

47 58Tuesday, April 15, 2014

1

A00

A00

A00

5

Vinafix.com

4

3

2

1

DDR_VDDQ
SB3V

D D

C C

1D35V_S3_PWRGD42

SLP_S4_N20,38,42,46
DDR3_DRAM_PWROK8
DDR3_VCCA_PWRG D8

SYS_PWRGD12,52

DDR_VDDQ 8,14,16,21,42
SB3V 12,15,17,20,30,34,35,38,43,44,45,47,57

DDR3_VCCA_PWRGD

SYS_PWRGD

1A 0115 Allen modify

R547
0R0402-PAD-2-GP

12

DDR3_VCCA_PWRGD_3P3

DDR_VDDQ

12

R543
10KR2F-L1-GP

(64.10025.6DL)

DDR3_VCCA_PWRG D

Q49

3 4
2
1

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.F3F

5
6

(75.27002.D7C)

SB3V

12

R551
10KR2F-L1-GP

(64.10025.6DL)

DDR3_VCCA_PWRG D_ G

DDR_VDDQ

12

R550

10KR2J-3-GP

(R)

DDR3_VCCA_PWRG D

C380
SCD1U16V2KX-3GP

1 2

(R)

DDR3_DRAM_PWROK

DDR_VDDQ

12

R537
10KR2F-L1-GP

(64.10025.6DL)

12

R532
0R0402-PAD-2-GP

DDR3_DRAM_PWROK _ D

SLP_S4_N

R540
0R0402-PAD-2-GP

DDR3_DRAM_PWROK

1A 0115 Allen modify

Q48

3 4
2
1

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.F3F

(75.27002.D7C)

12

5
6

1D35V_S3_PWRGD

1A 0115 Allen modify

SB3V

12

SLP_S5_N_D

R549
10KR2F-L1-GP

(64.10025.6DL)

B B

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

itle

itle

T

T

DIMM_B

DIMM_B

DIMM_B

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Rosa_BayTrail_DT

Custom

Date: S heet of

Date: S heet of

4

3

2

Date: S heet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

48 58Tuesday, April 15, 2014

48 58Tuesday, April 15, 2014

48 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

C438

+V_1P05_VGA

1U Under GPU

12

C413

(G)

SC10U6D3V5MX-3-LL-GP

12

C421

(G)

SC10U6D3V5MX-3-LL-GP

C417

(G)

SC22U6D3V5MX-2-LL-GP

+V_1P05_VGA

12

C429

(G)

+V_3P3_VGA

SC1U16V3KX-2-LL-GP

1

C435

(

G

2

)

C420

(G)

SC22U6D3V5MX-2-LL-GP

12

C426

(G)

SC22U6D3V5MX-2-LL-GP

SC22U6D3V5MX-2-LL-GP

SC4D7U16V5KX-1-DL-GP

12

12

12

4.7U NEAR TO GPU

10U mid TO GPU

Michael 2011/12/12
Add two 1uF Caps according to

the NV Comment

MCB1608S121IBP-GP

100MHZ 120mohm

C430

(G)

C427

SC4D7U16V5KX-1-DL-GP

12

(G)

(G)

L25

1 2

+V_1P05_VGA

SC1U16V3KX-2-LL-GP

1

(

G

2

)

C428

+V_1P05_VGA
+V_3P3_VGA

D D

PCIEX2

PEG_TXP010
PEG_TXN010
PEG_TXP110
PEG_TXN110
PEG_RXP010
PEG_RXN010
PEG_RXP110
PEG_RXN110

CK_PE_100M_16PORT_DP12
CK_PE_100M_16PORT_DN12

PLTRST_SL_N38

PEX_RST_GPU52

PWR_VGA_CORE_SENCE+49,58

PWR_VGA_CORE_SENCE-49,58

C C

B B

A A

+V_1P05_VGA 51,52,56
+V_3P3_VGA 52,53,56,58

PWR_VGA_CORE_SENCE+

PWR_VGA_CORE_SENCE-

+V_3P3_VGA

12

R591 10KR2J-3-GP

(G)

PEX_CLKREQ

CK_PE_100M_16PORT_DP
CK_PE_100M_16PORT_DN

(G)

PEG_RXP0

C422 SCD1U10V2MX-3GP

PEG_RXN0

C423 SCD1U10V2MX-3GP

(G)
PEG_TXP0
PEG_TXN0

(G)
PEG_RXP1

C425 SCD1U10V2MX-3GP

PEG_RXN1

C424 SCD1U10V2MX-3GP

(G)
PEG_TXP1
PEG_TXN1

PLTRST_SL_N

1 2
1 2

1 2
1 2

1A 0116 Allen modify

12

R1212 0R0402-PAD-2-GP

PCIE_RXP_GPU0
PCIE_RXN_GPU0

PCIE_RXP_GPU1
PCIE_RXN_GPU1

PEX_RST_GPU

AB10
AC10

AD11
AC11

AC12
AB12

AG10
AB13

AC13
AF10

AE10
AD14

AC14
AE12

AF12
AC15

AB15
AG12

AG13
AB16

AC16
AF13

AE13
AD17

AC17
AE15

AF15
AC18

AB18
AG15

AG16
AB19

AC19
AF16

AE16
AD20

AC20
AE18

AF18
AC21

AB21
AG18

AG19
AD23

AE23
AF19

AE19
AF24

AE24
AE21

AF21
AG24

AG25
AG21

AG22

AB6

AC7
AC6
AE8

AD8
AC9

AB9
AG6

AG7

AF7
AE7

AE9
AF9

AG9

U36A

(G071.0N15V.0B0U)

1/14 PCI_EXPRESS

PEX_WAKE#

PEX_RST#
PEX_CLKREQ#
PEX_REFCLK

PEX_REFCLK#
PEX_TX0

PEX_TX0#
PEX_RX0

PEX_RX0#
PEX_TX1

PEX_TX1#
PEX_RX1

PEX_RX1#
PEX_TX2

PEX_TX2#
PEX_RX2

PEX_RX2#
PEX_TX3

PEX_TX3#
PEX_RX3

PEX_RX3#
PEX_TX4

PEX_TX4#
PEX_RX4

PEX_RX4#
PEX_TX5

PEX_TX5#
PEX_RX5

PEX_RX5#
PEX_TX6

PEX_TX6#
PEX_RX6

PEX_RX6#
PEX_TX7

PEX_TX7#
PEX_RX7

PEX_RX7#
PEX_TX8

PEX_TX8#
PEX_RX8

PEX_RX8#
PEX_TX9

PEX_TX9#
PEX_RX9

PEX_RX9#
PEX_TX10

PEX_TX10#
PEX_RX10

PEX_RX10#
PEX_TX11

PEX_TX11#
PEX_RX11

PEX_RX11#
PEX_TX12

PEX_TX12#
PEX_RX12

PEX_RX12#
PEX_TX13

PEX_TX13#
PEX_RX13

PEX_RX13#
PEX_TX14

PEX_TX14#
PEX_RX14

PEX_RX14#
PEX_TX15

PEX_TX15#
PEX_RX15

PEX_RX15#

N14M-GE-S-A2-GP

GK208/GF117/GF119
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

GF117GF1 19
GK208

1 OF 14

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD
PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT #

PEX_PLLVDD
PEX_PLLVDD

TESTMODE

PEX_TERMP

AA22
AB23
AC24
AD25
AE26
AE27

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

AA8
AA9

AB8

F2

F1

AF22
AE22

AA14
AA15

AD9

AF25

12

12

C445

C434

(G)

(G)

SC1U6D3V2KX-LL-GP

SC1U6D3V2KX-LL-GP

12

12

C442

C441

(G)

(G)

SC1U6D3V2KX-LL-GP

SC1U6D3V2KX-LL-GP

PWR_VGA_CORE_SENCE+

PWR_VGA_CORE_SENCE-

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

GPU_TESTMODE

PEX_TERMP

R193 200R2F-L-GP(G)

PEX_PLLVDD_GPU

10KR2J-3-GP

(G)

2K49R2F-GP

12

C437

(G)

SC4D7U6D3V3KX-LL-GP

12

C433

(G)

SC4D7U6D3V3KX-LL-GP

12

12

C443

C440

SC4D7U6D3V3KX-LL-GP

SCD1U16V2KX-3-LL-GP

(G)

(G)

PWR_VGA_CORE_SENCE+ 49,58

PWR_VGA_CORE_SENCE- 49,58

1 2

R192

(G)

1 2

R190

1 2

12

C412

(G)

SC10U6D3V5MX-3-LL-GP

12

C419

(G)

SC10U6D3V5MX-3-LL-GP

12

SC4D7U6D3V3KX-LL-GP

(G)

SCD1U16V2KX-3-LL-GP

1

C444

(

G

2

)

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

GPU Cedar/Caicos PCIE

GPU Cedar/Caicos PCIE

GPU Cedar/Caicos PCIE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C
Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

49 58Tuesday, April 15, 2014

49 58Tuesday, April 15, 2014

49 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

U36G

(G071.0N15V.0B0U)

4/14 IFPAB

GF117

GF119/GK208

AA6

D D

C C

V7

W7

W6

Y6

U36H

5/14 IFPC
GF119/GK208

T6

IFPC_RSET

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

P6

IFPC_IOVDD

N14M-GE-S-A2-GP

IFPAB_RSET

IFPAB_PLLVDD
IFPAB_PLLVDD

GF119/GK208

IFPA_IOVDD
IFPB_IOVDD

IFPAB

N14M-GE-S-A 2-GP

(G071.0N15V.0B0U)

NC

NC

NC

GF117

NC

NC

GF117

NC

NC NC
NC

NC

7 OF 14

GF119/GK208

GF117

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

GF117

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

DVI/HDMI

I2CW_SDA
I2CW_SCL

GF119/GK208

TXC
TXC

TXD 0
TXD 0

TXD 1
TXD 1

TXD2
TXD2

IFPA_TXC#

IFPA_TXC

IFPA_TXD0#

IFPA_TXD0

IFPA_TXD1#

IFPA_TXD1

IFPA_TXD2#

IFPA_TXD2

IFPA_TXD3#

IFPA_TXD3

IFPB_TXC#

IFPB_TXC

IFPB_TXD4#

IFPB_TXD4

IFPB_TXD5#

IFPB_TXD5

IFPB_TXD6#

IFPB_TXD6

IFPB_TXD7#

IFPB_TXD7

GPIO14

IFPC

IFPC_AUX_I2CW_SDA#

IFPC_AUX_I2CW_SCL

AC4
AC3

Y3
Y4

AA2
AA3

AA1
AB1

AA5
AA4

AB4
AB5

AB2
AB3

AD2
AD3

AD1
AE1

AD5
AD4

B3

8 OF 14

DP

IFPC_L3#

IFPC_L3

IFPC_L2#

IFPC_L2

IFPC_L1#

IFPC_L1

IFPC_L0#

IFPC_L0

GPIO15

N5
N4

N3
N2

R3
R2

R1
T1

T3
T2

C3

U36J

(G071.0N15V.0B0U)

7/14 IFPEF

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

H6

IFPE_IOVDD

J6

IFPF_IOVDD

N14M-GE-S-A 2-GP

DACA_VREF

12

C125
SCD01U50V2KX-1-LL-GP

(R)

GF117

GF117

GF119

GK208

NC

NC

NC

IFPE

GF117

GF119

GK208

NC

GF117

NC

IFPF

U36K

GF119/GK208

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

GF119/GK208
DVI-DL
I2CY_SDA

NC
NC

NC
NC

NC TXD 0
NC

NC

NC
NC

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

NC

3/14 DACA

I2CY_SDA

I2CY_SCL

I2CY_SCL

TXC

TXC

TXCTX C

TXD 0

TXD 0

TXD 0

TXD 1

TXD 1NC
TXD 1

TXD 1

TXD 2

TXD 2

TXD 2

TXD 2

NC FOR GK 208

HPD _E

HPD _E

GF119/GK208

DVI-DL DP

DVI-SL/HDMI

I2CZ_SDA
I2CZ_SCL

TXC
TXC

TXD 0

TXD 3

TXD 0

TXD 3
TXD 4

TXD 1

TXD 4

TXD 1

TXD 5NC

TXD 2

TXD 5

TXD 2

NC FOR GK 208

HPD _F

(G071.0N15V.0B0U)

GF117 GF119/GK208

NC

TSEN_VREF

NC NC

IFPE_AUX_I2CY_SDA#

IFPE_AUX_I2CY_SCL

IFPF_AUX_I2CZ_SDA#

IFPF_AUX_I2CZ_SCL

GF117

NC
NC

NC

NC

NC
NC

10 OF 14

DPDVI- SL/HDMI

IFPE_L3#

IFPE_L3

IFPE_L2#

IFPE_L2

IFPE_L1#

IFPE_L1

IFPE_L0#

IFPE_L0

GPIO18

IFPF_L3#

IFPF_L3

IFPF_L2#

IFPF_L2

IFPF_L1#

IFPF_L1

IFPF_L0#

IFPF_L0

GPIO19

11 OF 14

I2CA_SCL

I2CA_SDA

DACA_HSYNC
DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

J3
J2

J1
K1

K3
K2

M3
M2

M1
N1

C2

H4
H3

J5
J4

K5
K4

L4
L3

M5
M4

F7

B7
A7

AE3
AE4

AG3
AF4
AF3

N14M-GE-S-A 2-GP

I2CX_SDA
I2CX_SCL

DVI/HDMI

GF119/GK208

IFPD_AUX_I2CX_SDA#

IFPD_AUX_I2CX_SCL

TXC
TXC

TXD 0
TXD 0

TXD 1
TXD 1

TXD 2
TXD 2

9 OF 14

DP

IFPD_L3#

IFPD_L3

IFPD_L2#

IFPD_L2

IFPD_L1#

IFPD_L1

IFPD_L0#

IFPD_L0

GPIO17

P4
P3

R5
R4

T5
T4

U4
U3

V4
V3

D4

U36I

(G071.0N15V.0B0U)

6/14 IFPD

GF117

B B

U6

T7

R7

GF119/GK208

IFPD_RSET

IFPD_PLLVDD
IFPD_PLLVDD

IFPD

R6

IFPD_IOVDD

GF119/GK208

GF117

NC

NC

NC

NC

NC

NC
NC

NC
NC

NC
NC

NC
NC

NC

NC

GF117

N14M-GE-S-A2-GP

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

T

T

Title

itle

itle

GPU_Cedar/Caicos IO/STRAP

GPU_Cedar/Caicos IO/STRAP

GPU_Cedar/Caicos IO/STRAP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

50 58Tuesday, April 15, 2014

50 58Tuesday, April 15, 2014

50 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

+V_1P5_VGA

+V_1P05_VGA

D D

RASA#54

CASA#54

WEA#54

CKEA054
CKEA154

CSA0#_054
CSA1#_054

CLKA054
CLKA0#54

CLKA154

CLKA1#54
QSA#[7..0]54
QSA[7..0]54

DQMA[7..0]54

MDA[63..0]54

C C

B B

MAA[13..0]54

A_BA054
A_BA154
A_BA254

+V_1P5_VGA 53,54,56
+V_1P05_VGA 49,52,56

RASA#

CASA#

WEA#

CKEA0
CKEA1

CSA0#_0
CSA1#_0

CLKA0
CLKA0#

CLKA1

CLKA1#
QSA#[7..0]
QSA[7..0]
DQMA[7..0]
MDA[63..0]
MAA[13..0]

A_BA0

A_BA1

A_BA2

ODTA0 54
ODTA1 54

DRAM_RST 54

U36B

(G071.0N15V.0B0U)

MDA 0
MDA 1
MDA 2
MDA 3
MDA 4
MDA 5
MDA 6
MDA 7
MDA 8
MDA 9
MDA 10
MDA 11
MDA 12
MDA 13
MDA 14
MDA 15
MDA 16
MDA 17
MDA 18
MDA 19
MDA 20
MDA 21
MDA 22
MDA 23
MDA 24
MDA 25
MDA 26
MDA 27
MDA 28
MDA 29
MDA 30
MDA 31
MDA 32
MDA 33
MDA 34
MDA 35
MDA 36
MDA 37
MDA 38
MDA 39
MDA 40
MDA 41
MDA 42
MDA 43
MDA 44
MDA 45
MDA 46
MDA 47
MDA 48
MDA 49
MDA 50
MDA 51
MDA 52
MDA 53
MDA 54
MDA 55
MDA 56
MDA 57
MDA 58
MDA 59
MDA 60
MDA 61
MDA 62
MDA 63

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

FB_VREF

1

TP43TPAD24

E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24

AA24

Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26

W26

Y25

R26

T25

N27

R27

V26

V27

W27
W25

D19

D14

C17

C22

P24

W24

AA25

U25

E19

C15

B16

B22

R25

W23

AB26

T26

F19

C14

A16

A22

P25

W22

AB27

T27

D23

2/14 FBA

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FB_VREF_PROBE

N14M-GE-S-A2-GP

FB_PLLAVDD

NC

GF119 GF117/GK208

GF117 GF119/GK208

2 OF 14

FB_CLAMP

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBA_WCK01

FBA_WCK01#

FBA_WCK23

FBA_WCK23#

FBA_WCK45

FBA_WCK45#

FBA_WCK67

FBA_WCK67#

FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD

GPIO_FB_CLAMP_GPU

F3

C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26

F22
J22

D24
D25
N22
M22

D18
C18
D17
D16
T24
U24
V24
V25

F16
P22
H22

CSA0#_0

ODTA0
CKEA0

DRAM_RST
MAA9
MAA7
MAA2
MAA0
MAA4
MAA1
A_BA0
WEA#

CASA#
CSA1#_0

ODTA1
CKEA1
MAA13
MAA8
MAA6
MAA11
MAA5
MAA3
A_BA2
A_BA1
MAA12
MAA10
RASA#

FBA_DEBUG0
FBA_DEBUG1

CLKA0
CLKA0#
CLKA1
CLKA1#

(G)

SCD1U16V2KX-3-LL-GP

12

FB_PLLAVDD

C503

12

(G)

PR89
10KR2J-3-GP

12

(G)

SCD1U16V2KX-3-LL-GP

PLACE NEAR BALLS

12

R599
10KR2J-3-GP

(G)

+V_1P5_VGA

(G)

1 2

R608

1 2

60D4R2F-GP

R604

60D4R2F-GP(G)

1.05V

0.3MM

12

(G)

C502

SCD1U16V2KX-3-LL-GP

12

C465

12

C456

C449

(G)

(G)

SC1U16V3KX-2-LL-GP

SC22U6D3V5MX-2-LL-GP

PD

12

GF1XX SDDR3 CMD MAPPING

CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10A0A4
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24 A5
CMD25 A3
CMD26
CMD27
CMD28
CMD29
CMD30
CMD31

* A15 is not re quired for an y x16

device, even up to 4Gb density

* A15 is only needed if we support

x8 configurations, and only at 4Gb

1 2

MHC1608S300QBP-GP

(G)

PR96
10KR2J-3-GP

0-31
CS0*

ODT
CKE
A14
RST
A9
A7
A2

A1
BA0
WE*
A15
CAS*

A13
A8
A6
A11

BA2
BA1
A12
A10
RAS*

(G)

L27

12

32-63

A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE*
A15
CAS*
CS0*

ODT
CKE
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS*

(G)

PR232
10KR2J-3-GP

+V_1P05_VGA

12

(G)

PR246
10KR2J-3-GP

12

(G)

PR235
10KR2J-3-GP

ODTA0

ODTA1

CKEA0

CKEA1

A A

<Variant Name>

<Variant Name>

5

<Variant Name>

T

T

Title

itle

itle

GPU_Cedar/Caicos POWER/GND

GPU_Cedar/Caicos POWER/GND

GPU_Cedar/Caicos POWER/GND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

51 58Tuesday, April 15, 2014

51 58Tuesday, April 15, 2014

51 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

+V_1P5_VGA
+V_1P05_VGA
+V_3P3_VGA

D D

+V_1P5_VGA 51,53,54,56
+V_1P05_VGA 49,51,56
+V_3P3_VGA 49,53,56,58

TP41
TP40
TP42

GPU_DMINUS38
GPU_DPLUS38

1 2

R202

1

10KR2J-3-GP

1
1

1 2

R197

10KR2J-3-GP

U36N

(G071.0N15V.0B0U)

8/14 MISC1

GPU_DMINUS

E12

THERMDN

GPU_DPLUS

F12

THERMDP

JTAG_TCLK

AE5

(R)

JTAG_TMS

JTAG_TCK

AD6

JTAG_TDI

JTAG_TMS

AE6

JTAG_TDI

JTAG_TDO

AF6

JTAG_TRST

JTAG_TDO

AG4

(G)

JTAG_TRST#

N14M-GE-S-A2-GP

14 OF 14

I2CS_SCL
I2CS_SDA

I2CC_SCL

I2CC_SDA

GF119
GK208

GF117

NC

I2CB_SCL

NC

I2CB_SDA

GPI O0
GPI O1
GPI O2
GPI O3
GPI O4
GPI O5
GPI O6

GK208

GPI O7

OVERT

GPI O8

GPI O9
GPIO10
GPIO11
GPIO12
GPIO13

GF117GK208

GF119

GPIO16

NC

GPIO16

GPIO20

NC

GPIO20

GPIO8

NC

GPIO21

4

PU for I2CC

+V_3P3_VGA

12

12

(G)

(G)

R628

R257

2K2R2J-2-GP

2K2R2J-2-GP

+V_3P3_VGA

12

12

R630

(R)

R255

(R)

100KR2J-1-GP

100KR2J-1-GP

I2CS_SCL_G

D9

I2CS_SDA_G

D8

I2CC_SCL_PU

A9

I2CC_SDA_PU

B9

C9
C8

GPIO0_FB_CLAMP

C6

GPIO1_FBVDDQCTL

B2

GPIO2_BL_PWM

D6

GPIO3_PPEN_R

C7

GPIO4_BLEN

F9

GPIO5_PWM_VID_BOOT_EN

A3

GPIO6_FB_CLAMP_TGL_REQ

A4

GPIO7_3D_STEREO

B6

GPIO8_OVERT#

A6

GPIO9_ALERT#

F8

GPIO10_MEM_VREF_CTL

C5

GPIO11_PWM_VID

E7

GPIO12_AC_DETECT

D7

GPIO13_NVVDD_PSI

B4

D5
E6
C4

1A 0116 Allen modify

12
12

R632 0R0402-PAD-2-GP
R256 0R0402-PAD-2-GP

100KR2J-1-GP

100KR2J-1-GP

12

12

R254

(G)

100KR2J-1-GP

12

R616

(G)

SMB0_CLK 13,21,23,38
SMB0_DATA 13,21,23,38

100KR2J-1-GP

100KR2J-1-GP

12

R622

R615

(G)

(G)

12

R619

(G)

GPIO8_OVERT#

GPIO9_ALERT#

GPIO12_AC_DETECT

1

TP44

1

TP15

1

TP16

1

TP18

GPIO9_ALERT# 58
GPIO11_PWM_VID 58
GPIO13_NVVDD_PSI 58

GPIO0, GPIO6 is for GC6 feature, no need to connect since this project won’t support GC6.
GPIO1 is for FB voltage control, no need to connect since the FBVDDQ is 1.5V for all P-States.
GPIO12 : High->AC Mode,Low->Battery Mode enter slow down functionpull for power saving.Recommand:Pull-High for AC mode.
GPIO13 PSI :Change Phase from two to one, and thean enter slow down functionpull for power saving.

3

V_3P3_VGA

1 2
1 2
1 2

2

GPIO

GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4

+V_3P3_VGA

GPIO 5

R253100KR2J-1-GP (G)
R631100KR2J-1-GP (G)
R252100KR2J-1-GP (G)

GPIO 6
GPIO 7
GPIO 8

GPIO 9

GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21

GF117

FAN_PWM/FB_CLAMP/DEBUG Service
MEM_VDD_CTL
UNUSE D
UNUSE D
UNUSE D
Reserved
FB_CLAMP_TGL_REQ
3DVision(UNUSED)
GPU Overtemp
GPU Thermal Alert
FB Vref Control
NVVDD PWM_VID
PWR_Level AC Detect
UNUSED(No Need to Set in VBIOS)
N/A on Package
N/A on Package
N/A on Package
N/A on Package
N/A on Package
N/A on Package
N/A on Package
N/A on Package

1

C C

BUFRST_N

ROM_CS*

ROM_SI
ROM_SO
ROM_SCLK

12

R617
100KR2J-1-GP

(G)

External BIOS ROM

+V_3P3_VGA

12

R607

(G)

10KR2F-2-GP

(G)

ROM_CS_R*

1 2

R609

33R2J-2-GP

ROM_SI_R

1 2

R625

(R)

33R2J-2-GP

ROM_SCLK_R

1 2

R626

(R)

33R2J-2-GP

U36M

(G071.0N15V.0B0U)

9/14 XTAL_PLL

L6

CORE_PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

GF119/GK208

XTAL_SSFOUT

A10

XTAL_SSIN

C11

12

XTAL_IN

R629
10KR2F-2-GP

N14M-GE-S-A2-GP

XTAL IN

90DIFF_NET CLASS1

12

C512
SC10P50V2JN-4-LL-GP

(G)

STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS
IS NOT USED

(G)

U33

1

CS#

2

SO/SIO1

3

WP#
GND4SI/SIO0

MX25L1006EMI-10G-GP

(R)

NC

GF117

(G)

1 2

X5
XTAL-27MHZ-62-GP-U

STRAP

GF117
GK208

NC

NC

SP_PLLVDD

NEAR GPU

12 OF 14

D12

ROM _C S#

B12

ROM _S I

A12

ROM _S O

C12

ROM_SCLK

D11

BUFRST#

D10

NC

PGOOD

GF117

GF119

GK208

E9

NC

CEC

GF117
GK208
GF119

U36L

(G071.0N15V.0B0U)

10/14 MISC2

GF117/GF119/GK208

E10

NC

VMON_IN0

F10

NC

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

(R)

R610

1 2

B B

+V_1P05_VGA

L29

1 2

MHC1608S300QBP-GP

A A

1 2

40K2R2F-GP

XTAL THERMAL PROTECTION

(G)

UNDER GPU

L28

MHC1608S181NBP-GP

SCD1U16V2KX-3-LL-GP

12

(G)

C463

(G)

VMON_IN1

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

GF117

GF119

GK208

C1

NC

STRAP5

STRAP_REF0

F6

MULTI_STRAP_REF0_G N D

GF119

F4

MULTI_STRAP_REF1_G N D

F5

MULTI_STRAP_REF2_G N D

N14M-GE-S-A2-GP

CORE_PLLVDD

SCD1U16V2KX-3-LL-GP

SCD1U16V2KX-3-LL-GP

SC22U6D3V3MX-1-DL-GP

NEAR GPU

12

12

12

C485

C484

(G)

SCD1U16V2KX-3-LL-GP

12

C469

(G)

C483

(G)

(G)

SC22U6D3V3MX-1-DL-GP

SC4D7U6D3V3KX-LL-GP

12

12

C468

C467

(G)

(G)

+V_3P3_VGA

8

VCC

7

HOL D#

6

SCLK

5

C509

1 2

SCD1U16V2KX-3-LL-GP

(R)

13 OF 14

XTAL_OUTBUFF

XTAL_OUT

90DIFF_NET CLASS1

SC10P50V2JN-4-LL-GP

1A

2013.3.23 Julian
Follow vendor's suggestion

C10

B10

XTAL OU T

UNDER GPU

5

4

STRAP PIN MODE TABLE

PIN NAME

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SCLK
ROM_SI
ROM_SO

NOTE 2: See table 1 for the cor rect value/location of the str ap resistor for the desired modes

NOTE 3: Bring-up SKU(s) have jumper c onfigurable subvendor and DEVID_4 settings see the ROM_SCLK STRAP

BINARY BRINGUP

3GIO_PADCFG_LUT_ADR0
3GIO_PADCFG_LUT_ADR1
3GIO_PADCFG_LUT_ADR2
3GIO_PADCFG_LUT_ADR3
PCI_MAX_SPEED
SMB_ALT_ADDR
SUB_VENDOR
VGA_DEVICE

RAM_CFG Strap PCIE_MAX_SPEED Strap

SYS_PWRGD12,48

12

R621
10KR2F-2-GP

APU_PROCHOT#10,39,45

GPU_THERM_SHUT DOWN_N58

XTAL_OUTBUFF

(G)

12

C511

(G)

+V_3P3_VGA

12

12

R237

R234

10KR2F-2-GP(R)

10KR2F-2-GP(R)

STRAP0
STRAP1
STRAP2
STRAP3

12

12

R238

R231

10KR2F-2-GP(G)

10KR2F-2-GP(G)

RMA_CFG [3:0]
Samsung - K4W2G1646E-BC11 (1000MHz) [0101]
Micron - MT41J128M16JT-093G:K (1000MHz) [0001]

1A 0107 Allen modify

R728 0R2J-2-GP

1 2

(G)

(R)

GPU_THERM_SHUT DOWN_N_R

1 2

R590 0R2J-2-GP

(R)

1 2

R588 0R2J-2-GP

Q56

MMBT3904-4-GP

(G)

3

12

R221
10KR2F-2-GP(G)

12

R228
10KR2F-2-GP(R)

C

GPU_THERM_SHUT DOWN_N_1

B

E

12

R220
10KR2F-2-GP(G)

12

R219
10KR2F-2-GP(R)

12

C436
SC1KP50V2JN-2GP

(G78.10224.2FL)

MMBT3906-4-GP

(G)

R596
10KR2J-3-GP

Q59

(G)

+V_3P3_VGA

12

STRAP4

E

C

12

GPU_3D3V_S0_THERM_2

(G)

R598
33KR2J-3-GP

12

GPU_3D3V_S0_THERM

B

R603

(G)

12

R597
10KR2J-3-GP

+V_3P3_VGA

C475
SCD1U16V2KX-3DLGP

(G)

R602

(G)

1 2

2K2R2J-2-GP

GPU_THERM_SHUT DOWN_N_2

C447

12

SC1KP50V2KX-1GP

(G)

-1

2013.6.4
Julian

SUB_VENDOR Strap SMB_ALT_ADDR Strap VGA_DEVICE Strap

12

R240
10KR2F-2-GP(R)

12

R243
10KR2F-2-GP(G)

1 2

ROM_SI ROM_SCLK ROM_SO

+V_3P3_VGA

(G)

2K2R2J-2-GP

GPIO8_OVERT#

C

Q58

B

MMBT3904-4-GP

(G)

E

2

GPU_PLTRST

+V_3P3_VGA

12

12

S

R633
10KR2F-2-GP(R)

R249
10KR2F-2-GP(G)

D

Q61
2N7002K-2-GP

(G)

G

SC100P50V2JN-3GP

12

R627
10KR2F-2-GP(G)

R605

PLTRST_N_1A

12

PEX_RST_GPU 49

(G)

1KR2J-1-GP

12

C491

(G)

12

R260
10KR2F-2-GP(G)

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

GPU_Cedar/Caicos DP POWER

GPU_Cedar/Caicos DP POWER

GPU_Cedar/Caicos DP POWER

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

52 58Tuesday, April 15, 2014

52 58Tuesday, April 15, 2014

52 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

+V_1P05_VGA
+V_1P5_VGA
+V_3P3_VGA
+V_VGA_CORE

D D

C C

AD10

B B

AD7
B19

F11

V5
V6

G1
G2
G3
G4
G5
G6
G7

V1
V2

W1
W2
W3
W4

A A

-1

2013.6.4
Julian

(G071.0N15V.0B0U)

U36C

14/14 XVDD/VDD33

NC#AD10
NC#AD7
NC#B19

3V3AUX
NC#V5

NC#V6

CONFIGURABLE
POWER CHANNELS
* nc on substrate

NC#G1
NC#G2
NC#G3
NC#G4
NC#G5
NC#G6
NC#G7

NC#V1
NC#V2

NC#W1
NC#W2
NC#W3
NC#W4

N14M-GE-S-A2-GP

+V_1P5_VGA

SCD1U16V2KX-3-LL-GP

SC4D7U6D3V3KX-LL-GP

SC10U25V5KX-GP

12

(G)

12

(G)

12

+V_1P05_VGA 49,51,52,56
+V_1P5_VGA 51,54,56
+V_3P3_VGA 49,52,56,58
+V_VGA_CORE 58

PLACE NEAR BALLS

SCD1U16V2KX-3-LL-GP

12

C455

C476

C477

(G)

3 OF 14

VDD33
VDD33
VDD33
VDD33

12

(G)

C500

SC4D7U6D3V3KX-LL-GP

12

(G)

C131

SC22U6D3V5MX-2-LL-GP

12

C452

(G)

G10
G12
G8
G9

12

C507

C489

SC1U10V3KX-3DLGP

(G)

1A

2013.4.2
Julian
BOM change

(G)

SC1U10V3KX-3DLGP

PLACE NEAR BGA

3.3V 0.3MM

SCD1U16V2KX-3-LL-GP

SCD1U16V2KX-3-LL-GP

12

12

C493

C494

(G)

PLACE NEAR BALLS

** XPWR pins are configurable.

These pins are not connected on the substrate.
Therefore, XPWR pins can be assigned as needed,
to improve Top layer routing, power delivery.

SCD1U16V2KX-3-LL-GP

12

C499

(G)

(G)

U36D

B26
C25
E23
E26
F14

F21
G13
G14
G15
G16
G18
G19
G20
G21

H24

H26

J21

K21

L22

L24

L26
M2 1

N21

R21

T21

V21
W21

N14M-GE-S-A2-GP

4

(G071.0N15V.0B0U)

12/14 FBVDDQ

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

12

C496

SC1U10V3KX-3DLGP

(G)

PLACE NEAR BGA

SC4D7U6D3V3KX-LL-GP

4 OF 14

3V3_VDD33

12

C492

(G)

FB_CAL_PD_VDDQ

D22

FB_CAL_PU_GND

C24

FB_CAL_TERM_GND

B25

1A 0115 Allen modify

R606 0R0402-PAD-2-GP

+V_3P3_VGA

12

R611

R262

R261

(G64.40R25.6DL)

1 2

40D2R2F

1 2

(G)

42D2R2F-GP

1 2

51R2

(G63.51034.1DL)

+V_1P5_VGA

3

+V_VGA_CORE

SCD1U16V2KX-3-LL-GP

SC4D7U6D3V3KX-LL-GP

SC4D7U6D3V3KX-LL-GP

SC4D7U6D3V3KX-LL-GP

SC22U6D3V5MX-2-LL-GP

Optional caps PLACE NEAR BGA

PLACE UNDER GPU

12

C486

(G)

12

C472

(G)

12

C453

(G)

12

C474

(G)

12

C471

(G)

U36E

K10
K12
K14
K16
K18
L11
L13
L15
L17
M1 0
M1 2
M1 4
M1 6
M1 8
N11
N13
N15
N17
P10
P12
P14
P16
P18
R11
R13
R15
R17
T10
T12
T14
T16
T18
U11
U13
U15
U17
V10
V12
V14
V16
V18

N14M-GE-S-A2-GP

SCD1U16V2KX-3-LL-GP

12

C448

(G)

SC4D7U6D3V3KX-LL-GP

12

(G)

SC4D7U6D3V3KX-LL-GP

12

(G)

SC4D7U6D3V3KX-LL-GP

12

(G)

SC47U6D3V5MX-1-GP

12

(G071.0N15V.0B0U)

11/14 NVVDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

C473

C446

C487

C460

(G)

2

5 OF 14

(G071.0N15V.0B0U)

U36F

13/14 GND

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

1A

2013.3.27 Julian
Delete TC54

SC4D7U6D3V3KX-LL-GP

SCD1U16V2KX-3-LL-GP

SCD1U16V2KX-3-LL-GP

12

C459

(G)

SC4D7U6D3V3KX-LL-GP

SC4D7U6D3V3KX-LL-GP

12

C479

(G)

SC4D7U6D3V3KX-LL-GP

SC4D7U6D3V3KX-LL-GP

12

C458

(G)

SC4D7U6D3V3KX-LL-GP

SC4D7U6D3V3KX-LL-GP

12

C488

(G)

12

12

C501

(G)

12

(G)

12

(G)

12

(G)

C461

C454

C497

C481

(G)

SC4D7U6D3V3KX-LL-GP

12

C466

(G)

SC4D7U6D3V3KX-LL-GP

12

C464

(G)

SC4D7U6D3V3KX-LL-GP

12

C482

(G)

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M1 1

GND

N14M-GE-S-A2-GP

6 OF 14

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND

1

M1 3
M1 5
M1 7
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

AA7
AB7

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

GPU_Cedar/Caicos MEMORY

GPU_Cedar/Caicos MEMORY

GPU_Cedar/Caicos MEMORY

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

53 58Tuesday, April 15, 2014

53 58Tuesday, April 15, 2014

53 58Tuesday, April 15, 2014

A00

A00

A00

+V_1P5_VGA

Vinafix.com

+V_1P05_VGA

5

+V_1P5_VGA 51,53,56
+V_1P05_VGA 49,51,52,56

4

3

2

1

D D

C C

B B

A A

MDA[63..0]51

MAA[13..0]51

DQMA[7..0]51

QSA[7..0]51

QSA#[7..0]51

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12
MAA13

DQMA0

DQMA1

DQMA2

DQMA3

DQMA4

DQMA5

DQMA6

DQMA7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

DRAM_RST

DRAM_RST51

A_BA051
A_BA151
A_BA251

CLKA051
CLKA0#51
CKEA051

ODTA051

CSA0#_051

CLKA151
CLKA1#51
CKEA151

ODTA151
CSA1#_051

RASA#51
CASA#51
WEA#51

+V_1P5_VGA

12

R620

243R2F-2-GP

(G)

Should be
243 ohms +-1%

VREF

+V_1P5_VGA

12

(G)

12

(G)

+V_1P5_VGA

12

(G)

12

(G)

FBCLK Termination place on VRAM side

CLKA0

CLKA0#

CLKA1

CLKA1#

VREFD_U20
VREFC_U20
U35_ZQ

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12
MAA13

CLKA0#

DQMA1
DQMA0

WEA#
CASA#
RASA#

R612
4K99R2F-L-GP

R613
4K99R2F-L-GP

R263
4K99R2F-L-GP

R258
4K99R2F-L-GP

A_BA0
A_BA1
A_BA2

CLKA0

CKEA0

VREFC_U20

VREFD_U20

12

(G)

12

(G)

K8
K2
N1
R9
B2
D9
G7
R1
N9

A8
A1

C9
D2
E9
F1
H9
H2

H1
M8
L8

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7

K9

D3
E7

L3
K3
J3

21

C506
SCD1U10V2KX-5DLGP

(G)

21

C166
SCD1U10V2KX-5DLGP

(G)

1 2

R245

80D6R2F-L-GP

(R)

R244
162R2F-GP

1 2

R241

80D6R2F-L-GP

(R)

1 2

R194

80D6R2F-L-GP

(R)

R195
162R2F-GP

1 2

R198

80D6R2F-L-GP

(R)

U34

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQC1DQU3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VREFDQ
VREFCA
ZQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2

CK
CK#

CKE

DMU
DML

WE#
CAS#
RAS#

H5TQ1G63DFR-11C-GP

(G72.52G63.N0U)

CLKA0_AND

CLKA1_AND

72.42164.G0U 2Gb DDR3 128M*16 900MHz SDRAM FBGA96P Samsung- K4W2G1646E-BC11
0B41791AA 2Gb DDR3 128M*16 900MHz SDRAM FBGA96P Hynix- H5TQ2G63DFR-11C

E3

MDA2

DQL0

F7

MDA0

DQL1

F2

MDA3

DQL2

F8

MDA1

DQL3

H3

MDA7

DQL4

H8

MDA4

DQL5

G2

MDA5

DQL6

H7

MDA6

DQL7

D7

MDA11

DQU0

C3

MDA12

DQU1

C8

MDA15

DQU2

C2

MDA9

A7

MDA10

DQU4

A2

MDA8

DQU5

B8

MDA14

DQU6

A3

MDA13

DQU7

C7

QSA1

DQSU

B7

QSA#1

DQSU#

F3

QSA0

DQSL

G3

QSA#0

DQSL#

K1

ODTA0

ODT

CSA0#_0

L2

CS#

DRAM_RST

T2

RESET#

L9

NC#L9

L1

NC#L1

J9

NC#J9

J1

NC#J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1

VSSQ

F9

VSSQ

E8

VSSQ

E2

VSSQ

D8

VSSQ

D1

VSSQ

B9

VSSQ

B1

VSSQ

G9

VSSQ

C163

1 2

SCD01U25V2KX-3LLGP

(R)

C121

1 2

SCD01U25V2KX-3LLGP

(R)

CHANNEL A:1GB DDR3

Should be 243
Ohms +-1%

+V_1P5_VGA

+V_1P5_VGA

12

R235

243R2F-2-GP

(G)

+V_1P5_VGA

12

(G)

12

(G)

+V_1P5_VGA

12

(G)

12

(G)

K8
K2
N1
R9
B2
D9
G7
R1
N9

A8
A1

C9
D2
E9
F1
H9
H2

VREFD_U21

H1

VREFC_U21

M8

U15_ZQ

N3

MAA0

P7

MAA1

P3

MAA2

N2

MAA3

P8

MAA4

P2

MAA5

R8

MAA6

R2

MAA7

T8

MAA8

R3

MAA9

MAA10

R7

MAA11

N7

MAA12

T3

MAA13

T7
M7

A_BA0

M2

A_BA1

N8

A_BA2

M3

CLKA0

K7

CLKA0#

K9

CKEA0

D3

DQMA2 DQMA5

E7

DQMA3

WEA#

K3

CASA#
RASA#

R614
4K99R2F-L-GP

VREFC_U21

21

R618
4K99R2F-L-GP

C508
SCD1U10V2KX-5DLGP

(G)

R623
4K99R2F-L-GP

VREFD_U21

21

R624
4K99R2F-L-GP

C510
SCD1U10V2KX-5DLGP

(G)

U12

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQC1DQU3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VREFDQ
VREFCA

L8

ZQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

L7

A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2

J7

CK
CK#

CKE

DMU
DML

L3

WE#
CAS#

J3

RAS#

H5TQ1G63DFR-11C-GP

(G72.52G63.N0U)

RESET#

DQSU#

DQSL#

NC#L9
NC#L1

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2

DQU4
DQU5
DQU6
DQU7

DQSU

DQSL

ODT

CS#

NC#J9
NC#J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

MDA31

F7

MDA29

F2

MDA30

F8

MDA28

H3

MDA26

H8

MDA24

G2

MDA25

H7

MDA27

D7

MDA22

C3

MDA18

C8

MDA21

C2

MDA17

A7

MDA23

A2

MDA16

B8

MDA20

A3

MDA19

C7

QSA2

B7

QSA#2

F3

QSA3

G3

QSA#3

K1

ODTA0

CSA0#_0

L2

DRAM_RST

T2

L9
L1
J9
J1

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

G1
F9
E8
E2
D8
D1
B9
B1
G9

+V_1P5_VGA

+V_1P5_VGA

12

R208

243R2F-2-GP

(G)

Should be 243
Ohms +-1%

MDA0~7 (DQS0,DQS0#,DQM0)



MDA8~15 (DQS1,DQS1#,DQM1)



MDA16~23 (DQS2,DQS2#,DQM2)



MDA24~31 (DQS3,DQS3#,DQM3)



MDA32~39 (DQS4,DQS4#,DQM4)



MDA40~47 (DQS5,DQS5#,DQM5)



MDA48~55 (DQS6,DQS6#,DQM6)



MDA56~64 (DQS7,DQS7#,DQM7)



+V_1P5_VGA

12

R210
4K99R2F-L-GP

(G)

VREFC_U22

12

R205
4K99R2F-L-GP

(G)

+V_1P5_VGA

12

R191
4K99R2F-L-GP

(G)

VREFD_U22

12

R189
4K99R2F-L-GP

(G)

VREFD_U22
VREFC_U22
U36_ZQ

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12

MAA13

CLKA1
CLKA1#

CKEA1

DQMA6

DQMA7

WEA#
CASA#
RASA#

21

C123
SCD1U10V2KX-5DLGP

(G)

21

C120
SCD1U10V2KX-5DLGP

(G)

U10

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ
VDDQC1DQU3

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

A14

M7

A15

A_BA0

M2

BA0

A_BA1

N8

BA1

A_BA2

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ1G63DFR-11C-GP

(G72.52G63.N0U)

DQSU#

DQSL#

RESET#

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2
A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

C7

QSA6

DQSU

B7

QSA#6

F3

QSA7

DQSL

G3

QSA#7

K1

ODTA1

ODT

CSA1#_0

L2

CS#

DRAM_RST

T2

L9

NC#L9

L1

NC#L1

J9

NC#J9

J1

NC#J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1

VSSQ

F9

VSSQ

E8

VSSQ

E2

VSSQ

D8

VSSQ

D1

VSSQ

B9

VSSQ

B1

VSSQ

G9

VSSQ

+V_1P5_VGA+V_1P5_VGA

MDA62 MDA36
MDA57
MDA63
MDA58
MDA60
MDA59
MDA61
MDA56

+V_1P5_VGA

MDA51
MDA53
MDA50
MDA52
MDA48
MDA54
MDA49
MDA55

U19_ZQ

12

R587

243R2F-2-GP

(G)

Should be 243
Ohms +-1%

+V_1P5_VGA

12

R589
4K99R2F-L-GP

(G)

VREFC_U23

12

R592
4K99R2F-L-GP

(G)

+V_1P5_VGA

12

R196
4K99R2F-L-GP

(G)

VREFD_U23

12

R200
4K99R2F-L-GP

(G)

VREFD_U23
VREFC_U23

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12
MAA13

A_BA0
A_BA1
A_BA2

CLKA1
CLKA1#

CKEA1

DQMA4

WEA#
CASA#
RASA#

21

C432
SCD1U10V2KX-5DLGP

(G)

21

C124
SCD1U10V2KX-5DLGP

(G)

U32

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ
VDDQC1DQU3

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ1G63DFR-11C-GP

(G72.52G63.N0U)

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2
A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

C7

QSA5

DQSU

B7

QSA#5

DQSU#

F3

QSA4

DQSL

G3

QSA#4

DQSL#

K1

ODTA1

ODT

CSA1#_0

L2

CS#

DRAM_RST

T2

RESET#

L9

NC#L9

L1

NC#L1

J9

NC#J9

J1

NC#J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1

VSSQ

F9

VSSQ

E8

VSSQ

E2

VSSQ

D8

VSSQ

D1

VSSQ

B9

VSSQ

B1

VSSQ

G9

VSSQ

+V_1P5_VGA

21

21

+V_1P5_VGA +V_1P5_VGA

12

C135

C132

SCD1U10V2KX-5DLGP

SCD1U10V2KX-5DLGP

(G)

(G)

1105 Allen modify

(G)

(G)

(G)

C513

12

12

C171

C514

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

NEAR U6517 NEAR U45 NEAR U46 NEAR U4 7

MDA32

MDA39
MDA37
MDA34
MDA35
MDA38
MDA33

MDA44

MDA43

MDA46

MDA40

MDA45

MDA41

MDA47

MDA42

+V_1P5_VGA

21

21

(G)

12

12

C173

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C415
SCD1U10V2KX-5DLGP

(G)

(G)

12

C148

SC1U6D3V2KX-GP

(G)

C450

SC1U6D3V2KX-GP

C117
SCD1U10V2KX-5DLGP

+V_1P5_VGA

21

21

C136

C153

SCD1U10V2KX-5DLGP

SCD1U10V2KX-5DLGP

(G)

(G)

12

C152

(G)

+V_1P5_VGA

(G)

(G)

12

C156

SC1U6D3V2KX-GP

(G)

12

12

C169

C168

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+V_1P5_VGA

21

(G)

21

+V_1P5_VGA

(G)

(G)

(G)

12

12

12

C515

C516

C172

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C150
SCD1U10V2KX-5DLGP

(G)

(G)

12

C505

SC1U6D3V2KX-GP

C418
SCD1U10V2KX-5DLGP

(G)

12

SC1U6D3V2KX-GP

(G)

(G)

12

C498

C504

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

5

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

GPU_DDR3 64MX16

GPU_DDR3 64MX16

GPU_DDR3 64MX16

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

54 58Tuesday, April 15, 2014

54 58Tuesday, April 15, 2014

54 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

3.3V-->NVVDD&PEX_VDD(+V_VGA_CORE&+V_1P05_VGA)-->FBVDD/Q(+V_1P5_VGA)

D D

C C

B B

A A

5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

GPU_POWER Sequence

GPU_POWER Sequence

GPU_POWER Sequence

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

55 58Tuesday, April 15, 2014

55 58Tuesday, April 15, 2014

55 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

1D8V_S5
+V_1P05_VGA
+V_1P5_VGA
+V_3P3_VGA

VCC
VCC3

D D

C C

1D8V_S5 12,15,17,20,23,28,30,34,38,43,44,57
+V_1P05_VGA 49,51,52
+V_1P5_VGA 51,53,54
+V_3P3_VGA 49,52,53,58

VCC 23,24,25,35,38,39,42,46,58
VCC3 12,13,15,17,20,21,23,24,25,30,31,34,35,36,38,39,46

SB 0703 Eric modify

VCC3

SB 1126 Allen modify

SB 1108 Allen modify

R584

1 2

(G)

100KR2J-1-GP

V1P5_GPU

PR225

10KR2J-3-GP

(G)

+V_3P3_VGA

12

PR75

10KR2J-3-GP

(G)

SB 1108 Allen modify

3D3V_S0 to 3D3V_DELAY Transfer

R586

1 2

0R5J-5-GP (R)

Q54

C416

1 2

SCD1U10V2KX-4GP

(R)

PU7

1

GND

2

FB

3

VOUT
VOUT4VIN

APL5912-KAC-TRG-GP

AO3413L-GP

D S

G

VCNTL

(G84.03401.D31)

G

R585

1 2

(G)

100KR2J-1-GP

Q53

2N7002A-7-GP

(G84.2N702.J31)

S D

VCC

9

VIN

8

EN

7

POK

6
5

(G)

SB 1126 Allen modify

1P5V_GUP_FB_M

ALL_PWRGD_2

12

VCC3

PC57
SC1U16V3KX-2GP

(G)

+V_3P3_VGA

12

+1.5V_GPU_PG

12

PC151
SCD1U16V2KX-3DLGP

(G)

GPU_1D05V_PG

12

PC56
SCD1U16V2KX-3DLGP

(R)

+V_3P3_VGA

GPU_VCC3_CTL

12

(G)

C414

SCD068U16V2KX-DL-GP

Pd=(1.8-1.5)*3.3=0.99W

R1

R2

12

PC62
SC10U10V5KX-2DLGP

(G)

1P5V_GUP_FB_M1

12

(G)

PR78
88K7R2F-GP

12

(G)

PR77
100KR2F-L1-GP

1D8V_S5

12

PC63
SC10U10V5KX-2DLGP

(G)

PR79

1 2

(G)

10R2F-L-GP

12

PC68
SC27P50V2JN-2-GP

(G)

Vo(cal.)=1.5096V
Vo=0.8*(1+(R1/R2))

12

PC64
SC10U10V5KX-2DLGP

(G)

12

PC65
SC10U10V5KX-2DLGP

(G)

Iomax=3.3A

+V_1P5_VGA

12

PC66
SC10U10V5KX-2DLGP

(G)

12

PC67
SC10U10V5KX-2DLGP

(G)

Close to GPU DRAM

TC7
E820U2D5VM-7-GP

12

(R)

B B

GPU 1.05V

1D8V_S5

GPU_1D05V_FB

12

PC155
SC10U10V5KX-2DLGP

(G)

5
4
3
2
1

APL5930KAI-TRG-1-GP

VIN#5
VOUT#4

VCNTL

VOUT#3

POK
FB
GND

VIN#9

PU13

(G)

6
7
8

EN

9

1D8V_S5

Imax=1.6A

+V_1P05_VGA

PR230

1 2

0R0805-PAD

12

PC156

PR228

1 2

0R0805-PAD

A A

SC10U10V5KX-2DLGP

(G)

GPU_1D05V

12

PC158
SC10U10V5KX-2DLGP

Pd=(1.8-1.05)*1.6=1.2W

12

PC519

(R)

SC10U10V5KX-2DLGP

(G)

12

PC157

(R) SC100P50V2JN-3GP

12

PR231
3K16R2F-GP

R1

(G)

12

Vout =0.8*(1+R1/R2)=1.0528V

PR229
10KR2F-2-GP

R2

(G)

5

4

3

VCC

GPU_1D05V_PG
GPU_1D05V_EN

12

PC152
SC1U25V3KX-1-GP

(G)

SB 1126 Allen modify

1 2

0R0402-PAD

12

PC154

SCD1U16V2KX-3DLGP

(G)

2

+V_3P3_VGA

12

(R)

R583

PR227

47KR2J-2-GP

GPU_1D05V_VGA_EN 58

SB 1201 Allen modify

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

GPU_CTF/PPLAY/LDO

GPU_CTF/PPLAY/LDO

GPU_CTF/PPLAY/LDO

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

56 58Tuesday, April 15, 2014

56 58Tuesday, April 15, 2014

56 58Tuesday, April 15, 2014

A00

A00

A00

5

Vinafix.com

4

3

2

1

1D8V_S5

DCBATOUT

SB3V
SB5V
V_3P3_A

D D

1D8V_S5 12,15,17,20,23,28,30,34,38,43,44,56

DCBATOUT 38,39,40,41,42,43,45,46,47,58

SB3V 12,15,17,20,30,34,35,38,43,44,45,47,48
SB5V 27,31,35,38,39,41,42,43,44,45,47
V_3P3_A 12,20,23,35,38,40,46,47

1A 0109 Allen modify

R721

2K2R2J-2-GP

(R)

1D8V_S5

PU4

1

PGOOD

2

CS

3

EN

4

FB

5

RF

RT8237CZQW-2-GP

12

R720
4K7R2J-2-GP

(R)

12

C568
SC1U10V2KX-1DLGP

GND

BOOT

UGATE

PHASE

VCC

LGATE

11
10
9
8
7
6

1P8V_S5_PG

1P8V_PWR_BOOT
1P8V_PWR_UGATE
1P8V_PWR_PHASE

1P8V_PWR_LGATE

SB5V

12

PR48
2D2R5J-1-GP

1P8V_PWR_V5IN

12

PC33
SC1U16V3KX-5GP

84.00172.A37 SIR172ADP
Vgs @ 4.5V,
Id = 12.9A,
Rds(on) = 8.5~10.5mohm,

1P8V_PWR_UGATE

PR50
2D2R5J-1-GP

1P8V_PWR_BOOT_R

1 2

1P8V_PWR_LGATE

84.SRA12.037 SIRA12DP
Vgs @ 4.5V,
Id = 20A,
Rds(on) = 4.4~6.0mohm,

PR39
2D2R5J-1-GP

1P8V_PWR_UGAT E_R

1 2

PC34

1 2

SCD1U25V3KX-GP

SIR172ADP-T1-GE3-GP

12

R95
10KR2J-3-GP

PQ8
SIRA12DP-T1-GE3-GP

VIN RIPPLE CURRENT Imax=2.78A

PQ7

567

8

DDD

D

G

4

SSS

123

1.5uH, DCR=3.8~4.2mohm, Idc=16A, Isat=33A

567

8

DDD

D

G

4

SSS

123

1P8V_PWR_FB

VOUT=(1+R1/R2)*0.7
Vo(cal.)=1.806V

PL3
IND-1D5UH-52-GP

12

PC23
SC1500P50V3KX-GP

1P8V_PWR_SNB

12

PR41
2D2R5J-1-GP

PC28

12

SCD1U50V3KX-GP

1 2

PC41
SC22P50V2JN-L-GP

PC31

12

SC10U25V6KX-4DL-GP

12

(R)

R1

R2

12

PR59
15K8R2F-GP

12

PR58

10KR2F-2-GP

DCBATOUT_1D8V

1 2

PR46 0R0805-PAD

1 2

-

4

D

L

­G

P

1

E

8

2

3

V

5

K

X

-

4

G

P

PR47 0R0805-PAD

PTC9

2

0

U

2

D

5

V

M

-

7

­G

P

PC29

1

S

C

1

0

2

U

2

5

V

1

S

2

1.8V(RT8237C)
L=1.5uH

∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19 - 1.8)*1.8}/(19*1.5u*290K)=3.75A

PC32

1

S

C

1

0

2

U

2

5

V

6

K

X

-

4

D

L

PC22

C

1

U

1

6

V

6

K

­G

P

3

K

X

PC21

1

S

C

1

0

2

U

6

D

X

-

5

G

P

SANYO

09.8271N.A5L
820uF / 2.5V
ESR = 7mohm
RP = 5600mA
(105degreeC / 2000hrs)

DCBATOUT

Imax=9.5A,
IOCP>14.25A

1 2

PR36 0R0805-PAD

1 2

PR211 0R0805-PAD

1 2

PR212 0R0805-PAD

1 2

PR213 0R0805-PAD

1 2

PR37 0R0805-PAD

1 2

PR38 0R0805-PAD

1D8V_S51P8V_PWR1P8V_PWR

V_3P3_A

12

RSMRST_N12,23,38

R719
10KR2J-3-GP

(R)

C C

1P8V_PWR_EN44

12

PR57
62KR2F-GP

ROSC=46.4K ohm
IOCP>14.25A

B B

SB3V

U41

34

5

2
1

6

MBT3904DW1T1G-2-GP

(R)

1P8V_S5_PG
1P8V_PWR_CS
1P8V_PWR_EN
1P8V_PWR_FB
1P8V_PWR_RF

12

PR53
470KR2F-GP

PWM Frequency
setting

RF=470K ohm,
PWM Freq=290K Hz

12

(R)

R722
10KR2J-3-GP

1 2

A A

5

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

1

Hsichih, Taipei

57 58Tuesday, April 15, 2014

57 58Tuesday, April 15, 2014

57 58Tuesday, April 15, 2014

A00

A00

A00

Title

Title

Title

DC to DC_1D8V_TPS51363

DC to DC_1D8V_TPS51363

DC to DC_1D8V_TPS51363

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C
Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

+V_3P3_VGA

Vinafix.com

+V_VGA_CORE
DCBATOUT
VCC

5

+V_3P3_VGA 49,52,53,56
+V_VGA_CORE 53
DCBATOUT 38,39,40,41,42,43,45,46,47,57
VCC 23,24,25,35,38,39,42,46,56

4

3

2

1

DCBATOUT_VGA_CORE

SC10U25V6KX-4DL-GP

12

(G)

PC75

E820U2D5VM-7-GP

VDDC_PWR

12

PTC15

(G)

E820U2D5VM-7-GP

PR238 0R0805-PAD-2-GP-U
PR233 0R0805-PAD-2-GP-U
PR240 0R0805-PAD-2-GP-U
PR236 0R0805-PAD-2-GP-U

DCBATOUT_VGA_CORE

12

12

(G)

PC76

SC10U25V6KX-4DL-GP

(G)

PTC14

E820U2D5VM-7-GP

12

1 2

PR245 0R0805-PAD-2-GP-U

1 2

PR88 0R0805-PAD-2-GP-U

1 2

PR244 0R0805-PAD-2-GP-U

1 2

PR90 0R0805-PAD-2-GP-U

1 2

PR239 0R0805-PAD-2-GP-U

1 2

PR91 0R0805-PAD-2-GP-U

1 2

PR243 0R0805-PAD-2-GP-U

1 2

PR92 0R0805-PAD-2-GP-U

1 2

PR237 0R0805-PAD-2-GP-U

1 2

PR84 0R0805-PAD-2-GP-U

1 2

PR242 0R0805-PAD-2-GP-U

1 2

PR86 0R0805-PAD-2-GP-U

1 2

PR241 0R0805-PAD-2-GP-U

1 2

PR234 0R0805-PAD-2-GP-U

1 2

PR87 0R0805-PAD-2-GP-U

1 2

PR82 0R0805-PAD-2-GP-U

D D

84.00172.A37 SIR172ADP

2D2R5J-1-GP

(G)

SET OCP>51A

PR104

1 2

2D2R5J-1-GP

Vgs @ 10V, Id = 10A,
Rds(on) = 7~8.5 mohm,

84.SRA12.037 SIRA12DP
Vgs @ 4.5V, Id = 20A,
Rds(on) = 4.4~6.0mohm,

(G)

PWR_VGA_CORE_UGATE1_R

PC80

(G)

SCD1U50V3KX-GP

12

12

(G)

RR98
21KR2F-GP

(G)

PR85

1 2

SIR172ADP-T1-GE3-GP

12

R247
10KR2J-3-GP

(G)

SIR172ADP-T1-GE3-GP

PWR_VGA_CORE_UGATE2_R

12

(G)

R213
10KR2J-3-GP

SIRA12DP-T1-GE3-GP

PQ13

(G)

PQ15

SIRA12DP-T1-GE3-GP

(G)

PQ12

(G)

PQ9

PC70

(G)

SC22U6D3V6KX-2-GP

DCBATOUT_VGA_CORE

12

(G)

SC10U25V6KX-4DL-GP

SCD1U25V3KX-GP

12

(G)

PC79

SC22U6D3V6KX-2-GP

12

12

(G)

PC74

SC10U25V6KX-4DL-GP

(G)

12

PC72

SC22U6D3V6KX-2-GP

(G)

Iomax=33.5A
OCP>51A

VDDC_PWR

(G)

PTC11

12

(G)

PC73

SC10U25V6KX-4DL-GP

VDDC_PWR

VIN RIPPLE CURRENT Imax=4.9A

567

8

DDD

D

(G)

4

4

SIR172ADP-T1-GE3-GP

G

PWR_VGA_CORE_UGATE1_R

4

SSS

123

567

8

DDD

D

G

PWR_VGA_CORE_LGATE1

4

SSS

123

567

8

DDD

D

SIR172ADP-T1-GE3-GP

G

PWR_VGA_CORE_UGATE2_R

SSS

123

567

8

DDD

D

G

SSS

123

(R)

PQ14

(G)

PQ16

SIRA12DP-T1-GE3-GP

(R)

PQ11

(G)

PQ10

SIRA12DP-T1-GE3-GP

PWR_VGA_CORE_LGATE2

567

8

DDD

D

G

4

SSS

0.36uH,

123

DCR=1.05~1.20mohm,
Idc=30A

PL6

(G)

IND-D36UH-19-GP

1 2

(G)

(G)

PC78

12

PL5

1 2

PC83

12

(G)

12

PC71

(G)

PR100
2D2R5J-1-GP

1 2

567

8

DDD

D

G

4

NCP81172_PH1_SB

SSS

12

PC88
SC1500P50V3KX-GP

123

SCD1U25V3KX-GP

567

8

DDD

D

G

4

SSS

123

0.36uH,
DCR=1.05~1.20mohm,
Idc=30A

IND-D36UH-19-GP

(G)

567

8

DDD

D

PR80
2D2R5J-1-GP

1 2

G

4

SSS

123

NCP81172_PH2_SB

(G)

12

PC69
SC1500P50V3KX-GP

VCC

(G78.10521.5BL)

SC1U10V3KX-3GP

12

PC92

SCD1U16V2KX-3DLGP

(G)

(G)

12

(G)

PWR_VGA_CORE_VREF_2

12

PR114

(G)

PC93

PC87

12

12

12

(R)

12

PR105

(G)

2D2R5J-1-GP

12

NCP81172_VCC

PWR_VGA_CORE_EN
PWR_VGA_CORE_PSI
PWR_VGA_CORE_PGOOD
PWR_VGA_CORE_TALERT
PWR_VGA_CORE_VID

NCP81172_TSENSE

PWR_VGA_CORE_VREF
PWR_VGA_CORE_REFIN

PWR_VGA_CORE_REFADJ

PWR_VGA_CORE_TON

R265
27KR2D-GP

(G)

PC96
SC5600P50V3KX-GP

(G)

12

PR118
47KR2F-GP

(G)

PU8
NCP81172MNTXG-GP-U

15

VCC

25

GND

3

EN

4

PSI

16

PGOOD

14

TALERT#

5

VID

13

TSNS

8

VREF

7

REFIN

6

VIDBUF

9

FS

SET Fsw 400KHZ

(G)

NCP81172_PVCC

21

PVCC

22

PGND

PWR_VGA_CORE_UGATE1

2

HG1

PWR_VGA_CORE_BOOT1

1

BST1

PWR_VGA_CORE_PHASE1

24

PH1

PWR_VGA_CORE_LGATE1

23

LG1

PWR_VGA_CORE_UGATE2

17

HG2

PWR_VGA_CORE_BOOT2 PWR_VGA_CORE_BOOT2_1

18

BST2

PWR_VGA_CORE_PHASE2

19

PH2

PWR_VGA_CORE_LGATE2

20

LG2

NCP81172_FBRTN

10

FBRTN

NCP81172_FB

11

FB

NCP81172_COMP

12

COMP

R236

0R0402-PAD-2-GP

GPU_THER M_SHUTDO WN_N52

+V_3P3_VGA

GPIO13_NVVDD_PSI52

GPU_1D05V_VGA_EN56

+V_3P3_VGA

C C

B B

GPIO9_ALERT#52

GPIO11_PWM_VID52

12

R242

(G)

47KR2J-2-GP

1 2

R259

(G)

33KR2F-GP

1 2

R264

0R0402-PAD-2-GP

12

PR97

0R0402-PAD-2-GP

12

PR99

(G)

100KR2F-L1-GP

1 2

PR112

(G)

100KR2F-L1-GP

1 2

PR111

0R0402-PAD-2-GP

12

PR113

0R0402-PAD-2-GP

12

PC91

(R)

SC1000P50V3JN-GP-U

SB 1108 Allen modify

1 2

SC1U10V2KX-1GP

12

R250

(R)

15KR2F-GP

SCD01U25V2KX-L1-GP

Put colse to
VCORE hot spot

PR115
5K9R3F-3-GP

(G)

1 2

12

PC99
SCD1U16V2KX-3DLGP

(G)

C161

(G78.10520.5FL)

(R)

NTC-100K -8-GP

12

12

C162

12

PR83

(G)

12

R267
7K5R2F-1-GP

(G64.75015.6DLDL)

1 2

R266 0R2J-2-GP

PWR_VGA_CORE_VREF_1

1K74R2F-GP

PR116
6K2R2F-GP

SC5600P50V3KX-GP

PR124

82KR2F-1-GP

SC22P50V2JN-4GP

VCC

12

PR93
2D2R5J-1-GP

(G78.47520.5BL)

PC81

12

SC4D7U10V3KX-GP

PR119

0R0402-PAD-2-GP

NCP81172_COMP1

12

(G)

SC100P50V2JN-3GP

PC95

(G)

1 2

(G)

SC47P50V2JN-3GP

PWR_VGA_CORE_SENCE+_1

(G)

12

(G)

51R2F-2-GP

PC98

(G)

PR94

2D2R5J-1-GP

PWR_VGA_CORE_BOOT1_1

1 2

PR95

(G)

2D2R5J-1-GP

1 2

12

12

(G)

PR132

PC97

(G)

100R2F-L1-GP-U

PR121

1 2

12

PR120
10KR2F-2-GP

(G)

NCP81172_FB1

PR135

1 2

0R0402-PAD-2-GP

12

PWR_VGA_CORE_SENCE- 49
PWR_VGA_CORE_SENCE+ 49

PR133

12

100R2F-L1-GP-U

(G)

PC82
SCD1U50V3KX-GP

12

1 2
1 2
1 2
1 2

12

(G)

PC77

SC10U25V6KX-4DL-GP

(G)

PTC13

E820U2D5VM-7-GP

12

820uF/2.5V,
ESR=7mohm
Ripple current= 5000 mA

+V_VGA_CORE

DCBATOUT

PTC12

(G)

SE47U25VM-14-GP

47uF/25V,
ESR=30mohm,
Ripple Current=2800mA

0.9V(NCP81172)
L=0.36uH
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)

A A

5

4

3

∆I={(19 - 0.9)*0.9}/(19*0.36u*400K)=5.95A

2

<Variant Name>

<Variant Name>

<Variant Name>

T

T

Title

itle

itle

GPU_VDDC/MVDD

GPU_VDDC/MVDD

GPU_VDDC/MVDD

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Rosa_BayTrail_DT

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd

21F, 88, Hsin T ai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

58 58Tuesday, April 15, 2014

58 58Tuesday, April 15, 2014

58 58Tuesday, April 15, 2014

A00

A00

A00