Dell 1470, 1570 Schematics

1
14" &15.6" ULV + GS45 Block Diagram
A A
SMT LABEL P/NSMT LABEL P/N
FAN & Thermal EMC1423
PG 24
2
3
Rev: X01
4
5
http://hobi-elektronika.net
CULV
6
7
POWER
1.5VSUS & 0.75VTT (RT8207A) CHARGER (MAX8731A))
PG 32
CPU CORE(ADP3211A)
PG 31
RUN POWER SW
PG 33
AC/BATT CONNECTOR
PG 34
1.05_VCCP(OZ8116)
PG 29
PG 30
Power Button
8
PG 27
956P (FCBGA8)/10W
PG 3,4
CLOCK SLG8SP513V
800 MHz FSB
PG 15
DDR 3 SO-DIMM
PG 16,17
B B
DDR3 SO-DIMM
PG 16,17
DDR 3 800/1066
DDR 3 800/1066
NORTH BRIDGE
Cantiga-SFF GS 45
12W
PG 5,6,7,8,9,10
LVDS
RGB
LVDS + CCD CONN
CRT CONN
PG 19
PI3VDP411LSZDE
PG 28
HDMIPCIE
HDMI CONN.
PG 28
PG 18
DMI
RJ45/Magnetics
Giga LAN RTL8111DL
PCIE
PG 25PG 25
Half MINI-CARD
WLAN
PG 22
USB PCIE
SOUTH BRIDGE
ICH-9M SFF
C C
Card Reader CONN.
SD/MMC/SDHC
Daughter
Card Reader
RTS5159E
USB CONN x 1
Board 2
PG 26
D D
1
2
USB
USB
T/P Conn
PG 23
Keyboard
PG 23
PS2
17X8
3
PG 11,12,13,14
LPC
EC
ITE 8502
SPI
PG 20 PG 21
BIOS 2MB
4
USB
USB
USB PCIE
SATA
SATA
USB
HDA
USB CONN x 2
MINI-CARD
WWAN
HDD 2.5" Conn
ODD 2.5" Conn
Bluetooth Conn
SPK AMP
TPA6017A3
SPK Conn
5
Daughter Board 1
SYSTEM POWER
3V/5V (PM6686TR)
Audio Codec
ALC272
HP Jack MIC Jack
PG 26
6
SIM Card
PG 22
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Index & Power Status
Index & Power Status
Index & Power Status
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
136Tuesday, May 26, 2009
136Tuesday, May 26, 2009
136Tuesday, May 26, 2009
8
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1
Table of Contents
PAGE DESCRIPTION
Schematic Block Diagram
1
2
Front Page
CULV
3-4
Cantiga
A A
B B
5-10
11-14
ICH9-M
15
Clock Generator
DDR3 SO-DIMM
16-17
LCD/CCD
18
CRT
19
SIO(ITE8502)
20
21
FLASH/RTC
22
WLAN/SIM CONN.
23
TP/KB
24
FAN/THERMAL
25
LAN RTL8111+RJ45
IO BOARD CONN.
26
27
POWER SWITCH
28
HDMI
29
CHARGE MAX8731A
30
1.05VCCP
31
CPU_ADP3211A
32
1.5VSUS & 0.75VTT
33
Run Power Switch
34
DCin & Batt
35
SMBUS BLOCK
PAD&SCREW&SPRING
36
2
3
POWER PLANE
+PWR_SRC
+RTC_CELL
+3.3V_ALW
+5V_ALW
+15V_ALW
+3.3V_LAN
+5V_SUS
+3.3V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+1.25V_RUN
+1.05V_VCCP
+VCC_CORE
+LCDVCC
+5V_MOD
+5V_HDD
+5V_ALW2
4
http://hobi-elektronika.net
10V~+19V
+3.0V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.8V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
+1.25V
+1.05V
+0.7V~+1.5V
+3.3V
+5V
+5V
4,26,32,34,48,49,50,51,52,55
11,14,31,32
3,13,26,31,32,34,36,37,38,44,46,49,52,53,54
35,36,46,48,49,52,53,54
26,36,37,52,53
42,43
14,38,50,51,53
3,11,12,13,14,20,30,37,38,43,48,49,50,51,53
6,8,9,15,48,49,50,53,55
16,49,53
14,20,25,27,36,37,38,39,40,41,53
6,8,9,11,12,13,14,15,17,19,20,22,25,26,27,28, 30,33,34,36,38,39,40,41,42,53,55
19,20,21,22,23,24,25,38,53
4,9,14,30,33,34,48,,53,55
6,9,14,49,53
3,4,5,6,8,9,11,14,37,48,55
4,51
26
36
36
5
Power States
37,38.52,53 LED power source+5V
6
DESCRIPTION
MAIN POWER
RTC
8051 POWER
LCD/CHARGE POWER
LARGE POWER
LAN POWER
SLP_S5# CTRLD POWER
SLP_S5# CTRLD POWER
SODIMM POWER
SODIMM POWER
SLP_S3# CTRLD POWER
SLP_S3# CTRLD POWER
SDVO POWER
CALISTOGA/ICH8 POWER
CALISTOGA/ICH8 POWER
CPU/CALISTOGA/ICH8 POWER
CPU CORE POWER
LCD Power
Module Power
HDD Power
7
CONTROL SIGNAL
ALWON
ALWON
+5V_ALW
AUX_ON
SUS_ON
3.3V_SUS_ON
DDR_ON
0.9V_DDR_VTT_ON
RUN_ON
3.3V_RUN_ON
RUN_ON
1.5V_RUN_ON
1.25V_RUN_ON
1.05V_RUN_ON
IMVP_VR_ON
LCDVCC_TST_EN & ENVDD
MODC_EN#
HDDC_EN#
LDO output
8
ACTIVE INVOLTAGE PAGE
S0~S5
S0~S5
S0~S5
S0~S5
S0~S5
C C
GND PLANE PAGE
8731AGND
AGND_0.9V
AGND_DC/DC
AGND_DC2
AGND_DDR
AGND_ISL6260
GND
D D
1
2
3
46
49
52
48
49
51
ALL
4
DESCRIPTION
5
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
Index & Power Status
Index & Power Status
Index & Power Status
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
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236Tuesday, May 26, 2009
236Tuesday, May 26, 2009
236Tuesday, May 26, 2009
8
1
2
3
4
5
6
7
8
http://hobi-elektronika.net
H_A#[3..35](5)
A A
H_ADSTB#0(5)
H_REQ#0(5) H_REQ#1(5) H_REQ#2(5) H_REQ#3(5) H_REQ#4(5)
H_A#[3..35](5)
B B
H_ADSTB#1(5)
H_A20M#(11)
H_FERR#(11)
H_IGNNE#(11)
H_STPCLK#(11)
H_INTR(11) H_NMI(11) H_SMI#(11)
C C
H_A#[3..35]
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_A#[3..35]
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
U1A
U1A
P2 V4
W1
T4 AA1 AB4
T2 AC5 AD2 AD4 AA5 AE5 AB2 AC1
Y4
R1 R5 U1
P4
W5
AN1 AK4 AG1 AT4 AK2 AT2 AH2 AF4
AJ5 AH4 AM4 AP4 AR5
AJ1
AL1 AM2 AU5 AP2 AR1 AN5
C7 D4
F10
F8 C9 C5
E5
V2
Y2
AG5
AL5
J9
F4 H8
Penryn_SFF_1p0
Penryn_SFF_1p0
A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD01 RSVD02 RSVD03 RSVD04 RSVD05 RSVD06 RSVD07
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
CONTROL
CONTROL
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
ADS# BNR# BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY#
PREQ#
TCK
TDO TMS
TRST#
DBR#
BCLK[0] BCLK[1]
M4 J5 L5
N5 F38 J1
M2
B40 D8
N1
G5 K2 H4 K4 L1
H2 F2
AY8 BA7 BA5 AY2 AV10 AV2 AV4 AW7
TDI
AU1 AW5 AV8 J7
D38 BB34 BD34
B10
A35 C35
RESERVED
RESERVED
R1 56R1 56
1 2
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET#
R3 56R3 56
12
T1 PADT1 PAD
H_ADS# (5) H_BNR# (5)
H_BPRI# (5)
H_DEFER# (5) H_DRDY# (5) H_DBSY# (5)
H_BR0# (5)
+1.05V_VCCP
H_INIT# (11)
H_LOCK# (5)
H_RESET# (5)
H_RS#0 (5)
H_RS#1 (5)
H_RS#2 (5)
H_TRDY# (5)
H_HIT# (5) H_HITM# (5)
T2 PADT2 PAD T3 PADT3 PAD T4 PADT4 PAD T5 PADT5 PAD T6 PADT6 PAD T7 PADT7 PAD
T97 PADT97 PAD
+1.05V_VCCP
H_THERMDA (24)
H_THERMDC (24)
H_THERMTRIP# (6,11)
CLK_CPU_BCLK (15)
CLK_CPU_BCLK# (15)
AJSLB5VVT01 CPU(956P)SU9400 1.4G SLB5V(BGA)WIN B/S
AJSLGFMTT03 CPU(956P)SU3500 1.4G SLGFM(BGA)WIN BSQ
AJSLGS8VT03 CPU(956P)SU2700 1.3G SLGS8(BGA)WIN BSQ
Layout Note: Place voltage divider within
0.5" of GTLREF pin
+1.05V_VCCP
R4 1K/FR41K/F
1 2
12
R8 2K/FR82K/F
H_D#[0..63](5)
H_DSTBN#0(5) H_DSTBP#0(5) H_DINV#0(5)
H_D#[0..63](5)
H_DSTBN#1(5) H_DSTBP#1(5) H_DINV#1(5)
CPU_MCH_BSEL0(6,15) CPU_MCH_BSEL1(6,15) CPU_MCH_BSEL2(6,15)
H_D#[0..63] H_D#[0..63]
H_D#[0..63]
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
V_CPU_GTLREF
CPU_TEST3
CPU_TEST5 CPU_TEST6
G43 E43
H40 H44 G39 E41
K44 N41
M40 G41 M44
K40
P40
P44 V40 V44
AB44
R41
W41
N43
U41 AA41 AB40 AD40 AC41 AA43
U43
W43
R43
AW43
E37
D40
C43 AE41 AY10 AC43
A37
C37
B38
F40
J43
L41
T40
L43
J41
Y40 Y44 T44
U1B
U1B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
BSEL[0] BSEL[1] BSEL[2]
Penryn_SFF_1p0
Penryn_SFF_1p0
D[32]# D[33]# D[34]#
DATA GROUP 0 DATA GROUP 1
DATA GROUP 0 DATA GROUP 1
D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#
DATA GROUP 2DATA GROUP 3
DATA GROUP 2DATA GROUP 3
D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]#
COMP[0]
MISC
MISC
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
T10PAD T10PAD T11PAD T11PAD T12PAD T12PAD
For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.
AR43 AH40 AF40 AJ43 AG41 AF44 AH44 AM44 AN43 AM40 AK40 AG43 AP40 AN41 AL41 AK44 AL43 AJ41
AV38 AT44 AV40 AU41 AW41 AR41 BA37 BB38 AY36 AT40 BC35 BC39 BA41 BB40 BA35 AU43 AY40 AY38 BC37
AE43 AD44 AE1 AF2
G7 B8 C41 E7 D10 BD10
H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0
R5 27.4/FR5 27.4/F
COMP1
R7 54.9/FR7 54.9/F
COMP2
R10 27.4/FR10 27.4/F
COMP3
R11 54.9/FR11 54.9/F
H_CPUSLP# (5)
CPU_TEST3 CPU_TEST5 CPU_TEST6
H_D#[0..63]
H_DPRSTP# (6,11) H_DPSLP# (11)
H_D#32
AP44
12 12 12 12
T9PAD T9PAD
H_D#[0..63] (5)
H_DSTBN#2 (5) H_DSTBP#2 (5) H_DINV#2 (5)
H_D#[0..63] (5)
H_DSTBN#3 (5) H_DSTBP#3 (5) H_DINV#3 (5)
H_DPWR# (5) H_PWRGOOD (11)
T8PAD T8PAD
ITP_BPM#5
ITP_TDO
ITP_TMS
ITP_TDI
D D
R16 56R16 56
R1756R17
1
R12 56R12 56
R13 *56_NCR13 *56_NC
R14 56R14 56
R15 56R15 56
1 2
1 2
56
1 2
1 2
1 2
1 2
ITP_TCK
ITP_TRST#
+1.05V_VCCP
Layout Note: Place R12~R17 close to CPU
2
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
4
5
6
Date: Sheet
Penryn (HOST BUS)
Penryn (HOST BUS)
Penryn (HOST BUS)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
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336Tuesday, May 26, 2009
336Tuesday, May 26, 2009
336Tuesday, May 26, 2009
8
1
+VCC_CORE
A A
C4
C10
C10 *10U/0805_NC
*10U/0805_NC
805
805 10
10
C13
C13 *10U/0805_NC
*10U/0805_NC
805
805 10
10
C16
C16 *10U/0805_NC
*10U/0805_NC
805
805 10
10
C47
C47
1U/6.3V
1U/6.3V
C24
C24
1U/6.3V
1U/6.3V
C37
C37
1U/6.3V
1U/6.3V
1
C48
C48
1U/6.3V
1U/6.3V
C25
C25
1U/6.3V
1U/6.3V
C38
C38
1U/6.3V
1U/6.3V
C4 10U/0805
10U/0805
805
805 10
10
C9
C9 10U/0805
10U/0805
805
805 10
10
C17
C17 10U/0805
10U/0805
805
805 10
10
C49
C49
1U/6.3V
1U/6.3V
C26
C26
1U/6.3V
1U/6.3V
C39
C39
1U/6.3V
1U/6.3V
C50
C50
1U/6.3V
1U/6.3V
C3
C3 10U/0805
10U/0805
805
805 10
10
+VCC_CORE
C12
C12 10U/0805
10U/0805
805
805 10
10
+VCC_CORE
C6
C6 10U/0805
10U/0805
805
805 10
10
B B
+VCC_CORE
C23
C23
C21
C21
C22
C22
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
+VCC_CORE
C36
C36
C35
C35
C34
C34
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
C C
+1.05V_VCCP
C46
C46
C45
C45
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
D D
C11
C11 10U/0805
10U/0805
805
805 10
10
C14
C14 10U/0805
10U/0805
805
805 10
10
C7
C7 10U/0805
10U/0805
805
805 10
10
C27
C27
1U/6.3V
1U/6.3V
C40
C40
1U/6.3V
1U/6.3V
C51
C51
1U/6.3V
1U/6.3V
C28
C28
1U/6.3V
1U/6.3V
C41
C41
1U/6.3V
1U/6.3V
C52
C52
1U/6.3V
1U/6.3V
C5
C5 10U/0805
10U/0805
805
805 10
10
C15
C15 10U/0805
10U/0805
805
805 10
10
C18
C18 10U/0805
10U/0805
805
805 10
10
C29
C29
1U/6.3V
1U/6.3V
C42
C42
1U/6.3V
1U/6.3V
C53
C53
1U/6.3V
1U/6.3V
C30
C30
1U/6.3V
1U/6.3V
C43
C43
1U/6.3V
1U/6.3V
C54
C54
1U/6.3V
1U/6.3V
C31
C31
1U/6.3V
1U/6.3V
C44
C44
1U/6.3V
1U/6.3V
2
+VCC_CORE +VCC_CORE
C33
C33
C32
C32
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
C55
C55
C56
C56
1U/6.3V
1U/6.3V
1U/6.3V
1U/6.3V
2
AA33 AB32 AC33 AD32 AE33 AF32 AG33 AH32 AJ33 AK32 AL33 AM32 AN33 AP32 AR33 AT34 AT32 AU33 AV32 AY32 BB32 BD32
AB30
F32 G33 H32 J33 K32
L33 M32 N33 P32 R33
T32 U33 V32 W33 Y32
B28 B30 B26 D28 D30
F30
F28 H30 H28 D26
F26 H26 K30 K28 M30 M28 K26 M26 P30 P28
T30
T28 V30 V28 P26
T26 V26 Y30 Y28
U1C
U1C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
Penryn_SFF_1p0
Penryn_SFF_1p0
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP_001 VCCP_002 VCCP_003 VCCP_004 VCCP_005 VCCP_006 VCCP_007 VCCP_008 VCCP_009 VCCP_010 VCCP_011 VCCP_012 VCCP_013 VCCP_014 VCCP_015 VCCP_016
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE
VSSSENSE
AB28 AD30 AD28 Y26 AB26 AD26 AF30 AF28 AH30 AH28 AF26 AH26 AK30 AK28 AM30 AM28 AP30 AP28 AK26 AM26 AP26 AT30 AT28 AV30 AV28 AY30 AY28 AT26 AV26 AY26 BB30 BB28 BD30
J11 E11 G11 J37 K38 L37 N37 P38 R37 U37 V38 W37 AA37 AB38 AC37 AE37
B34 D34
BD8 BC7 BB10 BB8 BC5 BB4 AY4
BD12
BC13
3
http://hobi-elektronika.net
+1.05V_VCCP
C8
C8
+
+
220U
220U
2.5
2.5 7343
7343
VID0 (31) VID1 (31) VID2 (31) VID3 (31) VID4 (31) VID5 (31) VID6 (31)
3
+VCC_CORE
4
+1.5V_RUN
12
C19
C19
0.01U/25V
0.01U/25V
C20
C20 10U/6.3V/6
12
R18
R18 100/F
100/F
12
R19
R19 100/F
100/F
4
10U/6.3V/6
VCCSENSE (31)
VSSSENSE (31)
5
+VCC_CORE
U1F
U1F
BD28
VCC_101
BB26
VCC_102
BD26
VCC_103
B22
VCC_104
B24
VCC_105
D22
VCC_106
D24
VCC_107
F24
VCC_108
F22
VCC_109
H24
VCC_110
H22
VCC_111
K24
VCC_112
K22
VCC_113
M24
VCC_114
M22
VCC_115
P24
VCC_116
P22
VCC_117
T24
VCC_118
T22
VCC_119
V24
VCC_120
V22
VCC_121
Y24
VCC_122
Y22
VCC_123
AB24
VCC_124
AB22
VCC_125
AD24
VCC_126
AD22
VCC_127
AF24
VCC_128
AF22
VCC_129
AH24
VCC_130
AH22
VCC_131
AK24
VCC_132
AK22
VCC_133
AM24
VCC_134
AM22
VCC_135
AP24
VCC_136
AP22
VCC_137
AT24
VCC_138
AT22
VCC_139
AV24
VCC_140
AV22
VCC_141
AY24
VCC_142
AY22
VCC_143
BB24
VCC_144
BB22
VCC_145
BD24
VCC_146
BD22
VCC_147
B16
VCC_148
B18
VCC_149
B20
VCC_150
D16
VCC_151
D18
VCC_152
F18
VCC_153
F16
VCC_154
H18
VCC_155
H16
VCC_156
D20
VCC_157
F20
VCC_158
H20
VCC_159
K18
VCC_160
K16
VCC_161
M18
VCC_162
M16
VCC_163
K20
VCC_164
M20
VCC_165
P18
VCC_166
P16
VCC_167
T18
VCC_168
T16
VCC_169
V18
VCC_170
V16
VCC_171
P20
VCC_172
T20
VCC_173
V20
VCC_174
Y18
VCC_175
Y16
VCC_176
AB18
VCC_177
AB16
VCC_178
AD18
VCC_179
AD16
VCC_180
Y20
VCC_181
AB20
VCC_182
AD20
VCC_183
AF18
VCC_184
AF16
VCC_185
AH18
VCC_186
AH16
VCC_187
AF20
VCC_188
AH20
VCC_189
AK18
VCC_190
AK16
VCC_191
AM18
VCC_192
AM16
VCC_193
AP18
VCC_194
AP16
VCC_195
AK20
VCC_196
AM20
VCC_197
AP20
VCC_198
AT18
VCC_199
AT16
VCC_200
AV18
VCC_201
AV16
VCC_202
AY18
VCC_203
AY16
VCC_204
AT20
VCC_205
AV20
VCC_206
AY20
VCC_207
BB18
VCC_208
BB16
VCC_209
BD18
VCC_210
BD16
VCC_211
BB20
VCC_212
BD20
VCC_213
AM14
VCC_214
AP14
VCC_215
AT14
VCC_216
AV14
VCC_217
AY14
+1.05V_VCCP
5
BB14 BD14
AF38 AG37
AK38
AJ37
VCC_218 VCC_219 VCC_220
VCCP_017 VCCP_018 VCCP_019 VCCP_020
Penryn_SFF_1p0
Penryn_SFF_1p0
VCCP_021 VCCP_022 VCCP_023 VCCP_024 VCCP_025 VCCP_026 VCCP_027 VCCP_028 VCCP_029 VCCP_030 VCCP_031 VCCP_032 VCCP_033 VCCP_034 VCCP_035 VCCP_036 VCCP_037 VCCP_038 VCCP_039 VCCP_040 VCCP_041 VCCP_042 VCCP_043 VCCP_044 VCCP_045 VCCP_046 VCCP_047 VCCP_048 VCCP_049 VCCP_050 VCCP_051 VCCP_052 VCCP_053 VCCP_054 VCCP_055 VCCP_056 VCCP_057 VCCP_058 VCCP_059 VCCP_060 VCCP_061 VCCP_062 VCCP_063 VCCP_064 VCCP_065 VCCP_066 VCCP_067 VCCP_068 VCCP_069 VCCP_070 VCCP_071 VCCP_072 VCCP_073 VCCP_074 VCCP_075 VCCP_076 VCCP_077 VCCP_078 VCCP_079 VCCP_080 VCCP_081 VCCP_082 VCCP_083 VCCP_084 VCCP_085 VCCP_086 VCCP_087 VCCP_088 VCCP_089 VCCP_090 VCCP_091 VCCP_092 VCCP_093 VCCP_094 VCCP_095 VCCP_096 VCCP_097 VCCP_098 VCCP_099 VCCP_100 VCCP_101 VCCP_102 VCCP_103 VCCP_104 VCCP_105 VCCP_106 VCCP_107 VCCP_108 VCCP_109 VCCP_110 VCCP_111 VCCP_112 VCCP_113 VCCP_114 VCCP_115 VCCP_116 VCCP_117 VCCP_118 VCCP_119 VCCP_120 VCCP_121 VCCP_122 VCCP_123 VCCP_124 VCCP_125 VCCP_126 VCCP_127 VCCP_128 VCCP_129 VCCP_130 VCCP_131 VCCP_132 VCCP_133 VCCP_134 VCCP_135 VCCP_136 VCCP_137 VCCP_138 VCCP_139 VCCP_140 VCCP_141 VCCP_142 VCCP_143 VCCP_144 VCCP_145
6
+1.05V_VCCP
AL37 AN37 AP38 B32 C33 D32 E35 E33 F34 G35 F36 H36 J35 L35 N35 K36 R35 U35 P36 V36 W35 AA35 AC35 AB36 AE35 AG35 AJ35 AF36 AL35 AN35 AK36 AP36 B12 B14 C13 D12 D14 E13 F14 F12 G13 H14 H12 J13 K14 K12 L13 L11 M14 N13 N11 K10 P14 P12 R13 R11 T14 U13 U11 V14 V12 W13 W11 P10 V10 Y14 AA13 AA11 AB14 AB12 AC13 AC11 AD14 AB10 AE13 AE11 AF14 AF12 AG13 AG11 AH14 AJ13 AJ11 AF10 AK14 AK12 AL13 AL11 AN13 AN11 AP12 AR13 AR11 AK10 AP10 AU13 AU11 L9 L7 N9 N7 R9 R7 U9 U7 W9 W7 AA9 AA7 AC9 AC7 AE9 AE7 AG9 AG7 AJ9 AJ7 AL9 AL7 AN9 AN7 AR9 AR7 A33 A13
6
AW25 AW23 AW21
AG19 AG17
AW19 AW17
AA25 AA23 AA21 AC25 AC23 AC21 AE25 AE23 AE21 AG25 AG23 AG21 AJ25 AJ23 AJ21 AL25 AL23 AL21 AN25 AN23 AN21 AR25 AR23 AR21 AU25 AU23 AU21
BA25 BA23 BA21 BC25 BC23 BC21
AA19 AA17 AC19 AC17 AE19 AE17
AJ19 AJ17 AL19 AL17 AN19 AN17 AR19 AR17 AU19 AU17
BA19 BA17 BC19 BC17
AD12
G25 G23 G21
W25 W23 W21
G19 G17
W19 W17
G15
M12
M10
W15
J25 J23 J21 L25 L23
L21 N25 N23 N21 R25 R23 R21 U25 U23 U21
C17 C19 E19 E17
J19
J17 L19 L17 N19 N17 R19 R17 U19 U17
C11 C15 E15
H10
J15 L15 N15
T12 R15 U15
T10 Y12
U1E
U1E
VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279
Penryn_SFF_1p0
Penryn_SFF_1p0
VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 VSS_361 VSS_362 VSS_363 VSS_364 VSS_365 VSS_366 VSS_367 VSS_368 VSS_369 VSS_370 VSS_371 VSS_372 VSS_373 VSS_374 VSS_375 VSS_376 VSS_377 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382 VSS_383 VSS_384 VSS_385 VSS_386 VSS_387 VSS_388 VSS_389 VSS_390 VSS_391 VSS_392 VSS_393 VSS_394 VSS_395
7
AA15 AC15 Y10 AD10 AH12 AE15 AG15 AJ15 AH10 AM12 AL15 AN15 AR15 AM10 AT12 AV12 AW13 AW11 AY12 AU15 AW15 AT10 BA13 BA11 BB12 BC11 BA15 BC15 B6 D6 E9 F6 G9 H6 K8 K6 M8 M6 P8 P6 T8 T6 V8 V6 U5 Y8 Y6 AB8 AB6 AD8 AD6 AF8 AF6 AH8 AH6 AK8 AK6 AM8 AM6 AP8 AP6 AT8 AT6 AU9 AV6 AU7 AW9 AY6 BA9 BB6 BC9 BD6 B4 C3 E3 G3 J3 L3 N3 R3 U3 W3 AA3 AC3 AE3 AG3 AJ3 AL3 AN3 AR3 AU3 AW3 BA3 BC3 D2 E1 G1 AW1 BA1 BB2 A41 A39 A29 A27 A31 A25 A23 A21 A19 A17 A11 A15 A7 A5 A9 BD4
Title
Title
Title
Penryn (POWER/NC)
Penryn (POWER/NC)
Penryn (POWER/NC)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
U1D
U1D
B42
VSS[001]
F44
VSS[002]
D44
VSS[003]
D42
VSS[004]
F42
VSS[005]
H42
VSS[006]
K42
VSS[007]
M42
VSS[008]
P42
VSS[009]
T42
VSS[010]
V42
VSS[011]
Y42
VSS[012]
AB42
VSS[013]
AD42
VSS[014]
AF42
VSS[015]
AH42
VSS[016]
AK42
VSS[017]
AM42
VSS[018]
AP42
VSS[019]
AY44
VSS[020]
AV44
VSS[021]
AT42
VSS[022]
AV42
VSS[023]
AY42
VSS[024]
BA43
VSS[025]
BB42
VSS[026]
C39
VSS[027]
E39
VSS[028]
G37
VSS[029]
H38
VSS[030]
J39
VSS[031]
L39
VSS[032]
M38
VSS[033]
N39
VSS[034]
R39
VSS[035]
T38
VSS[036]
U39
VSS[037]
W39
VSS[038]
Y38
VSS[039]
AA39
VSS[040]
AC39
VSS[041]
AD38
VSS[042]
AE39
VSS[043]
AG39
VSS[044]
AH38
VSS[045]
AJ39
VSS[046]
AL39
VSS[047]
AM38
VSS[048]
AN39
VSS[049]
AR39
VSS[050]
AR37
VSS[051]
AT38
VSS[052]
AU39
VSS[053]
AU37
VSS[054]
AW39
VSS[055]
AW37
VSS[056]
BA39
VSS[057]
BC41
VSS[058]
BD40
VSS[059]
BD38
VSS[060]
B36
VSS[061]
H34
VSS[062]
D36
VSS[063]
K34
VSS[064]
M34
VSS[065]
M36
VSS[066]
P34
VSS[067]
T34
VSS[068]
V34
VSS[069]
T36
VSS[070]
Y34
VSS[071]
AB34
VSS[072]
AD34
VSS[073]
Y36
VSS[074]
AD36
VSS[075]
AF34
VSS[076]
AH34
VSS[077]
AH36
VSS[078]
AK34
VSS[079]
AM34
VSS[080]
AP34
VSS[081]
Penryn_SFF_1p0
Penryn_SFF_1p0
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]
8
AM36 AR35 AU35 AV34 AW35 AW33 AY34 AT36 AV36 BA33 BC33 BB36 BD36 C27 C29 C31 E29 E27 G29 G27 E31 G31 J29 J27 L29 L27 N29 N27 J31 L31 N31 R29 R27 U29 U27 R31 U31 W29 W27 W31 AA29 AA27 AC29 AC27 AA31 AC31 AE29 AE27 AG29 AG27 AJ29 AJ27 AE31 AG31 AJ31 AL29 AL27 AN29 AN27 AL31 AN31 AR29 AR27 AR31 AU29 AU27 AW29 AW27 AU31 AW31 BA29 BA27 BC29 BC27 BA31 BC31 C21 C23 C25 E25 E23 E21
436Tuesday, May 26, 2009
436Tuesday, May 26, 2009
436Tuesday, May 26, 2009
8
1
A A
+1.05V_VCCP
12
R20
R20 221/F
221/F
H_RCOMP
C57
C57
0.1U/10V
0.1U/10V
1 2
10
10
H_SWING
+1.05V_VCCP
12
R21
R21 100/F
100/F
B B
R22
R22
24.9/F
24.9/F
Layout Note:
1 2
H_RCOMP trace should be 10-mil wide with 20-mil spacing.
C C
2
H_D#[0..63](3)
R23
R23 1K/F
1K/F
1 2
12
R24
R24 2K/F
2K/F
H_D#[0..63]
T13 PADT1 3 PAD
H_RESET#(3) H_CPUSLP#(3)
H_AVREF
12
C58
C58
0.1U
0.1U
402
402 16
16
Layout Note: Place the 0.1 uF decoupling capacitor within 100 mils from GMCH pins.
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
3
L11
K10 K12
M10
N11
P10
V10
W11
U11
AC11
AC9
Y10 AB6 AA9
AB10
AA1 AC3 AC7
AD12
AB4
AD10 AA11
AB2 AD4 AE7 AD2 AD6 AE3
AG9 AG7
AE11
AK6 AF6
AJ9 AH6
AF12
AH4
AJ7 AE9
J11
L17
K18
J7
H6
J3 H4 G3
L1
M6
L7 K6 M4 K4 P6
W9
V6 V2
W7
N9 P4 U9 V4 U1
W3
U7
Y4
Y6
B6 D4
G9
U2A
U2A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_SWING H_RCOMP
H_CPURST# H_CPUSLP#
H_AVREF H_DVREF
CANTIGASFF_1p0
CANTIGASFF_1p0
4
http://hobi-elektronika.net
HOST
HOST
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
L15 B14 C15 D12 F14 G17 B12 J15 D16 C17 D14 K16 F16 B16 C21 D18 J19 J21 B18 D22 G19 J17 L21 L19 G21 D20 K22 F18 K20 F20 F22 B20 A19
F10 A15 C19 C9 B8 C11 E5 D6 AH10 AJ11 G11 H2 C7 F8 A11 D8
L9 N7 AA7 AG3
K2 N3 AA3 AF4
L3 M2 Y2 AF2
J13 L13 C13 G13 G15
F4 F2 G7
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
5
H_A#[3..35]
H_ADS# (3) H_ADSTB#0 (3) H_ADSTB#1 (3) H_BNR# (3)
H_BPRI# (3)
H_BR0# (3)
H_DEFER# (3)
H_DBSY# (3)
CLK_MCH_BCLK (15)
CLK_MCH_BCLK# (15) H_DPWR# (3) H_DRDY# (3) H_HIT# (3) H_HITM# (3)
H_LOCK# (3)
H_TRDY# (3)
H_DINV#0 (3) H_DINV#1 (3) H_DINV#2 (3) H_DINV#3 (3)
H_DSTBN#0 (3) H_DSTBN#1 (3) H_DSTBN#2 (3) H_DSTBN#3 (3)
H_DSTBP#0 (3) H_DSTBP#1 (3) H_DSTBP#2 (3) H_DSTBP#3 (3)
H_REQ#0 (3) H_REQ#1 (3) H_REQ#2 (3) H_REQ#3 (3) H_REQ#4 (3)
H_RS#0 (3)
H_RS#1 (3)
H_RS#2 (3)
H_A#[3..35] (3)
6
7
8
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Cantiga_A (HOST)
Cantiga_A (HOST)
Cantiga_A (HOST)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
of
of
of
536Tuesday, May 26, 2009
536Tuesday, May 26, 2009
536Tuesday, May 26, 2009
8
1
A A
T15PAD T15PA D T16PAD T16PA D T17PAD T17PA D T18PAD T18PA D
Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.
CPU_MCH_BSEL0(3,15)
B B
CPU_MCH_BSEL1(3,15) CPU_MCH_BSEL2(3,15)
PM_SYNC#(13)
H_DPRSTP#(3,11) PM_EXTTS#0(16) PM_EXTTS#1(17) ICH_PWRGD(13,20)
PLTRST#(12,20,22,25,26)
H_THERMTRIP#(3,11)
DPRSLPVR(13)
+3.3V_RUN
R26 10KR26 10K
1 2
R32 10KR32 10K
C C
D D
1 2
PM_EXTTS#0 PM_EXTTS#1
R98 100R98 100
PM_EXTTS#1
J43 L43 J41
L41 AN11 AM10 AK10 AL11
F12
C27 D30
J9
AW42
BB20 BE19 BF20 BF18
AN45 AP44 AT44 AN47
K26 G23 G25
J25
L25
L27
F24 D24 D26
J23
B26 A23 C23 B24 B22 K24 C25
L23
L33
K32 K34
J35
F6 J39 L39
AY39 BB18
K28 K36
A7 A49 A52 A54 B54 D55 G55
BE55 BH55 BK55 BK54 BL54 BL52 BL49
BL7 BL4 BL2 BK2 BK1 BH1 BE1
G1
CANTIGASFF_1p0
CANTIGASFF_1p0
2
U2B
U2B
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
RSVD14 RSVD15
RSVD17
RSVD20
RSVD22 RSVD23 RSVD24 RSVD25
ME_JTAG_TCK ME_JTAG_TDI ME_JTAG_TDO ME_JTAG_TMS
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22
3
BB32
SA_CK_0
BA25
SA_CK_1
BA33
SB_CK_0
BA23
SB_CK_1
BA31
SA_CK#_0
BC25
SA_CK#_1
BC33
SB_CK#_0
BB24
SB_CK#_1
BC35
SA_CKE_0
BE33
SA_CKE_1
BE37
SB_CKE_0
BC37
SB_CKE_1
BK18
SA_CS#_0
BK16
SA_CS#_1
BE23
SB_CS#_0
BC19
SB_CS#_1
BJ17
SA_ODT_0
BJ19
SA_ODT_1
BC17
SB_ODT_0
BE17
SB_ODT_1
BL25
SM_RCOMP
BK26
SM_RCOMP#
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
DPLL_REF_CLK
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
BK32 BL31
BC51 AY37 BH20 BA37
B42 D42 B50 D50
R49 P50
AG55 AL49 AH54 AL47
AG53 AK50 AH52 AL45
AG49 AJ49 AJ47 AG47
AF50 AH50 AJ45 AG45
G33 G37 F38 F36 G35
G39
AK52 AK54 AW40 AL53 AL55
F34 F32 B38 A37 C31 K42
D10
C29 B30 D28 A27 B28
SM_RCOMP_VOH
SM_RCOMP_VOL
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
CFGRSVD
CFGRSVD
DMI
DMI
PM
PM
GRAPHICS VIDME
GRAPHICS VIDME
NC
NC
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
MISC
MISC
HDA
HDA
M_CLK_DDR0 (16) M_CLK_DDR1 (16) M_CLK_DDR3 (17) M_CLK_DDR4 (17)
M_CLK_DDR#0 (16) M_CLK_DDR#1 (16) M_CLK_DDR#3 (17) M_CLK_DDR#4 (17)
DDR_CKE0_DIMMA (16) DDR_CKE1_DIMMA (16) DDR_CKE3_DIMMB (17) DDR_CKE4_DIMMB (17)
DDR_CS0_DIMMA# (16) DDR_CS1_DIMMA# (16) DDR_CS2_DIMMB# (17) DDR_CS3_DIMMB# (17)
M_ODT0 (16) M_ODT1 (16) M_ODT2 (17) M_ODT3 (17)
SMRCOMPP SMRCOMPN
SM_RCOMP_VOH SM_RCOMP_VOL
PWRO K
R34 499/FR34 499/F
DDR3_DRAMRST# (16,17)
MCH_DREFCLK (15) MCH_DREFCLK# (15) DREF_SSCLK (15) DREF_SSCLK# (15)
CLK_MCH_3GPLL (15) CLK_MCH_3GPLL# (15)
DMI_MRX_ITX_N0 (12) DMI_MRX_ITX_N1 (12) DMI_MRX_ITX_N2 (12) DMI_MRX_ITX_N3 (12)
DMI_MRX_ITX_P0 (12) DMI_MRX_ITX_P1 (12) DMI_MRX_ITX_P2 (12) DMI_MRX_ITX_P3 (12)
DMI_MTX_IRX_N0 (12) DMI_MTX_IRX_N1 (12) DMI_MTX_IRX_N2 (12) DMI_MTX_IRX_N3 (12)
DMI_MTX_IRX_P0 (12) DMI_MTX_IRX_P1 (12) DMI_MTX_IRX_P2 (12) DMI_MTX_IRX_P3 (12)
MCH_CLVREF
SDVO_CTRLCLK SDVO_CTRLDATA
R56 56R56 56
1 2
1 2
CL_CLK0 (13) CL_DATA0 (13) ICH_CL_PWROK (13,20) ICH_CL_RST0# (13)
SDVO_CTRLCLK (28) SDVO_CTRLDATA (28) CLK_3GPLLREQ# (15) MCH_ICH_SY NC# (13)
+1.05V_VCCP
ICH_AZ_HDMI_BITCLK (11) ICH_AZ_HDMI_RST# (11) ICH_AZ_HDMI_SDIN1 (11) ICH_AZ_HDMI_SDOUT (11) ICH_AZ_HDMI_SYNC (11)
4
V_DDR_MCH_REF
PWRO K
VGA_DDCCLK(19) VGA_DDCDAT(19) VGA_HSYNC(19)
VGA_VSYNC(19)
SDVO_CTRLCLK SDVO_CTRLDATAPM_EXTTS#0
Added for HDMI
5
http://hobi-elektronika.net
ENVDD(18)
4
R36416
R36416
12.1K
12.1K
R36417
R36417 10K
10K
VGA_BLU(19)
VGA_GRN(19)
VGA_RED(19)
MCH_CLVREF
C71
C71
0.1U/10V
0.1U/10V
1 2
10
10
BIA_PWM(18) PANEL_BKEN(20)
LCD_DDCCLK(18) LCD_DDCDAT(18)
LCD_ACLK-(18) LCD_ACLK+(18)
LCD_A0-(18) LCD_A1-(18) LCD_A2-(18)
LCD_A0+(18) LCD_A1+(18) LCD_A2+(18)
+3.3V_ALW
R41 30/FR41 30/F R42 1.3K/FR42 1.3K/F R43 30/FR43 30/F
R325 2.2KR325 2.2K R324 2.2KR324 2.2K
+1.05V_VCCP
1 2
12
PANEL_BKEN L_CTRL_CLK
L_CTRL_DATA LCD_DDCCLK LCD_DDCDAT
R25 2.37K/FR25 2.37K/ F R30 2.2KR30 2.2K
T14PAD T14PA D
2
SUS_PWG (20,32)
1
U14
U14
3 5
74AHC1G08GW
74AHC1G08GW
R36 75/FR36 75/F R37 75/FR37 75/F R38 75/FR38 75/F
VGA_BLU
VGA_GRN
VGA_RED
1 2 1 2 1 2
R47
R47
R48
R48
150/F
150/F
150/F
150/F
1 2
1 2
1 2
+3.3V_RUN
1 2 1 2
R57
R57 1K/F
1K/F
R58
R58 499/F
499/F
TVA_DAC TVB_DAC TVC_DAC
VGA_BLU VGA_GRN VGA_RED
R49
R49 150/F
150/F
U2C
U2C
D38 C37 K38
L37 J37 L35
B36 F50 H46 P44 K46 D46 B46 D44 B44
G45
F46
G41
C45
F44
G47
F40 A45
B40 A41 F42 D48
D40 C41
G43
B48
J27 E27
G27
F26
B34 D34
J29
G29
F30
E29
D36 C35 J33 D32
G31
CANTIGASFF_1p0
CANTIGASFF_1p0
L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK
L_CTRL_DATA L_DDC_CLK L_DDC_DATA
L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK
LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3
LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3
LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3
LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3
TVA_DAC TVB_DAC TVC_DAC
TVA_RTN
TV_DCONSEL_0 TV_DCONSEL_1
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC
12
12
CFG5
CFG9
CFG16
CFG19
CFG20
SDVO_CTRL_DATA
SDVO/HDMI/DP Configuration
PEG PEG SDVO Enabled SDVO/HDMI/DP Enabled
SM_RCOMP_VOH
C67
C67
0.01U/25V
0.01U/25V
SM_RCOMP_VOL
C69
C69
0.01U/25V
0.01U/25V
6
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9
LVDS
LVDS
PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1
TV
TV
PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8
PEG_TX#_9 PEG_TX#_10 PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3
VGA
VGA
PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
+1.5V_SUS
R50
R50 1K/F
1K/F
1 2
12
C68
C68
2.2U/10V/8
2.2U/10V/8 R52
R52
3.01K/F
3.01K/F
C70
C70
2.2U/10V/8
2.2U/10V/8
R55
R55 1K/F
1K/F
1 2
DMI X2 Select
PCI Express Graphic Lane
FSB Dynamic ODT
DMI Lane Reversal
SDVO/PCIE Concurrent Operation
SDVO Present.
Low=DMIx2 High=DMIx4(Default)
Low= Reveise Lane High=Normal operation
Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).
Low=Normal(default). High=Lane Reversed
Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port
Low=No SDVO Device Present (default) High=SDVO Device Present
SDVO_CTRLDATA
0 0 1 1
PEG_COMP
U45 T44
D52 G49 K54 H50 M52 N49 P54 V46 Y50 V52 W49 AB54 AD46 AC55 AE49 AF54
E51 F48 J55 J49 M54 M50 P52 U47 AA49 V54 V50 AB52 AC47 AC53 AD50 AF52
PCIE_MTX_GRX_C_N0PCIE_MTX_GRX_C_N0
L47
PCIE_MTX_GRX_C_N1PCIE_MTX_GRX_C_N1
F52
PCIE_MTX_GRX_C_N2PCIE_MTX_GRX_C_N2
P46
PCIE_MTX_GRX_C_N3PCIE_MTX_GRX_C_N3
H54 L55 T46 R53 U49 T54 Y46 AB46 W53 Y54 AC49 AF46 AD54
PCIE_MTX_GRX_C_P0PCIE_MTX_GRX_C_P0
J47
PCIE_MTX_GRX_C_P1PCIE_MTX_GRX_C_P1
F54
PCIE_MTX_GRX_C_P2PCIE_MTX_GRX_C_P2
N47
PCIE_MTX_GRX_C_P3PCIE_MTX_GRX_C_P3
H52 L53 R47 R55 T50 T52 W47 AA47 W55 Y52 AB50 AE47 AD52
SMRCOMPP SMRCOMPN
7
R29 49.9/FR29 49. 9/F
1 2
+1.5V_SUS
12
R51
R51
80.6/F
80.6/F
12
R54
R54
80.6/F
80.6/F
DDPC_CTRLDATA
0 1 0 1
+1.05V_VCCP
L_CTRL_CLK L_CTRL_DATA LCD_DDCCLK LCD_DDCDAT
PANEL_BKEN
UMA_HDMI_HPD (28)
C59 0.1U 10C59 0.1U 10 C60 0.1U 10C60 0.1U 10 C61 0.1U 10C61 0.1U 10 C62 0.1U 10C62 0.1U 10
C63 0.1U 10C63 0.1U 10 C64 0.1U 10C64 0.1U 10 C65 0.1U 10C65 0.1U 10 C66 0.1U 10C66 0.1U 10
R28 10KR28 10K R27 10KR27 10K
1 2
R31 2.2KR31 2.2K
1 2
R63 100KR63 100K
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
12 12
8
+3.3V_RUN
IN_D2- (28) IN_D1- (28) IN_D0- (28) IN_CLK- (28)
IN_D2+ (28) IN_D1+ (28) IN_D0+ (28) IN_CLK+ (28)
DDPC_CTRL_DATA & SDVO_CTRL_DATA straps should both be high to enable DisplayPort.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
Cantiga_B (VGA,DMI)
Cantiga_B (VGA,DMI)
Cantiga_B (VGA,DMI)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
of
of
of
636Tuesday, May 26, 2009
636Tuesday, May 26, 2009
636Tuesday, May 26, 2009
8
1
2
3
4
5
6
7
8
http://hobi-elektronika.net
A A
DDR_A_D[0..63](16)
B B
C C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AP46 AU47 AT46 AU49 AR45 AN49 AV50 AP50
AW47
BD50
AW49
BA49 BC49 AV46 BA47 AY50 BF46 BC47 BF50 BF48 BC43 BE49 BA43 BE47 BF42 BC39 BF44 BF40 BB40 BE43 BF38 BE41 BA15 BE11 BE15 BF14 BB14 BC15 BE13 BF16 BF10 BC11
BF8 BG7 BC7 BC9 BD6
BF12
AV6 BB6
AW7
AY6
AT10
AW11
AU11
AW9
AR11
AT6 AP6
AL7
AR7
AT12
AM6 AU7
U2D
U2D
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
CANTIGASFF_1p0
CANTIGASFF_1p0
DDR_A_BS0
BC21
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA_14
DDR_A_BS1
BJ21
DDR_A_BS2
BJ41
DDR_A_RAS#
BH22
DDR_A_CAS# DDR_B_RAS#
BK20
DDR_A_WE#
BL15
DDR_A_DM0
AT50
DDR_A_DM1
BB50
DDR_A_DM2
BB46
DDR_A_DM3
BE39
DDR_A_DM4
BB12
DDR_A_DM5
BE7
DDR_A_DM6
AV10
DDR_A_DM7
AR9
DDR_A_DQS0
AR47
DDR_A_DQS1
BA45
DDR_A_DQS2
BE45
DDR_A_DQS3
BC41
DDR_A_DQS4
BC13
DDR_A_DQS5
BB10
DDR_A_DQS6
BA7
DDR_A_DQS7
AN7
DDR_A_DQS#0
AR49
DDR_A_DQS#1
AW45
DDR_A_DQS#2
BC45
DDR_A_DQS#3
BA41
DDR_A_DQS#4
BA13
DDR_A_DQS#5
BA11
DDR_A_DQS#6
BA9
DDR_A_DQS#7
AN9
DDR_A_MA0
BC23
DDR_A_MA1
BF22
DDR_A_MA2
BE31
DDR_A_MA3
BC31
DDR_A_MA4
BH26
DDR_A_MA5
BJ35
DDR_A_MA6
BB34
DDR_A_MA7
BH32
DDR_A_MA8
BB26
DDR_A_MA9
BF32
DDR_A_MA10
BA21
DDR_A_MA11
BG25
DDR_A_MA12
BH34
DDR_A_MA13
BH18
DDR_A_MA14
BE25
DDR_A_BS0 (16) DDR_A_BS1 (16) DDR_A_BS2 (16)
DDR_A_RAS# (16) DDR_A_CAS# (16) DDR_B_RAS# (17) DDR_A_WE# (16)
DDR_A_DM[0..7] (16)
DDR_A_DQS[0..7] (16)
DDR_A_DQS#[0..7] (16)
DDR_A_MA[0..14] (16)
DDR_B_D[0..63](17)
1. Swap pin
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AP54 AM52 AR55
AV54 AM54 AN53
AT52 AU53
AW53
AY52
BB52 BC53
AV52
AW55
BD52 BC55
BF54
BE51 BH48
BK48
BE53 BH52
BK46
BJ47
BL45
BJ45
BL41 BH44 BH46
BK44
BK40
BJ39
BK10 BH10
BK6 BH6
BJ9
BL11
BG5
BJ5 BG3 BF4 BD4 BA3 BE5 BF2 BB4 AY4 BA1 AP2 AU1 AT2 AT4 AV4 AU3 AR3 AN1 AP4 AL3
AJ1 AK4
AM4 AH2
AK2
U2E
U2E
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
CANTIGASFF_1p0
CANTIGASFF_1p0
DDR_B_BS0
BJ13
SB_BS_0 SB_BS_1 SB_BS_2
SB_RAS# SB_CAS#
SB_WE#
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BK12 BK38
BE21 BH14 BK14
AP52 AY54 BJ49 BJ43 BH12 BD2 AY2 AJ3
AR53 BA53 BH50 BK42 BH8 BB2 AV2 AM2 AT54 BB54 BJ51 BH42 BK8 BC3 AW3 AN3
BJ15 BJ33 BH24 BA17 BF36 BH36 BF34 BK34 BJ37 BH40 BH16 BK36 BH38 BJ11 BL37
DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_WE#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
DDR_B_BS0 (17) DDR_B_BS1 (17) DDR_B_BS2 (17)
DDR_B_CAS# (17) DDR_B_WE# (17)
1. Swap pin
DDR_B_DM[0..7] (17)
DDR_B_DQS[0..7] (17)
DDR_B_DQS#[0..7] (17)
DDR_B_MA[0..14] (17)
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Cantiga_C (DDR3)
Cantiga_C (DDR3)
Cantiga_C (DDR3)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
of
of
of
736Tuesday, May 26, 2009
736Tuesday, May 26, 2009
736Tuesday, May 26, 2009
8
5
+1.5V_SUS
D D
+1.05V_VCCP
C C
B B
A A
5
BB36
BE35 AW34 AW32
BK30
BH30
BF30
BD30
BB30 AW30
BL29
BJ29 BG29 BE29 BC29 BA29 AY29 BK28 BH28 BF28 BD28 BB28
BL27
BJ27 BG27 BE27 BC27 BA27 AY27
AW26
BF24
BL19 BB16
W32 AG31 AE31 AD31 AC31 AA31
W31 AH29 AG29 AE29 AD29 AC29 AA29
W29 AH28 AG28 AE28 AA28 AH27 AG27 AE27 AD27 AC27 AA27
W27 AH25 AD25 AC25
W25
AJ24 AH24 AG24 AE24 AD24 AC24 AA24
W24
AM22
AL22
AJ22 AH22 AG22 AE22 AD22 AC22 AA22 AM21
AL21
AJ21 AH21 AD21 AC21 AA21
W21
AM16
AL16
AG13 AE13
Y31
Y29
Y27
Y24
Y21
U2G
U2G
VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33
VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42 VCC_AXG_43 VCC_AXG_44 VCC_AXG_45 VCC_AXG_46 VCC_AXG_47 VCC_AXG_48 VCC_AXG_49 VCC_AXG_50 VCC_AXG_51 VCC_AXG_52 VCC_AXG_53 VCC_AXG_54 VCC_AXG_55 VCC_AXG_56 VCC_AXG_57 VCC_AXG_58 VCC_AXG_59 VCC_AXG_60 VCC_AXG_61
VCC_AXG_SENSE VSS_AXG_SENSE
CANTIGASFF_1p0
CANTIGASFF_1p0
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
4
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44
VCC_AXG_62 VCC_AXG_63 VCC_AXG_64 VCC_AXG_65 VCC_AXG_66 VCC_AXG_67 VCC_AXG_68 VCC_AXG_69 VCC_AXG_70 VCC_AXG_71 VCC_AXG_72 VCC_AXG_73 VCC_AXG_74 VCC_AXG_75
VCC GFX
VCC GFX
VCC_AXG_76 VCC_AXG_77 VCC_AXG_78 VCC_AXG_79 VCC_AXG_80
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
VCC SM LF
VCC SM LF
4
T32 U31 T31 R31 U29 T29 R29 U28 U27 T27 R27 U25 T25 R25 U24 U22 T22 R22 U21 T21 R21 AM19 AL19 AH19 AG19 AE19 AD19 AC19 W19 U19 AM18 AL18 AJ18 AH18 AG18 AE18 AD18 AC18 AA18 Y18 W18 U18 T18 R18
AJ16 AH16 AD16 AC16 AA16 U16 T16 R16 AM15 AL15 AJ15 AH15 AG15 AE15 AA15 Y15 W15 U15 T15
AU45 BF52 BB38 BA19 BE9 AU9 AL9
+1.05V_VCCP
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
3
http://hobi-elektronika.net
12
C87
C87
0.1U/10V
0.1U/10V
12
C88
C88
0.1U/10V
0.1U/10V
+1.05V_VCCP
12
+
+
C72
C72 220U/2.5V/73
220U/2.5V/73
7343
7343
2.5
2.5
+1.05V_VCCP
12
C80
C80 22U/4V/8
22U/4V/8
+1.5V_SUS
12
+
+
C86
C86 220U/2.5V/73
220U/2.5V/73
7343
7343
2.5
2.5
12
C89
C89
0.22U/10V/6
0.22U/10V/6
3
Layout Note: 370 mils from edge.
12
C73
C73 22U/4V/8
22U/4V/8
805
805 4
4
Layout Note: Inside GMCH cavity.
12
C79
C79 10U/6.3V/6
10U/6.3V/6
12
C83
C83 22U/4V/8
22U/4V/8
12
12
C90
C90
0.22U/10V/6
0.22U/10V/6
12
C76
C76
0.22U/10V/6
0.22U/10V/6
603
603 10
10
Layout Note: 370 mils from edge.
12
12
C91
C91
0.47U/10V/6
0.47U/10V/6
C78
C78 1U/10V/6
1U/10V/6
12
C84
C84 22U/4V/8
22U/4V/8
12
C92
C92 1U/10V/6
1U/10V/6
C77
C77
0.47U/10V/6
0.47U/10V/6
12
12
C74
C74
0.22U/10V/6
0.22U/10V/6
603
603 10
10
C85
C85
0.1U/10V
0.1U/10V
12
C93
C93 1U/10V/6
1U/10V/6
12
C81
C81
0.1U/10V
0.1U/10V
12
C75
C75
0.1U/10V
0.1U/10V
10
10
12
C82
C82
0.1U/10V
0.1U/10V
2
U2F
U2F
AT41
VCC_1
AR41
VCC_2
AN41
VCC_3
AJ41
VCC_4
AH41
VCC_5
AD41
VCC_6
AC41
VCC_7
Y41
VCC_8
W41
VCC_9
AT40
VCC_10
AM40
VCC_11
AL40
VCC_12
AJ40
VCC_13
AH40
VCC_14
AG40
VCC_15
AE40
VCC_16
AD40
VCC_17
AC40
VCC_18
AA40
VCC_19
Y40
VCC_20
AN35
VCC_21
AM35
VCC_22
AJ35
VCC_23
AH35
VCC_24
AD35
VCC_25
AC35
VCC_26
W35
VCC_27
AM34
VCC_28
AL34
VCC_29
AJ34
VCC_30
AH34
VCC_31
AG34
VCC_32
AE34
VCC_33
AD34
VCC_34
AC34
VCC_35
AA34
VCC_36
Y34
VCC_37
W34
VCC_38
AM32
VCC_39
AL32
VCC_40
AJ32
VCC_41
AH32
VCC_42
AE32
VCC_43
AD32
VCC_44
AA32
VCC_45
AM31
VCC_46
AL31
VCC_47
AJ31
VCC_48
AH31
VCC_49
AM29
VCC_50
AL29
VCC_51
AM28
VCC_52
AL28
VCC_53
AJ28
VCC_54
AM27
VCC_55
AL27
VCC_56
AM25
VCC_57
AL25
VCC_58
AJ25
VCC_59
AM24
VCC_60
N36
VCC_61
CANTIGASFF_1p0
CANTIGASFF_1p0
Title
Title
Title
Cantiga_D (VCC,NCTF)
Cantiga_D (VCC,NCTF)
Cantiga_D (VCC,NCTF)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
Date: Sheet
Date: Sheet
2
Date: Sheet
VCC CORE
VCC CORE
QUANTA
QUANTA
QUANTA COMPUTER
1
VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8
POWER
POWER
VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32
VCC NCTF
VCC NCTF
VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38
1
836Tuesday, May 26, 2009
836Tuesday, May 26, 2009
836Tuesday, May 26, 2009
+1.05V_VCCP
AT38 AR38 AN38 AM38 AL38 AG38 AE38 AA38 Y38 W38 U38 T38 R38 AT37 AR37 AN37 AM37 AL37 AJ37 AH37 AG37 AE37 AD37 AC37 AA37 Y37 W37 U37 T37 R37 AT35 AR35 U35 AT34 AR34 U34 T34 R34
of
of
of
5
4
3
2
1
BLM18PG181SN1D
C100
C100
0.1U/10V
0.1U/10V
C103
C103
0.1U/10V
0.1U/10V
C106
C106
0.1U/10V
0.1U/10V
C114
C114
0.1U/10V
0.1U/10V
BLM18PG181SN1D
R65 0R65 0
1 2
C121
C121
4.7U/6.3V/6
4.7U/6.3V/6
1 2
L9
L9
12
1uH/300mA
1uH/300mA
+1.05V_VCCP
BLM21P221SGPT
BLM21P221SGPT
805
805
L12
L12
R70
R70 1/F/6
1/F/6
C136
C136
10U/6.3V/6
10U/6.3V/6
+1.8V_RUN
603
603
L1
L1
12
+1.5V_RUN
12
C117
C117
0.1U/10V
0.1U/10V
C122
C122
22U/4V/8
22U/4V/8
12
C127
C127
2.2U/6.3V/6
2.2U/6.3V/6
L11
L11
BLM11A05S
BLM11A05S
603
603
+V1.05M_PEGPLL
12
12
12
+V3.3S_A_CRT_DAC
12
C94
C94
0.1U/10V
0.1U/10V
12
C101
C101
0.1U/10V
0.1U/10V
+V1.05M_DPLLA
+V1.05M_DPLLB
+V1.05M_HPLL
+V1.05M_MPLL
C108
C108
+V1.8_TXLVDS
12
1000P/50V
1000P/50V
50
50
+V1.05M_PEGPLL
12
C123
C123 1U/10V/6
1U/10V/6
12
C128
C128
0.1U/10V
0.1U/10V
+V1.05M_MCH_PLL2
C137
C137
0.1U/10V
0.1U/10V
10
10
12
C95
C95
0.01U/25V
0.01U/25V
C110
C110
0.01U/25V
0.01U/25V
12
C132
C132
0.1U/10V
0.1U/10V
12
C139
C139 1U/10V/6
1U/10V/6
U2H
U2H
J31
VCCA_CRT_DAC
L31
VCCA_DAC_BG
M33
VSSA_DAC_BG
J45
VCCA_DPLLA
L49
VCCA_DPLLB
AF10
VCCA_HPLL
AE1
VCCA_MPLL
U43
VCCA_LVDS1
U41
VCCA_LVDS2
V44
VSSA_LVDS
AJ43
VCCA_PEG_BG
AG43
VCCA_PEG_PLL
AW24
VCCA_SM_1
AU24
VCCA_SM_2
AW22
VCCA_SM_3
AU22
VCCA_SM_4
AU21
VCCA_SM_5
AW20
VCCA_SM_6
AU19
VCCA_SM_7
AW18
VCCA_SM_8
AU18
VCCA_SM_9
AW16
VCCA_SM_10
AU16
VCCA_SM_11
AT16
VCCA_SM_12
AR16
VCCA_SM_13
AU15
VCCA_SM_14
AT15
VCCA_SM_15
AR15
VCCA_SM_16
AW14
VCCA_SM_17
AT24
VCCA_SM_NCTF_1
AR24
VCCA_SM_NCTF_2
AT22
VCCA_SM_NCTF_3
AR22
VCCA_SM_NCTF_4
AT21
VCCA_SM_NCTF_5
AR21
VCCA_SM_NCTF_6
AT19
VCCA_SM_NCTF_7
AR19
VCCA_SM_NCTF_8
AT18
VCCA_SM_NCTF_9
AR18
VCCA_SM_NCTF_10
AU27
VCCA_SM_CK_4
AU28
VCCA_SM_CK_3
AU29
VCCA_SM_CK_2
AU31
VCCA_SM_CK_1
AT31
VCCA_SM_CK_NCTF_1
AR31
VCCA_SM_CK_NCTF_2
AT29
VCCA_SM_CK_NCTF_3
AR29
VCCA_SM_CK_NCTF_4
AT28
VCCA_SM_CK_NCTF_5
AR28
VCCA_SM_CK_NCTF_6
AT27
VCCA_SM_CK_NCTF_7
AR27
VCCA_SM_CK_NCTF_8
AH12
VCCD_HPLL
AE43
VCCD_PEG_PLL
M46
VCCD_LVDS_1
L45
VCCD_LVDS_2
CANTIGASFF_1p0
CANTIGASFF_1p0
12
12
12
12
C102
C102 22U/10V/12
22U/10V/12
C105
C105
4.7U/6.3V/6
4.7U/6.3V/6
1 2
R67
R67
0.51
0.51
1%
1%
C118
C118 22U
22U
+1.05V_VCCP
+3.3V_RUN
C99
C99 22U/10V/12
22U/10V/12
+1.05V_VCCP
12
12
12
12
12
C124
C124
+
+
*100U/6.3V_NC
*100U/6.3V_NC
+1.05V_VCCP
L2 10uH
L2 10uH
805
805
+1.05V_VCCP
L3 10uH
D D
C C
B B
A A
L3 10uH
+1.05V_VCCP
L6 BLM11A05S
L6 BLM11A05S
603
603
+1.05V_VCCP
BLM11A05S
BLM11A05S
603
603
805
805
L7
L7
+1.05V_VCCP
http://hobi-elektronika.net
CRTPLLA PEGA SM
CRTPLLA PEGA SM
A LVDS
A LVDS
POWER
POWER
LVDS
LVDS
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13
VTT
VTT
VCCA_TV_DAC
TVD TV/CRT
TVD TV/CRT
VCC_HDA
HDA
HDA
VCCD_QDAC
VCCD_TVDAC
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
VCC_HV_1 VCC_HV_2
HV
HV
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4
PEG
PEG
VCC_DMI_1 VCC_DMI_2 VCC_DMI_3
DMI
DMI
VTTLF1 VTTLF2 VTTLF3
VTTLF
VTTLF
R13 T12 R11 T10 R9 T8 R7 T6 R5 T4 R3 T2 R1
K30
A31
N34
N32
M25 N24 M23
BK24 BL23 BJ23 BK22
T41
C33 A33
AB44 Y44 AC43 AA43
AM44 AN43 AL43
K14 Y12 P2
C111
C111
0.1U/10V
0.1U/10V
+VCC_DMI
+VTTLF_CAP1 +VTTLF_CAP2 +VTTLF_CAP3
12
C96
C96
2.2U/6.3V/6
2.2U/6.3V/6
12
12
12
C104
C104
0.01U/25V
0.01U/25V
C112
C112
0.1U/10V
0.1U/10V
L13
L13
91nH/1.5A
91nH/1.5A
C133
C133 10U/6.3V/6
10U/6.3V/6
C138
C138
0.47U/10V/6
0.47U/10V/6
12
C97
C97
4.7U/6.3V/6
4.7U/6.3V/6
+V3.3S_A_TV_DAC
12
+V1.5_SM_CK
+V1.8_TXLVDS
+1.05V_VCCP
12
12
C140
C140
0.47U/10V/6
0.47U/10V/6
12
C109
C109
0.47U/6.3V
0.47U/6.3V
+1.5V_RUN
C107
C107
0.01U/25V
0.01U/25V
12
C125
C125
0.1U/10V
0.1U/10V
C130
C130
12
1000P/50V
1000P/50V
12
C119
C119 1U/10V/6
1U/10V/6
12
C141
C141
0.47U/10V/6
0.47U/10V/6
12
12
12
12
C98
C98
4.7U/6.3V/6
4.7U/6.3V/6
BLM18PG181SN1D
BLM18PG181SN1D
BLM18PG181SN1D
BLM18PG181SN1D
12
C113
C113
0.1U/10V
0.1U/10V
12
C120
C120 10U/6.3V/6
10U/6.3V/6
L8 1uH/300MA
L8 1uH/300MA
805
805
R69
R69 1/F/6
1/F/6
C126
C126 10U/6.3V/6
10U/6.3V/6
L10 1uH/300MA
L10 1uH/300MA
C134
C134
4.7U/6.3V/6
4.7U/6.3V/6
12
C131
C131
0.1U/10V
0.1U/10V
805
805
+1.8V_RUN
6.3
6.3
+1.05V_VCCP
L4
L4
603
603
L5
L5
603
603
C115
C115
0.01U/25V
0.01U/25V
+1.05V_VCCP
12
C135
C135 22U/10V/12
22U/10V/12
+3.3V_RUN
+1.5V_RUN
+1.5V_SUS
12
C116
C116
0.1U/10V
0.1U/10V
+3.3V_RUN
+1.05V_VCCP
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
5
4
3
2
Date: Sheet
Cantiga_E (POWER)
Cantiga_E (POWER)
Cantiga_E (POWER)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
1
of
of
936Tuesday, May 26, 2009
936Tuesday, May 26, 2009
936Tuesday, May 26, 2009
5
U2I
U2I
BA55
VSS_1
AU55
VSS_2
AN55
VSS_3
AJ55
VSS_4
AE55
VSS_5
AA55
VSS_6
U55
VSS_7
N55
VSS_8
BD54
VSS_9
D D
C C
B B
A A
BG53
AJ53 AE53 AA53
U53 N53
J53 G53 E53 K52
BG51 BA51
AW51
AU51 AR51 AN51 AL51
AJ51 AG51 AE51 AC51 AA51
W51
U51 R51 N51
L51
J51 G51 C51
BK50 AM50
K50
BG49
E49 C49
BD48 BB48 AY48 AV48 AT48 AP48 AM48 AK48 AH48 AF48 AD48 AB48
Y48 V48 T48 P48 M48 K48 H48
BL47 BG47
E47 C47 A47
BD46 AY46 AM46 AK46 AH46 BG45 AE45 AC45 AA45
W45
R45 N45 E45
BD44 BB44 AV44 AK44 AH44 AF44 AD44
K44 H44
BL43 BG43 AY43 AR43
W43
R43 M43 E43
CANTIGASFF_1p0
CANTIGASFF_1p0
VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99
5
VSS
VSS
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198
C43 A43 BD42 H42 BG41 AY41 AU41 AM41 AL41 AG41 AE41 AA41 R41 M41 E41 BD40 AU40 AR40 AN40 W40 U40 T40 R40 K40 H40 BL39 BG39 BA39 E39 C39 A39 BD38 AU38 H38 BG37 AU37 M37 E37 BD36 AW36 H36 BL35 BG35 AY35 AU35 AL35 AG35 AE35 AA35 Y35 M35 E35 A35 BD34 AU34 AN34 H34 BL33 BG33 AY33 E33 BD32 AU32 AN32 AG32 AC32 Y32 H32 B32 BJ31 BG31 AY31 AN31 M31 E31 N30 H30 AN29 AJ29 M29 A29 AW28 AN28 AD28 AC28 Y28 W28 H28 F28 AN27 AJ27 M27 BF26 BD26 N26 H26 BJ25 AY25 AU25
4
http://hobi-elektronika.net
AN25 AG25 AE25 AA25
Y25 E25
A25 BD24 AN24
AL24
H24 BG23
AY23
E23 BD22 BB22 AN22
Y22
W22
H22
BL21
BG21
AY21 AN21 AG21 AE21
M21
E21 A21
BD20
H20
BG19
AY19
M19
E19
BD18
N18 H18
BL17 BG17
AY17
M17
E17
A17 BD16 AN16 AG16 AE16
Y16
W16
N16
H16 BG15
AY15 AN15 AD15 AC15
R15
M15
E15
BD14
H14
BL13 BG13
AY13 AU13 AR13
AJ13 AC13 AA13
W13
U13
M13
E13
A13 BD12 AV12 AP12 AM12 AK12 AB12
V12
P12
H12 BG11 AG11
E11 BD10
AY10
AP10
H10
BL9
BG9
E9 A9
BD8
BB8
AY8
AV8
AT8
AP8
4
U2J
U2J
VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299
CANTIGASFF_1p0
CANTIGASFF_1p0
3
VSS
VSS
VSS NCTF
VSS NCTF
3
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23
VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 VSS_SCB_6 VSS_SCB_7
VSS SCB
VSS SCB
VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358
VSS_359 VSS_360 VSS_361 VSS_362
AM8 AK8 AH8 AF8 AD8 AB8 Y8 V8 P8 M8 K8 H8 BJ7 E7 BF6 BC5 BA5 AW5 AU5 AR5 AN5 AL5 AJ5 AG5 AE5 AC5 AA5 W5 U5 N5 L5 J5 G5 C5 BH4 BE3 U3 E3 BC1 AW1 AR1 AL1 AG1 AC1 W1 N1 J1 AU43 BB42 AW38 BA35 L29 N28 N22 N20 N14 AL13 B10 AN13
N42 N40 N38 M39
AJ38 AH38 AD38 AC38 T35 R35 AT32 AR32 U32 R32 T28 R28 AT25 AR25 T24 R24 AN19 AJ19 AA19 Y19 T19 R19 AN18
BL55 BL1 A55 D1 B55 B2 A4
2
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Cantiga_F (VSS)
Cantiga_F (VSS)
Cantiga_F (VSS)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
1
of
of
of
10 36Tuesday, May 26, 2009
10 36Tuesday, May 26, 2009
10 36Tuesday, May 26, 2009
1
1
2
3
4
5
6
7
8
http://hobi-elektronika.net
+RTC_CELL
12
R80
A A
R781MR78 1M
C144
C144
1U/10V/6
1U/10V/6
R80
R79
R79
20K
20K
20K
20K
1 2
1 2
ICH_RTCRST# ICH_RTCX1 ICH_RTCX2 ICH_SRTCRST#
12
ICH_INTRUDER#
12
C145
C145
1U/10V/6
1U/10V/6
C142
C142 15P/50V
15P/50V
R75 10MR75 10M
12
Y1
Y1
12
32.768KHZ
32.768KHZ
Height is 0.75mm
C143
C143 15P/50V
15P/50V
(Internal VRM enabled for VccSus1_05, VccSus1_5, VccCL1_5, VccLAN1_05 and VccCL1_05)
ICH_INTVRMEN
U3A
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# ICH_SRTCRST# ICH_INTRUDER#
ICH_INTVRMEN
T85
T85
PAD
ICH_AZ_HDMI_SDIN1(6)
+3.3V_SUS
+3.3V_SUS
PAD
R84 10KR84 10K
1 2
R85 24.9/FR85 24.9/F
1 2
T42
T42
PAD
PAD
T43
T43
PAD
PAD
R94 *10K_NCR94 *10K_NC R95 *10K_NCR95 *10K_NC
R96 10KR96 10K
1 2
C148 0.01U/25VC148 0.01U/25V
1 2
C149 0.01U/25VC149 0.01U/25V
1 2
C150 0.01U/25VC150 0.01U/25V
1 2
C151 0.01U/25VC151 0.01U/25V
1 2
GLAN_COMP
ACZ_BIT_CLK ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
12 12
B B
+1.5V_PCIE_ICH
ICH_AZ_CODEC_SDIN0(26)
C C
SATA_RXN0(26) SATA_RXP0(26)
SATA_TXN0(26) SATA_TXP0(26)
SATA_RXN1(26) SATA_RXP1(26)
SATA_TXN1(26) SATA_TXP1(26)
+3.3V_RUN
U3A
F25
RTCX1
G25
RTCX2
G24
RTCRST#
C24
SRTCRST#
C23
INTRUDER#
E25
INTVRMEN
D25
LAN100_SLP
G22
GLAN_CLK
D14
LAN_RSTSYNC
A14
LAN_RXD0
D12
LAN_RXD1
B14
LAN_RXD2
D13
LAN_TXD0
C13
LAN_TXD1
A13
LAN_TXD2
D15
GPIO56
H22
GLAN_COMPI
H21
GLAN_COMPO
AE7
HDA_BIT_CLK
AB7
HDA_SYNC
AA7
HDA_RST#
AB6
HDA_SDIN0
AE6
HDA_SDIN1
AC6
HDA_SDIN2
AA5
HDA_SDIN3
AC7
HDA_SDOUT
AD8
HDA_DOCK_EN#/GPIO33
AB8
HDA_DOCK_RST#/GPIO34
AC9
SATALED#
AE14
SATA0RXN
AD14
SATA0RXP
AC15
SATA0TXN
AD15
SATA0TXP
AD13
SATA1RXN
AC13
SATA1RXP
AA14
SATA1TXN
AB14
SATA1TXP
ICH9MSFF REV 1.0
ICH9MSFF REV 1.0
RTCLAN / GLAN
LPCCPU
RTCLAN / GLAN
LPCCPU
IHDA
IHDA
SATA
SATA
+RTC_CELL
12
R71
R71 332K/F
332K/F
Low = Internal VR Dis abled High = Internal VR Enabled(Default)
LDRQ0#
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
TP11
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
H3 J3 K5 L3
J2
H1 J1
N3 AB23
AE23 AE24
AD25
AE22
AD23
AE21 AD24 L1
AD21 AC21
AC25
AC23
AC22
AD12 AE12 AB12 AA12
AC11 AD11 AB10 AA10
AC16 AB16
AD10 AE10
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
LDRQ1#/GPIO23
CPUPWRGD
THRMTRIP#
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
ICH_INTVRMEN
SIO_A20GATESIO_A20GATE
R81 56R81 56
SIO_RCIN#SIO_RCIN#
R97 24.9/FR97 24.9/F
1 2
Place within 500mils of ICH9 ball
T39PAD T39PAD T40PAD T40PAD
12
LPC_LAD0 (20,22) LPC_LAD1 (20,22) LPC_LAD2 (20,22) LPC_LAD3 (20,22)
LPC_LFRAME# (20,22)
SIO_A20GATE (20) H_A20M# (3)
H_DPRSTP# (3,6) H_DPSLP# (3)
H_FERR# (3)
H_PWRGOOD (3)
H_IGNNE# (3)
H_INIT# (3) H_INTR (3) SIO_RCIN# (20)
H_NMI (3) H_SMI# (3)
H_STPCLK# (3)
R90
R90
T41PAD T41PAD
CLK_PCIE_SATA# (15) CLK_PCIE_SATA (15)
H_FERR#
SIO_A20GATE SIO_RCIN#
+1.05V_VCCP
54.9/F
54.9/F
12
R74 56R74 56
1 2
R76 10KR76 10K
1 2
R77 10KR77 10K
1 2
R8656R86 56
1 2
+1.05V_VCCP
+3.3V_RUN
H_THERMTRIP# (3,6)
IHDA
ICH_AZ_HDMI_BITCLK(6) ICH_AZ_CODEC_BITCLK(26)
D D
1
ICH_AZ_HDMI_SYNC(6)
ICH_AZ_CODEC_SYNC(26)
ICH_AZ_HDMI_RST#(6)
ICH_AZ_CODEC_RST#(20,26)
ICH_AZ_HDMI_SDOUT(6)
ICH_AZ_CODEC_SDOUT(26)
2
CX18BB75003 EMI FILTER BLM18BB750SN1D,75,200MA
C146
C146 *27P_NC
*27P_NC
1 2
Change FP to 0603
R82 33R82 33
1 2
R83 33R83 33
1 2
C147
C147 *27P_NC
*27P_NC
1 2
R87 33R87 33
1 2
R88 33R88 33
1 2
R89 33R89 33
1 2
R91 33R91 33
1 2
R92 33R92 33
1 2
R93 33R93 33
1 2
3
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
4
ICH_SATA_LED#
PCIe Lane Reversed
0
1 PCIe Straight(def ault)
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
6
Date: Sheet
ICH9-M (CPU,SATA,IDE)
ICH9-M (CPU,SATA,IDE)
ICH9-M (CPU,SATA,IDE)
UM2 UMA 2A
UM2 UMA 2A
UM2 UMA 2A
7
of
11 36Tuesday, May 26, 2009
11 36Tuesday, May 26, 2009
11 36Tuesday, May 26, 2009
8
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