Dell 1535, 1537 Schematics

1
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7
8
FM7 Hepburn Intel Discrete GFX
A A
B B
C C
D D
*FM7 M/B PCB*FM7 M/B PCB
POWER
AC/BATT CONNECTOR
PG 54
DDR2-SODIMM1
PG 15,16
DDR2-SODIMM2
PG 15,16
E-SATA Combo with USB CONN
AUDIO/AMP
92HD73C
Audio SPK conn
PG 40 PG 41
1
SYSTEM RESET CIRCUIT
BATT CHARGER
RUN POWER SW
+3.3V_SUS/+5V_SUS +5V/+3.3V/+1.8V
667/800 MHZ DDR II
667/800 MHZ DDR II
SATA-ODD
SATA-HDD
PI2EQX3211BHE
PG 40
Audio Jacks x3
PG 44
PG 46
PG 53
PG 36
PG 36
PG 35PG 35
Camera + D-MIC
PG 41
USER INTERFACE
PG 38
2
SATA
SATA
SATA
IHDA USB2.0
FLASH 2Mbyts
(478 Micro-FCPGA)
DMI interface
LPC
KBC
ITE8512
PG 31
SPI PS/2
Touchpad
PG 32
3
Penryn
1066 MHz FSB
CANTIGA
1329 uFCBGA
PG 5,6,7,8,9,10
ICH9-M
676 BGA
PG 11,12,13,14
18X8
PG 37
PG 3,4
CIR
TSOP36136TR
PG 37
Keyboard
PG 37
4
FAN & THERMAL
SMSC1423
CLOCK
SLG8SP513V (QFN-64)
PCIEx16
GDDR2 x 4 (256M 64bits)
PG 23
USB2.0 x 4 PCIEx1
PCIEx1 USB2.0
PCIEx2 USB2.0 PCIEx1 USB2.0 USB2.0
Biometric
PG 38
33MHz PCI
PG 39
PG 17
ATI M82-SCE
PCI EXPRESS GFX
PG 18,19,20,21,22
USB conn x 4
8-in-1 Card Reader
R5C833
5
POWER
+1.5V_RUN/+1.05V_VCCP
REGULATOR
+1.8V_SUS/+1.25V_RUN /+0.9V_DDR_VTT
LVDS
HDMI
VGA
PG 35
PG 28
6
VER : D3B
PG 48
PG 49
1394
CPU VRREGULATOR DC/DC
+3.3V_ALW/+5V_ALW/ +15V_ALW
VGA Core
Panel Connector
HDMI CONN.
CRT CONN.
PG 26
PG 26
PG 27
LAN BCM5784M
PG 42
RJ45/Magnetics
EXPRESS-CARD
R5538
MINI-CARD
WLAN
MINI-CARD
WWAN
MINI-CARD
WPAN
1394 CONN.
Card Reader CONN.
Title
Title
Title
Schematic Block Diagram1
Schematic Block Diagram1
Schematic Block Diagram1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM6 3A
FM6 3A
FM6 3A
Date: Sheet
Date: Sheet
Date: Sheet
PG 30
PG 34
PG 33
PG 33
QUANTA
QUANTA
QUANTA COMPUTER
7
PG 29
PG 30
PG 51
PG 52
PG 50
158Thursday, July 31, 2008
158Thursday, July 31, 2008
158Thursday, July 31, 2008
PG 43
of
of
of
8
1
2
3
4
5
6
7
8
Table of Contents Power States
PAGE DESCRIPTION
Schematic Block Diagram
1 2
Front Page
3-4
Penryn
5-10
Cantiga ICH9M
A A
B B
C C
11-14
DDRII SO-DIMM(200P)
15-16
17
Clock Generator
18-23
M82S
24
BLANK PAGE
25
BLANK PAGE
26
LCD CONN / HDMI CONN
27
CRT CONN 5C833/PCI
28 29
IEEE1394 Express/Card Reader
30 31
SIO (ITE8512)
32
FLASH / RTC
33
MINI-Card (WPAN, WWAN)
34
MINI-Card (WLAN) USB
35 36
SATA (HDD & CD_ROM)
37
TP / KEYBOARD SWITCH / /LED
38
FAN / THERMAL
39 40
Azelia CODEC AUDIO CONN
41
LAN (RTL8111B/8111C)
42 43
LAN RJ-45 / TRANSFORM
44
System Reset Circuit
45
Blank Page Changer (MAX8731A)
46
Blank Page
47 48
1.05VCCP & 1.5VRUN
1.8VSUS & 0.9VTT
49 50
VGA_M82
51
CPU_ISL6266 (2PHASE)
52
MAX8744 (+5V,3.3V)
53
Run Power Switch
54
DCin & Batt
55
PAD & SCREW
56
EMI CAP
57
SMBUS BLOCK
58
Power Block Diagram
POWER PLANE
+PWR_SRC +RTC_CELL +3.3V_ALW +5V_ALW +5V_ALW2 +3.3V_LAN +5V_SUS +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT +5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +1.2V_LOM +1.1V_GFX_PCIE +1.05V_VCCP +VCC_CORE +LCDVCC +5V_MOD +5V_HDD
10V~+19V
+3.0V~+3.3V
+3.3V +5V +5V +3.3V +5V +3.3V +1.8V +0.9V +5V +3.3V +1.8V +1.5V +1.25V +1.1V +1.05V 3,4,5,6,8,9,11,14,48,56
+0.7V~+1.77V
+3.3V +5V +5V
GND PLANE PAGE
8731AGND AGND_0.9V AGND_DC/DC AGND_DC2 AGND_DDR AGND_ISL6260
GND
46 49 52 48 49 51 ALL
4,26,32,34,46,48,49,50,51,52,56 11,14,31,32 3,13,31,32,34,36,37,38,44,46,49,52,53,54 35,36,46,48,49,52,53,54 37,38,52,53 42,43 14,38,50,51,53
3,11,12,13,14,20,26,30,37,38,43,48,49, 50,51,53
6,8,9,15,48,49,50,53 16,49,53 14,20,26,27,36,37,38,40,41,53
6,8,9,11,12,13,14,15,17,19,20,22,26,27,28,30, 31,33,34,36,38,39,40,41,42,53,56
19,20,21,22,23,38,53 4,9,14,30,33,34,48,53,56 42 21,50
4,51,56 26 36 36
DESCRIPTION
DESCRIPTION
MAIN POWER RTC 8051 POWER LCD/CHARGE POWER LARGE POWER LAN POWER SLP_S5# CTRLD POWER SLP_S5# CTRLD POWER SODIMM POWER SODIMM POWER SLP_S3# CTRLD POWER SLP_S3# CTRLD POWER SDVO POWER CALISTOGA/ICH8 POWER CALISTOGA/ICH8 POWER VGA POWER CPU/CALISTOGA/ICH8 POWER CPU CORE POWER LCD Power Module Power HDD Power
CONTROL SIGNAL
ALWON ALWON +5V_ALW AUX_ON SUS_ON
3.3V_SUS_ON DDR_ON
0.9V_DDR_VTT_ON RUN_ON
3.3V_RUN_ON RUN_ON
1.5V_RUN_ON
1.25V_RUN_ON RUN_ON
1.05V_RUN_ON IMVP_VR_ON
LCDVCC_TST_EN & ENVDD
MODC_EN# HDDC_EN#
ACTIVE INVOLTAGE PAGE
S0~S5 S0~S5 S0~S5 S0~S5 S0~S5
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Index & Power Status
Index & Power Status
Index & Power Status
FM6 1A
FM6 1A
FM6 1A
7
of
of
of
258Monday, June 30, 2008
258Monday, June 30, 2008
258Monday, June 30, 2008
8
1
2
3
4
5
6
7
8
H_A#[3..16]5
A A
H_ADSTB#05 H_REQ#[0..4]5
H_A#[17..35]5
B B
H_ADSTB#15
H_A20M#11
H_FERR#11
H_IGNNE#11 H_STPCLK#11
H_INTR11 H_NMI11 H_SMI#11
C C
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
TP10TP10 TP12TP12
TP7TP7 TP8TP8 TP13TP13 TP1TP1 TP14TP14 TP15TP15 TP11TP11 TP6TP6 TP5TP5 TP4TP4 TP2TP2 TP3TP3
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
Populate ITP700Flex for bringup
+1.05V_VCCP
R353
R353
R351
R351
54.9/F
54.9/F
54.9/F
54.9/F
ITP_TDI ITP_TMS ITP_TCK ITP_TDO ITP_TRST#
H_RESET#
ITP_TCK
D D
C137
C137
*100P_NC
*100P_NC
50
50
R355 54.9/FR355 54.9/F
R354 54.9/FR354 54.9/F
1 2
1
R349 *150_NCR349 *150_NC
CLK_ITP_BCLK#17 CLK_ITP_BCLK17
ITP_TCK
ITP_TRST#
R356 *0_NCR356 *0_NC
1 2
R350
R350
54.9/F
54.9/F
J4 L5 L4
K5
M3
N2
J1 N3 P5 P2
L2 P4 P1 R1
M1
K3 H2 K2
J3
L1 Y2
U5 R3
W6
U4 Y5 U1 R4 T5 T3
W2 W5
Y4 U2 V4
W3 AA4 AB2 AA3
V1 A6
A5 C4
D5 C6 B4 A3
F6 D3
N5
M4
B2
AE8
D8 F8
D22
T2
V3 AA8 AC8 AA7
JITP1
JITP1
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
U25A
U25A
A[3]#
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
TDI_1/RSV TDO_2/RSV
BMP_1#[0]/RSV BMP_1#[1]/RSV BMP_1#[2]/RSV BMP_1#[3]/VSS DCLKPH_1/VSS ACLKPH_1/VSS GTLREF_2/RSV THRMDA_1/RSV THRMDC_1/RSV HFPLL_1/VSS SPARE_1[4]/VSS BR1#/VCC
Penryn Ball-out Rev 1a
Penryn Ball-out Rev 1a
CONTROL
CONTROL
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
Quard Core Only
Quard Core Only
RSVD[06]
2
H1
ADS#
E2
BNR#
G5
BPRI#
H5
DEFER#
F21
DRDY#
E1
DBSY#
F1
BR0#
IERR#
INIT#
LOCK#
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HIT#
HITM#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TDO TMS
TRST#
DBR#
BCLK[0] BCLK[1]
TCK
H_IERR#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET#
R51 56R51 56
H_PROCHOT# H_THERMDA H_THERMDC
H_THERM
R83 56R83 56
C563
C563
*2200P_NC 50
*2200P_NC 50
+1.05V_VCCP
C481 *0.1U_NC
C481 *0.1U_NC
C482 *0.1U_NC
C482 *0.1U_NC
ITP_DBRESET#
ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5
R50 56R50 56
R68 0R68 0
10
10
10
10
R348 150R348 150
Layout nopte: Place R412,R354, R408, R409, R350 and R406 close to CPU
D20 B3
H4 C1
F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6
TDI
AB3 AB5 AB6 C20
D21 A24 B25
C7
A22 A21
D2
H_THERMDA H_THERMDC
Layout Note: Place couple 0.1uF Decoupling caps with in 0.1" ITP connector.
27
VTT0
28
VTT1
26
VTAP
25
DBR#
24
DBA#
23
BPM0#
21
BPM1#
19
BPM2#
17
BPM3#
15
BPM4#
13
BPM5#
4
NC0
6
NC1
29
GND_0
30
GND_1
*ITP700Flex_NC
*ITP700Flex_NC
H_ADS# 5 H_BNR# 5 H_BPRI# 5
H_DEFER# 5 H_DRDY# 5 H_DBSY# 5
H_BR0# 5
+1.05V_VCCP
H_INIT# 11 H_LOCK# 5
H_RS#0 5 H_RS#1 5 H_RS#2 5 H_TRDY# 5
H_HIT# 5 H_HITM# 5
ITP_DBRESET# 13
+1.05V_VCCP
T5PAD T5PAD
H_THERMDA 39
H_THERMDC 39
+1.05V_VCCP
CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17
TP9TP9
2/13-1
*54.9/F_NC
*54.9/F_NC
3
H_RESET#H_RESET#_L
4/23-48
+3.3V_SUS
+1.05V_VCCP
R352
R352
H_D#[0..63]5
6/27-58
+1.05V_VCCP
Layout Note: Place R421 close to
R67
R67
CPU.
*51/F_NC
*51/F_NC
H_RESET# 5
Layout Note: Place voltage divider within
0.5" of GTLREF pin
+1.05V_VCCP
R28
R28 1K/F
1K/F
R32
R32 2K/F
2K/F
+1.05V_VCCP
Q13
H_PROCHOT#
Q13
*2N7002W-7-F_NC
*2N7002W-7-F_NC
2
+3.3V_RUN
H_DSTBN#05 H_DSTBP#05 H_DINV#05
H_D#[0..63]5
H_DSTBN#15 H_DSTBP#15 H_DINV#15
CPU_MCH_BSEL06,17 CPU_MCH_BSEL16,17 CPU_MCH_BSEL26,17
+3.3V_ALW
Voltage Level shift
R43
R43 *2.2K_NC
*2.2K_NC
31
R63 *1K/F_NCR63 *1K/F_NC R66 *1K/F_NCR66 *1K/F_NC
CPU_PROCHOT#
2/13-2
R85
R85 10M
10M
2
H_THERM
Q22
Q22
MMST3904-7-F
MMST3904-7-F
ITP disable guidelines
Signal Resistor Value Connect To Resistor Placement
150 ohm +/- 5%
TDI
39 ohm +/- 5%
TMS
680 ohm +/- 5%
TRST#
27 ohm +/- 5%
TCK
Open
TDO
ITP_EN R268 Depop +3VRUN
12
2
4
C134
C134
0.1U
0.1U
1 3
10
10
H_D#[0..63] H_D#[0..63]
H_D#[0..63]
T10
T10
PAD
PAD
T1
PADT1PAD
T2
PADT2PAD
T11
T11
PAD
PAD
T7
PADT7PAD
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6 CPU_TEST7
FSB 533 0 0 667 800
AD26
AF26
BCLK
133 166 200
E22 F24 E26 G22 F23 G25 E25 E23 K24 G24
H22 F26 K22 H23
H26 H25
N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24
C23 D25 C24
AF1 A26
B22 B23 C21
J24 J23
J26
C3
U25B
U25B
D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#
D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]
Penryn Ball-out Rev 1a
Penryn Ball-out Rev 1a
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]#
DATA GRP 0
DATA GRP 2
DATA GRP 0
DATA GRP 2
D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
DATA GRP 1
DATA GRP 1
DATA GRP 3
DATA GRP 3
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
MISC
MISC
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
BSEL2 BSEL1 BSEL0
1
1
0
0011
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
0002661066
H_THERMTRIP# 6,52
31
Q23
Q23 2N7002W-7-F
2N7002W-7-F
Within 2.0" of the ITP
VTT VTT
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP Close to CK410M Pin8
5
6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
H_D#[0..63]
H_D#[0..63] 5
H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5
H_DPRSTP# 6,11,51 H_DPSLP# 11 H_DPWR# 5 H_PWRGOOD 11 H_CPUSLP# 5 H_PSI# 51
Title
Title
Title
Penryn Processor (HOST BUS)
Penryn Processor (HOST BUS)
Penryn Processor (HOST BUS)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM7 1A
FM7 1A
FM7 1A
Date: Sheet
Date: Sheet
Date: Sheet
7
COMP0 COMP1 COMP2 COMP3
R30
R30
R27
R27
54.9/F
54.9/F
27.4/F
27.4/F
Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal.
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
360Monday, August 04, 2008
360Monday, August 04, 2008
360Monday, August 04, 2008
8
R36
R36
54.9/F
54.9/F
R37
R37
27.4/F
27.4/F
of
of
of
1
2
3
4
5
6
7
8
+VCC_CORE +VCC_CORE
+VCC_CORE
A A
+VCC_CORE
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
C22
C19
C19 *10U_NC
*10U_NC
4
4 805
805
C23
C23 10U
10U
4
4 805
805
C22 10U
10U
4
4 805
805
C24
C24 10U
10U
4
4 805
805
C21
C21 10U
10U
4
4 805
805
C25
C25 *10U_NC
*10U_NC
4
4 805
805
C20
C20 10U
10U
4
4 805
805
C26
C26 10U
10U
4
4 805
805
C514
C514 10U
10U
4
4 805
805
C18
C18 10U
10U
4
4 805
805
8 inside cavity, north side, secondary layer.
+VCC_CORE
C536
C53
C54
C54 10U
10U
4
4 805
805
B B
+VCC_CORE
C50
C50 10U
10U
4
4 805
805
C53 *10U_NC
*10U_NC
4
4 805
805
C49
C49 10U
10U
4
4 805
805
C52
C52 10U
10U
4
4 805
805
C55
C55 10U
10U
4
4 805
805
C51
C51 10U
10U
4
4 805
805
C56
C56 *10U_NC
*10U_NC
4
4 805
805
C536 *10U_NC
*10U_NC
4
4 805
805
C57
C57 10U
10U
4
4 805
805
8 inside cavity, south side, secondary layer.
+VCC_CORE
C510
C511
C511 10U
10U
4
4 805
805
C510 10U
10U
4
4 805
805
C509
C509 *10U_NC
*10U_NC
4
4 805
805
C508
C508 10U
10U
4
4 805
805
C513
C513 *10U_NC
*10U_NC
4
4 805
805
C512
C512 10U
10U
4
4 805
805
6 inside cavity, north side, primary layer.
+VCC_CORE
C C
C530
C530 *10U_NC
*10U_NC
4
4 805
805
C531
C531 10U
10U
4
4 805
805
C532
C532 10U
10U
4
4 805
805
C533
C533 10U
10U
4
4 805
805
C534
C534 10U
10U
4
4 805
805
C535
C535 10U
10U
4
4 805
805
6 inside cavity, south side, primary layer.
+PWR_SRC
+1.05V_VCCP
+
+
C507
C507 100U
C29
C42
C28
C28
0.1U
0.1U
10
10
Layout out: Place these inside socket cavity on North side secondary.
D D
C42
0.1U
0.1U
10
10
C30
C30
0.1U
0.1U
10
10
C43
C43
0.1U
0.1U
10
10
C29
0.1U
0.1U
10
10
C41
C41
0.1U
0.1U
10
10
100U
25
25
Layout Note: Need to add 100uF cap on PWR_SRC for cap singing. Place on PWR_SRC near +VCC_CORE.
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
A10 A12 A13 A15 A17 A18 A20
B10 B12 B14 B15 B17 B18 B20
C10 C12 C13 C15 C17 C18
D10 D12 D14 D15 D17 D18
E10 E12 E13 E15 E17 E18 E20
F10 F12 F14 F15 F17 F18 F20
AA9
AB9
A7 A9
B7 B9
C9
D9
E7 E9
F7 F9
39
U25C
U25C
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050]
VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE
VSSSENSE
Penryn Ball-out Rev 1a
Penryn Ball-out Rev 1a
+
+
C522
C522 100U
100U
25
25
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
+
+
C517
C517 *100U_NC
*100U_NC
25
25
+VCCSENSE
+VSSSENSE
+1.05V_VCCP
+
+
C33
C33
220uF
220uF
VID0 51 VID1 51 VID2 51 VID3 51 VID4 51 VID5 51 VID6 51
+VCCSENSE 51
+VSSSENSE 51
+
+
C505
C505 *100U_NC
*100U_NC
25
25
5/7
+1.5V_RUN
C556
C556
0.01U
0.01U
25
25
Layout Note: Place C194 near PIN B26.
+VCC_CORE
+VCCSENSE +VSSSENSE
Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.
R23
R23 100/F
100/F
R22
R22 100/F
100/F
C557
C557 10U
10U
4
4
U25D
U25D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
Penryn Ball-out Rev 1a
Penryn Ball-out Rev 1a
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110]
VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128]
VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146]
VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]
VSS[163]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5
AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6
AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4
AE11 AE14 AE16 AE19
.
. AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Penryn Processor (HOST BUS)
Penryn Processor (HOST BUS)
Penryn Processor (HOST BUS)
FM7 1A
FM7 1A
FM7 1A
7
of
of
of
460Monday, August 04, 2008
460Monday, August 04, 2008
460Monday, August 04, 2008
8
1
A A
B B
C C
+1.05V_VCCP
12
R416
R416 221/F
221/F
H_SWING
12
R417
R417 100/F
100/F
12
R421
R421
24.9/F
24.9/F
Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil spacing.
1 2
H_RCOMP
2
Layout Note:
C577
C577
0.1uF place close
0.1U/10V
0.1U/10V
to pin C5
H_D#[0..63]3
+1.05V_VCCP
R415
R415 1K/F
1K/F
1 2
12
R419
R419 2K/F
2K/F
3
H_RESET#3
H_CPUSLP#3
12
C580
C580
0.1U/10V
0.1U/10V
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
H_REF
4
U28A
U28A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA_1p0
CANTIGA_1p0
5
H_ADSTB#_0 H_ADSTB#_1
HOST
HOST
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20
H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9
J8 L3 Y13 Y1
L10 M7 AA5 AE6
L9 M8 AA6 AE5
B15 K13 F13 B13 B14
B6 F12 C8
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
6
H_A#[3..35] 3
H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3 H_BNR# 3 H_BPRI# 3 H_BR0# 3 H_DEFER# 3 H_DBSY# 3 CLK_MCH_BCLK 17 CLK_MCH_BCLK# 17 H_DPWR# 3 H_DRDY# 3 H_HIT# 3 H_HITM# 3 H_LOCK# 3 H_TRDY# 3
H_DINV#0 3 H_DINV#1 3 H_DINV#2 3 H_DINV#3 3
H_DSTBN#0 3 H_DSTBN#1 3 H_DSTBN#2 3 H_DSTBN#3 3
H_DSTBP#0 3 H_DSTBP#1 3 H_DSTBP#2 3 H_DSTBP#3 3
H_REQ#0 3 H_REQ#1 3 H_REQ#2 3 H_REQ#3 3 H_REQ#4 3
H_RS#0 3 H_RS#1 3 H_RS#2 3
7
8
Layout Note: Place the 0.1 uF
D D
1
2
decoupling capacitor within 100 mils from GMCH pins.
3
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
5
6
Date: Sheet
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
FM7 1A
FM7 1A
FM7 1A
7
of
of
of
560Wednesday, July 30, 2008
560Wednesday, July 30, 2008
560Wednesday, July 30, 2008
8
1
+1.8V_SUS
R202
R202 1K/F
SM_RCOMP_VOH
C277
C277
0.01U
0.01U
25
25
A A
SM_RCOMP_VOL
C293
C293
0.01U
0.01U
25
25
+3.3V_RUN
R131 10KR131 10K R135 10KR135 10K
+1.05V_VCCP
R130 56R130 56
B B
+3.3V_RUN
C C
D D
H_THERMTRIP#3,52
DPRSLPVR13,51
1K/F
C285
C285
2.2U
2.2U
R205
R205
10
10
3.01K
3.01K
C294
C294
2.2U
2.2U
R210
R210
10
10
1K/F
1K/F
PM_EXTTS#0 PM_EXTTS#1
THERMTRIP_MCH#
Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.
CPU_MCH_BSEL03,17 CPU_MCH_BSEL13,17 CPU_MCH_BSEL23,17
1
T35
T35
PAD
PAD
T39
T39
PAD
PAD
R99 *2.21K/F_NCR99 *2.21K/F_NC
12
T34
T34
PAD
PAD
T33
T33
PAD
PAD
T22
T22
PAD
PAD
R104 *2.21K/F_NCR104 *2.21K/F_NC
12
T28
T28
PAD
PAD
T38
T38
PAD
PAD
T40
T40
PAD
PAD
T41
T41
PAD
PAD
T37
T37
PAD
PAD
T32
T32
PAD
PAD
R121 *2.21K/F_NCR121 *2.21K/F_NC
12
T29
T29
PAD
PAD
T36
T36
PAD
PAD
*4.02K_NC
*4.02K_NC
R137
R137
*4.02K_NC
*4.02K_NC
R138
R138
PM_BMBUSY#13
H_DPRSTP#3,11,51 PM_EXTTS#015 PM_EXTTS#115 ICH_PWRGD13,44
R133 *0_NCR133 *0_NC R127 0R127 0
T110
T110
PAD
PAD
T109
T109
PAD
PAD
T107
T107
PAD
PAD
T106
T106
PAD
PAD
T112
T112
PAD
PAD
T45
T45
PAD
PAD
T108
T108
PAD
PAD
T113
T113
PAD
PAD
T46
T46
PAD
PAD
T116
T116
PAD
PAD
T114
T114
PAD
PAD
T115
T115
PAD
PAD
T117
T117
PAD
PAD
T118
T118
PAD
PAD
T119
T119
PAD
PAD
T120
T120
PAD
PAD
SB_NB_PCIE_RST#12
PLTRST#12,30,31,33,34,42
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
PM_EXTTS#0 PM_EXTTS#1
PLTRST#_R THERMTRIP_MCH# DPRSLPVR_R
R181 *0_NCR181 *0_NC
R182 0R182 0
AH10 AH12 AH13
AL34 AK34 AN35 AM35
AY21
BG23 BF23 BH18 BF18
AT40 AT11
BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43
M36
N36 R33 T33
AH9
K12
T24 B31
AJ6
M1
A47
T25 R25 P25 P20 P24 C25 N24
M24
E21 C23 C24 N21 P21 T21 R20
M20
L21 H21 P29 R28 T28
R29
B7 N33 P32
T20 R32
BH6 BH5 BG4 BH3
BF3
BH2 BG2 BE2 BG1
BF1
BD1 BC1
F1
2
U28B
U28B
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14
RSVD15 RSVD16 RSVD17
RSVD20
RSVD21 RSVD22 RSVD23 RSVD24 RSVD25
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25
CANTIGA_1p0
CANTIGA_1p0
R180 100R180 100
2
NC
NC
PLTRST#_R
3
AP24
SA_CK_0
AT21
SA_CK_1
AV24
SB_CK_0
AU20
SB_CK_1
AR24
SA_CK#_0
AR21
SA_CK#_1
AU24
SB_CK#_0
AV20
SB_CK#_1
BC28
SA_CKE_0
AY28
SA_CKE_1
AY36
SB_CKE_0
RSVD
RSVD
SM_RCOMP_VOH SM_RCOMP_VOL
DDR CONTROL/COMPENSATION
DDR CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
CFG
CFG
DMI
DMI
PM
PM
GRAPHICS VID
GRAPHICS VID
MEHDA
MEHDA
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
MISC
MISC
SB_CKE_1 SA_CS#_0
SA_CS#_1 SB_CS#_0 SB_CS#_1
SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST# DPLL_REF_CLK
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
CLKREQ#
ICH_SYNC#
TSATN
HDA_BCLK HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
BB36 BA17
AY16 AV16 AR13
BD17 AY17 BF15 AY13
BG22 BH21
BF28 BH28
AV42 AR36 BF17 BC36
B38 A38 E41 F41
F43 E43
AE41 AE37 AE47 AH39
AE40 AE38 AE48 AH40
AE35 AE43 AE46 AH42
AD35 AE44 AF46 AH43
B33 B32 G33 F33 E33
C34
AH37 AH36 AN36 AJ35 AH34
N28 M28 G36 E36 K36 H36
B12
B28 B30 B29 C29 A28
M_CLK_DDR0 15 M_CLK_DDR1 15 M_CLK_DDR3 15 M_CLK_DDR4 15
M_CLK_DDR#0 15 M_CLK_DDR#1 15 M_CLK_DDR#3 15 M_CLK_DDR#4 15
DDR_CKE0_DIMMA 15,16 DDR_CKE1_DIMMA 15,16 DDR_CKE3_DIMMB 15,16 DDR_CKE4_DIMMB 15,16
DDR_CS0_DIMMA# 15,16 DDR_CS1_DIMMA# 15,16 DDR_CS2_DIMMB# 15,16 DDR_CS3_DIMMB# 15,16
M_ODT0 15,16 M_ODT1 15,16 M_ODT2 15,16 M_ODT3 15,16
SMRCOMPP SMRCOMPN
SM_RCOMP_VOH SM_RCOMP_VOL
V_DDR_MCH_REF_L
R177 0R177 0
12
R204 499/FR204 499/F
CLK_MCH_3GPLL 17 CLK_MCH_3GPLL# 17
DMI_MRX_ITX_N0 12 DMI_MRX_ITX_N1 12 DMI_MRX_ITX_N2 12 DMI_MRX_ITX_N3 12
DMI_MRX_ITX_P0 12 DMI_MRX_ITX_P1 12 DMI_MRX_ITX_P2 12 DMI_MRX_ITX_P3 12
DMI_MTX_IRX_N0 12 DMI_MTX_IRX_N1 12 DMI_MTX_IRX_N2 12 DMI_MTX_IRX_N3 12
DMI_MTX_IRX_P0 12 DMI_MTX_IRX_P1 12 DMI_MTX_IRX_P2 12 DMI_MTX_IRX_P3 12
T102 PADT102 PAD T103 PADT103 PAD T31 PADT31 PAD T30 PADT30 PAD T26 PADT26 PAD
T24 PADT24 PAD
CL_CLK0 13 CL_DATA0 13 ICH_CL_PWROK 13,31
ICH_CL_RST0# 13
MCH_CLVREF
CLK_3GPLLREQ# 17 MCH_ICH_SYNC# 13
R87 56R87 56
3
+1.05V_VCCP
+1.8V_SUS
R201
R201 *1K/F_NC
*1K/F_NC R206 0R206 0
R196
R196 *1K/F_NC
*1K/F_NC
4
SMRCOMPP SMRCOMPN
1 2
+1.05V_VCCP
Non-iAMT
MCH_CLVREF
12
C231
C231
0.1U
0.1U
CL_VREF~=0.35V
4
+1.8V_SUS
R207
R207
80.6/F
80.6/F
R209
R209
80.6/F
80.6/F
V_DDR_MCH_REF
R150
R150 1K/F
1K/F
R152
R152 499/F
499/F
5
12
12
CFG5
CFG9
CFG16
CFG19
CFG20
SDVO_CRTL_DATA
5
U28C
U28C
L32
L_BKLT_CTRL
G32
L_BKLT_EN
M32
L_CTRL_CLK
M33
L_CTRL_DATA
K33
L_DDC_CLK
J33
L_DDC_DATA
M29
L_VDD_EN
C44
LVDS_IBG
B43
LVDS_VBG
E37
LVDS_VREFH
E38
LVDS_VREFL
C41
LVDSA_CLK#
C40
LVDSA_CLK
B37
LVDSB_CLK#
A37
LVDSB_CLK
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
G40
LVDSA_DATA#_2
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
D45
LVDSA_DATA_1
F40
LVDSA_DATA_2
B40
LVDSA_DATA_3
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
J37
LVDSB_DATA#_3
B42
LVDSB_DATA_0
G38
LVDSB_DATA_1
F37
LVDSB_DATA_2
K37
LVDSB_DATA_3
F25
TVA_DAC
H25
TVB_DAC
K25
TVC_DAC
H24
TV_RTN
C31
TV_DCONSEL_0
E32
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
CRT_DDC_CLK
J32
CRT_DDC_DATA
J29
CRT_HSYNC
E29
CRT_TVO_IREF
L29
CRT_VSYNC
CANTIGA_1p0
CANTIGA_1p0
DMI X2 Select PCI Express
Graphic Lane FSB Dynamic
ODT DMI Lane
Reversal
SDVO/PCIE Concurrent Operation
SDVO Present.
6
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6
LVDS
LVDS
TV
TV
Low=DMIx2 High=DMIx4(Default)
Low= Reveise Lane High=Normal operation
Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).
Low=Normal(default). High=Lane Reversed
Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port
Low=No SDVO Device Present (default) High=SDVO Device Present
6
PEG_RX#_7 PEG_RX#_8
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
VGA
VGA
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
+VCC3G_PCIE_R+VCC3G_PCIE_R
T37 T36
PCIE_MRX_GTX_N0PCIE_MRX_GTX_N0
H44
PCIE_MRX_GTX_N1
J46
PCIE_MRX_GTX_N2PCIE_MRX_GTX_N2
L44
PCIE_MRX_GTX_N3PCIE_MRX_GTX_N3
L40
PCIE_MRX_GTX_N4PCIE_MRX_GTX_N4
N41
PCIE_MRX_GTX_N5PCIE_MRX_GTX_N5
P48
PCIE_MRX_GTX_N6PCIE_MRX_GTX_N6
N44
PCIE_MRX_GTX_N7PCIE_MRX_GTX_N7
T43
PCIE_MRX_GTX_N8PCIE_MRX_GTX_N8
U43
PCIE_MRX_GTX_N9PCIE_MRX_GTX_N9
Y43
PCIE_MRX_GTX_N10PCIE_MRX_GTX_N10
Y48
PCIE_MRX_GTX_N11PCIE_MRX_GTX_N11
Y36
PCIE_MRX_GTX_N12PCIE_MRX_GTX_N12
AA43
PCIE_MRX_GTX_N13PCIE_MRX_GTX_N13
AD37
PCIE_MRX_GTX_N14PCIE_MRX_GTX_N14
AC47
PCIE_MRX_GTX_N15PCIE_MRX_GTX_N15
AD39
PCIE_MRX_GTX_P0PCIE_MRX_GTX_P0
H43
PCIE_MRX_GTX_P1
J44
PCIE_MRX_GTX_P2PCIE_MRX_GTX_P2
L43
PCIE_MRX_GTX_P3PCIE_MRX_GTX_P3
L41
PCIE_MRX_GTX_P4PCIE_MRX_GTX_P4
N40
PCIE_MRX_GTX_P5PCIE_MRX_GTX_P5
P47
PCIE_MRX_GTX_P6PCIE_MRX_GTX_P6
N43
PCIE_MRX_GTX_P7PCIE_MRX_GTX_P7
T42
PCIE_MRX_GTX_P8PCIE_MRX_GTX_P8
U42
PCIE_MRX_GTX_P9PCIE_MRX_GTX_P9
Y42
PCIE_MRX_GTX_P10PCIE_MRX_GTX_P10
W47
PCIE_MRX_GTX_P11PCIE_MRX_GTX_P11
Y37
PCIE_MRX_GTX_P12PCIE_MRX_GTX_P12
AA42
PCIE_MRX_GTX_P13PCIE_MRX_GTX_P13
AD36
PCIE_MRX_GTX_P14PCIE_MRX_GTX_P14
AC48
PCIE_MRX_GTX_P15PCIE_MRX_GTX_P15
AD40
PCIE_MTX_GRX_C_N0PCIE_MTX_GRX_C_N0
J41
PCIE_MTX_GRX_C_N1PCIE_MTX_GRX_C_N1
M46
PCIE_MTX_GRX_C_N2PCIE_MTX_GRX_C_N2
M47
PCIE_MTX_GRX_C_N3PCIE_MTX_GRX_C_N3
M40
PCIE_MTX_GRX_C_N4PCIE_MTX_GRX_C_N4
M42
PCIE_MTX_GRX_C_N5PCIE_MTX_GRX_C_N5
R48
PCIE_MTX_GRX_C_N6PCIE_MTX_GRX_C_N6
N38
PCIE_MTX_GRX_C_N7PCIE_MTX_GRX_C_N7
T40
PCIE_MTX_GRX_C_N8PCIE_MTX_GRX_C_N8
U37
PCIE_MTX_GRX_C_N9PCIE_MTX_GRX_C_N9
U40
PCIE_MTX_GRX_C_N10PCIE_MTX_GRX_C_N10
Y40
PCIE_MTX_GRX_C_N11PCIE_MTX_GRX_C_N11
AA46
PCIE_MTX_GRX_C_N12PCIE_MTX_GRX_C_N12
AA37
PCIE_MTX_GRX_C_N13PCIE_MTX_GRX_C_N13
AA40
PCIE_MTX_GRX_C_N14PCIE_MTX_GRX_C_N14
AD43
PCIE_MTX_GRX_C_N15PCIE_MTX_GRX_C_N15
AC46
PCIE_MTX_GRX_C_P0PCIE_MTX_GRX_C_P0
J42
PCIE_MTX_GRX_C_P1PCIE_MTX_GRX_C_P1
L46
PCIE_MTX_GRX_C_P2PCIE_MTX_GRX_C_P2
M48
PCIE_MTX_GRX_C_P3PCIE_MTX_GRX_C_P3
M39
PCIE_MTX_GRX_C_P4PCIE_MTX_GRX_C_P4
M43
PCIE_MTX_GRX_C_P5PCIE_MTX_GRX_C_P5
R47
PCIE_MTX_GRX_C_P6PCIE_MTX_GRX_C_P6
N37
PCIE_MTX_GRX_C_P7PCIE_MTX_GRX_C_P7
T39
PCIE_MTX_GRX_C_P8PCIE_MTX_GRX_C_P8
U36
PCIE_MTX_GRX_C_P9PCIE_MTX_GRX_C_P9
U39
PCIE_MTX_GRX_C_P10PCIE_MTX_GRX_C_P10
Y39
PCIE_MTX_GRX_C_P11PCIE_MTX_GRX_C_P11
Y46
PCIE_MTX_GRX_C_P12PCIE_MTX_GRX_C_P12
AA36
PCIE_MTX_GRX_C_P13PCIE_MTX_GRX_C_P13
AA39
PCIE_MTX_GRX_C_P14PCIE_MTX_GRX_C_P14
AD42
PCIE_MTX_GRX_C_P15PCIE_MTX_GRX_C_P15
AD46
7
+VCC_PEG
R134 49.9/FR134 49.9/F
1 2
place R4209 close to MCH, 500mil
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
Title
Title
Title
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM7 1A
FM7 1A
FM7 1A
Date: Sheet
Date: Sheet
Date: Sheet
7
C560 0.1UC560 0.1U C567 0.1UC567 0.1U C570 0.1UC570 0.1U C574 0.1UC574 0.1U C575 0.1UC575 0.1U C584 0.1UC584 0.1U C582 0.1UC582 0.1U C587 0.1UC587 0.1U C590 0.1UC590 0.1U C595 0.1UC595 0.1U C597 0.1UC597 0.1U C604 0.1UC604 0.1U C603 0.1UC603 0.1U C609 0.1UC609 0.1U C613 0.1UC613 0.1U C615 0.1UC615 0.1U
C559 0.1UC559 0.1U C564 0.1UC564 0.1U C565 0.1UC565 0.1U C571 0.1UC571 0.1U C572 0.1UC572 0.1U C583 0.1UC583 0.1U C578 0.1UC578 0.1U C586 0.1UC586 0.1U C588 0.1UC588 0.1U C591 0.1UC591 0.1U C599 0.1UC599 0.1U C608 0.1UC608 0.1U C602 0.1UC602 0.1U C611 0.1UC611 0.1U C610 0.1UC610 0.1U C622 0.1UC622 0.1U
PCIE_MTX_GRX_N[0..15] 18 PCIE_MTX_GRX_P[0..15] 18
PCIE_MRX_GTX_N[0..15] 18
PCIE_MRX_GTX_P[0..15] 18
8
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
660Wednesday, July 30, 2008
660Wednesday, July 30, 2008
660Wednesday, July 30, 2008
of
of
of
8
1
2
3
4
5
6
7
8
DDR_A_D[0..63]15
A A
B B
C C
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AJ38
AJ41 AN38 AM38
AJ36
AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36
AW36
BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12
BB9 BA9
AU10
AV9
BA11
BD9 AY8 BA6 AV5 AV7
AN8 AU5 AU6
AN10 AM11
AM5
AN12 AM13
AJ11
AJ12
AT9
AT5
AJ9 AJ8
U28D
U28D
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
CANTIGA_1p0
CANTIGA_1p0
DDR_A_BS0
BD21
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA_14
BG18 AT25
BB20 BD20 AY20
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
DDR_A_BS1 DDR_A_BS2
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_BS0 15,16 DDR_A_BS1 15,16 DDR_A_BS2 15,16
DDR_A_RAS# 15,16 DDR_A_CAS# 15,16 DDR_A_WE# 15,16
DDR_A_DM[0..7] 15
DDR_A_DQS[0..7] 15
DDR_A_DQS#[0..7] 15
DDR_A_MA[0..14] 15,16
DDR_B_D[0..63]15
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AK47 AH46 AP47 AP46
AJ46 AJ48
AM48
AP48 AU47 AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8 BH12 BF11
BG7
BC5
BC6
AY3
AY1
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AH1
AM2
AM3
AH3
BF8
BF6 BF5
AL1 AL2 AJ1
AJ3
U28E
U28E
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
CANTIGA_1p0
CANTIGA_1p0
DDR_B_BS0
BC16
SB_BS_0 SB_BS_1 SB_BS_2
SB_RAS# SB_CAS#
SB_WE#
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA_14
BB17 BB33
AU17 BG16 BF14
AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2
AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5
AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
DDR_B_BS1 DDR_B_BS2
DDR_B_RAS# DDR_B_CAS# DDR_B_WE#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
DDR_B_BS0 15,16 DDR_B_BS1 15,16 DDR_B_BS2 15,16
DDR_B_RAS# 15,16 DDR_B_CAS# 15,16 DDR_B_WE# 15,16
DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..14] 15,16
D D
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
FM7 1A
FM7 1A
FM7 1A
7
of
of
of
760Wednesday, July 30, 2008
760Wednesday, July 30, 2008
760Wednesday, July 30, 2008
8
5
U28G
AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32
AW32
AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29
AW29
AV29 AU29 AT29 AR29 AP29
BA36 BB24 BD16
BB21 AW16 AW13
AT13
AE25
AB25
AA25
AE24
AC24
AA24
AE23
AC23
AB23
AA23
AJ21 AG21 AE21 AC21 AA21
AH20 AF20 AE20 AC20 AB20 AA20
AM15
AL15 AE15
AJ15 AH15 AG15 AF15 AB15 AA15
AN14
AM14
AJ14 AH14
Y26
Y24
Y21
T17 T16
Y15 V15 U15
U14 T14
5
U28G
VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35
VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC
VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42
VCC_AXG_SENSE VSS_AXG_SENSE
CANTIGA_1p0
CANTIGA_1p0
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8
VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21
POWER
POWER
VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
VCC SM LF
VCC SM LF
+1.8V_SUS
D D
2600mA
C C
2/13-3
B B
+1.05V_VCCP
R16010R160 10
1 2
A A
R15910R159 10
1 2
UMA: Places R721, R726 to 10 ohm. Dis: Please R721, R726 to 0 ohm.
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
AV44 BA37 AM40 AV21 AY5 AM10 BB13
4
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
4
2/13-3
12
C276
C276
0.1U/10V
0.1U/10V
Layout Note: 370 mils from edge.
+1.8V_SUS
12
C299
C299
0.1U/10V
0.1U/10V
Layout Note: Place C233 where LVDS and DDR2 taps.
12
12
C248
C248
0.1U/10V
0.1U/10V
C271
C271
0.22U/10V
0.22U/10V
+1.05V_VCCP
5/7
+
+
12
C263
C263
0.22U/10V
0.22U/10V
3
+3.3V_RUN
R86 10R86 10
1 2
Layout Note: Inside GMCH cavity.
Ivcc=1930.4+508.12=2438.52mA
C592
C592 220U
220U
3
12
C251
C251
0.47U/10V
0.47U/10V
12
C191
C191 22U/4V
22U/4V
5/7
+
+
12
C706
C706 220U
220U
2.5
2.5
C275
C275 1U/10V
1U/10V
12
C197
C197
0.22U/10V
0.22U/10V
12
Layout Note: Place on the edge.
C261
C261 1U/10V
1U/10V
12
C302
C302 22U/4V
22U/4V
+VCC_GMCH_L
12
C206
C206
0.22U/10V
0.22U/10V
VCC_SM
12
C270
C270 22U/4V
22U/4V
D7
D7
SDMK0340L-7-F
SDMK0340L-7-F
12
C220
C220
0.1U/10V
0.1U/10V
2
U28F
U28F
21
2
AG34
VCC_1
AC34
VCC_2
AB34
VCC_3
AA34
VCC_4
Y34
VCC_5
V34
VCC_6
U34
VCC_7
AM33
VCC_8
AK33
VCC_9
AJ33
VCC_10
AG33
VCC_11
AF33
VCC_12
AE33
VCC_13
AC33
VCC_14
AA33
VCC_15
Y33
VCC_16
W33
VCC_17
V33
VCC_18
U33
VCC_19
AH28
VCC_20
AF28
VCC_21
AC28
VCC_22
AA28
VCC_23
AJ26
VCC_24
AG26
VCC_25
AE26
VCC_26
AC26
VCC_27
AH25
VCC_28
AG25
VCC_29
AF25
VCC_30
AG24
VCC_31
AJ23
VCC_32
AH23
VCC_33
AF23
VCC_34
T32
VCC_35
CANTIGA_1p0
CANTIGA_1p0
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VCC CORE
VCC CORE
POWER
POWER
QUANTA
QUANTA
QUANTA COMPUTER
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
FM7 1A
FM7 1A
FM7 1A
1
VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8
VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31
VCC NCTF
VCC NCTF
VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44
1
AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
860Wednesday, July 30, 2008
860Wednesday, July 30, 2008
860Wednesday, July 30, 2008
+1.05V_VCCP
of
of
of
5
+1.05V_VCCP
R1510R151
45mA MAx.
0
FB_120ohm+-25%_100mHz _200mA_0.2ohm DC
L19
L19
+VCCA_HPLL
12
BLM18AG121SN1D
BLM18AG121SN1D
603
603
+VCCA_MPLL_L
D D
12
C244
C244 22U
22U
1206 10V
1206 10V
1 2
0.5/F 603
0.5/F 603
L20
L20 BLM18AG121SN1D
BLM18AG121SN1D
603
603
R149
R149
1 2
+VCCA_MPLL
12
C218
C218
4.7U
4.7U
805
805
6.3
6.3
12
C210
C210
0.1U/10V
0.1U/10V
10V
10V
12
C223
C223
0.1U
0.1U
10V
10V
2/13-7
R161 0
+VCCA_PEG_PLL
12
R164
R164 1/F
1/F
603
603
+VCCA_PEG_PLL_R
12
C247
C247 10U
10U
603
603
6.3
6.3
12
C180
C180 *0.1U_NC
*0.1U_NC
10V
10V
+VCCD_QDAC
12
C169
C169
0.1U
0.1U
10V
10V
R161 0
0603
0603
+1.05V_VCCP
+1.05V_VCCP
C C
B B
+1.5V_RUN
+1.5V_RUN
L22
L22
1 2
BLM21PG221SN1D
BLM21PG221SN1D
805
805
FB_220ohm+-25%_100MHz _2A_0.1ohm DC
+1.05V_VCCP
L23
L23
BLM18PG181SN1D
BLM18PG181SN1D
603
603
12
+VCCD_PEG_PLL_RC
R107 *0_NC
R107 *0_NC
12
0603
0603
R100 0
R100 0
12
0603
0603
50mA
+VCCD_PEG_PLL
R1761R176 1
C259
C259 10U
10U
603
603
6.3
6.3
C176
C176 *0.01U_NC
*0.01U_NC
25
25
C170
C170
0.01U
0.01U
25
25
5/7
+1.05V_VCCP
+VCCD_TVDAC
+VCCA_SM
12
C301
C301
+
+
*100U_NC
*100U_NC
7343
7343 2V
2V
1uH+-20%_300mA
R1130R113 0
1 2
L21
L21 1uH/300mA
1uH/300mA
2/13-8
2/13-8
C262
C262
4.7U
4.7U
805
805
6.3
6.3
12
4
AB total 64.8mA
139.2mA
+1.5V_RUN
12
C243
C243 *22U_NC
*22U_NC
805
805 10
10
+VCCA_SM_CK
12
C246
C246 *22U/10V_NC
*22U/10V_NC
C222 0.1U/10VC222 0.1U/10V
157.2mA
24mA
12
C215
C215
0.1U
0.1U
10V
10V
12
C239
C239 22U
22U
805
805 10
10
12
C257
C257 22U/10V
22U/10V
2/13-8
C258
C258
0.1U/10V
0.1U/10V
12 12
+VCCA_HPLL +VCCA_MPLL
13.2mA
414uA
+VCCA_PEG_PLL
12
C245
C245
0.1U
0.1U
10V
10V
480mA
12
C255
C255 1U
1U
603
603 10
10
24mA
12
C260
C260
0.1U/10V
0.1U/10V
+VCCD_TVDAC
+VCCD_QDAC +VCCA_MPLL +VCCD_PEG_PLL
50mA
U28H
U28H
B27
VCCA_CRT_DAC_1
A26
VCCA_CRT_DAC_2
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
J48
VCCA_LVDS
J47
VSSA_LVDS
AD48
VCCA_PEG_BG
AA48
VCCA_PEG_PLL
AR20
VCCA_SM_1
AP20
VCCA_SM_2
AN20
VCCA_SM_3
AR17
VCCA_SM_4
AP17
VCCA_SM_5
AN17
VCCA_SM_6
AT16
VCCA_SM_7
AR16
VCCA_SM_8
AP16
VCCA_SM_9
AP28
VCCA_SM_CK_1
AN28
VCCA_SM_CK_2
AP25
VCCA_SM_CK_3
AN25
VCCA_SM_CK_4
AN24
VCCA_SM_CK_5
AM28
VCCA_SM_CK_NCTF_1
AM26
VCCA_SM_CK_NCTF_2
AM25
VCCA_SM_CK_NCTF_3
AL25
VCCA_SM_CK_NCTF_4
AM24
VCCA_SM_CK_NCTF_5
AL24
VCCA_SM_CK_NCTF_6
AM23
VCCA_SM_CK_NCTF_7
AL23
VCCA_SM_CK_NCTF_8
B24
VCCA_TV_DAC_1
A24
VCCA_TV_DAC_2
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL
AA47
VCCD_PEG_PLL
M38
VCCD_LVDS_1
L37
VCCD_LVDS_2
CANTIGA_1p0
CANTIGA_1p0
3
CRTPLLA PEGA SM
CRTPLLA PEGA SM
A LVDS
A LVDS
POWER
POWER
A CK
A CK
TV
TV
HDA
HDA
D TV/CRT
D TV/CRT
LVDS
LVDS
AXF
AXF
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
HV
HV
PEG
PEG
DMI
DMI
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14
VTT
VTT
VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
VCC_HV_1 VCC_HV_2 VCC_HV_3
VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4
VTTLF1 VTTLF2 VTTLF3
VTTLF
VTTLF
U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1
B22 B21 A21
BF21 BH20 BG20 BF20
K47 C35
B35 A35
V48 U48 V47 U47 U46
AH48 AF48 AH47 AG47
A8 L1 AB2
12
C205
C205
2.2U/6.3V
2.2U/6.3V
+VCC_AXF
+VCC_SM_CK
+VCC_TX_LVDS_L
+3.3V_VCC_HV
1782mA
+VCC_DMI
456mA
+VTTLF1 +VTTLF2 +VTTLF3
852mA
12
C199
C199
4.7U/6.3V
4.7U/6.3V
Close to VTT
119.85mA
118.8mA
105.3mA
5/7
+VTTLF1 +VTTLF2 +VTTLF3
12
+
+
C649
C649 220U/2.5V
220U/2.5V
2.5
2.5
12
C234
C234
0.1U/10V
0.1U/10V
12
C204
C204
0.47U/10V
0.47U/10V
2
12
+VCC_PEG
C207
C207
0.47U/6.3V
0.47U/6.3V
12
C219
C219 22U/10V
22U/10V
L68
L68 91nH/1.5A
91nH/1.5A
12
12
C203
C203
4.7U
4.7U
603
603
6.3
6.3
12
C581
C581 1U/10V
1U/10V
12
C697
C697
0.1U/10V
0.1U/10V
C233
C233
4.7U
4.7U
805
805
1 2
6.3
6.3
91uH+-20%_1.5A
12
C182
C182
0.47U/10V
0.47U/10V
+1.05V_VCCP
12
+
+
C627
C627 220U/2.5V
220U/2.5V
7343
7343
2.5
2.5
Place on chip edge.
C573
C573 *10U_NC
*10U_NC
603
603
6.3
6.3
L74
L74 1uH/300MA
1uH/300MA
12
R5181R518 1
+VCC_SM_CK_L
C701
C701 10U
10U
603
603
6.3
6.3
L64
L64
91uH+-20%_1.5A
12
91nH/1.5A
91nH/1.5A
+1.05V_VCCP
12
C566
C566
0.47U/10V
0.47U/10V
5/7
L510L51 0
1 2
Reserved L pad for inductor.
805
805
+1.8V_SUS
+1.05V_VCCP
+3.3V_VCC_HV
R422 0R422 0
12
C576
C576
0.1U/10V
0.1U/10V
1 2
1
VCC_HV
D8
D8 *SDMK0340L-7-F_NC
*SDMK0340L-7-F_NC
+1.05V_VCCP
+1.05V_VCCP
21
D32
D32 SDM10K45-7-F
SDM10K45-7-F
R41810R418 10
1 2
+1.05V_VCCP
21
+VCC_HV_L
12
+3.3V_RUN
5/29-51
+3.3V_RUN
R93
R93 *10_NC
*10_NC
A A
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
COMPUTER
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
FM7 1A
FM7 1A
FM7 1A
1
of
of
of
960Wednesday, July 30, 2008
960Wednesday, July 30, 2008
960Wednesday, July 30, 2008
5
U28I
U28I
AU48
VSS_1
AR48
VSS_2
AL48
VSS_3
BB47
VSS_4
AW47
VSS_5
AN47
VSS_6
AJ47
VSS_7
D D
C C
B B
A A
5
AF47
AD47
AB47
Y47 N47 G47
BD46
BA46 AY46
AV46 AR46 AM46
V46 R46 P46 H46
BF44 AH44 AD44
AA44
Y44 U44
M44
BC43
AV43 AU43 AM43
C43
BG42
AY42
AT42 AN42
AJ42
AE42
N42
BD41 AU41 AM41 AH41 AD41
AA41
Y41 U41
M41 G41 B41
BG40
BB40
AV40 AN40
H40 E40
AT39 AM39
AJ39
AE39
N39
B39 BH38 BC38
BA38 AU38 AH38 AD38
AA38
Y38 U38
C38 BF37 BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36 BD36
AK15
AU36
T47 L47
F46
T44 F44
J43
L42
T41
L39
T38 J38 F38
VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99
CANTIGA_1p0
CANTIGA_1p0
VSS
VSS
4
4
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23
3
U28J
U28J
BG21
VSS_199
L12
VSS_200
AW21
VSS_201
AU21
VSS_202
AP21
VSS_203
AN21
VSS_204
AH21
VSS_205
AF21
VSS_206
AB21
VSS_207
R21
VSS_208
M21
VSS_209
J21
VSS_210
G21
VSS_211
BC20
VSS_212
BA20
VSS_213
AW20
VSS_214
AT20
VSS_215
AJ20
VSS_216
AG20
VSS_217
Y20
VSS_218
N20
VSS_219
K20
VSS_220
F20
VSS_221
C20
VSS_222
A20
VSS_223
BG19
VSS_224
A18
VSS_225
BG17
VSS_226
BC17
VSS_227
AW17
VSS_228
AT17
VSS_229
R17 M17 H17 C17
BA16
AU16 AN16
N16 K16 G16
E16 BG15 AC15
W15
A15 BG14
AA14
C14 BG13 BC13
BA13
AN13
AJ13 AE13
N13
L13 G13 E13
BF12 AV12 AT12
AM12
AA12
J12 A12
BD11
BB11
AY11 AN11 AH11
Y11 N11 G11 C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10 BF9 BC9 AN9
AM9
AD9
G9
B9 BH8 BB8 AV8 AT8
3
VSS_230 VSS_231 VSS_232 VSS_233
VSS_235 VSS_237
VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252
VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273
VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296
CANTIGA_1p0
CANTIGA_1p0
VSS
VSS
VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13
VSS NCTF
VSS NCTF
VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16
VSS SCB
VSS SCB
NC
NC
VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325
VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350
VSS_351 VSS_352 VSS_353 VSS_354
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9
VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 VSS_SCB_6
NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42
2
AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4
BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1
U24 U28 U25 U29
AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17
BH48 BH1 A48 C1 B2 A3
E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
QUANTA
QUANTA
QUANTA COMPUTER
Cantiga (HOST)
Cantiga (HOST)
Cantiga (HOST)
FM7 1A
FM7 1A
FM7 1A
1
of
of
of
10 60Wednesday, July 30, 2008
10 60Wednesday, July 30, 2008
10 60Wednesday, July 30, 2008
1
1
2
3
4
5
6
7
8
+RTC_CELL +RTC_CELL
12
R573
R573 332K/F
332K/F
ICH_INTVRMEN ICH_LAN100_SLP
12
R582
R582 *0_NC
*0_NC
ICH9M LAN100 SLP Strap
Low = Internal VR Disabled High = Internal VR Enabled(Default)
U35A
U35A
C23
RTCX1
C24
RTCX2
A25
RTCRST#
F20
SRTCRST#
C22
INTRUDER#
B22
INTVRMEN
A22
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
F14
LAN_RXD0
G13
LAN_RXD1
D14
LAN_RXD2
D13
LAN_TXD0
D12
LAN_TXD1
E13
LAN_TXD2
B10
GLAN_DOCK#/GPIO56
B28
GLAN_COMPI
B27
GLAN_COMPO
AF6
HDA_BIT_CLK
AH4
HDA_SYNC
AE7
HDA_RST#
AF4
HDA_SDIN0
AG4
HDA_SDIN1
AH3
HDA_SDIN2
AE5
HDA_SDIN3
AG5
HDA_SDOUT
AG7
HDA_DOCK_EN#/GPIO33
AE8
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
SATA0RXN
AH16
SATA0RXP
AF17
SATA0TXN
AG17
SATA0TXP
AH13
SATA1RXN
AJ13
SATA1RXP
AG14
SATA1TXN
AF14
SATA1TXP
ICH9M REV 1.0
ICH9M REV 1.0
RTCLAN / GLAN
RTCLAN / GLAN
IHDA
IHDA
SATA
SATA
(Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled High = Internal VR Enabled(Default)
SIO_A20GATE
H_DPRSTP# H_DPSLP#
H_FERR#_L
SIO_RCIN#
THERMTRIP#_ICH
SATA_TX5-_C SATA_TX5+_C
SATABIAS
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
LDRQ1#/GPIO23
LPCCPU
LPCCPU
A20GATE
DPRSTP#
CPUPWRGD
STPCLK#
THRMTRIP#
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATA_CLKN SATA_CLKP
SATARBIAS#
SATARBIAS
ICH_LAN100_SLP
K5 K4 L6 K2
K3 J3
LDRQ0#
J1 N7
AJ27
A20M#
AJ25 AE23
DPSLP#
AJ26
FERR#
AD22 AF25
IGNNE#
AE22
INIT#
AG25
INTR
L3
RCIN#
AF23
NMI
AF24
SMI#
AH27 AG26 AG27
TP9
AH11 AJ11 AG12 AF12
AH9 AJ9 AE10 AF10
AH18 AJ18
AJ7 AH7
12
R572
R572 332K/F
332K/F
12
R581
R581 *0_NC
*0_NC
R620 56R620 56
R33124.9/F R33124.9/F
1 2
LPC_LAD0 31,33 LPC_LAD1 31,33 LPC_LAD2 31,33 LPC_LAD3 31,33
LPC_LFRAME# 31,33
T85PAD T85PAD T132PAD T132PAD
SIO_A20GATE 31 H_A20M# 3
H_DPRSTP# 3,6,51 H_DPSLP# 3
H_FERR#
12
H_PWRGOOD 3 H_IGNNE# 3 H_INIT# 3
H_INTR 3
SIO_RCIN# 31
H_NMI 3 H_SMI# 3
H_STPCLK# 3
T98PAD T98PAD
T99PAD T99PAD T96PAD T96PAD
SATA_RX5- 35 SATA_RX5+ 35
CLK_PCIE_SATA# 17 CLK_PCIE_SATA 17
Place within 500mils of ICH9 ball
H_FERR# 3
E-SATA
2/13-42/13-4
1 2
H_DPRSTP# H_DPSLP# H_FERR#
SIO_A20GATE SIO_RCIN#
THERMTRIP#_ICH
R622
R622 *56_NC
*56_NC
+1.05V_VCCP
R313
R313 *56_NC
*56_NC
1 2
R299
R299
8.2K
8.2K
1 2
+1.05V_VCCP
1 2
+3.3V_RUN
1 2
1 2
R62156R621 56
R290
R290 10K
10K
R31856R318 56
+RTC_CELL
12
R2671MR267 1M
R254 10MR254 10M
W1
W1
1 4 2 3
32.768KHZ
32.768KHZ
R248
R248 20K
20K
1 2
12
C361
C361 1U/10V
1U/10V
C465 0.01U/16VC465 0.01U/16V C464 0.01U/16VC464 0.01U/16V
C460 0.01U/16VC460 0.01U/16V C459 0.01U/16VC459 0.01U/16V
C451 0.01U/16VC451 0.01U/16V C452 0.01U/16VC452 0.01U/16V
12
R571
R571 20K
20K
1 2
ICH_RTCRST# ICH_SRTCRST# ICH_INTRUDER#
12
C768
C768 1U/10V
1U/10V
ICH_RTCX2ICH_RTCX1
R333 33R333 33
1 2
1 2
R336 33R336 33
1 2
R332 33R332 33
1 2
R335 33R335 33
1 2
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
SATA_TX5-_C SATA_TX5+_C
12
C366
C366 12P/50V
12P/50V
C467
C467 *27P/50V_NC
*27P/50V_NC
ACZ_BIT_CLK
ACZ_SYNC ACZ_RST# ACZ_SDOUT
Master HDD
Reserved for Intel Nineveh design.
SATA ODD
+3.3V_SUS
+1.5V_PCIE_ICH
ICH_AZ_CODEC_SDIN040
+3.3V_SUS
SATA_ACT#38
T72 PADT72 PAD
T81 PADT81 PAD T83 PADT83 PAD T68 PADT68 PAD T60 PADT60 PAD T67 PADT67 PAD T74 PADT74 PAD
R265 *10K_NCR265 *10K_NC
R269 24.9/FR269 24.9/F
1 2
PAD
PAD
T94
T94
PAD
PAD
T97
T97
PAD
PAD
T95
T95
R314 *10K_NCR314 *10K_NC R310 *10K_NCR310 *10K_NC
SATA_RX0-36 SATA_RX0+36
SATA_RX1+36
ICH9M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
ICH_RTCX1 ICH_RTCX2
ICH_RTCRST# ICH_SRTCRST# ICH_INTRUDER#
ICH_INTVRMEN ICH_LAN100_SLP
GLAN_CLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
12
GLAN_COMP ACZ_BIT_CLK
ACZ_SYNC ACZ_RST#
ACZ_SDOUT
12 12
SATA_TX0-_C SATA_TX0+_C
SATA_TX1-_C SATA_TX1+_C
32.768KHZ
12
C365
A A
B B
C C
C365 12P/50V
12P/50V
ICH_AZ_CODEC_BITCLK40
ICH_AZ_CODEC_SYNC40 ICH_AZ_CODEC_RST#31,40 ICH_AZ_CODEC_SDOUT40
Place all series terms close to ICH9 except for SDIN input lines,which should be close to source.Placement of R603, R600, R607 & R612 should equal distance to the T split trace point as R604, R599, R606 & R608 respective. Basically,keep the same distance from T for all series termination resistors.
SATA_TX0-36 SATA_TX0+36
SATA_TX1-36 SATA_TX1+36 SATA_RX1-36
SATA_TX5-35 SATA_TX5+35
Distance between the ICH-9 M and cap on the "P" signal should be identical distance between the ICH-9 M and cap on the "N" signal for same pair.
XOR Chain Entrance Strap
ICH RSVD
D D
1
2
3
HDA SDOUT
0 0 1 1
4
Description
0
RSVD
1
Enter XOR Chain
0
Normal Operation (Default)
1
Set PCIE port config bit 1
5
+3.3V_RUN
1 2
1 2
R334
R334 *1K_NC
*1K_NC
ACZ_SDOUT
R583
R583 *1K_NC
*1K_NC
ICH_RSVD 13
6
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)
FM7 1A
FM7 1A
FM7 1A
7
of
of
of
11 60Wednesday, July 30, 2008
11 60Wednesday, July 30, 2008
11 60Wednesday, July 30, 2008
8
1
Place TX DC blocking caps close ICH8.
C408 0.1U 10C408 0.1U 10
PCIE_TX1-33 PCIE_TX1+33
PCIE_TX2-34 PCIE_TX2+34
PCIE_TX3-33
A A
B B
PCIE_TX3+33
PCIE_TX4-30 PCIE_TX4+30
PCIE_TX6-/GLAN_TX-42 PCIE_TX6+/GLAN_TX+42
ICH_SPI_CS1#_R PCI_GNT0#
1 2
R280
R280 *1K_NC
*1K_NC
12
1 2
C419 0.1U 10C419 0.1U 10
1 2
C401 0.1U 10C401 0.1U 10
1 2
C399 0.1U 10C399 0.1U 10
1 2
C392 0.1U 10C392 0.1U 10
1 2
C385 0.1U 10C385 0.1U 10
1 2
C383 0.1U 10C383 0.1U 10
1 2
C380 0.1U 10C380 0.1U 10
1 2
C374 0.1U 10C374 0.1U 10
1 2
C372 0.1U 10C372 0.1U 10
1 2
R287
R287 *1K_NC
*1K_NC
PCI SPI1001
WWAN Noise - ICH improvements
OC6# OC4# OC5# OC7# USB_OC8# USB_OC2_3# USB_OC0_1# OC9#
C C
D D
C402 *0.1U_NC 10C402 *0.1U_NC 10 C793 *0.1U_NC 10C793 *0.1U_NC 10 C796 *0.1U_NC 10C796 *0.1U_NC 10 C789 *0.1U_NC 10C789 *0.1U_NC 10 C795 *0.1U_NC 10C795 *0.1U_NC 10 C410 *0.1U_NC 10C410 *0.1U_NC 10 C416 *0.1U_NC 10C416 *0.1U_NC 10 C422 *0.1U_NC 10C422 *0.1U_NC 10
PCI_AD[0..31]28
T66 PADT66 PAD
PCI_PIRQB#28
T55 PADT55 PAD
1
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
2
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
Boot BIOS Strap
GNT0# SPI_CS1#
No stuff
No stuff
11LPC
No stuff
Stuff No stuff
Stuff
Places within 500 mils of the ICH9
+3.3V_SUS
U35B
U35B
D11
AD0
G11
D10
C8 D9
E12
E9
C9
E10
B7 C7 C5
F8
F11
E7
A3 D2
F10
D5
B3
F7 C3
F3
F4 C1 G7 H7 D1 G5 H6 G1 H3
J5
E1
J6
PCI
PCI
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5
ICH9M REV 1.0
ICH9M REV 1.0
2
OC7# OC6#
OC4#
OC10# OC11#
REQ0#
GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PCIE_RX1-33 PCIE_RX1+33
MiniWWAN
PCIE_RX2-34 PCIE_RX2+34
MiniWLAN
PCIE_RX3-33 PCIE_RX3+33
MiniWPAN
PCIE_RX4-30 PCIE_RX4+30
Express Card
PCIE_RX6-/GLAN_RX-42 PCIE_RX6+/GLAN_RX+42
Giga Bit LOM
USB_OC0_1#35 USB_OC2_3#35
USB_OC8#
R601 22.6/FR601 22.6/F
1 2
6 7 8 9
10
R300 10KR300 10K R304 10KR304 10K
F1 G4 B6 A7 F13 F12 E6 F6
D8 B4 D6 A5
D3 E3 R1 C6 E4 C2 J4 A4 F5 D7
C14 D4 R2
H4 K6 F2 G2
3
T131 PADT131 PAD T130 PADT130 PAD T73 PADT73 PAD T75 PADT75 PAD
T64 PADT64 PAD T63 PADT63 PAD
T71 PADT71 PAD T77 PADT77 PAD
RP37
RP37
10KX8
10KX8
PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# SB_WWAN_PCIE_RST# PCI_GNT2# SB_LOM_PCIE_RST# PCI_GNT3#
PCI_IRDY# PCI_RST#_G
PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#
PCI_PLTRST# CLK_PCI_ICH
SB_WPAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_NB_PCIE_RST# ICH_IRQH_GPIO5
+3.3V_SUS
5 4 3 2 1
12 12
3
PCIE_TXN1_C PCIE_TXP1_C
PCIE_TXN2_C PCIE_TXP2_C
PCIE_TXN3_C PCIE_TXP3_C
PCIE_TXN4_C PCIE_TXP4_C
GLAN_TXN_C GLAN_TXP_C
ICH_SPI_CS1#_R
USB_OC0_1# USB_OC2_3# OC4#
OC5# OC6# OC7# USB_OC8# OC9# OC10# OC11#
USBRBIAS
OC9# USB_OC2_3#OC5# USB_OC0_1# USB_OC8#
+3.3V_SUS
PCI_REQ0# 28 PCI_GNT0# 28
SB_WWAN_PCIE_RST# 33 SB_LOM_PCIE_RST# 42
PCI_C_BE0# 28 PCI_C_BE1# 28 PCI_C_BE2# 28 PCI_C_BE3# 28
PCI_IRDY# 28 PCI_PAR 28
PCI_DEVSEL# 28 PCI_PERR# 28 PCI_PLOCK# PCI_SERR# 28 PCI_STOP# 28 PCI_TRDY# 28 PCI_FRAME# 28
CLK_PCI_ICH 17 ICH_PME# 28,31
SB_WPAN_PCIE_RST# 33 SB_WLAN_PCIE_RST# 34 SB_NB_PCIE_RST# 6PCI_PIRQC#28
N29 N28 P27 P26
L29
L28 M27 M26
J29
J28 K27 K26
G29 G28 H27 H26
E29 E28 F27 F26
C29 C28 D27 D26
D23 D24 F23
D25 E23
N4 N5 N6
P6 M1 N2 M4 M3 N3 N1
P5
P3
AG2 AG1
T51PAD T51PAD T128PAD T128PAD
T84PAD T84PAD T82PAD T82PAD
T69PAD T69PAD
4
U35D
U35D
PERN1 PERP1 PETN1 PETP1
PERN2 PERP2 PETN2 PETP2
PERN3 PERP3 PETN3 PETP3
PERN4 PERP4 PETN4 PETP4
PERN5 PERP5 PETN5 PETP5
PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP
SPI_CLK SPI_CS0# SPI_CS1#/GPIO58/CLGPIO6
SPI_MOSI SPI_MISO
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31 OC8#/GPIO44 OC9#/GPIIO45 OC10#/GPIO46 OC11#/GPIO47
USBRBIAS USBRBIAS#
ICH9M REV 1.0
ICH9M REV 1.0
4
PCI-Express
PCI-Express
SPI
SPI
USB
USB
5
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB27
DMI2RXN
AB26
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
T25
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
AF29 AF28
AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2
DMI_COMP
PCI_GNT3#
1 2
R600 24.9/FR600 24.9/F
DMI_ZCOMP
Direct Media Interface
Direct Media Interface
DMI_IRCOMP
A16 away override strap.
SB_NB_PCIE_RST#
5
Low = A16 swap override enabled. High = Default.
DMI_MTX_IRX_N0 6 DMI_MTX_IRX_P0 6
DMI_MRX_ITX_N0 6 DMI_MRX_ITX_P0 6
DMI_MTX_IRX_N1 6 DMI_MTX_IRX_P1 6
DMI_MRX_ITX_N1 6 DMI_MRX_ITX_P1 6
DMI_MTX_IRX_N2 6 DMI_MTX_IRX_P2 6
DMI_MRX_ITX_N2 6 DMI_MRX_ITX_P2 6
DMI_MTX_IRX_N3 6 DMI_MTX_IRX_P3 6
DMI_MRX_ITX_N3 6 DMI_MRX_ITX_P3 6
CLK_PCIE_ICH# 17 CLK_PCIE_ICH 17
ICH_USBP0- 35 ICH_USBP0+ 35 ICH_USBP1- 35 ICH_USBP1+ 35 ICH_USBP2- 35 ICH_USBP2+ 35 ICH_USBP3- 35 ICH_USBP3+ 35 ICH_USBP4- 34 ICH_USBP4+ 34 ICH_USBP5- 33 ICH_USBP5+ 33 ICH_USBP6- 33 ICH_USBP6+ 33 ICH_USBP7- 30 ICH_USBP7+ 30
T135PAD T135PAD T134PAD T134PAD T89PAD T89PAD
T90PAD T90PAD
ICH_USBP10- 38 ICH_USBP10+ 38 ICH_USBP11- 41 ICH_USBP11+ 41
CLK_PCI_ICH
Reserved for
EMI.Place
resister and cap
close to ICH.
12
R285
R285
*1K_NC
*1K_NC
6
+1.5V_PCIE_ICH
Place within 500mils of ICH8
Side pair Top / left Side pair bottom / left Side pair top/right(DB) Side pair Bot right(DB) Mini Card (WLAN) Mini Card (WWAN) Mini Card (WPAN) Express Card
Biometric Camera
2/25-27
R270
R270 *10_NC
*10_NC
1 2
C371
C371
*8.2P_NC
*8.2P_NC
1 2
16
16
6
7
8
PCI Pullups
PCI_FRAME# PCI_TRDY# PCI_PLOCK# PCI_DEVSEL# PCI_REQ1#
+3.3V_RUN
PCI_PIRQA# PCI_SERR# PCI_REQ0# ICH_IRQH_GPIO5
+3.3V_RUN
SB_WPAN_PCIE_RST# SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_LOM_PCIE_RST# SB_NB_PCIE_RST#
BIOS should not enable the internal GPIO pull up resistor.
Non-iAMT
PCI_RST#_G
PCI_PLTRST#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_SUS
C432
C432
1 2
0.047U
0.047U
2
10
10
1
+3.3V_SUS
C344
C344
1 2
0.047U
0.047U
2
10
10
1
ICH9-M (USB,DMI,PCIE,PCI)
ICH9-M (USB,DMI,PCIE,PCI)
ICH9-M (USB,DMI,PCIE,PCI)
FM7 1A
FM7 1A
FM7 1A
7
RP25RP25
6 7 8 9
10
RP31RP31
6 7 8 9
10
Add Buffers as needed for Loading and fanout concerns.
5
U21
U21
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
5
U18
U18
4
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
QUANTA
QUANTA
QUANTA COMPUTER
+3.3V_RUN
5 4
PCI_STOP#
3
PCI_PIRQD#
2
PCI_IRDY#
1
+3.3V_RUN
5 4
PCI_PIRQB#
3
PCI_PIRQC#
2
PCI_PERR#
1
R286 20KR286 20K R281 20KR281 20K R292 20KR292 20K R266 20KR266 20K R276 20KR276 20K
PLTRST# 6,30,31,33,34,42
PCI_RST# 28
12 12 12 12 12
12 60Wednesday, July 30, 2008
12 60Wednesday, July 30, 2008
12 60Wednesday, July 30, 2008
8
of
of
of
PCI_IRDY#
1
2
3
4
5
6
7
8
2/13-5
+3.3V_SUS
2/13-5
A A
+3.3V_SUS
+3.3V_RUN
B B
Option to " Disable " clkrun. Pulling it down will keep the clks running.
KB_LED_DET#37 PCIE_MCARD1_DET#34
C C
R323 10KR323 10K
+3.3V_RUN
R329 100KR329 100K R626 100KR626 100K R289 100KR289 100K R324 100KR324 100K R635 100KR635 100K
+3.3V_RUN
R624 *10K_NCR624 *10K_NC
D D
R296 10KR296 10K R625 10KR625 10K
+3.3V_SUS
R257 10KR257 10K R574 10KR574 10K R579 100KR579 100K
RP23
RP23
1 3
2.2KX2
2.2KX2
RP24
RP24
1 3
*10KX2_NC
*10KX2_NC
ICH_SMBCLK ICH_SMBDATA
R283
R283
8.2K
8.2K
1 2
CLKRUN#
R282
R282 *10_NC
*10_NC
1 2
R247 1.91K/FR247 1.91K/F
1 2 1 2
1 2 1 2 1 2 1 2
1 2
1
2/18-19
Non-iAMT
ICH_SMBCLK
2
ICH_SMBDATA
4
2/18-19
ICH_SMLINK0
2
ICH_SMLINK1
4
R250 0R250 0
1 2
R251 0R251 0
1 2
2/25-29
PLTRST_DELAY#
12
7/30-68
IMVP_PWRGD
USB_MCARD2_DET#
USB_MCARD3_DET#
PCIE_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
MCH_ICH_SYNC#_R
12
IRQ_SERIRQ
12
THERM_ALERT#
12
RSV_WOL_EN
12
SIO_EXT_SMI#
12
USB_MCARD1_DET#
ASF 2.0Non-iAMT
ICH_SMLINK0 ICH_SMLINK1
6/11-53
R319 0R319 0
1 2
PCIE_MCARD1_DET#
+3.3V_SUS
ICH_SMBCLK30,33,34 ICH_SMBDATA30,33,34
ITP_DBRESET#3 PM_BMBUSY#6
USB_MCARD1_DET#34
H_STP_PCI#17 H_STP_CPU#17
CLKRUN#28,31 PCIE_WAKE#30,33,34,42
IRQ_SERIRQ28,31
THERM_ALERT#39
IMVP_PWRGD31,44,51
USB_MCARD2_DET#33 USB_MCARD3_DET#33
SIO_EXT_WAKE#31 SIO_EXT_SMI#31 SIO_EXT_SCI#31
R288 4.7KR288 4.7K
2
12
PCIE_MCARD2_DET#33 PCIE_MCARD3_DET#33
WLAN_RADIO_DIS#34
CAMERA_CBL_DET#41
SATA_CLKREQ#17
PLTRST_DELAY#18
WPAN_RADIO_DIS_MINI#33
WWAN_RADIO_DIS#33
MCH_ICH_SYNC#6
R252 *10K_NCR252 *10K_NC R274 10KR274 10K R253 10KR253 10K R279 1KR279 1K
T127 PADT127 PAD
T138 PADT138 PAD T125 PADT125 PAD
ICH_RSVD11
T136 PADT136 PAD T137 PADT137 PAD T139 PADT139 PAD
T52 PADT52 PAD T59 PADT59 PAD T54 PADT54 PAD
T88 PADT88 PAD
T53 PADT53 PAD
SPKR40
+3.3V_RUN
12
12 12 12 12
R293
R293
*1K_NC
*1K_NC
USB_MCARD1_DET#
PCIE_MCARD2_DET# PCIE_MCARD3_DET#
SPKR
No Reboot strap.
SPKR
Low = Default. High = No Reboot.
3
Non-iAMT
RSV_ICH_CL_RST1# ICH_RI# SIO_EXT_SCI# PCIE_WAKE#
ICH_SMBCLK ICH_SMBDATA RSV_ICH_CL_RST1# ICH_SMLINK0 ICH_SMLINK1
ICH_RI# RSV_LPCPD#
CLKRUN# PCIE_WAKE#
IRQ_SERIRQ THERM_ALERT#
IMVP_PWRGD
USB_MCARD2_DET# USB_MCARD3_DET#
SIO_EXT_SMI# SIO_EXT_SCI#
PLTRST_DELAY#
SPKR MCH_ICH_SYNC#_R
TP9 TP10 TP11
U35C
U35C
G16
SMBCLK
A13
SMBDATA
E17
LINKALERT#/GPIO60/CLGPIO4
C17
SMLINK0
B18
SMLINK1
F19
RI#
R4
SUS_STAT#/LPCPD#
G19
SYS_RESET#
M6
PMSYNC#/GPIO0
A17
SMBALERT#/GPIO11
A14
STP_PCI#/GPIO15
E19
STP_CPU#/GPIO25
L4
CLKRUN#/GPIO32
E20
WAKE#
M5
SERIRQ
AJ23
THRM#
D21
VRMPWRGD
A20
TP8
AG19
TACH1/GPIO1
AH21
TACH2/GPIO6
AG21
TACH3/GPIO7
A21
GPIO8
C12
LANPHYPC/GPIO12
C21
ENGDET/GPIO13
AE18
TACH0/GPIO17
K1
GPIO18
AF8
GPIO20
AJ22
SCLOCK/GPIO22
A9
QRT_STATE0/GPIO27
D19
QRT_STATE1/GPIO28
L1
SATACLKREQ#/GPIO35
AE19
SLOAD/GPIO38
AG22
SDATAOUT0/GPIO39
AF21
SDATAOUT1/GPIO48
AH24
GPIO49
A8
GPIO57/CLGPIO5
M7
SPKR
AJ24
MCH_SYNC#
B21
TP3
AH20
TP9
AJ20
TP10
AJ21
TP11
ICH9M REV 1.0
ICH9M REV 1.0
SMbus address D2
These are for backdrive issue.
ICH_SMBDATA30,33,34 MEM_SDATA 15
4
SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
SYS GPIO
SYS GPIO
Power MGTController Link
Power MGTController Link
GPIO
GPIO
NETDETECT/GPIO14
MISC
MISC
+3.3V_RUN
3 1
+3.3V_RUN
3 1
CLK14 CLK48
SUSCLK
SLP_S3# SLP_S4# SLP_S5#
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW# PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0 CL_CLK1
CL_DATA0 CL_DATA1
CL_VREF0 CL_VREF1
CL_RST0# CL_RST1#
MEM_LED/GPIO24
ALERT#/GPIO10 WOL_EN/GPIO9
2
2
1
Q31
Q31
2N7002W-7-F
2N7002W-7-F
2
Q32
Q32
2N7002W-7-F
2N7002W-7-F
4
3
RP17
RP17
2.2KX2
2.2KX2
5
AH23 AF19 AE21 AD20
H1 AF3
P1 C16
E16 G17
C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24
B19 F22
C19 C25
A19 F21
D18 A16
C18 C11 C20
+3.3V_RUN
R328
R328
8.2K
8.2K
1 2
CLK_ICH_14M CLK_ICH_48M
ICH_SUSCLK
ICH_PWRGD DPRSLPVR
ICH_BATLOW#
RSV_ICH_LAN_RST# ICH_RSMRST#
ICH_CL_PWROK
RSV_ICH_CL_CLK1
RSV_ICH_CL_DATA1 CL_VREF0
CL_VREF1
CL_RST1# RSV_GPIO24
RSV_GPIO10 RSV_GPIO14 RSV_WOL_EN
Non-iAMT
MEM_SCLK 15ICH_SMBCLK30,33,34
R580 8.2KR580 8.2K
R264 8.2KR264 8.2K
CLK_ICH_14M 17 CLK_ICH_48M 17
T133PAD T133PAD
SIO_SLP_S3# 31
T78PAD T78PAD
SIO_SLP_S5# 31
ICH_PWRGD 6,44 DPRSLPVR 6,51
12
+3.3V_SUS
SIO_PWRBTN# 31
T70PAD T70PAD
ICH_RSMRST# 31 CLK_PWRGD 17 ICH_CL_PWROK 6,31
T57PAD T57PAD
CL_CLK0 6
T76PAD T76PAD
CL_DATA0 6
T58PAD T58PAD
ICH_CL_RST0# 6
T79PAD T79PAD
T61PAD T61PAD
T65PAD T65PAD
T62PAD T62PAD
T56PAD T56PAD
12
+3.3V_SUS
6
2/13-5
Non-iAMT
Place these close to ICH8.
CLK_ICH_48M
R321
R321 *10_NC
*10_NC
1 2 12
C454
C454 *4.7P_NC
*4.7P_NC
50
50
R590
R590 *10_NC
*10_NC
1 2 12
C780
C780 *4.7P_NC
*4.7P_NC
50
50
R291 10KR291 10K R594 100KR594 100K
R268 10KR268 10K R303 1MR303 1M
R249 10KR249 10K
12
1 2
12 12 12
12
2/13-5
+3.3V_SUS
ICH_PWRGD DPRSLPVR ICH_RSMRST# RSV_ICH_LAN_RST# ICH_CL_PWROK
RSV_GPIO10
CLK_ICH_14M
R277 10KR277 10K
DIS:ALW
+3.3V_SUS+3.3V_ALW
1 2
12
13 60Wednesday, July 30, 2008
13 60Wednesday, July 30, 2008
13 60Wednesday, July 30, 2008
8
(19)
R576
R576 *3.24K/F_NC
*3.24K/F_NC
R578
R578 *453/F_NC
*453/F_NC
of
of
of
UMA:SUS
Non-iAMT
10
10
CL_VREF0/1 ~=0.405V
Title
Title
Title
ICH9-M (PM,GPIO,SMB,CL)
ICH9-M (PM,GPIO,SMB,CL)
ICH9-M (PM,GPIO,SMB,CL)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM7 1A
FM7 1A
FM7 1A
Date: Sheet
Date: Sheet
Date: Sheet
7
+3.3V_RUN
R263
R263
3.24K/F
3.24K/F
1 2
CL_VREF0
C359
C359
0.1U
0.1U
12
12
R256
R256
C771
C771
453/F
453/F
*0.1U_NC
*0.1U_NC
10
10
12
QUANTA
QUANTA
QUANTA COMPUTER
R575
R575 *3.24K/F_NC
*3.24K/F_NC
1 2
CL_VREF1
1
U35E
U35E
AA26
VSS[001]
AA27
VSS[002]
AA3
VSS[003]
AA6
VSS[004]
AB1
VSS[005]
AA23
VSS[006]
AB28
VSS[007]
AB29
VSS[008]
AB4
VSS[009]
AB5
VSS[010]
AC17
VSS[011]
AC26
VSS[012]
A A
B B
C C
D D
AC27
AC3
AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29
AD4
AD5
AD6
AD7
AD9 AE12 AE13 AE14 AE16 AE17
AE2 AE20 AE24
AE3
AE4
AE6
AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27
AF5
AF7
AF9 AG13 AG16 AG18 AG20 AG23
AG3
AG6
AG9 AH12 AH14 AH17 AH19
AH2 AH22 AH25 AH28
AH5
AH8
AJ12 AJ14 AJ17
B11
B14
B17
B20
B23
C26
C27
E11
E14
E18
E21
E24
G12
G14
G18
G21
G24
G26
G27
H23
H28
H29
AJ8
B2
B5 B8
E2
E5
E8 F16 F28 F29
G8 H2
VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106]
ICH9M REV 1.0
ICH9M REV 1.0
1
VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]
VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]
H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25
A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29
2
+5V_RUN
+3.3V_RUN
Non-iAMT
+5V_SUS
+3.3V_SUS
+1.5V_RUN
+1.5V_RUN
2
+RTC_CELL
R262 10R262 10
1 2
D22
D22
2 1
SDMK0340L-7-F
SDMK0340L-7-F
R599 10R599 10
1 2
D34
D34
2 1
SDMK0340L-7-F
SDMK0340L-7-F
L34
L34 BLM21PG331SN1D
BLM21PG331SN1D
805
805
646mA
5/7
+
+
12
+VCCSATPLL_L
12
12
C818
C818
220uF
220uF
2.5
2.5
R6170R617 0
L82
L82 10uH
10uH
805
805
10uH+-20%_100mA
+VCCSATPLL
12
C828
C828 1U
1U
10
10 603
603
Non-iAMT
+3.3V_RUN
+1.5V_PCIE_ICH
3
12
C762
C762
C770
C770
1U
1U
0.1U
0.1U
1 2
10
10
10
10
+ICH_V5REF_RUN
603
603
2mA
C364
C364
0.1U
0.1U
1 2
10
10
+ICH_V5REF_SUS
2mA
C809
C809
0.1U
0.1U
1 2
10
10
FB_330ohm+-25%_100mHz_
1.5A_0.09 ohm DC
+1.5V_PCIE_ICH
12
C426
C426 22U
22U
10
10 1206
1206
C400
C400 22U
22U
10
10 1206
1206
+1.5V_RUN
+1.5V_RUN
47mA
C829
C829
VCC1_5_A TOTAL 1.342A
10U
10U
6.3
6.3 603
603
+1.5V_RUN
C468
C468
0.1U
0.1U
1 2
10
10
T126
T126
T129
T129
C360
C360
0.1U
0.1U
1 2
10
10
12
C439
C439
4.7U
4.7U
6.3
6.3 603
603
3
1 2
C421
C421
2.2U
2.2U
1 2
10
10 805
805
11mA
+1.5V_RUN
PAD
PAD PAD
PAD
C767
C767
0.1U
0.1U
10
10
+VCCSATPLL
12
C443
C443 1U
1U
10
10 603
603
12
C442
C442 1U
1U
10
10 603
603
C384
C384
0.1U
0.1U
1 2
10
10
TP_VCCSUSLAN1 TP_VCCSUSLAN2
19mA
ICH_GLANPLL
23mA
80mA
+3.3V_RUN
1mA
4
AC24 AC25 AD24 AD25
AC16 AD15 AD16
AG15 AH15
AC11 AD11
AG10 AG11 AH10
AC18 AC19
AC21
AC12 AC13 AC14
4
AA24 AA25 AB24 AB25
AE25 AE26 AE27 AE28 AE29
W24 W25
AJ19
AE15 AF15
AJ15
AE11 AF11
AJ10
A23
AE1
F25 G25 H24 H25
K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23
K23 Y24 Y25
AC9
G10
AJ5 AA7
AB6 AB7 AC6 AC7
A10 A11
A12 B12
A27 D28
D29 E26 E27
A26
A6
J24 J25
G9
U35F
U35F
VCCRTC V5REF V5REF_SUS VCC1_5_B[01]
VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46] VCC1_5_B[47] VCC1_5_B[48] VCC1_5_B[49]
VCCSATAPLL VCC1_5_A[01]
VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05] VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08]
VCC1_5_A[09] VCC1_5_A[10] VCC1_5_A[11] VCC1_5_A[12] VCC1_5_A[13] VCC1_5_A[14] VCC1_5_A[15] VCC1_5_A[16]
VCC1_5_A[17] VCC1_5_A[18]
VCC1_5_A[19] VCC1_5_A[20] VCC1_5_A[21]
VCC1_5_A[22] VCC1_5_A[23]
VCC1_5_A[24] VCC1_5_A[25]
VCCUSBPLL VCC1_5_A[26]
VCC1_5_A[27] VCC1_5_A[28] VCC1_5_A[29] VCC1_5_A[30]
VCCLAN1_05[1] VCCLAN1_05[2]
VCCLAN3_3[1] VCCLAN3_3[2]
VCCGLANPLL VCCGLAN1_5[1]
VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4]
VCCGLAN3_3
ICH9M REV 1.0
ICH9M REV 1.0
VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]
CORE
CORE
VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]
VCCA3GP ATXARX USB CORE
VCCA3GP ATXARX USB CORE
V_CPU_IO[1] V_CPU_IO[2]
VCCP_COREVCCPSUSVCCPUSB
VCCP_COREVCCPSUSVCCPUSB
PCI
PCI
VCCSUSHDA
VCCSUS1_05[1] VCCSUS1_05[2]
VCCSUS1_5[1] VCCSUS1_5[2]
VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]
VCCCL3_3[1] VCCCL3_3[2]
GLAN POWER
GLAN POWER
5
VCCDMIPLL VCC_DMI[1]
VCC_DMI[2]
VCC3_3[01] VCC3_3[02] VCC3_3[07] VCC3_3[03]
VCC3_3[04] VCC3_3[05] VCC3_3[06]
VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]
VCCHDA
VCCCL1_05
VCCCL1_5
5
A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
R29 W23
Y23 AB23
AC23 AG29 AJ6 AC10 AD19
AF20 AG24 AC20
B9 F9 G3 G6 J2 J7 K7
AJ4 AJ3 AC8
F17
AD8 F18
A18 D16 D17 E22
AF1
VCCSUS 3_3 212mA
T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7
G22 G23
A24 B24
19mA
+1.5V_RUN
C409
C409
0.1U
0.1U
1 2
10
10
+1.5V_DMIPLL
23mA
+VCC_DMI_ICH
48mA
2mA
VCC3_3 308mA
C387
C387
0.1U
0.1U
1 2
10
10
C398
C398
0.1U
0.1U
1 2
10
10
+VCC_HDA +VCCSUSHDA TP_VCCSUS1.05_1
TP_VCCSUS1.05_2TP_VCCSUS1.05_2
TP_VCCSUS1.5_1 TP_VCCSUS1.5_2
11mA
1 2
C381 0.1U
C381 0.1U
WWAN Noise - ICH improvements
12
12
C368
C368 *0.1U_NC
*0.1U_NC
10
10
+VCCCL1_05 +VCCCL1_5
+3.3V_RUN
Non-iAMT
L79 1uH/300mA_8L79 1uH/300mA_8
C425
C425
0.1U
0.1U
1 2
10
10
C370
C370
0.1U
0.1U
1 2
10
10
C458
C458
0.1U
0.1U
1 2
10
10
10
10
12
C431
C431 *0.1U_NC
*0.1U_NC
10
10
12
C763
C763 10U
10U
0805
0805 10
10
6
+1.05V_VCCP
C794
C794
0.01U
0.01U
1 2
25
25
T92PAD T92PAD T80PAD T80PAD
T93PAD T93PAD
C433
C433
0.22U
0.22U
10V
10V
12
C814
C814 *0.1U_NC
*0.1U_NC
10
10
C386
C386 *0.1U_NC
*0.1U_NC
10
10
1 2
ICH_GLANPLLICH_GLANPLL
12
6
7
+1.05V_VCCP +1.5V_RUN
D23
D23
1
2
BAT54C T/R
BAT54C T/R
1uH+-20%_800mA
L80
L80 1uH
1uH
+1.5V_DMIPLL_R
12
C797
C797 10U
10U
1 2
6.3
6.3 603
603
L35
L35 BLM21PG331SN1D
BLM21PG331SN1D
12
805
805
C437
C437
4.7U
4.7U
603
603
6.3
6.3
C445
C445
0.1U
0.1U
1 2
10
10
WWAN Noise - ICH improvements
C373
C373
0.1U
0.1U
10
10
12
+3.3V_RUN
12
+1.5V_RUN
12
+3.3V_SUS
C382
C382
0.1U
0.1U
10
10
10
10
12
+3.3V_SUS
C423
C423
0.1U
0.1U
10
10
C440
C440
*1U/6.3V_NC
*1U/6.3V_NC
Title
Title
Title
ICH9-M (POWER,GND)
ICH9-M (POWER,GND)
ICH9-M (POWER,GND)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM7 1A
FM7 1A
FM7 1A
Date: Sheet
Date: Sheet
Date: Sheet
7
12
12
C769
C769
2.2U
2.2U
0603
0603
6.3
6.3
1 2
1 2
C446
C446
0.1U
0.1U
10
10
C429
C429
0.22U
0.22U
10V
10V
C461
C461
0.1U
0.1U
10
10
C369
C369
0.1U
0.1U
10
10
+3.3V_RUN
R327 0R327 0
R311 *0_NCR311 *0_NC
12
12
C379
C379 *0.1U_NC
*0.1U_NC
10
10
C397
C397 *1U_NC
*1U_NC
10
10 603
603
8
R309
R309
1 2
3
10
10
805
805
+1.5V_RUN
R593 1R593 1
12
+1.05V_VCCP
+1.05V_VCCP
12
C403
C403
C424
C424
0.1U
0.1U
4.7U
4.7U
1 2
10
10
603
603
6.3
6.3
+3.3V_RUN
12
C462
C462 *0.1U_NC
*0.1U_NC
12
C449
C449 *0.1U_NC
*0.1U_NC
10
10
+VCCSUSHDA
11mA
10
10
R325 0R325 0
12
C378
C378 *0.1U_NC
*0.1U_NC
10
10
+3.3V_SUS
12
12
C367
C367 *0.1U_NC
*0.1U_NC
12
C441
C441
0.1U
0.1U
10
10
2/18-18
+1.5V_SUS
+VCCSUSHDA
11mA
RESERVE 1.5V_SUS FOR VCCSUSHDA
QUANTA
QUANTA
QUANTA COMPUTER
R326 *0_NCR326 *0_NC
12
U23
U23
VIN3VOUT
1
SHDN
2
GND
*IC(5P) G913C (SOT23-5)EP_NC
*IC(5P) G913C (SOT23-5)EP_NC
SET
4
R1
5
R2
12
C457
C457 *0.1U_NC
*0.1U_NC
10
10
R320
R320 *22.1K/F_NC
*22.1K/F_NC
R316
R316 *100K/F_NC
*100K/F_NC
14 60Wednesday, July 30, 2008
14 60Wednesday, July 30, 2008
14 60Wednesday, July 30, 2008
8
+1.5V_SUS
C450
C450 *4.7U/6.3V_NC
*4.7U/6.3V_NC
of
of
of
1
+1.8V_SUS
DDR_A_D1 DDR_A_D0
DDR_A_DQS#0
A A
B B
DDR_CKE0_DIMMA6,16
DDR_A_BS27,16
DDR_A_BS07,16 DDR_A_WE#7,16
DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16
M_ODT16,16
C C
D D
MEM_SDATA13
MEM_SCLK13
+3.3V_RUN
DDR_A_DQS0
DDR_A_D3 DDR_A_D2
DDR_A_D12 DDR_A_D8
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D17 DDR_A_D21
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D22 DDR_A_D18 DDR_A_D23 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D30
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS#
M_ODT1 DDR_A_D36
DDR_A_D37 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D35
DDR_A_D38 DDR_A_D41
DDR_A_D40 DDR_A_DM5 DDR_A_D42
DDR_A_D46 DDR_A_D48
DDR_A_D53 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D54
DDR_A_D56 DDR_A_D61
DDR_A_DM7 DDR_A_D59
DDR_A_D62 CLK_SDATA
CLK_SCLK
SMbus address A0
1
2
V_DDR_MCH_REF
JDIM1
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_DIMM
DDR2_DIMM
CLOCK 0,1
2
3
+1.8V_SUS
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
H 5.2 H 9.2
DDR_A_D4 DDR_A_D5
DDR_A_DM0 DDR_A_D7
DDR_A_D6 DDR_A_D13
DDR_A_D9 DDR_A_DM1
DDR_A_D14 DDR_A_D15
DDR_A_D20 DDR_A_D16
PM_EXTTS#0 PM_EXTTS#1 DDR_A_DM2
DDR_A_D29 DDR_A_D28
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D31 DDR_A_D27
DDR_CKE1_DIMMA 6,16
DDR_A_MA14 DDR_A_MA11
DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# 6,16
M_ODT0
DDR_A_MA13
DDR_A_D33 DDR_A_D32
DDR_A_DM4 DDR_A_D34
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D43
DDR_A_D47 DDR_A_D52
DDR_A_DM6 DDR_A_D51
DDR_A_D55 DDR_A_D60
DDR_A_D57 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D58
DDR_A_D63
R243
R243 10K
10K
1 2
1 2
3
M_CLK_DDR0 6 M_CLK_DDR#0 6
DDR_A_BS1 7,16 DDR_A_RAS# 7,16
M_ODT0 6,16
M_CLK_DDR1 6 M_CLK_DDR#1 6
R246
R246 10K
10K
DDR_A_DM[0..7] 7 DDR_A_D[0..63] 7 DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7 DDR_A_MA[0..14] 7,16
V_DDR_MCH_REF
12
C332
C332
0.1U
0.1U
10
10
PM_EXTTS#0 6
+3.3V_RUN
12
C334
C334
2.2U
2.2U
0603
0603
6.3
6.3
4
DDR_B_D0 DDR_B_D5
12
C331
C331
2.2U
2.2U
0603
0603
6.3
6.3
DDR_CKE3_DIMMB6,16
DDR_B_BS27,16
DDR_B_BS07,16 DDR_B_WE#7,16
DDR_B_CAS#7,16
DDR_CS3_DIMMB#6,16
M_ODT36,16
12
C339
C339
0.1U
0.1U
10
10
+3.3V_RUN
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D2 DDR_B_D7
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D17 DDR_B_D20
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D22 DDR_B_D19
DDR_B_D29
DDR_B_DM3
DDR_B_D26 DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
M_ODT3 DDR_B_D32
DDR_B_D33 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D41
DDR_B_D40 DDR_B_DM5 DDR_B_D47
DDR_B_D42 DDR_B_D52 DDR_B_D48
DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D53 DDR_B_D54 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D62
DDR_B_D59 CLK_SDATA
CLK_SCLK
SMbus address A4
5
+1.8V_SUS +1.8V_SUS
V_DDR_MCH_REF
JDIM2
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
2-1734073-2
2-1734073-2
CLOCK 2,3
CKE 2,3CKE 0,1
4
5
6
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
DDR_B_D4 DDR_B_D1
DDR_B_DM0 DDR_B_D6
DDR_B_D3 DDR_B_D12
DDR_B_D13 DDR_B_DM1
DDR_B_D14 DDR_B_D15
DDR_B_D16 DDR_B_D21
DDR_B_DM2 DDR_B_D18
DDR_B_D23 DDR_B_D24
DDR_B_D25DDR_B_D28 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D31
DDR_B_D30
DDR_CKE4_DIMMB 6,16
DDR_B_MA14 DDR_B_MA11
DDR_B_MA7 DDR_B_MA6DDR_B_MA8
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# 6,16
M_ODT2
DDR_B_MA13
DDR_B_D36 DDR_B_D37
DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D43
DDR_B_D46
DDR_B_D55
DDR_B_DM6
DDR_B_D50 DDR_B_D61
DDR_B_D60 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D58
DDR_B_D63
R273 10KR273 10K
R284
R284 10K
10K
1 2
6
12
7
DDR_B_DM[0..7] 7 DDR_B_D[0..63] 7 DDR_B_DQS[0..7] 7 DDR_B_DQS#[0..7] 7 DDR_B_MA[0..14] 7,16
V_DDR_MCH_REF
M_CLK_DDR3 6 M_CLK_DDR#3 6
PM_EXTTS#1 6
+1.8V_SUS
12
C394
C394
2.2U
2.2U
0603
0603
6.3
6.3 +1.8V_SUS
12
12
C779
C779
0.1U
0.1U
10
10
C778
C778
2.2U
2.2U
0603
0603
6.3
6.3
Place these Caps near So-Dimm1.
12
12
C396
C396
C393
C393
2.2U
2.2U
2.2U
2.2U
0603
0603
0603
0603
6.3
6.3
6.3
6.3
Place these Caps near So-Dimm2.
12
12
C746
C746
2.2U
2.2U
0603
0603
6.3
6.3
6.3
6.3
DDR_B_BS1 7,16 DDR_B_RAS# 7,16
M_ODT2 6,16
M_CLK_DDR4 6 M_CLK_DDR#4 6
+3.3V_RUN
+1.8V_SUS
Place these Caps near So-Dimm1.
12
C388
C388
0.1U
0.1U
10
10
10
10
+1.8V_SUS
Place these Caps near So-Dimm2.
12
C346
C346
0.1U
0.1U
10
10
10
10
+3.3V_RUN
12
C356
C356
2.2U
2.2U
0603
0603
6.3
6.3
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DDR2 SO-DIMM
DDR2 SO-DIMM
DDR2 SO-DIMM
FM6 1A
FM6 1A
FM6 1A
7
12
C744
C744
C748
C748
2.2U
2.2U
2.2U
2.2U
0603
0603
0603
0603
6.3
6.3
12
12
C391
C391
C389
C389
0.1U
0.1U
0.1U
0.1U
10
10
12
12
C362
C362
C353
C353
0.1U
0.1U
0.1U
0.1U
10
10
12
C363
C363
0.1U
0.1U
10
10
8
12
12
C395
C395
C749
C749
2.2U
2.2U
2.2U
2.2U
0603
0603
0603
0603
6.3
6.3
6.3
6.3
12
12
6.3
6.3
12
10
10
12
10
10
C747
C747
2.2U
2.2U
0603
0603
C352
C352
0.1U
0.1U
C390
C390
0.1U
0.1U
C745
C745
2.2U
2.2U
0603
0603
6.3
6.3
12
+
+
C316
C316 *330U/6.3V_NC
*330U/6.3V_NC
7343
7343
6.3
6.3
of
of
of
15 58Monday, June 30, 2008
15 58Monday, June 30, 2008
15 58Monday, June 30, 2008
8
1
2
3
4
5
6
7
8
+0.9V_DDR_VTT
A A
B B
C C
D D
1
Please these resistor closely DIMMA,all trace length<750 mil.
12
C376
C376
0.1U
0.1U
10
10
+0.9V_DDR_VTT
12
C326
C326
0.1U
0.1U
10
10
DDR_CS0_DIMMA#6,15
DDR_CS1_DIMMA#6,15 DDR_CKE0_DIMMA6,15 DDR_CKE1_DIMMA6,15
2
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
12
C348
C348
0.1U
0.1U
10
10
10
10
12
C325
C325
0.1U
0.1U
10
10
10
10
DDR_A_MA[0..14]7,15 DDR_B_MA[0..14] 7,15
DDR_A_RAS#7,15 DDR_A_BS17,15
M_ODT06,15
DDR_A_BS27,15
DDR_A_BS07,15
DDR_A_CAS#7,15 DDR_A_WE#7,15
M_ODT16,15
12
12
12
C354
C354
C347
C347
0.1U
0.1U
0.1U
0.1U
10
10
10
10
12
C323
C323
C324
C324
0.1U
0.1U
0.1U
0.1U
10
10
10
10
DDR_A_MA7 DDR_A_MA11
DDR_A_MA4 DDR_A_MA6
DDR_A_BS1 DDR_B_BS1
DDR_A_MA13 M_ODT0
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA3 DDR_A_MA5
DDR_A_MA10 DDR_A_BS0
DDR_A_CAS# DDR_A_WE#
DDR_A_MA0 DDR_A_MA2
DDR_A_MA1
DDR_A_MA14 DDR_B_MA14
R235 56R235 56 R237 56R237 56 R244 56R244 56 R234 56R234 56 R236 56R236 56 R242 56R242 56 R245 56R245 56
3
12
C355
C355
0.1U
0.1U
12
C322
C322
0.1U
0.1U
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
1 2 1 2 1 2 1 2 1 2 1 2 1 2
RP18
RP18
56X2
56X2 RP19
RP19
56X2
56X2 RP21
RP21
56X2
56X2 RP22
RP22
56X2
56X2 RP12
RP12
56X2
56X2 RP13
RP13
56X2
56X2 RP14
RP14
56X2
56X2 RP15
RP15
56X2
56X2 RP16
RP16
56X2
56X2 RP20
RP20
56X2
56X2
12
12
12
C351
C351
C350
C350
0.1U
0.1U
0.1U
0.1U
10
10
10
10
10
10
12
12
10
10
C329
C329
0.1U
0.1U
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
1 3
C328
C328
0.1U
0.1U
10
10
+0.9V_DDR_VTT
4
10
10
12
C375
C375
C357
C357
0.1U
0.1U
0.1U
0.1U
10
10
12
12
C337
C337
C336
C336
0.1U
0.1U
0.1U
0.1U
10
10
RP32
RP32
1 3
56X2
56X2
RP33
RP33
1 3
56X2
56X2
RP35
RP35
1 3
56X2
56X2
RP36
RP36
1 3
56X2
56X2
RP28
RP28
1 3
56X2
56X2
RP26
RP26
1 3
56X2
56X2
RP27
RP27
1 3
56X2
56X2
RP29
RP29
1 3
56X2
56X2
RP30
RP30
1 3
56X2
56X2
RP34
RP34
1 3
56X2
56X2
R261 56R261 56 R258 56R258 56 R275 56R275 56 R260 56R260 56 R259 56R259 56 R271 56R271 56 R272 56R272 56
10
10
10
10
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
2 4
12 12 12 12 12 12 12
12
C343
C343
0.1U
0.1U
12
C327
C327
0.1U
0.1U
DDR_B_WE#
12
10
10
12
10
10
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_RAS#DDR_A_RAS#
M_ODT2 DDR_B_MA13
DDR_B_MA3 DDR_B_MA1
DDR_B_MA8 DDR_B_MA12
DDR_B_MA5 DDR_B_MA9
DDR_B_MA10
DDR_B_CAS# DDR_B_BS0
DDR_B_MA0 DDR_B_MA2
5
C342
C342
0.1U
0.1U
C358
C358
0.1U
0.1U
10
10
10
10
12
12
C349
C349
0.1U
0.1U
12
C377
C377
0.1U
0.1U
DDR_B_RAS# 7,15 DDR_B_BS1 7,15
M_ODT2 6,15
DDR_B_WE# 7,15
DDR_B_CAS# 7,15 DDR_B_BS0 7,15
M_ODT3 6,15
DDR_B_BS2 7,15 DDR_CS2_DIMMB# 6,15 DDR_CS3_DIMMB# 6,15 DDR_CKE3_DIMMB 6,15 DDR_CKE4_DIMMB 6,15
C341
C341
0.1U
0.1U
10
10
12
C345
C345
0.1U
0.1U
10
10
Please these resistor closely DIMMB,all trace length<750 mil.
12
C340
C340
0.1U
0.1U
10
10
12
C321
C321
0.1U
0.1U
10
10
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
DDR2 RES. ARRAY
DDR2 RES. ARRAY
DDR2 RES. ARRAY
FM6 1A
FM6 1A
FM6 1A
7
of
of
of
16 58Monday, June 30, 2008
16 58Monday, June 30, 2008
16 58Monday, June 30, 2008
8
1
2
3
4
5
6
7
8
Add capacitor pads for improving WWAN.
C694 20P 50C694 20P 50 C666 *27P_NC 50C666 *27P_NC 50
1 2
C679 *27P_NC 50C679 *27P_NC 50
1 2
C272 *27P_NC 50C272 *27P_NC 50
1 2
C689 *27P_NC 50C689 *27P_NC 50
1 2
A A
Y3
Y3
14.318MHZ
14.318MHz
SATA_CLKREQ#13
CLK_3GPLLREQ#6
CLK_LPC_DEBUG33 CLK_PCI_PCCARD28
CLK_PCI_851231 CLK_PCI_ICH12 CLK_ICH_48M13 CPU_MCH_BSEL03,6
CPU_MCH_BSEL13,6 CPU_MCH_BSEL23,6
CLK_ICH_14M13 CLK_PWRGD13
1
14.318MHZ
12
10
10
C653
C653 33P
33P
1 2
50
50
B B
+3.3V_RUN
L71 BLM21PG600SN1D
L71 BLM21PG600SN1D
0805
0805
120 ohms@100Mhz
C C
L72 BLM21PG600SN1D
L72 BLM21PG600SN1D
0805
0805
120 ohms@100Mhz
D D
CLK_ICH_48M CLK_ICH_14M CLK_PCI_8512
CLK_PCI_PCCARD
CLK_PCI_ICH
CLK_XTAL_OUTCLK_XTAL_IN
21
C652
C652 33P
33P
1 2
50
50
SATA_CLKREQ# CLK_3GPLLREQ#
CLK_LPC_DEBUG CLK_PCI_PCCARD
CLK_PCI_ICH PCI_ICH CLK_ICH_48M
L73
L73
BLM18AG601SN1D
BLM18AG601SN1D
L65
L65
BLM18AG601SN1D
BLM18AG601SN1D
CLK_ICH_14M
12
C693
C693
C692
C692
0.1U
0.1U
0.1U
0.1U
10
10
R474 2.2R474 2.2
1 2
R506 2.2R506 2.2
1 2
R504 2.2R504 2.2
1 2
R162 2.2R162 2.2
1 2
R487 475/FR487 475/F R489 475/FR489 475/F
R189 *22_NCR189 *22_NC R190 33R190 33
R492 33R492 33 R499 33R499 33 R508 33R508 33 R507 2.2KR507 2.2K
R471 0R471 0 R477 10KR477 10K
R481 33R481 33
+CK_VDD_MAIN
12
C691
C691
0.1U
0.1U
10
10
+CK_VDD_PCI
+CK_VDD_PLL3
+CK_VDD_48
12
C687
C687
0.1U
0.1U
10
10
+CK_VDD_SRC
2
Only for debug
1 2 1 2
1 2
12 12 12 12
1 2
12 12
12
C661
C661
0.1U
0.1U
10
10
12
C662
C662
0.1U
0.1U
10
10
12
12
C688
C688
4.7U
4.7U
0603
0603
6.3
6.3
12
+CK_VDD_PCI +CK_VDD_PLL3
+CK_VDD_48 +CK_VDD_SRC
+CK_VDD_MAIN
7/30-70
SATA_CLKREQ#_C CLK_3GPLLREQ#_C PCI_PCCARD PCI_SIOCLK_PCI_8512 27M_SEL
2/13-6
FSA FSB FSC
CLK_XTAL_OUT CLK_XTAL_IN
CLK_SDATA CLK_SCLK
UMA without iAMT
12
12
C642
C642
C641
C641
0.1U
0.1U
0.1U
2/19-20
12
C269
C269
0.1U
0.1U
10
10
2/19-20
12
C254
C254
0.1U
0.1U
10
10
0.1U
10
10
3
C695
C695
0.1U
0.1U
10
10
C659
C659
0.1U
0.1U
10
10
10
10
9
4 23 16 46 62
19 27 33 43 52 56
15 18 22 26 30 36 49 59
1
8 10 11 12 13 14
17 64
5 55
63
2
3
6
7
12
C690
C690
*10U_NC
*10U_NC
0603
0603
6.3
6.3
SMbus address D2
These are for backdrive issue.
U31
U31
VDD_PCI VDD_REF VDD_PLL3 VDD_48 VDD_SRC VDD_CPU
VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO
GND GND GND GND GND GND GND GND GND
CR#_A/PCI-0 CR_B/PCI-1 TME/PCI-2 SRC5_EN/PCI-3 27M_SEL/PCI-4 ITP_EN/PCIF-5#
FSA/USB48 FSB/TEST_MODE FSC/TEST_SEL/REF
RESET# CK_PWRGD/PD#
XOUT XIN
SDATA SCLK
SLG8SP513V
SLG8SP513V
SMBDAT126,31,39
SMBCLK126,31,39
CK505
CK505
QFN64
QFN64
CLK_ITP_BCLK3 CLK_ITP_BCLK#3
4
CPU-0
CPU-0#
CPU-1
CPU-1#
SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
SRC-0/DOT96
SRC-0#/DOT96#
SRC-1/SE1
SRC-1#/SE2
SRC-2/SATA
SRC-2#/SATA#
CR#_C/SRC-3
CR#_D/SRC-3#
SRC-4
SRC-4#
PCI_STOP#/SRC-5
CPU_STOP#/SRC5-5#
SRC-6
SRC-6#
CR#_F/SRC-7
CR#_E/SRC-7#
SRC-9
SRC-9# SRC-10
SRC-10#
CR#_H/SRC-11
CR#_G/SRC-11#
GND
RP6 *0x2_NCRP6 *0x2_NC
+3.3V_RUN
2
Q26
Q26
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
2
Q28
Q28
3 1
2N7002W-7-F
2N7002W-7-F
4 2
CPU_BCLK
61
CPU_BCLK#
60
MCH_BCLK
58
MCH_BCLK#
57
PCIE_MINI1
54
PCIE_MINI1#
53
DOT96_SSC
20
DOT96_SSC#
21
27M_NSS
24
27M_SS
25
PCIE_SATA
28
PCIE_SATA#
29
PCIE_MINI3
31
PCIE_MINI3#
32
MCH_3GPLL
34
MCH_3GPLL#
35 45
44
PCIE_EXPCARD
48
PCIE_EXPCARD#
47
MINI1CLK_REQ#_C MINI1CLK_REQ#
51 50
PCIE_MINI2
37
PCIE_MINI2#
38
PCIE_ICH
41
PCIE_ICH#
42
PCIE_LOM
40
PCIE_LOM#
39
65
PCIE_MINI1
3
PCIE_MINI1#
1
4 2
4 2
4 2
4 2
R510 33R510 33 R509 *33_NCR509 *33_NC
4 2
2 4
2 4
4 2
R464 475/FR464 475/F
1 2
R466 475/FR466 475/F
1 2
2 4
2 4
2 4
PCI_ICH
RP40
RP40
3
0x2
0x2
1
RP39
RP39
3
0x2
0x2
1
RP38
RP38
3
0x2
0x2
1
RP9
RP9
3
0x2
0x2
1
12 12
RP10
RP10
3
0x2
0x2
1
RP45
RP45
1
0x2
0x2
3
RP44
RP44
1
0x2
0x2
3
RP41
RP41
3
0x2
0x2
1
RP43
RP43
1
0x2
0x2
3
RP42
RP42
1
0x2
0x2
3
RP8
RP8
1
0x2
0x2
3
+3.3V_RUN
1 2
Non-iAMT
2
4
1
3
RP7
RP7
2.2KX2
2.2KX2
CLK_SDATA
CLK_SCLK
R188 POP: For Internal pull-low. R191 POP: For internal pull-high.
27M_SEL
5
1 2
+3.3V_RUN
1 2
1 2
2/20-21
CARD_CLK_REQ#CARD_CLK_REQ#_C
R198
R198 *10K_NC
*10K_NC
R200
R200 *10K_NC
*10K_NC
R495
R495 10K
10K
R497
R497 *10K_NC
*10K_NC
6
27M_SEL
27M_SEL (PIN13)
0=UMA 1 = Disc.
GRFX down
CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5
CLK_PCIE_MINI1 34 CLK_PCIE_MINI1# 34
CLK_PCIE_VGA 18 CLK_PCIE_VGA# 18
CLK_VGA_27M_NSS 19
CLK_VGA_27M_SS 19
CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11
CLK_PCIE_MINI3 33 CLK_PCIE_MINI3# 33
CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6
H_STP_PCI# 13 H_STP_CPU# 13
CLK_PCIE_EXPCARD 30 CLK_PCIE_EXPCARD# 30
MINI1CLK_REQ# 34 CARD_CLK_REQ# 30
CLK_PCIE_MINI2 33 CLK_PCIE_MINI2# 33
CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12
CLK_PCIE_LOM 42 CLK_PCIE_LOM# 42
CLK_3GPLLREQ# SATA_CLKREQ# CARD_CLK_REQ# MINI1CLK_REQ# PCI_PCCARD
PCI_SIO PCI_ICH
2/21-24
H_STP_PCI# H_STP_CPU#
R167 10KR167 10K R174 10KR174 10K
R490 10KR490 10K R488 10KR488 10K R469 10KR469 10K R463 10KR463 10K R188 *10K_NCR188 *10K_NC
R493 *10K_NCR493 *10K_NC
1 2
R501 *10K_NCR501 *10K_NC
1 2
2/20-21
1 2
+3.3V_RUN
12 12
+3.3V_RUN
12 12 12 12
FSC FSB FSA CPU SRC PCI
100
1 0
1
0
1
0 00 1
0
1
1 1
1
100
1
133
10
166
1
200
0
266
0
333
0
400
0
RSVD
1
100 100 100 100 100 100 100
330 33 33 33 33 33 33 33
PIN20 PIN21 PIN24 PIN25
DOT96T
DOT96C
SRCT0 SRCC0
QUANTA
QUANTA
QUANTA COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
FM6 2A
FM6 2A
FM6 2A
7
96/ 100M_T
27Mout
96/ 100M_C
27MSSout
17 58Wednesday, July 30, 2008
17 58Wednesday, July 30, 2008
17 58Wednesday, July 30, 2008
8
of
of
of
5
4
3
2
1
PCIE_MTX_GRX_P[0..15]6 PCIE_MTX_GRX_N[0..15]6
PCIE_MTX_GRX_P0
5
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5 PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15
D D
C C
B B
CLK_PCIE_VGA17 CLK_PCIE_VGA#17
A A
PLTRST_DELAY#13
AC30 AC31
AC29 AB29
AB31 AB30
AA31 AA30
W30 W31
W29
V29
V31 V30
U31 U30
P30 P31
P29 N29
N31 N30
M31 M30
K30 K31
K29
J29
J31 J30
H31 H30
AD29 AD30
AC28 AC27
AG25
U27A
U27A
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
PCIE_RX8P PCIE_RX8N
PCIE_RX9P PCIE_RX9N
PCIE_RX10P PCIE_RX10N
PCIE_RX11P PCIE_RX11N
PCIE_RX12P PCIE_RX12N
PCIE_RX13P PCIE_RX13N
PCIE_RX14P PCIE_RX14N
PCIE_RX15P PCIE_RX15N
Clock
Clock
PCIE_REFCLKP PCIE_REFCLKN
SM BUS
SM BUS
NC_SMBCLK NC_SMBDATA
PERSTB
M82-S
M82-S
PART 1 OF 6
PART 1 OF 6
P
P C
C I
I
-
­E
E X
X P
P R
R E
E S
S S
S
I
I N
N T
T E
E R
R F
F A
A C
C E
E
4
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
Calibration
Calibration
PCIE_CALRN PCIE_CALRP
NC_1 NC_2
AA28 AA27
AA25 AA24
Y28 Y27
Y25 Y24
V28 V27
V25 V24
T28 T27
T25 T24
P28 P27
P25 P24
M28 M27
M25 M24
L28 L27
L25 L24
J28 J27
G28 G27
AF25 AE25
AE23 AH30
PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N15
R45 2K/FR45 2K/F
12
R58
R58
1.27K/F
1.27K/F
12
+PCIE_VDDC
3
PCIE_MRX_GTX_P[0..15]6 PCIE_MRX_GTX_N[0..15]6
PCIE_MRX_GTX_P0 PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15
2
C830.1U 10C830.1U 10
12
C800.1U 10C800.1U 10
12
C880.1U 10C880.1U 10
12
C840.1U 10C840.1U 10
12
C900.1U 10C900.1U 10
12
C890.1U 10C890.1U 10
12
C1070.1U 10C1070.1U 10
12
C950.1U 10C950.1U 10
12
C1160.1U 10C1160.1U 10
12
C1080.1U 10C1080.1U 10
12
C1280.1U 10C1280.1U 10
12
C1200.1U 10C1200.1U 10
12
C1500.1U 10C1500.1U 10
12
C1300.1U 10C1300.1U 10
12
C1570.1U 10C1570.1U 10
12
C1510.1U 10C1510.1U 10
12
C810.1U 10C810.1U 10
12
C820.1U 10C820.1U 10
12
C860.1U 10C860.1U 10
12
C870.1U 10C870.1U 10
12
C940.1U 10C940.1U 10
12
C910.1U 10C910.1U 10
12
C1020.1U 10C1020.1U 10
12
C1030.1U 10C1030.1U 10
12
C1100.1U 10C1100.1U 10
12
C1110.1U 10C1110.1U 10
12
C1250.1U 10C1250.1U 10
12
C1260.1U 10C1260.1U 10
12
C1400.1U 10C1400.1U 10
12
C1350.1U 10C1350.1U 10
12
C1560.1U 10C1560.1U 10
12
C1490.1U 10C1490.1U 10
12
Title
Title
Title
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
VGA-M82-S (PCIe)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM7 1A
FM7 1A
FM7 1A
Date: Sheet
Date: Sheet
Date: Sheet
PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N0 PCIE_MRX_GTX_C_N1 PCIE_MRX_GTX_C_N2 PCIE_MRX_GTX_C_N3 PCIE_MRX_GTX_C_N4 PCIE_MRX_GTX_C_N5 PCIE_MRX_GTX_C_N6 PCIE_MRX_GTX_C_N7 PCIE_MRX_GTX_C_N8 PCIE_MRX_GTX_C_N9 PCIE_MRX_GTX_C_N10 PCIE_MRX_GTX_C_N11 PCIE_MRX_GTX_C_N12 PCIE_MRX_GTX_C_N13 PCIE_MRX_GTX_C_N14 PCIE_MRX_GTX_C_N15
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
18 58Wednesday, July 30, 2008
18 58Wednesday, July 30, 2008
18 58Wednesday, July 30, 2008
of
of
1
of
5
MEMORY APERTURE SIZE SELECT
CFG0
CFG1
MEMORY SIZE
128MB
256MB
64MB
D D
512MB
+3.3V_DELAY
R431 10KR431 10K R432 *10K_NCR432 *10K_NC R433 *10K_NCR433 *10K_NC R96 *10K_NCR96 *10K_NC
GPIO Straps table
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
C C
GPIO10
ATI Usage recommended settings
+3.3V_DELAY
R80 10KR80 10K R420 10KR420 10K R424 *10K_NCR424 *10K_NC R79 *10K_NCR79 *10K_NC R425 *10K_NCR425 *10K_NC R423 *10K_NCR423 *10K_NC R101 *10K_NCR101 *10K_NC R430 *10K_NCR430 *10K_NC
R97 10KR97 10K R102 *10K_NCR102 *10K_NC R78 10KR78 10K R410 10KR410 10K
B B
R84 10KR84 10K
OSC_SPREAD22
CLK_VGA_27M_SS17
CLK_VGA_27M_NSS17
A A
OSC_OUT22
CFG2
CFG3
GPIO13 GPIO12 GPIO11
GPIO9
X
0
00
X
001
X
010
X
100
1 2 1 2 1 2 1 2
RAM_CFG0 RAM_CFG1 RAM_CFG2 RAM_CFG3
DESCRIPTION OF DEFAULT SETTINGS
PCIE FULL TX OUTPUT SWING PCIE TRANSMITTER DE-EMPHASIS ENABLED ATI reserved configuration straps. ATI reserved configuration straps. DEBUG SIGNALS MUXED OUT Allows either PCIe 2.5GT/s or 5.0GT/s operation ATI Internal use only Serial ROM clock to ROM.
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
0= DO NOT INSTALL RESISTOR, X = DESIGN DEPENDANT, RSVD = ATI RESERVED (DO NOT INSTALL)
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO10
HDMI_HD_EN TEMP_FAIL# GFX_CLKREQ# VGAHSYNC
1 2
5
TEMP_FAIL#
R389 *0_NCR389 *0_NC
1 2
R398 *0_NCR398 *0_NC
1 2
R399 100/FR399 100/F R412 120/FR412 120/F
Y2
Y2
21
*27MHZ_NC
*27MHZ_NC
R390 *1M_NCR390 *1M_NC
12
C524
C524 *18P_NC
*18P_NC
50
50
12
C520
C520 *18P_NC
*18P_NC
50
50
Memory Straps 400MHz
256MB(32M*16) Samsung 400MHz 256MB(32M*16) Hynix 500MHz 256MB(32M*16) Samsung 500MHz 256MB(32M*16) Qimonda
+1.8V_RUN
ATI Usage
X X RSVD RSVD 0 X 0
GFX_CORE_CNTRL050
GFX_CORE_CNTRL150
CLK_VGA_27M_SSIN_R
R411 0R411 0
1 2
R388 *0_NCR388 *0_NC
1 2 1 2
R387 *0_NCR387 *0_NC
R401 *10K_NCR401 *10K_NC R402 *10K_NCR402 *10K_NC R403 10KR403 10K R400 *10K_NCR400 *10K_NC
FM6 Usage
1 1 0 0 0 0 0 0
12
R393
R393 *10K_NC
*10K_NC
1 2 1 2 1 2 1 2
+1.8V_RUN
4
RAM_TYPE
RAM_TYPE
RAM_TYPE
RAM_TYPE
_CFG2
_CFG3
0
00
_CFG1
_CFG0
1
0011
0
11
0100
RAM_TYPE_CFG0 RAM_TYPE_CFG1 RAM_TYPE_CFG2 RAM_TYPE_CFG3
RAM_TYPE_CFG0 RAM_TYPE_CFG1 RAM_TYPE_CFG2 RAM_TYPE_CFG3
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5
PANEL_BKEN31
THERMAL_INT#22
TEMP_FAIL#20
BB_ENA20
R75
R75 499/F
499/F
1 2
R74
R74 249/F
249/F
1 2
XTAIN XTAOUT
4
GPIO6 HDMI_HD_EN
RAM_CFG3 GPIO10 RAM_CFG0 RAM_CFG1 RAM_CFG2
CLK_VGA_27M_SSIN_R
R105 *0_NCR105 *0_NC
TEMP_FAIL#
GFX_CLKREQ#
R438 1KR438 1K
12
C93
C93
0.1U
0.1U
10
10
T101 PADT101 PAD
1 2
T17 PADT17 PAD
T104 PADT104 PAD
T18 PADT18 PAD T25 PADT25 PAD T19 PADT19 PAD T20 PADT20 PAD
T15 PADT15 PAD T14 PADT14 PAD T16 PADT16 PAD T8 PADT8 PAD T9 PADT9 PAD
+DPLL_PVDD
+PCIE_PVDD
+MPVDD
+DPLL_VDDC
R46 1KR46 1K
1 2
AJ4 AJ5
AL5 AK5
AL6 AK6
AK8 AL8
0
AD9 AE7
AK4 AL3
V2 V1
W3 W1
Y1 Y2
Y3 AA2 AA3 AB1 AB2 AB3 AC1 AC3 AD1 AD2 AD3 AF3
AG3
AH3
AG1
AH2 AH1 AJ3 AJ1 AJ2 AK2 AK3
Y4
V3
V4
V5
U3
U2
T4 T5 T7
T8 R1 R2 R3 P1 P3 N1 N2 P4 P7 P8 P5 V7 N3 Y5
12
M4 M5 M7 M8
L8 Y8
Y7 V8
AH6
AG6
AC11
AH12 AG12
AH31
A9 B9
AE12
AJ31 AJ30
AH26 AD12
3
U27B
U27B
TXCM_DPA0P TXCP_DPA0N
TX0M_DPA1P TX0P_DPA1N
TX1M_DPA2P TX1P_DPA2N
TX2M_DPA3P TX2P_DPA3N
DVALID PSYNC_NEW
DVPCNTL_MVP_0 DVPCNTL_MVP_1
DVPCNTL_0 DVPCNTL_1 DVPCNTL_2
DVPCLK DVPDATA_0
DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB GPIO_24_JMODE GPIO_25_TDI GPIO_26_TCK GPIO_27_TMS GPIO_28_TDO
GEN_A GEN_B GEN_C GEN_D_HPD4 GEN_E
VREFG
DPLL_PVDD DPLL_PVSS
PCIE_PVDD
MPVDD MPVSS
DPLL_VDDC XTALIN XTALOUT
TESTEN PLLTEST
M82-S
M82-S
GENERAL
GENERAL PURPOSE
PURPOSE I/O
I/O
3
EXT TMDS
EXT TMDS DVO
DVO
PLL &
PLL & XTAL
XTAL
TEST
TEST
INTEGRATED
INTEGRATED TMDS/DP PORT
TMDS/DP PORT
PART 2 OF 6
PART 2 OF 6
DAC1 / CRT
DAC1 / CRT
DAC2 (TV/CRT2)
DAC2 (TV/CRT2)
SERIAL
SERIAL BUSES
BUSES
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
THERMAL
THERMAL
TXCM_DPB0P
TXCP_DPB0N TX0M_DPB1P
TX0P_DPB1N
TX1M_DPB2P
TX1P_DPB2N
TX2M_DPB3P
TX2P_DPB3N
DPA_PVDD DPA_PVSS
DPB_PVDD DPB_PVSS
DPA_VDDR_1 DPA_VDDR_2
DPB_VDDR_1 DPB_VDDR_2
DPB_VSSR_5 DPB_VSSR_4 DPB_VSSR_3 DPB_VSSR_2 DPB_VSSR_1
DPA_VSSR_5 DPA_VSSR_4 DPA_VSSR_3 DPA_VSSR_2 DPA_VSSR_1
DP_CALR
HPD1
HSYNC VSYNC
RSET AVDD
AVSSQ
VDD1DI
VSS1DI
R2B
G2B
B2B
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
R2SET
SCL SDA
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
TS_FDO
DPLUS
DMINUS
2
AK9 AL9
AJ9 AJ10
AL10 AK10
AL11 AK11
AL7 AK7
AE11 AF11
AJ12 AJ13
AK13 AL13
AL12 AK12 AJ11 AH9 AH11
AJ8 AF7 AG7 AJ7 AH7
AG11 AA8 AL28
R
AK28
RB
AL27
G
AK27
GB
AL26
B
AK26
BB
AK29 AK30
AJ28 AL29 AH28 AJ27 AJ26 AL17
R2
AK17 AL15
G2
AK15 AL14
B2
AK14 AJ17
C
AJ15
Y
AJ14 AE16
AF16 AH14 AH16 AG16 AF18 AE18 AG14
AA5 AA4
AJ29 AH29
AC5 AC4
AF4 AH4
AF9 AG9
AE14 AE5
AE4
+TPVDD
+DPA_VDDR
+DPB_VDDR
VIP_3
R73 150R73 150
VGAHSYNC
R59 499/FR59 499/F
+VDD1D_2D
+A2VDD +A2VDDQ
+VDD1D_2D
R404 715/FR404 715/F
LCD_DDCDAT LCD_DDCCLK
R61 0R61 0 R60 0R60 0
R413 0R413 0
1 2
1 2
12
+AVDD
2/25-28
LVDS
LCD_DDCDAT 26 LCD_DDCCLK 26
HDMI
HDMI_SDA 26 HDMI_SCL 26
G_DAT_DDC2 27 G_CLK_DDC2 27
CRT
VGA_THERMDP 22
VGA_THERMDN 22
2
HDMI_CLK- 26 HDMI_CLK+ 26
HDMI_TX0- 26 HDMI_TX0+ 26
HDMI_TX1- 26 HDMI_TX1+ 26
HDMI_TX2- 26 HDMI_TX2+ 26
VGA_RED 27
VGA_GRN 27
VGA_BLU 27
VGAHSYNC 27 VGAVSYNC 27
R406
R406 150/F
150/F
Title
Title
Title
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
VGA-G86GLM (VIDEO)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FM6 2A
FM6 2A
FM6 2A
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_DELAY
R76
R76 10K
10K
2
Q19
Q19
1 3
MMST3904-7-F
MMST3904-7-F
VGA_BLU VGA_GRN VGA_RED
R408
R408
R407
R407
150/F
150/F
150/F
150/F
LCD_DDCDAT LCD_DDCCLK
QUANTA
QUANTA
QUANTA COMPUTER
COMPUTER
COMPUTER
1
2/13-9
3/28-36
R82
R82 10K
10K
2
12
R373
Q41
Q41
1 3
DTC114TUAT106
DTC114TUAT106
DIS only
Layout Note: Place 150 ohm termination resistors close to ATI CHIP.
1108.21
R397 2.2KR397 2.2K R396 2.2KR396 2.2K
R373 100K
100K
+3.3V_DELAY
12 12
19 58Monday, June 30, 2008
19 58Monday, June 30, 2008
19 58Monday, June 30, 2008
1
HDMI_DET 26
of
of
of
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