3.3A Charger Interf ace, W ide Input Sensorless CC/CV
Synchronous-Rectified Buck Converter
for QC2.0/QC3.0/PE+1.1/PE+2.0 And FCP
The uP9616 is a high-efficiency synchronous-rectified buck
converter with an internal power switch. With internal low
RDS(ON) switches, the high-efficiency buck converter is
ca pable of delivering up to 3.3A output current for charger
interface a nd a wide input voltage range from 8V to 32V . It
operates in either CV (Consta nt Output Voltage) mode or
CC (Constant Output Current) mode a nd provides a current
limitation function. The uP9616 has a constant output
voltage 5.2V/9V/12V for Qualcomm® Quick ChargeTM 3.0/
2.0(QC2.0/QC3.0) that is detected from D+ a nd D- line and
automatically detects whether a connected Powered Device
(PD) is Quick Charge (QC2.0/QC3.0) capable before
enabling output voltage adjustment. If a PD not compli ant
to Quick Charge (QC2.0/QC3.0) is detected, the uP9616
disables output voltage adjustment to ensure safe operation
with legacy 5.2V only USB PDs.
uP9616 is a USB secondary side fa st-charging converter,
supporting Qualcomm® Quick ChargeTM 3.0 (QC 3.0) High
Voltage Dedicated Charging Port (HVDCP) Class A
specification.
uP9616 allows for selection of the output voltage of a n AC/
DC USB adapter based on commands from the Portable
Device (PD) being powered. Selecting a higher charging
voltage will reduce the charging current for a given power
level resulting in reduced IR drops and increased system
efficiency. Another advantage of QC3.0 is a decreased
battery charging time and a reduced PD system cost tha nks
to the ability to select an opti mum charging voltage. This
eliminates the need f or costly DC/DC converters within the
PD. The USB-bus voltage can be controlled in discreet
steps from 3.6 V up to 12.1V. The output current is limited
not to exceed maximum allowable power level.
Other features for the buck converter include internal softstart, adjustable external CC (Constant Output Current)
limit setting, built-in fixed line-compensation, short circuit
protection, VIN/VOUT over voltage protection, and over
temperature protection. It is available in space saving
V DF N6x5-8L a nd V DF N5x6-10L pa ckages.
PDA Like Device Car Chargers
Portable Charging Devices
rebmuNredrOepyTegakcaPgnikraMpoT
8CDP6169PuL8-5x6NFDVP6169Pu
AYDP6169PuL01-6x5NFDVP6169Pu
Note:
(1) Please check the sample/production availability with
uPI representatives.
(2) uPI products are compatible with the current IPC/JEDEC
J-STD-020 requirement. They are halogen-free, RoHS
compliant and 100% matte tin (Sn) plating that are suitable
for use in SnPb or Pb-free soldering processes.
VIN
1
VIN
2
D+
D-
GND
3
45
VDFN6x5-8L
D-
2
1
9
10
SENSE-
SENSE+D+
VDFN5x6-10L
CC2
3
GND
8
BOOT
8
LX
7
BOOT
SENSE+
6
SENSE-
VIN
CC1
4
5
7
6
LX
LX
www.upi-semi.com
1uP9616-DS-C3202, Feb. 2017
Page 2
Conceptual
T ypical App licat ion Circuit
Features
uPI Confidential
uP9616
Certification: uP9616 is certified by Qualcomm
and UL. Please refer to the information below
for verification:
The uP9616 provides CV/CC function. It operates in either
CV (Consta nt Output V oltage) mode or CC (Constant Output
Current) mode. The function provides a current limitation
function and adjusts external current limit setting
(Default=3.3A). In the CV mode, the output voltage is
controlled within +1.5%. In the CC mode, the output current
variation is less tha n +3% of the nominal value which can
be set up to 3.3A by the current sen sing resistor.
When Output current increa se until it reache s the CC limit
set by the R
transition from regulating output voltage to regulating output
current, and the output voltage will drop with increasing
load.
The CC (Constant Output Current) limit is set at 3.3A by
default with an external re sista nce R
the (SENSE1+) - (SENSE1-) voltage gets higher than
130mV and re aches the current limit, the driver is turned
off. The CC (Consta nt Output Current) limit is set a ccording
to the following equation:
CC (Constant Output Current) Li mit
Output Cable Resistance Compensation
In charger applications, the large load will cause voltage
drop in the output cable. The uP9616 ha s a built-in ca ble
compensation function. When the load increases, the
cable compensator will increa se a n adjustable regulation
of the error amplifier that can make the output voltage
constant. Use the curve and table to adjust internal the
reference voltage values for fixed USB cable compensation
by outside resistance R
Figure 1 and Table 1.The fixed cable compensation is
calculated as f ollows:
LOADCOMPRI
R
m( Ω)06
PMOC
I
)Am(
DAOL
00
0050
000106
005109
resistor. At this point, the device will
SENSE
= 39mΩ,When
SENSE
m
130
=
SENSE
= 39mΩ (default), a s shown in
SENSE
COM
x =
)Vm(
egatloVnoitasnepmoCelbaCBSUdexiF
200
150
(mV)
100
COMP
V
50
0
050010001500200025003000
I
LOAD
Figure 1 USB Cable Compensation at
a Fixed Resistor Divider V alue
Current Limit Protection
The uP9616 continuously monitors the inductor current,
when the inductor current is higher than current limit
threshold, the current limit function activates and forces
the upper switch turning off to limit inductor current cycle
by cycle.
Output Short Circuit Protection
The uP9616 provides output short circuit protection func-
tion. Once the output loader short-circuits, the SCP will
be triggered then always hiccup, the hiccup cycle time is
set by an internal counter. When the SCP condition is
removed or disa ppears, the converter will resume normal
operation and the hiccup status will terminate.
Output Over V oltage Protection
The uP9616 provides output over voltage protection. Once
the output voltage (mea sured the at SENSE- pin) gets higher
than OVP thre shold, the OVP will be triggered to shut down
the converter. When the OVP condition disappears, the
converter will resume normal operation and resume the
normal state automatically .
Over Temperature Protection
The OTP is triggered and shuts down the uP9616 if the
junction temperature is higher than 150oC The OTP is a
non-latch type protection. The uP9616 automatically
initiates a nother soft start cycle if the junction temperature
drops below 130oC.
(mA)
R
= 60mV/A (Fixed)
COMP
0002021
0052051
0003081
T able 1 USB Ca ble Compensation Application T a ble
www.upi-semi.com
5uP9616-DS-C3202, Feb. 2017
Page 6
Conceptual
Functional Description
uPI Confidential
uP9616
High V oltage Dedicated Charging Port (HV DCP) Mode
After power-up pins D+ and D- of uP9616 are shorted with
impedance R
set to V
mode. If a portable device compatible with the Qualcomm
Quick Charge specification is connected, a negotiation
between HV DCP and PD is executed. Once the negotiation
is successful the uP9616 opens D+ and D- short connection
and D- is pulled down with a R
HV DCP mode. It monitors D+ and D- in puts. Based on the
specified control patterns, the internal voltage reference
value V
voltage to the required value.
The uP9616 is available in Cla ss A version. Cla ss A allows
to change the output voltage up to VBUS = 12V. If the
unplug event is detected the decoder circuitry turns-on a n
internal current sink, which discharges the output ca pacitors
to a safe voltage level. If the uP9616 is set to a Continuous
mode it responds to the PD requests in a Single request
mode. It does not support Group request mode.
HV DCP Continuous Mode
The continuous mode of operation leverages the previously
unused state in QC2.0. If the portable devices try and utilize
this mode, it applies voltages on D+ and D- per Table 2.
Assuming the HV DCP supports this mode of operation, it
will glitch filter the request as it currently does, using
T GLITCH_V_CHANGE(40ms). Before the portable device
can begin to increment or decrement the voltage, it must
wait TV_NEW_REQUEST_CONT before pulling D+ and Dhigh or low. Once this ti me has f inished, the portable device
now attempts to increment or decrement the voltage. To
increment, the portable device sends a pulse of width
T ACTIVE by pulling D+ to VDP_UP and then must return
D+ to VDP_SRC for TINACTIVE.
voltage 5.2V . The device is in a BC1.2 compatible
BUS
is adjusted in order to increa se or decrea se output
REF
and internal reference voltage V
DCP_DAT
. The uP9616 enters
DM_DWN
REF
is
eciveDelbatroPAssalCPCDVH
+D-DegatloVtuptuO
V6.0DNGV2.5
V3.3V6.0V9
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3.33.3egatloVsuoiverP
Table2. HVDCP detection voltage coding a nd status
Note: GND is not forced by the portable device. The portable
device shall go High-Z and the HV DCP pulls D- low through
Rdm_dwn. This is to prevent misdetection when current
flowing through GND causes the GND in the porta ble device
to be at a higher voltage relative to HVDCP GND. Care
should be taken in the portable device a s this ca n result in
a negative relative voltage on D- as seen by the portable
device.
6uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 7
Conceptual
Absolute Maximum Rating
Thermal Information
Recomm en de d Op er at io n Con d i tions
uPI Confidential
(Note 1)
Supply Input V oltage, VIN ------------------------------------------------------------------------------------------------------------- -0.3V to +36V
LX V oltage to GND ------------------------------------------------------------------------------------------------------- -0.3V to + (VIN + -0.3V)
D+/D-/CC1/CC2 Pin V oltage -------------------------------------------------------------------------------------------------------------- -0.3V to +6.0V
SENSE+/SENSE- Pin V oltage ---------------------------------------------------------------------------------------------------------- -0.3V to +14V
Storage T emperature Range ------------------------------------------------------------------------------------------------------------- -65oC to +150oC
Junction T emperature ------------------------------------------------------------------------------------------------------------------------------------ 150oC
Lead T e mperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260oC
ESD Rating (Note 2)
D+/D-/Sense- Pin
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 4kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 400V
Other Pins
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V
uP9616
Package Thermal Resista nce (Note 3)
V DF N6x5 - 8L θJA -------------------------------------------------------------------------------------------------------------------- 45oC/W
V DF N6x5 - 8L θJC ------------------------------------------------------------------------------------------------------------------------- 4oC/W
V DF N5x6 - 10L θJA -------------------------------------------------------------------------------------------------------------------- 45oC/W
V DF N5x6 - 10L θJC ------------------------------------------------------------------------------------------------------------------------ 4oC/W
Power Dissipation, PD @ TA = 25oC
V DFN6x5 - 8L --------------------------------------------------------------------------------------------------------------------------------------- 2.2W
V DFN5x6 - 10L ------------------------------------------------------------------------------------------------------------------------------------- 2.2W
(Note 4)
Operating Junction T emperature Ra nge ------------------------------------------------------------------------------------------ -40oC to +125oC
Operating Ambient Temperature Range ------------------------------------------------------------------------------------------ -40oC to +85oC
Supply Input V oltage, VIN ------------------------------------------------------------------------------------------------------------------- +8V to 32V
Note 1. Stresses listed a s the above Absolute Maximum Ratings may cause perma nent da mage to the device.
These are for stress ratings. Functional operation of the device at the se or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may remain possibility to affe ct device reliability.
Note 2. Devices are ESD sen sitive. Handling precaution re commended.
Note 3. θJA is mea sured in the natural convection at TA = 25oC on a low effective thermal conductivity test board of
JEDEC 51-3 thermal mea surement standard.
Note 4. The device is not guaranteed to function outside its operating conditions.
www.upi-semi.com
7uP9616-DS-C3202, Feb. 2017
Page 8
(VIN = 12V, TA =25oC, unless otherwise specified)
Electrical Characteristics
s
uPI Confidential
Conceptual
uP9616
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8uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 9
Conceptual
Electrical Characteristics
uPI Confidential
uP9616
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www.upi-semi.com
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9uP9616-DS-C3202, Feb. 2017
Page 10
Conceptual
Typical Operation Charac teristics
uPI Confidential
This page is intentionally left blank a nd will be updated when data is available.
uP9616
10uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 11
Conceptual
Application Information
)
)
uPI Confidential
uP9616
Output Inductor Selection
Output inductor selection is usually based on the
considerations of inductance, rated current value, size
requirements and DC resista nce (DCR).
The inductance is chosen based on the desired ripple
current. Large value inductors result in lower ripple currents
and small value inductors result in higher ri pple currents.
Higher VIN or V
shown in the equation below. A reasonable starting point
for setting ripple current is ∆IL = 900mA (30% of 3000mA).
=∆
I
L
Maximum current ratings of the inductor are generally
specified in two methods: permissible DC current and
saturation current. Permissible DC current is the allowa ble
DC current that causes 40oC temperature raise. The
saturation current is the allowable current that causes 10%
inductance loss. Make sure that the inductor will not
saturate over the operation conditions including temperature
range, input voltage ra nge, and maxi mum output current. If
possible, choose an inductor with rated current higher tha n
5A so that it will not saturate even under current limit
condition.
The size requirements refer to the area and height
requirement for a particular design. For better efficiency ,
choose a low DC resistance inductor. DCR is usually
inversely proportional to size.
Different core materials and shapes will change the size,
current and price/current relationshi p of an inductor . Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar ele ctrical
characteristics. The choice of which style inductor to use
often depends on the price vs. size requirements and a ny
radiated field/EMI requirements.
Input Capacitor Selection
The input capacitor needs to be carefully selected to
maintain sufficiently low ripple at the supply input of the
converter. A low ESR capacitor is highly recommended.
Since large current flows in and out of this ca pa citor during
switching, its ESR also affects efficiency.
The input ca pacita nce needs to be higher tha n 22uF . The
best choice is he ceramic type and low ESR electrolytic
types may also be used provided that the RMS ripple
current rating is higher than 50% of the output current. In
the case of the electrolytic type s, they can be further away
if a small parallel 1uF ceramic capacitor is placed right
close to the IC. A 100uF elecrolytic capacitor and 1uF
ceramic capacitor are recommended a nd placed close to
VIN a nd GND pins, with the shorte st tra ces possible.
1
×
Lf
also increases the ripple current as
OUT
V
OUT
−×
1(V
OUTOSC
OUT
V
IN
Output Capacitor Selection
The ESR of the output capacitor determines the output
ripple voltage and the initi al voltage drop following a high
slew rate load transient edge. The output ripple voltage
can be calculated as:
ESR(IV
COUT
Where f
capacitance and ∆IC = ∆IL = ripple current in the inductor .
The ceramic ca pa citor with low ESR value provides the low
output ripple and low size prof ile.
In the case of ele ctrolytic capa citors, the ripple is dominated
by R
ESR
electrolytic ca pacitor at output SENSE+ termin al for good
performance and low output ripple and place output
capacitor5s as close a s possible to the device.
In the case of cera mic output ca pa citors, R
and does not contribute to the output ripple. Connect a
0.1uF ceramic ca pa citor at output SENSE- terminal for good
performance and place output capacitors as close as
possible to the device.
PCB Layout Consideration
The PCB layout is an importa nt ste p to maintain the high
performance of the uP9616. High switching frequencie s
and relatively large pea k currents make the PCB layout a
very important part of all high frequency switching power
supply design. Both the high current and the fa st switching
nodes demand full attention to the PCB layout to save the
robustness of the uP9616 through the PCB layout.
Improper layout might show the symptoms of poor load or
lineregulation, radiate excessive noise at ground or input,
output voltage shifts, stability issues, unsatisfying EMI
behavior or worsened efficiency. Follow the PCB layout
guidelines for optiomal performa nces of uP9616.
= operating frequency, C
OSC
multiplied by the ripple current. Connect a 220uF
+×∆=∆
1
Cf8
××
OUOSC
T
= output
OUT
is very small
ESR
www.upi-semi.com
11uP9616-DS-C3202, Feb. 2017
Page 12
Conceptual
Application Information
r
uPI Confidential
uP9616
Layout Guidelines For uP9616PDC8:
1. Arra nge the power components to reduce the AC loop size consisting of CIN, VIN (Pin 1, 2) and LX (Pin 8)
2. The input decoupling cera mic ca pa citor 1uF must be placed closest to the VIN (Pin 1, 2) a nd Exposed Pad GND plane
through via s or a short a nd wide path.
3. Return SENSE+ (PIN 6) to signal GND pin, a nd connect the signal GND to power GND at a single point for best
noise immunity . Connect exposed pa d to power ground opper area with copper and vi a s.
4. Apply copper pla ne to Exposed Pa d GND f or best heat dissi pation a nd noise i mmunity . The exposed pad is the
main path for heat convection a nd should be well-soldered to the PCB for best thermal perf ormance.
5. Use a short trace connecting the bootstrap capa citor C
to BOOT (Pin 7) and LX (Pin 8) to f orm a bootstra p
BOOT
circuit.
6. Use a short trace connecting R-C to LX (Pin 8) a nd Exposed Pa d GND Plane to form a Snubber Circuit.
7. The LX (Pin 8) pad is the noise node switching from VIN (Pin 1, 2) to GND. LX node copper area should be
minimized to reduce EMI and should be isolated from the re st of circuit for good EMI a nd low noise operation.
8. The D+ (Pin 3) pad a nd D- (Pin 4) pad of the uP9616 are the USB detect data line in put node, the D+ a nd D- Pin of
the via or tra ce area should be isolated using 0.96mm spa ce to prevent direct conta ct with VIN area components
which may cause voltage of D+ a nd D- pins to exceed maximum rating of 6V.
VIN Plane
Via to D+
-
+
Via to D-
GND Plane
1
2
Exposed
Pad (GND)
3
4
Via to GND Plan
uP9616PDC8
-
+
SENSE+
8
7
6
5
Plane
GND Plane
SENSE-
Plane
USB Connecto
5V
D+
D-
GND
12uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 13
Conceptual
Application Information
r
uPI Confidential
uP9616
Layout Guideline s For uP9616PDY A:
1. Arra nge the power components to reduce the AC loop size consisting of CIN, VIN (Pin 5) a nd LX (Pin 6,7)
2. The input decoupling cera mic ca pa citor 1uF must be pla ced closest to the VIN (Pin 5) a nd Exposed Pad GND plane
through via s or a short and wide path.
3. Return SENSE+ (PIN 9) to signal GND pin, and connect the sign al GND to power GND at a single point for best noise
immunity . Connect exposed pa d to power ground copper area with copper a nd vias.
4. Apply copper pla ne to Exposed Pad GND for best heat dissi pation and noise immunity . The exposed pad is the main
path for heat convection a nd should be well-soldered to the PCB for be st thermal performa nce.
5. Use a short trace connecting the bootstrap capa citor C
to BOOT (Pin 8) and LX (Pin 6,7) to f orm a bootstra p
BOOT
circuit.
6. Use a short trace connecting R-C to LX (Pin 6,7) a nd Exposed Pad GND Pla ne to form a Snubber Circuit.
7. The LX (Pin 6,7) pad is the noise node switching from VIN (Pin 5) to GND. LX node copper area should be minimized
to reduce EMI and should be isolated from the rest of circuit f or good EMI a nd low noise operation.
8. The CC1 (Pin 4), CC2 (Pin 5), D+ (Pin 2) pad a nd D- (Pin 1) pa d of the uP9616 are the USB detect data line input
node, the CC1, CC2, D+ a nd D- Pin of the via or tra ce area should be isolated using 0.96mm spa ce to prevent direct
contact with VIN area components which may cause voltage of CC1, CC2, D+ and D- pins to exceed maxi mum
rating of 6V.
VIN Plane
Via to CC1
Via to CC2
Via to D+
Via to D-
GND Plane
-
-
+
5
4
3
2
110
Via to GND Plan
Exposed
Pad (GND)
6
7
8
9
SENSE+
Plane
+
GND Plane
SENSE-
Plane
USB Connecto
5V
D+
D-
GND
CC1
CC2
uP9616PDYA
www.upi-semi.com
13uP9616-DS-C3202, Feb. 2017
Page 14
Conceptual
Packag e Information
uPI Confidential
V DFN6x5 - 8L
uP9616
5.00 BSC
6.00 BSC
θ
0.20 REF0.00 - 0.05
0.50 - 0.80
0.80 - 1.00
3.85 - 4.15
58
3.25 - 3.55
14
0.31 - 0.511.27 BSC
Note
1.Pack age Outline Unit Description:
BSC: Basic. Re presents theoretical exa ct dimen sion or dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension f or reference use only . This value is not a device specification.
TYP . T ypical. Provided a s a general value. This value is not a device specif ication.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusion s. Mold fla sh or protrusions shall not exceed 0.15mm.
14uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 15
Conceptual
5
1
10
Packag e Information
uPI Confidential
V DF N5x6 - 10L
uP9616
5.00 BSC
6.00 BSC
0.50 - 0.90
θ
0.00 - 0.050.20 REF
0.31 - 0.51
2.60 - 2.80
6
4.40 - 4.60
0.80 - 1.00
1.20BSC
Note
1.Pack age Outline Unit Description:
BSC: Basic. Re presents theoretical exa ct dimen sion or dimen sion target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension f or reference use only . This value is not a device specif ication.
TYP . Typical. Provided a s a general value. This value is not a device specif ication.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusion s. Mold fla sh or protrusions shall not exceed 0.15mm.
www.upi-semi.com
15uP9616-DS-C3202, Feb. 2017
Page 16
Conceptual
uPI Confidential
uP9616
Important Notice
uPI and its subsidiarie s reserve the right to make correction s, modifications, enha ncements, improvements, a nd other
changes to its products a nd services at a ny time a nd to discontinue any product or service without notice. Customers
should obtain the latest relevant inf ormation before placing orders a nd should verify that such information is current a nd
complete.
uPI products are sold subject to the taerms and conditions of sale supplied at the time of order acknowledgment.
However, no respon sibility is a ssumed by uPI or its subsidi aries for its use or application of any product or circuit; nor
for any infringements of patents or other rights of third parties which may re sult from its use or a pplication, including but
not limited to any con sequential or incidental damages. No uPI components are designed, intended or authorized for
use in military , aerospace, automotive a pplication s nor in systems for surgical impla ntation or life-sustaining. No licen se
is granted by implication or otherwise under a ny patent or patent rights of uPI or its subsidi aries.
COPYRIGHT (C) 2016, UPI SEMICONDUCTOR CORP.
uPI Semiconductor Corp.
Headquarter
9F.,No.5, T aiyua n 1st St. Zhube i City,
Hsinchu T aiwan, R.O.C.
TEL : 886.3.560.1666 F AX : 886.3.560.1888
16uP9616-DS-C3202, Feb. 2017
uPI Semiconductor Corp.
Sales Branch Office
12F-5, No. 408, Ruiguang Rd. Neihu District,
T aipei T aiwa n, R.O.C.
TEL : 886.2.8751.2062 F AX : 886.2.8751.5064
www.upi-semi.com
Page 17
Conceptual
uPI Confidential
uP9616
17uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
Page 18
Conceptual
uPI Confidential
uP9616
18uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
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