Datasheet uP6305AFA9, uP6305AQDD, uP6305ASU8 Datasheet (uPI) [ru]

Page 1
Preliminary
A
uP6305
1MHz, 2.0A, High-Eefficiency
Synchronous-Rectified Buck Converter
General Description
The uP6305 is a high efficiency synchronous-rectified buck converter with internal power switches. Fixed 1MHz PWM operation allows possible smallest output ripple and external component size. With high conversion efficiency and small package, the uP6305 is ideally suitable for portable devices and USB/PCIE-based interface cards where PCB area is especially concerned.
With internal low R
switches, the uP6305 is capable
DS(ON)
of delivering 2.0A output current over a wide input voltage range from 2.5V to 5.5V. The output voltage is adjustable from 0.6V to VIN by a voltage divider. Other features include internal soft-start, chip enable, overvoltage, under-voltage, over-temperature and over-current protections. The uP6305 is available in a space-saving WQFN3x3-16L, WLCSP1.5x1.5-9B or PSOP-8L packages.
Ordering Information

Battery-Powered Portable Devices


MP3 Players


Digital Still Cameras


Wireless and DSL Modems


Personal Information Appliances


802.11 WLAN Power Supplies


FPGA/ASIC Power Supplies


Dynamically Adjustable Power Supply for

CDMA/WCSMA Power Amplifiers

USB-Based xDSL Modems and Other Network

Interface Cards

Point-of-Load Regulation

Features

2.5V to 5.5V Input Voltage Range


Adjustable Output from 0.6V to V




Accurate Reference: 0.6V (


Up to 95% Conversion Efficiency


Low Quiescent Current


Integrated Low R

MOSFET Switches: 85m

Current Mode PWM Operation


Fixed Frequency: 1MHz


100% Maximum Duty Cycle for Lowest Dropout


Internal Soft-Start


No Schottky Diode Required


Over-Voltage and Under-Voltage Protection


Over-Temperature and Over-Current Protection


WQFN3x3-16L, WLCSP1.5x1.5-9B or PSOP-8L

Upper and Lower
DS(ON)
ΩΩ
and 75m
ΩΩ
IN
+/- +/-
+/- 1.5%)
+/- +/-
ΩΩ
ΩΩ
Packages

RoHS Compliant and 100% Lead (Pb)-Free

pplications
rebmuNredrOepyTegakcaPkrameR
DDQA5036PuL61-3x3NFQW
9AFA5036PuB9-5.1x5.1PSCLW
8USA5036PuL8-POSP
Note: uPI products are compatible with the current IPC/ JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes.
VIN
VIN
VIN
12
11
LX
13
LX
15
LX
15
NC
16
Rev. P00, File Name: uP6305-DS-P0002
PGND
1
2
PGND
PGND
WQFN3x3-16L
VCC
9
10
POK
8
EN
7
NC
6
AGND
5
3
4
FB
PGND
EN VIN VIN
A
NC LX LX
B
GNDFB
C
123
WLCSP1.5x1.5-9B
GND
AGND
EN
POK
Pin Configuration
1
2
GND
3
45
PSOP - 8
FB
8
PGNDNC
7
LX
6
VIN
1uPI Semiconductor Corp., http://www.upi-semi.com
Page 2
Preliminary
n
uP6305
Typical Application Circuit
V
IN
R3
C3
VIN
VCC
EN
uP6305AQDD
PGND
LX
POK
FB
AGND
R2
Option
R1
V
OUT
Functional Pin Descriptio
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DNGP
BF
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DNGA
CN
NE
CCV
NIV
XL
KOP
desopxE
daP
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Rev. P00, File Name: uP6305-DS-P0002
2uPI Semiconductor Corp., http://www.upi-semi.com
Page 3
Preliminary
uP6305
Functional Block Diagram
EN
POK
FB
VCC
OSC &
Shutdown
Control
Over/Under
Voltage
Protection
0.6V V
REF
VIN
Current
Sense
Slope
Comp.
AGND PGND
Current Limit
Detector
Control Logic Driver
LX
Rev. P00, File Name: uP6305-DS-P0002
3uPI Semiconductor Corp., http://www.upi-semi.com
Page 4
Preliminary
uP6305
Functional Description
The uP6305 is a high efficiency synchronous-rectified buck converter with internal power switches. Fixed 1.0MHz PWM operation allows possible smallest output ripple and external component size. With high conversion efficiency and small package, the uP6305 is ideally suitable for portable devices and USB/PCIE-based interface cards where PCB area is especially concerned.
With internal low R
switches, the uP6305 is capable
DS(ON)
of delivering 2.0A output current over a wide input voltage range from 2.5V to 5.5V. The output voltage is adjustable from 0.6V to VIN by a voltage divider. Other features include internal soft-start, chip enable, overvoltage, under-voltage, over-temperature and over-current protections. The uP6305 is available in a space-saving WQFN3x3-16L, WLCSP1.5x1.5-9B or PSOP-8L packages.
Input Supply Voltages, VIN & V
CC
The uP6305 features seperate power supply and ground pins for power stages and control circuit, isolating the control circuit from noise associated with the power MOSFET switching.
The VIN pins provide current to the power stage. The supply voltage range is from 2.5V to 5.5V. The uP6305 draws pulsed current with sharp edges from VIN each time the upper switch turns on, resulting in voltage ripples and spikes at supply input. A minimum 10uF ceramic capacitor with shortest PCB trace is highly recommended for bypassing the supply input.
The VCC pin provides currents for the internal control circuit. A power on reset (POR) continuously monitors the input supply voltage. The POR level is typically 2.3V at VCC rising. Use low pass filter R3 and C3 as shown in the Typical Application Circuit to filter the input noise associated with the power switching.
Chip Enable/Disable and Soft Start
The uP6305 features an EN pin for enable/disable control of the output voltage. Pulling the EN pin lower than 0.4V shuts down the uP6305 and reduces its quiescent current lower than 1uA. In the shutdown mode, both upper and lower switches are turned off.
Pulling EN pin higher than 1.5V enables the uP6305 and initiates the softstart cycle once the VCC POR is granted. The inductor current is limited to fractions of its rated value during the softstart cycle. Figure 1 illustrates the softstart behavior of the uP6305. The inductor current ramps up stairwisely with 250mA increments and 60us duration each step. Note that the output capacitor is large to illustrate the whole softstart behavior. The output voltage may ramp up to its target level in 2 or 3 steps in real applications
where output capacitor is about 22uF.
EN
(2V/Div)
V
OUT
(0.5V/Div)
ILX
(500mA/Div)
Time (100us/Div)
Figure 1. Softstart of uP6305.
The uP6305 asserts end of soft start and set the current limit to its normal level when the soft start duration expires. After soft start end, the POK pin is set high impedance if no fault occurs.
PWM Operation
The uP6305 adopts slope-compensated, current mode PWM control capable of achieving 100% duty cycle. During normal operation, the uP6305 operates at PWM mode to regulate output voltage by transferring the power to the output voltage cycle by cycle at a constant 1.0MHz frequency. The uP6305 turns on the upper switch at each rising edge of the internal oscillator allowing the inductor current to ramp up linearly. The switch remains on until either the current-limit is tripped or the PWM comparator turns off the switch for regulating output voltage. The upper switch current is sensed, slope compensated and compared with the error amplifier output COMP to determine the adequate duty cycle. The VOUT pin senses output
feedback voltage from an external resistive divider.
When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.6V reference, which in turn, causes the error amplifier output voltage to increase until the average inductor current matches the new load current.
Low Dropout Mode
The uP6305 increases duty cycle to maintain output voltage within its regulation as the supply input drops gradually in the battery-powered applications. The uP6305 operates with 100% duty cycle and enters low dropout mode as the supply input approaches the output voltage. This maximizes the battery life.
Rev. P00, File Name: uP6305-DS-P0002
4uPI Semiconductor Corp., http://www.upi-semi.com
Page 5
Preliminary
uP6305
Functional Description
Output Voltage Setting and Feedback Network
The output voltage can be set from V
to VIN by a voltage
REF
divider as:
2R1R
V ×
The internal V
+
=
V
REFOUT
1R
is 0.6V with 1.5% accuracy. In real
REF
applications, a 22pF feedforward ceramic capacitor is recommended in parallel with R2 for better transient response.
Current Limit Function
The uP6305 continuously monitors the inductor current for current limit by sensing the voltage drop across the upper switch when it turns on. When the inductor current is higher than current limit threshold (3.0A typical), the current limit function activates and forces the upper switch turning off to limit inductor current cycle by cycle. If the load continuously demands more current than what uP6305 could provide, uP6305 can not regulate the output voltage. Eventually under voltage protection will be triggered and shuts down the uP6305 if V
is too low.
OUT
Undervoltage Protection
Undervoltage Protection is triggered if the FB voltage is lower than 0.15V and shuts down uP6305. The undervoltage protection is latch-off type and can only be reset by POR of VCC or toggling the EN pin.
Overvoltage Protection
Overvoltage protection (OVP) is triggered if the FB voltage is higher than 0.8V and forces the uP6305 to continuous PWM mode that allows the inductor current to be negative. The voltage control loop will continuously turn on the lower switch to sink charges from the output capacitor to lower the output voltage. The lower switch turns off only the sinking current is higher than it current limit level, typical 2.0A. The uP6305 resumes normal operation if the OVP is removed.
Over Temperature Protection (OTP)
The OTP is triggered and shuts down the uP6305 if the junction temperature is higher than 150OC. The OTP is a non-latch type protection. The uP6305 automatically initiates another soft start cycle if the junction temperature drops below 130OC.
Rev. P00, File Name: uP6305-DS-P0002
5uPI Semiconductor Corp., http://www.upi-semi.com
Page 6
Preliminary
A
g
n
uP6305
bsolute Maximum Ratin
Supply Input Voltage, VIN, VCC(Note 1) --------------------------------------------------------------------------------------------- -0.3V to +6V LX Pin Voltage
DC -------------------------------------------------------------------------------------------------------------------- -0.3V to +(VIN +0.3V)
<50ns -------------------------------------------------------------------------------------------------------------------- -5V to +(VIN +5V)
Other Pins --------------------------------------------------------------------------------------------------------------------------- -0.3V to (VCC + 0.3V Storage Temperature Range ---------------------------------------------------------------------------------------------------- -65OC to +150OC Junction Temperature ------------------------------------------------------------------------------------------------------------------------------------ 150OC Lead Temperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260OC ESD Rating (Note 2)
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V
Thermal Informatio
Package Thermal Resistance (Note 3)
WQFN3x3-16L θJA ------------------------------------------------------------------------------------------------------------------------- 68°C/W WQFN3x3-16L θJC ----------------------------------------------------------------------------------------------------------------------- 6°C/W WLCSP1.5x1.5-9B θJA ----------------------------------------------------------------------------------------------------------------- 160°C/W PSOP-8L θJA ------------------------------------------------------------------------------------------------------------------------- 50°C/W PSOP-8L θJC ----------------------------------------------------------------------------------------------------------------------- 5°C/W
Power Dissipation, PD @ T
DFN3x3 -16 ----------------------------------------------------------------------------------------------------------------------------------------- 1.47W WLCSP1.5x1.5-9B ------------------------------------------------------------------------------------------------------------------------------ 0.625W PSOP-8L ----------------------------------------------------------------------------------------------------------------------------------------- 2.0W
= 25°C
A
Recommended Operation Conditions
Operating Junction Temperature Range (Note 4) ------------------------------------------------------------------------ -40OC to +125OC Operating Ambient Temperature Range -------------------------------------------------------------------------------------- -40OC to +85OC Supply Input Voltage, V
-------------------------------------------------------------------------------------------------------- +2.5V to +5.5V
IN
Electrical Characteristics
(VCC = VIN = 5V, TA = 25OC, unless otherwise specified)
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VNIV=
NI
V
OLVU
V
V
Q
V
NDHS
I
BF
I
TUO
V
TUO
I
TUO
CC
V,gnisiR
CC
CC
BF
V0=--10.01Au
NE
Am0=95.006.016.0V
TUO
Am0=5.1---5.1+%
TUO
NI
TUO
V=
NE
CC
V,gnillaF
V=
NE
CC
I,V8.0=
Am0=--4.3--Am
TUO
V5.5otV5.2=--40.04.0V/%
A2~A0=--5.0--A/%
5.2--5.5V
----5.2 V
2.2----
Rev. P00, File Name: uP6305-DS-P0002
6uPI Semiconductor Corp., http://www.upi-semi.com
Page 7
Preliminary
uP6305
Electrical Characteristics
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CSO
NI
V=
V;
TUO
BF
V55.0=001----%
8.00.12.1zHM
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R
)NO(SD
R
)NO(SD
hctiwSreppUfoR
hctiwSrewoLfoR
V
TEF_P
NI
V
TEF_N
NI
I,V6.3=
XL
I,V6.3=
XL
Am001=--58--m
Am001-=--57--m
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dlohserhTwoLcigoLNEV
dlohserhThgiHcigoLNEV
V
LI
NI
V
HI
NI
nwodtuhS,V5.5otV5.2=----4.0V
elbanE,V5.5otV5.2=5.1----V
tuptuOKOrewoP
tnerruCegakaeLhgiHcigoLI
egatloVwoLcigoLV
V
KOP
KOP
V=
KOP
I
KOP
V5=----1Au
CC
Am1=----2.0V
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erutarepmeTnowdtuhSlamrehTT
siseretsyHnwodtuhSlamrehT T
PVU_BF
PVO_BF
NDHS
NDHS
gnillaFBF--52--V%
gnisiRBF----031V%
ngisedyb--051--
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O
O
Note 1. Stresses listed as the above Absolute Maximum Ratingsmay cause permanent damage to the device.
These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. θ
is measured in the natural convection at T
JA
= 25°C on a low effective thermal conductivity test board of
A
JEDEC 51-3 thermal measurement standard.
Note 4. The device is not guaranteed to function outside its operating conditions.
FER
FER
C
C
Rev. P00, File Name: uP6305-DS-P0002
7uPI Semiconductor Corp., http://www.upi-semi.com
Page 8
Preliminary
Typical Operation Characteristics
uP6305
LX (10V/Div)
VIN = 3.3V, V
Turn On Waveforms
EN
(5V/Div)
100us/Div
= 1.2V, R
OUT
Turn Off Waveforms
LOAD
(500mV/Div)
(1A/Div)
= 0.6
LX (10V/Div)
Turn On Waveforms
LX (10V/Div)
EN
V
OUT
I
OUT
(5V/Div)
V
OUT
(500mV/Div)
I
OUT
(1A/Div)
100us/Div
VIN = 5V, V
= 1.2V, R
OUT
LOAD
= 0.6
Turn Off Waveforms
LX (10V/Div)
I
OUT
(1A/Div)
VIN = 3.3V, V
4us/Div
= 1.2V, R
OUT
Switching
LX
(2V/Div)
ILX
(500mA/Div)
LOAD
(5V/Div)
V
(500mV/Div)
= 0.6
EN
OUT
I
OUT
(1A/Div)
VIN = 5V, V
4us/Div
= 1.2V, R
OUT
Switching
LX
(2V/Div)
ILX
(500mA/Div)
LOAD
(500mV/Div)
= 0.6
V
OUT
EN
(2V/Div)
400ns/Div
VIN = 3.3V, V
= 1.2V, I
OUT
Rev. P00, File Name: uP6305-DS-P0002
OUT
= 1A
VIN = 5V, V
400ns/Div
= 1.2V, I
OUT
OUT
= 1A
8uPI Semiconductor Corp., http://www.upi-semi.com
Page 9
Preliminary
Typical Operation Characteristics
uP6305
Steady State Waveforms
V
OUT
(10mV/Div)
I
OUT
(500mA/Div)
400ns/Div
VIN = 3.3V, V
= 1.2V, I
OUT
OUT
= 1A
Steady State Waveforms
V
OUT
(10mV/Div)
Steady State Waveforms
V
OUT
(10mV/Div)
I
OUT
(500mA/Div)
400ns/Div
VIN = 5V, V
= 1.2V, I
OUT
OUT
= 1A
Steady State Waveforms
V
OUT
(10mV/Div)
I
(1A/Div)
OUT
400ns/Div
VIN = 3.3V, V
= 1.2V, I
OUT
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
20us/Div
I
= 0A to 1A, VIN = 3.3V, V
OUT
OUT
OUT
= 2A
= 1.2V
I
(1A/Div)
OUT
400ns/Div
VIN = 5V, V
= 1.2V, I
OUT
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
20us/Div
I
= 0A to 2A, VIN = 3.3V, V
OUT
OUT
= 2A
OUT
= 1.2V
Rev. P00, File Name: uP6305-DS-P0002
9uPI Semiconductor Corp., http://www.upi-semi.com
Page 10
Preliminary
Typical Operation Characteristics
uP6305
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
20us/Div
I
= 0.5A to 1.5A, VIN = 3.3V, V
OUT
Load Transient Response
V
OUT
(50mV/Div)
OUT
= 1.2V
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
20us/Div
I
= 1A to 2A, VIN = 3.3V, V
OUT
Load Transient Response
V
OUT
(50mV/Div)
OUT
= 1.2V
I
(1A/Div)
OUT
20us/Div
I
= 0A to 1A, VIN = 5V, V
OUT
OUT
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
= 1.2V
I
(1A/Div)
OUT
20us/Div
I
= 0A to 2A, VIN = 5V, V
OUT
OUT
Load Transient Response
V
OUT
(50mV/Div)
I
(1A/Div)
OUT
= 1.2V
20us/Div
I
= 0.5 to 1.5A, VIN = 5V, V
OUT
Rev. P00, File Name: uP6305-DS-P0002
OUT
= 1.2V
20us/Div
I
= 1A to 2A, VIN = 5V, V
OUT
OUT
= 1.2V
10uPI Semiconductor Corp., http://www.upi-semi.com
Page 11
Preliminary
Typical Operation Characteristics
uP6305
Quiescent Current vs. V
5
4
3
2
Quiescent Current (mA)
1
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
IN
Input Voltage (V)
Enable/Disable Threshold Voltage vs. V
1.8
1.6
FREQ vs. V
1.3
1.2
1.1
1.0
FREQ (MHz)
0.9
0.8
2.5 3.0 3.5 4.0 4.5 5.0 5.5
IN
Input Voltage (V)
IN
0.620
0.615
0.610
FB vs. V
IN
1.4
Enable
1.2
1.0
Enable/Disable Threshold Voltage (V)
0.8
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Disable
Input Voltage (V)
Efficiency vs. Output Current
100
90
80
70
60
50
Efficiency (%)
40
30
20
0.605
0.600
FB (V)
0.595
0.590
0.585
0.580
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Efficiency vs. Output Current
100
90
80
70
60
50
Efficiency (%)
40
30
20
10
1 10 100 1000 10000
Output Current (mA)
VIN = 3.3V, V
= 1.2V, L = 3.3uH, CIN = C
OUT
Rev. P00, File Name: uP6305-DS-P0002
OUT
= 22uF
10
1 10 100 1000 10000
Output Current (mA)
VIN = 5V, V
= 1.2V, L = 3.3uH, CIN = C
OUT
OUT
= 22uF
11uPI Semiconductor Corp., http://www.upi-semi.com
Page 12
Preliminary
Typical Operation Characteristics
uP6305
OCP
3.2
3.0
2.8
2.6
2.4
2.2
2.0
Output Current (A)
1.8
1.6
1.4
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Output Voltage (V)
VIN = 3.3V, V
1.22
1.21
1.20
1.19
1.18
1.17
= 1.2V, CIN = C
OUT
V
vs. Temperature
OUT
OUT
= 22uF
FREQ vs. Temperature
1200
1100
1000
900
FREQ (kHz)
800
700
600
-40 -20 0 20 40 60 80 100 120 140
Temperature (OC)
VIN = 5V, V
= 1.2V, L = 3.3uH, CIN = C
OUT
OUT
Input Current vs. Temperature
6
5
4
3
2
Input Current (mA)
= 22uF, No Load
1.16
1.15
-40 -20 0 20 40 60 80 100 120 140
Temperature (OC)
VIN = 5V, V
= 1.2V, L = 3.3uH, CIN = C
OUT
= 22uF, No Load
OUT
1
0
-40 -20 0 20 40 60 80 100 120 140
Temperature (OC)
VIN = 5V, V
= 1.2V, L = 3.3uH, CIN = C
OUT
= 22uF, No Load
OUT
Rev. P00, File Name: uP6305-DS-P0002
12uPI Semiconductor Corp., http://www.upi-semi.com
Page 13
Preliminary
A
uP6305
pplication Information
Output Inductor Selection
Output inductor selection is usually based the considerations of inductance, rated current value, size requirements and DC resistance (DCR).
The inductance is chosen based on the desired ripple current. Large value inductors result in lower ripple currents and small value inductors result in higher ripple currents. Higher VIN or V
also increases the ripple current as shown
OUT
in the equation below. A reasonable starting point for setting
ripple current is ∆I
1
=
I
L
×
= 600mA (30% of 2A).
L
Lf
OUTOSC
OUT
V
OUT
××
1(V
)
V
IN
For most applications, the value of the inductor will fall in the range of 1uH to 10uH.
Maximum current ratings of the inductor are generally specified in two methods: permissible DC current and saturation current. Permissible DC current is the allowable DC current that causes 40OC temperature raise. The saturation current is the allowable current that causes 10% inductance loss. Make sure that the inductor will not saturate over the operation conditions including temperature range, input voltage range, and maximum output current. If possible, choose an inductor with rated current higher than 3A so that it will not saturate even under current limit condition.
The size requirements refer to the area and height requirement for a particular design. For better efficiency, choose a low DC resistance inductor. DCR is usually inversely proportional to size.
Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends on the price vs. size requirements and any radiated field/EMI requirements.
Input Capacitor Selection
The uP6305 draws pulsed current with sharp edges from the input capacitor resulting in ripple and noise at the input supply voltage. A minimum 10uF X5R or X7R ceramic capacitor is highly recommended to filter the pulsed current. The input capacitor should be placed as near the device as possible to avoid the stray inductance along the connection trace. Y5V dielectrics, aside from losing most of their
capacitance over temperature, they also become resistive at high frequencies. This reduces their ability to filter out high frequency noise.
The capacitor with low ESR (equivalent series resistance) provides the small drop voltage to stabilize the input voltage during the transient loading. For input capacitor selection, the ceramic capacitors larger than 1uF is recommend. The capacitor must conform to the RMS current requirement. The maximum RMS ripple current is calculated as:
)VV(V
×
II
×=
)MAX(OUT)RMS(IN
This formula has a maximum at VIN = 2xV = I
/2. This simple worst-case condition is commonly
OUT(MAX)
OUTINOUT
V
IN
, where I
OUT
IN(RMS)
used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question.
Output Capacitor Selection
The uP6305 is specifically design to operate with minimum 10uF X5R or X7R ceramic capacitor. The value can be increased to improve load/line transient performance. Y5V dielectrics, aside from losing most of their capacitance over temperature, they also become resistive at high frequencies. This reduces their ability to filter out high frequency noise.
The ESR of the output capacitor determines the output ripple voltage and the initial voltage drop following a high slew rate load transient edge. The output ripple voltage can be calculated as:
1
××
)
Cf8
OUTOSC
= output capacitance
OUT
where f
= operating frequency, C
OSC
and ∆IC = ∆I
+×=
ESR(IV
COUT
= ripple current in the inductor.
L
The ceramic capacitor with low ESR value provides the low output ripple and low size profile. Connect a 22uF ceramic capacitor at output terminal for good performance and place the input and output capacitors as close as possible to the device.
Using Ceramic Capacitors
Higher value, lower cost ceramic capacitors are now available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the uP6305
13uPI Semiconductor Corp., http://www.upi-semi.com
Rev. P00, File Name: uP6305-DS-P0002
Page 14
Preliminary
A
uP6305
pplication Information
control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and small circuit size.
However, care must be taken when these capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part.
When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
Thermal Considerations
In most applications the uP6305 does not dissipate much heat due to its high efficiency. However, overtemperature protection is implemented in case of applications where the uP6305 is operating at high ambient temperature. If the junction temperature reaches approximately 150OC, the OTP turns both power switches and let the LX node become high impedance. The uP6305 restores to normal operation if the junction temperature drops to 130OC.
It is helpful to analysis the power dissipation of uP6305 for avoding the uP6305 from exceeding the maximum junction temperature. In typical applications, the conduction loss dominates the total power loss in uP6305. The conduction loss has its maximum at high duty-ratio, low input voltage, and high ambient temperatures.
Consider the uP6305 in dropout mode operation at an input voltage of 2.5V, a load current of 1.5A and an ambient temperature of 75OC. The on-resistance of the upper swith
is about 100m at this condition. Therefore the power
dissipation PD is:
2 OUTD
)ON(DS
mW225RIP
=×=
This results in 50 x 0.225 = 12OC temperature raise at junction. The juction temperature is 82OC and is lower than it maximum rating 125OC.
Checking Transient Response
The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, V
equal to (∆I
resistance of C
x ESR), where ESR is the effective series
OUT
OUT
immediately shifts by an amount
OUT
. ∆I
also begins to discharge or charge
OUT
C
, which generates a feedback error signal. The regulator
OUT
loop then acts to return V During this recovery time V
to its steady state value.
OUT
can be monitored for
OUT
overshoot or ringing that would indicate a stability problem.
PCB Layout Considerations
High switching frequencies and relatively large peak currents make the PCB layout a very important part of switching mode power supply design. Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Follow the PCB layout guidelines for optimal performance of uP6305.
1. For the main current paths, keep their traces short, direct and wide.
2. Put the input/output capacitors as close as possible to the device pins.
3. LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up.
4. Connect feedback network behind the output capacitors. Place the feedback components near the uP6305 and keep the loop area small. .
5. A ground plane is preferred, but if not available, keep the signal and power grounds sepregated with small signal components returning to the GND pin at one point. They should not share the high current path of CIN or C
.
OUT
6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND.
14uPI Semiconductor Corp., http://www.upi-semi.com
Rev. P00, File Name: uP6305-DS-P0002
Page 15
Preliminary
n
WQFN3x3-16L Package
uP6305
Package Informatio
0.80 MAX
1.45 - 1.80
2.90 - 3.10
2.90 - 3.10
Pin 1 mark
1.45-1 .80
Bottom View - Exposed Pad
0.35 - 0.45
0.18 - 0.30
2.05 - 2.15
3.45 - 3.55
1.45 -1.80
0.00 - 0.05
0.20 BSC
0.18 - 0.30
Recommended Solder Pad Pitch and Dimensions
Note
1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm.
Rev. P00, File Name: uP6305-DS-P0002
15uPI Semiconductor Corp., http://www.upi-semi.com
Page 16
1.40 - 1.50
n
Preliminary
WLCSP1.5x1.5-9B Package
0.50 - 0.70
0.05 - 0.13
uP6305
Package Informatio
0.30 - 0.34R
3
1.40 - 1.50
2
BUMP A1 Center
0.21 - 0.27
1
CB A
0.50 BSC
0.25 - 0.28R
0.50 BSC
Recommended Solder Pad Layout
0.50 BSC
0.50 BSC
Note
1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm.
Rev. P00, File Name: uP6305-DS-P0002
16uPI Semiconductor Corp., http://www.upi-semi.com
Page 17
Preliminary
n
PSOP-8L Package
uP6305
Package Informatio
0.70 10±0.
7.00 10
±
0.
2.20 10±0.
5.50 10
±
0.
2.20
±
100.
1.27 10
4.00 10
±0.
Recommended Solder Pad Layout
0.18 - 0.25
0.40 - 0.90
±
0.
1.50 10
±
0.
5.80 - 6.20
3.80 - 4.00
1.27 BSC
1.45 - 1.60
1.75 MAX
4.80 - 5.00
1.80 - 2.30
1.80 - 2.30
0.32 - 0.52
0.05 - 0.25
3.81 BSC
Note
1.Package Outline Unit Description: BSC: Basic. Represents theoretical exact dimension or dimension target MIN: Minimum dimension specified. MAX: Maximum dimension specified. REF: Reference. Represents dimension for reference use only. This value is not a device specification. TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions no not include mold flash or protrusions. Mold flash or protrusions shell not exceed 0.15mm.
Rev. P00, File Name: uP6305-DS-P0002
17uPI Semiconductor Corp., http://www.upi-semi.com
Page 18
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