Datasheet TZA3030HL, TZA3030U, TZA3024T Datasheet (Philips)

DATA SH EET

Objective specification
File under Integrated Circuits, IC19

1998 Aug 24

INTEGRATED CIRCUITS

TZA3030

SDH/SONET STM1/OC3 optical
receiver

1998 Aug 24 2

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

FEATURES

• Low equivalent input noise, typically 1 pA/√Hz

• Wide dynamic range, typically 0.5 µAto2mA

• On-chip low-pass filter. The bandwidth can be varied

between 90 and 150 MHz using an external resistor.
Default value is 120 MHz.

• Differential transimpedance of 1.8 MΩ

• On-chip Automatic Gain Control (AGC)

• Positive Emitter Coupled Logic (PECL) or

Current-Mode Logic (CML) compatible data outputs

• LOS (Loss Of Signal) detection

• LOS threshold level can be adjusted using a single

external resistor

• On-chip DC offset compensation

• Single supply voltage from 3.0 to 5.5 V

• Bias voltage for PIN diode.

APPLICATIONS

• Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high speed data networks

• Wideband RF gain block.

GENERAL DESCRIPTION

The TZA3030 optical receiver is a low-noise
transimpedance amplifier with AGC plus a limiting
amplifier designed to be used in SDH/SONET fibre optic
links. The TZA3030 amplifies the current generated by a
photo detector (PIN diode or avalanche photodiode) and
converts it to a differential output voltage.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TZA3030HL LQFP32 plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm SOT401-1
TZA3030U − naked die in waffle pack carriers; die dimensions 1.58 × 1.58 mm −

1998 Aug 24 3

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBK857

GAIN

CONTROL

TESTING

BIASING

2 2

A1 A2

4

2, 5 17, 2031

DREF

2

kΩ

7

65 pF

IPhoto

PREAMPLIFIER

LOS DETECTION

LIMITING

AMPLIFIER

DC OFFSET

COMPENSATION

V

CCA

V

CCD

5

13, 16, 21
24, 25

DGND

7

1, 3, 6, 8
9, 30, 32

AGNDSUB

1412

RFTEST

11

V

ref

10

BWC

AGC

PEAK DETECTOR

TZA3030

CML

PECL

TTL

29

LOSTH

26 LOS

28

LOSTTL

18 OUTCML
19 OUTQCML

15

OUTSEL

22 OUTPECL
23

OUTQPECL

27

LOSQ

PECL

1 nF

1998 Aug 24 4

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

PINNING

SYMBOL PIN TYPE DESCRIPTION

AGND 1 ground analog ground
V

CCA

2 supply analog supply voltage
AGND 3 ground analog ground
DREF 4 analog output bias voltage for PIN diode (V

CCA

); cathode should be connected to this pin

V

CCA

5 supply analog supply voltage
AGND 6 ground analog ground
IPhoto 7 analog input current input; connect the anode of PIN diode to this pin; DC bias level is

1048 mV
AGND 8 ground analog ground
AGND 9 ground analog ground
BWC 10 analog input bandwidth control pin; default bandwidth is 120 MHz; a resistor should be

connected between V

ref

(pin 11) and BWC (pin 10) to decrease bandwidth, or

between BWC (pin 10) and AGND to increase bandwidth
V

ref

11 analog output band gap reference voltage; nominal value approximately 1.2 V
SUB 12 substrate substrate pin; to be connected to AGND
DGND 13 ground digital ground
RFTEST 14 analog input test pin; not connected; not used in application
OUTSEL 15 CMOS input output select pin; when OUTSEL is HIGH, CML data outputs are active and

PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,

PECL data outputs will then be active and CML data outputs disabled
DGND 16 ground digital ground
V

CCD

17 supply digital supply voltage
OUTCML 18 CML output CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)
OUTQCML 19 CML output CML compliment of OUTCML (pin 18)
V

CCD

20 supply digital supply voltage
DGND 21 ground digital ground
OUTPECL 22 PECL output PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)
OUTQPECL 23 PECL output PECL compliment of OUTPECL (pin 22)
DGND 24 ground digital ground
DGND 25 ground digital ground
LOS 26 PECL output PECL-compatible LOS detection pin; LOS output is HIGH when the input signal

is below the user programmable threshold level
LOSQ 27 PECL output PECL compliment of LOS (pin 26)
LOSTTL 28 TTL output CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the

input signal is below the user programmable threshold level
LOSTH 29 analog I/O pin for setting input threshold level; nominal DC voltage is V

CCA

− 1.5 V;
threshold level set by connecting an external resistor between LOSTH and
V

CCA

or by forcing a current into LOSTH; default value for this resistor is 400 kΩ
AGND 30 ground analog ground
AGC 31 analog I/O AGC monitor voltage; the internal AGC circuit can be disabled by applying an

external voltage to this pin

AGND 32 ground analog ground

1998 Aug 24 5

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

Fig.2 Pin configuration.

handbook, full pagewidth

TZA3030HL

MBK856

1
2
3
4
5
6
7
8

24
23
22
21
20
19
18
17

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

AGND

V

CCA

AGND

DREF
V

CCA

AGND
IPhoto
AGND

DGND

LOS

LOSQ

LOSTTL

LOSTH

AGND

AGC

AGND

V

CCD

OUTCML

V

CCD

DGND

OUTPECL
DGND

OUTQPECL

OUTQCML

AGND

BWC

V

ref

SUB

RFTEST

OUTSEL

DGND

DGND

1998 Aug 24 6

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

CHIP DIMENSIONS AND BONDING PAD LOCATIONS

SYMBOL PAD

COORDINATES

(1)

xy

AGND 1 102 1251
V

CCA

2 102 1111
AGND 3 102 971
DREF 4 102 814
V

CCA

5 102 674
AGND 6 102 534
IPhoto 7 102 395
AGND 8 102 254
AGND 9 243 105
BWC 10 383 105
V

ref

11 523 105
SUB 12 663 105
DGND 13 803 105
RFTEST 14 943 105
OUTSEL 15 1100 105
DGND 16 1257 105
V

CCD

17 1398 263
OUTCML 18 1398 403

Note

1. All coordinates (µm) are measured with respect to the
bottom left-hand corner of the die.

OUTQCML 19 1398 543
V

CCD

20 1398 683
DGND 21 1398 823
OUTPECL 22 1398 963
OUTQPECL 23 1398 1103
DGND 24 1398 1243
DGND 25 1283 1400
LOS 26 1143 1400
LOSQ 27 986 1400
LOSTTL 28 829 1400
LOSTH 29 671 1400
AGND 30 514 1400
AGC 31 357 1400
AGND 32 217 1400

SYMBOL PAD

COORDINATES

(1)

xy

Fig.3 Bonding pad locations of TZA3030U.

handbook, full pagewidth

AGND 1

DGND

24

OUTQPECL23

OUTPECL22
DGND21
V

CCD

20

OUTQCML19
OUTCML18
V

CCD

17

AGND

3

DREF 4
V

CCA

5
AGND 6
IPhoto 7
AGND 8

V

CCA

2

TZA3030U

9

AGND

32

AGND31AGC30AGND29LOSTH28LOSTTL27LOSQ26LOS25DGND

10

BWC

11

V

ref

12

SUB

13

DGND

14

RFTEST

15

OUTSEL

16

DGND

MBK858

y

1.58 mm

x

0

0

1.58
mm

1998 Aug 24 7

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

FUNCTIONAL DESCRIPTION

The TZA3030 contains five functional blocks:

• Preamplifier input stage

• Low-pass filter

• Limiting amplifier stage

• Offset compensation loop

• Loss of signal detection unit.

Preamplifier

The preamplifier provides low-noise amplification of the
current generated by a photodiode connected to
pin IPhoto.

A differential amplifier converts the output of the
preamplifier to a differential voltage. An AGC loop
increases the dynamic range of the receiver by reducing
the feedback resistance of the preamplifier. The AGC loop
hold capacitor is integrated on-chip, so an external
capacitor is not needed for AGC. The AGC voltage can be
monitored at pin AGC. This pin can be left unconnected for
normal operation. It can also be used to force an external
AGC voltage. If pin AGC is connected to V

CCA

, the internal
AGC loop is disabled and the receiver gain is at a
maximum. In this case, the maximum input current is
approximately 10 µA.

Low-pass filter

A low-pass filter controls the bandwidth of the receiver,
which can be varied between 90 and 150 MHz.
The bandwidth is set to 120 MHz by default. It can be
decreased by connecting a resistor between pin BWC and
pin V

ref

or increased by connecting a resistor between

pin BWC and AGND.

Limiting amplifier

A limiting amplifier boosts the signal up to PECL levels.
The output can be either CML or PECL compatible,
selected by means of pin OUTSEL. When OUTSEL is
HIGH, the CML data outputs are active and the PECL data
outputs are disabled. If OUTSEL is left unconnected, it is
pulled LOW and the PECL data outputs are active while
the CML data outputs are disabled.

The logic level symbol definitions for CML and PECL are
shown in Fig.4.

The CML and PECL output circuits are given in Fig.5.

Offset compensation loop

A control loop connected between the limiting amplifier
output and the differential amplifier input cancels the
DC offset. The loop bandwidth is fixed internally at 30 kHz.

Loss Of Signal (LOS) detection

The LOS section detects an input signal level below a fixed
threshold. The threshold is determined by the current
through pin LOSTH. If this current is increased, the
threshold level will rise. An external resistor connected
between pin LOSTH and V

CCA

can be used, or a current
can be forced into pin LOSTH. The default value for the
external resistor is 400 kΩ. In this case, the current
through pin LOSTH will be approximately 3.75 µA since
the voltage at pin LOSTH is regulated at 1.5 V below the
supply voltage. This threshold corresponds to an input
current of 208 nA. The ratio of LOSTH current to input
current is thus approximately 18 : 1. When the input signal
level falls below this threshold, the LOS
(PECL compatible) and LOSTTL (TTL compatible)
outputs go HIGH. The hysteresis is fixed internally at 3 dB.
Response time is typically less than 20 µs.

1998 Aug 24 8

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

Fig.4 Logic level symbol definitions for CML and PECL.

handbook, full pagewidth

MGR243

V

OO

V

O(max)

V

OQH

V

OH

V

OQL

V

OL

V

O(min)

V

o(p-p)

V

CC

Fig.5 Output circuits.

handbook, full pagewidth

MGK886

100 Ω 100 Ω

V

CC

OUTCML OUTQCML

105 Ω 105 Ω

V

CC

OUTQPECL

OUTPECL

0.5 mA

9 mA

6 mA

0.5 mA

a. CML. b. PECL.

1998 Aug 24 9

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT

V

CC

supply voltage −0.5 +6 V

V

n

DC voltage

pin 7: IPhoto −0.5 +2 V
pin 14: RFTEST −0.5 V

CC

+ 0.5 V

pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ V

CC

− 2VCC+ 0.5 V

pins 18 and 19: OUTCML and OUTQCML V

CC

− 2VCC+ 0.5 V

pin 29: LOSTH −0.5 V

CC

+ 0.5 V
pin 10: BWC −0.5 +3.2 V
pin 31: AGC −0.5 V

CC

+ 0.5 V
pin 11: V

ref

−0.5 +3.2 V

pin 4: DREF −0.5 V

CC

+ 0.5 V
pin 15: OUTSEL −0.5 V

CC

+ 0.5 V
pin 28: LOSTTL −0.5 V

CC

+ 0.5 V

I

n

DC current

pin 7: IPhoto −2.5 +2.5 mA
pin 14: RFTEST −2+2mA
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ −25 +10 mA
pins 18 and 19: OUTCML and OUTQCML −15 +15 mA
pin 29: LOSTH −2+2mA
pin 10: BWC −1+1mA
pin 31: AGC −0.2 +0.2 mA
pin 11: V

ref

−2 +2.5 mA
pin 4: DREF −2.5 +2.5 mA
pin 15: OUTSEL −0.5 +0.5 mA
pin 28: LOSTTL −16 +16 mA

P

tot

total power dissipation − 600 mW

T

stg

storage temperature −65 +150 °C

T

j

junction temperature − 150 °C

T

amb

operating ambient temperature −40 +85 °C

SYMBOL PARAMETER VALUE UNIT

R

th(j-s)

thermal resistance from junction to solder point tbf K/W

R

th(j-a)

thermal resistance from junction to ambient tbf K/W

1998 Aug 24 10

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

CHARACTERISTICS

For typical values T

amb

=25°C and VCC= 5 V; minimum and maximum values are valid over the entire ambient

temperature range and process spread.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

supply voltage 3 5 5.5 V

I

CCD

digital supply current note 1 13 20 28 mA

note 2 − 47 − mA
note 3 11 17 24 mA

I

CCA

analog supply current 24 36 51 mA

P

tot

total power dissipation −−525 mW

T

j

junction temperature −40 − +110 °C

T

amb

operating ambient
temperature

−40 +25 +85 °C

R

tr

small-signal transresistance
of the receiver

measured differentially

PECL outputs − 2000 − kΩ
CML outputs − 1000 − kΩ

f

−3dB(h)

high frequency −3 dB point pinBWC left

unconnected; note 4

− 120 − MHz

f

−3dB(l)

low frequency −3 dB point 20 30 40 kHz

I

n(tot)

total integrated RMS noise
current over bandwidth

referenced to input;
Ci= 1.2 pF; note 5

∆f = 90 MHz − 16 − nA
∆f = 120 MHz − tbf − nA
∆f = 155 MHz − tbf − nA

PSRR power supply rejection ratio measured differentially;

note 6

f = 100 kHz to 10 MHz − 0.5 µA/V
f = 10 MHz to 100 MHz − 10 µA/V

∆R

tr

/∆t AGC loop constant − 1 − dB/ms

Input: IPhoto

V

bias(IPhoto)

input bias voltage tbf 1048 tbf mV

I

i(IPhoto)(p-p)

input current (peak-to-peak
value)

VCC=5V −2000 +1 +2000 µA
V

CC

= 3.3 V −1000 +1 +1000 µA

PECL outputs: OUTPECL and OUTQPECL

V

OH

HIGH-level output voltage 50 Ω to VCC− 2V VCC− 1100 − VCC− 900 mV

V

OL

LOW-level output voltage 50 Ω to VCC− 2V VCC− 1840 − VCC− 1620 mV

V

OO

output offset voltage measured differentially −10 − +10 mV

t

r

rise time 20% to 80% − tbf tbf ps

t

f

fall time 80% to 20% − tbf tbf ps

1998 Aug 24 11

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

Notes

1. OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and
OUTQPECL outputs are active.

2. OUTPECL and OUTQPECL outputs are terminated with 50 Ω to VT. VT is an external termination voltage for PECL
outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected.

3. OUTCML and OUTQCML outputs are terminated with 50 Ω to V

CCD

; CML outputs are active. OUTPECL,

OUTQPECL, LOS and LOSQ outputs are left unconnected.

4. The bandwidth is set to 120 MHz by default. It can be varied between 90 and 150 MHz by adjusting the voltage at
pin BWC.

5. All I

n(tot)

measurements were made with an input capacitance of Ci= 1.2 pF. This was comprised of 0.7 pF for the

photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package.

6. PSRR is defined as the ratio of the equivalent current change at the input (∆I

IPhoto

) to a change in supply voltage:

For example,a4mVdisturbance on V

CC

at 10 MHz will typically generate the equivalent of 2 nA extra photodiode

current.

PECL outputs: LOS and LOSQ

V

OH

HIGH-level output voltage 50 Ω to VCC− 2V VCC− 1100 − VCC− 900 mV

V

OL

LOW-level output voltage 50 Ω to VCC− 2V VCC− 1840 − VCC− 1620 mV

V

OO

output offset voltage measured differentially −10 − +10 mV

t

r

rise time 20% to 80% −−600 ns

t

f

fall time 80% to 20% −−200 ns

CML outputs: OUTCML and OUTQCML

V

O

output voltage measured single-ended;

50 Ω to V

CC

VCC− 260 − V

CC

mV

V

o(se)(p-p)

output voltage single-ended
(peak-to-peak value)

50 Ω to V

CC

150 200 260 mV

V

OO

output offset voltage measured differentially;

50 Ω to V

CC

−10 − +10 mV

R

o

output resistance measured single-ended 80 100 120 Ω

t

r

rise time 20% to 80%;

RL=50Ω;CL=1pF

− tbf − ps

t

f

fall time 80% to 20%;

RL=50Ω;CL=1pF

− tbf − ps

CMOS input: OUTSEL

V

IL

LOW-level input voltage − 0.4 0.8 V

V

IH

HIGH-level input voltage VCC− 1VCC− 0.5 − V

CMOS output: LOSTTL

V

OL

LOW-level output voltage 0 − 0.2 V

V

OH

HIGH-level output voltage VCC− 0.2 − V

CC

V

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

PSRR

∆I

IPhoto

∆V

CC

--------------------

=

1998 Aug 24 12

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

APPLICATION INFORMATION

Fig.6 Application diagram: PECL data outputs active.

handbook, full pagewidth

1, 3, 6, 8
9, 30, 32

MBK859

4

17, 20292, 5

V

CCA

LOSTH

DREF

7

IPhoto

AGNDSUB

3112

AGC10BWC14RFTEST

7

2

13, 16, 21

24, 25

DGND

5

15

OUTSEL

11

V

ref

TZA3030

27

LOSQ

28

LOSTTL

23

OUTQPECL

22

OUTPECL

19

OUTQCML

18

OUTCML

26

LOS

R1 R1

R2 R2

Zo = 50 Ω

Zo = 50 Ω

400 kΩ

22 nF

1 nF

V

CCD

2

22 nF

680 nF

10 µH10 µH

V

CC

Fig.7 Application diagram: CML data outputs active.

handbook, full pagewidth

1, 3, 6, 8
9, 30, 32

MBK860

4

17, 20292, 5

V

CCA

LOSTH

DREF

7

IPhoto

AGNDSUB

3112

AGC10BWC14RFTEST

7

2

13, 16, 21

24, 25

DGND

5

15

OUTSEL

11

V

ref

TZA3030

27

LOSQ

28

LOSTTL

23

OUTQPECL

22

OUTPECL

19

OUTQCML

18

OUTCML

26

LOS

R1 R1

Zo = 50 Ω

Zo = 50 Ω

400 kΩ

22 nF

V

CCD

2

22 nF

680 nF

10 µH10 µH

1 nF

V

CC

1998 Aug 24 13

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

PECL outputs: OUTPECL, OUTQPECL, LOS and LOSQ

PECL outputs can be terminated in different ways depending on the power supply voltage (see Fig.8).

Fig.8 PECL termination schemes.

handbook, full pagewidth

V

OQ

V

O

V

IQ

V

I

R1 = 127 Ω

R2 = 82.5 Ω

R1 = 127 Ω

R2 = 82.5 Ω

GND

VCC = 3.3 V

V

OQ

V

O

V

IQ

V

I

R1 = 83.3 Ω

R2 = 125 Ω

R1 = 83.3 Ω

R2 = 125 Ω

GND

VCC = 5 V

MGK887

1998 Aug 24 14

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

CML outputs: OUTCML and OUTQCML

The output impedance of the CML output driver is 100 Ω
(see Fig.9) which doesn’t match the characteristic
impedance of the strip line. While this means that the
reflections of some incident edges will arrive at the driver
output on the PCB, this value was selected to reduce
power dissipation inside the IC. The parallel combination
of 100 Ω and 50 Ω (33 Ω) will generate a signal swing of
200 mV (peak-to-peak value, single-sided) with a tail
current of 6 mA.

If the output impedance was 50 Ω rather than 100 Ω,
an 8 mA tail current would be needed to generate the
same voltage swing. This would increase power
dissipation by 33%.

If necessary, the output impedance of the generator can
be matched to the line impedance by connecting an
external 100 Ω resistor in parallel with the output as shown
in Fig.10. The magnitude of the output voltage swing will
not change due to adaptive regulation. However, power
dissipation will increase by 33%.

Fig.9 CML interface circuit without matched impedance; low power dissipation.

handbook, full pagewidth

MBK861

V

OQ

V

O

V

IQ

V

I

100Ω100

Ω

50 Ω

50 Ω

V

CC

V

CC

Zo = 50 Ω

Zo = 50 Ω

generator

inside TZA3030

interconnect

PCB

receiver

inside TZA3004

Fig.10 CML interface circuit with matched impedance; high power dissipation.

handbook, full pagewidth

MBK862

V

OQ

V

O

V

IQ

V

I

100Ω100

Ω

100Ω100

Ω

50 Ω

50 Ω

V

CC

V

CC

Zo = 50 Ω

Zo = 50 Ω

generator

inside TZA3030

interconnect

PCB

receiver

inside TZA3004

1998 Aug 24 15

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

PACKAGE OUTLINE

0.2

UNIT

A

max.

A

1A2A3bp

cE

(1)

eH

E

LL

p

Zywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

1.60

0.15

0.05

1.5

1.3

0.25

0.27

0.17

0.18

0.12

5.1

4.9

0.5

7.15

6.85

1.0

0.95

0.55

7
0

o
o

0.12 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

0.75

0.45

SOT401-1

95-12-19
97-08-04

D

(1) (1)(1)

5.1

4.9

H

D

7.15

6.85

E

Z

0.95

0.55

D

b

p

e

E

B

8

D

H

b

p

E

H

v M

B

D

Z

D

A

Z

E

e

v M

A

X

1

32

25

24

17

16

9

θ

A

1

A

L

p

detail X

L

(A )

3

A

2

y

w M

w M

0 2.5 5 mm

scale

LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm

SOT401-1

c

pin 1 index

1998 Aug 24 16

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all LQFP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250 °C.

Wave soldering

Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all LQFP
packages with a pitch (e) equal or less than 0.5 mm.

If wave soldering cannot be avoided, for LQFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The footprint must be at an angle of 45° to the board

direction and must incorporate solder thieves
downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

1998 Aug 24 17

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

1998 Aug 24 18

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

NOTES

1998 Aug 24 19

Philips Semiconductors Objective specification

SDH/SONET STM1/OC3 optical receiver TZA3030

NOTES

Internet: http://www.semiconductors.philips.com

Philips Semiconductors – a worldwide company

© Philips Electronics N.V. 1998 SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Middle East: see Italy
Netherlands: Postbus 90050, 5600PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
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Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. [phone], Fax. [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone]

Printed in The Netherlands 425102/200/01/pp20 Date of release: 1998 Aug 24 Document order number: 9397 750 04069