Datasheet TLE4211 Datasheet (Siemens)

Page 1
Intelligent Double Low-Side Switch 2 × 2 A
Features
Double low-side switch, 2 x 2 A
Power limitation
Overtemperature shutdown
Status monitoring
Shorted-load protection
Reverse polarity protection
Integrated clamp Z-Diodes
Voltage proof up to 70 V
Temperature range – 40 to 125 °C
TLE 4211
Bipolar IC
P-TO220-7-1
Type Ordering Code Package
TLE 4211 Q67000-A8118 P-TO220-7-1
Application
Applications in automotive electronics require intelligent power switches activated by logic signals, which are shorted-load protected and provide error feedback.
The IC contains two of these power switches (low-side switch). In case of inductive loads the integrated power Z-diodes clamp the discharging voltage.
With TTL signals at the control inputs (active low) both switches can be activated independently of one another. If one of the inputs is not in use, it must be applied to high potential.
The status output (open collector) signals the following malfunctions through low potential:
Overload,
Open load,
Output shorted to ground,
Overvoltage.
Semiconductor Group 1 10.96
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Pin Configuration
(top view)
TLE 4211
Semiconductor Group 2
Page 3
Pin Definitions and Functions Pin No. Symbol Function
1 STA Status output (open collector)
for both outputs; indicates overload, open load and shorted load to ground as well as overvoltage at pin 7. In case of malfunction the status output is switched to low after a delay time (except overvoltage).
2 IN1 Control input 1 (TTL-compatible)
activates output transistor 1 in case of low-potential.
3Q1Output 1
Shorted-load protected, open collector output with 36 V clamp Z-diode to ground.
TLE 4211
4 GND Ground
Wiring must be designed for a max. short-circuit current (2 x 3.5 A).
5Q2Output 2
Shorted-load protected, open collector output with 36 V clamp Z-diode to ground.
6 IN2 Control input 2 (TTL-compatible)
activates output transistor 2 in case of low-potential.
7
V
S
Supply voltage
In case of overvoltage at this pin large sections of the circuit are deactivated. The status output indicates the malfunction without delay time.
Semiconductor Group 3
Page 4
TLE 4211
Block Diagram
Semiconductor Group 4
Page 5
TLE 4211
Circuit Description
Input Circuits
The control inputs comprise TTL-compatible Schmitt triggers with hysteresis. Driven by these stages the inverting buffer amplifiers convert the logic signal for driving the NPN power transistors.
Switching Stages
The output stages comprise NPN power transistors with open collectors. Since the protective circuit allocated to each stage limits the power dissipation, the outputs are shorted-load protected to the supply voltage throughout the entire operating range. Positive voltage peaks, which occur during the switching of inductive loads, are limited by the integrated clamp Z-diodes.
Monitoring and Protective Functions The outputs are monitored for open load, overload, and shorted output to ground (see
table below). In addition, large sections of the circuit are de-activated in case of
V
excessive supply voltages
. Linked via OR gate the information regarding these
S
malfunctions effects the status output (open collector, active low). An internally determined delay time applied to all malfunctions but overvoltage prevents the output of messages in case of short-term malfunctions. Furthermore, a temperature protection circuit prevents thermal overload. An integrated reverse diode protects the supply voltage
V
against reverse polarities. Similarly the load circuit is protected against
S
reverse polarities within the limits established by the maximum ratings (no shorted load at the same time!). At supply voltages below the operating range an undervoltage detector ensures that neither the status nor the outputs are activated.
Status Output (L = Error)
Undervoltage Operating Range Overvoltage
V
= L
I
(active)
V
= H
I
(passive) Normal function H H H L Overload H L H L Open load H L H L Shorted output to ground H L L L
Semiconductor Group 5
Page 6
TLE 4211
Circuit Diagram
Semiconductor Group 6
Page 7
TLE 4211
Absolute Maximum Ratings
T
= 40 to 150 °C
j
Parameter Symbol Limit Values Unit
min. max.
Voltages
Supply voltage (pin 7)
1)
Supply voltage (pin 7) t 500 ms Input voltage (pin 2; pin 6) Output voltage (pin 1)
Currents
Switching current (pin 3; pin 5) Current with reverse polarity (pin 3; pin 5)
T
85 °C
C
Output current (pin 1) Max. current at inductive load Junction temperature
Storage temperature
Operating Range
V V V V
I I
I I T
T
S S I O
Q Q
Q
Q
j stg
–45 – –5 – 0.3
limited internally
– 2.2 –
– –
– 50
45 70 45 45
– 10
see Diagram
150 150
V V V V
A mA
°C °C
Supply voltage Supply voltage slew rate d Case temperature
V
S
V
/dV – 1 1 V/µs
S
T
C
5.6
– 40 125 °C
Thermal resistance junction to case junction to ambient
1)
Refer to monitoring and protective functions
2)
Lower limit = 4.6 V, if previously VS greater than 5.6 V (turn-on hysteresis)
Semiconductor Group 7
R R
th JC th JA
– –
2)
20 V
4 65
K/W K/W
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TLE 4211
Characteristics
V
= 6 to 18 V and Tj = – 40 to 125 °C
S
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
General Characteristics
Quiescent current Supply voltage
Supply overvoltage shutdown threshold Open load error threshold voltage
Open load error threshold current
Open load error threshold current for both channels active
Logic
Control input H-input voltage L-input voltage
I I
V
V
I
I
V V
S S
QU
QU
SO
QU
IH IL
– –
34 –
50 120 mA VQ = V
3.5 10010180mAmA
36 40
42 –
V mV
V
= VI > V
I
V
= VI < V
I
I
= 5 mA; VO < 0.4 V
O
I
= 5 mA; VO < 0.4 V
O
IH IL
QU
250 mA VQ1 = VQ2 = V
0.7
1.7
1.1
2.4 –
V V
– –
QU
Hysteresis of
V
I
0.6 V
input voltage H-input current
L-input current Status output
I
IH
I
V
IL
OSat
– –
10 10
µA µA
V
= 5 V
I
V
= 0.5 V
I
0.4 V IO = 5 mA (open coll.) L-saturation voltage
Status delay time
1)
Period from the beginning of the disturbance at one channel (exception: overvoltage) until the 50 % value of the status switching edge is reached.
Semiconductor Group 8
t
dS
12 20 30 µs
1)
Page 9
TLE 4211
Characteristics (cont’d)
V
= 6 to 18 V and Tj = – 40 to 125 °C
S
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Power Output
Saturation voltage
Leakage current Switch-ON time
Switch-OFF time Output voltage
Negative clamp
Power Clamp Diode (
Output voltage positive clamp
Serial resistance
V
QSat
I
Q
t
D ON
t
D OFF
V
QF
V
= 42 V; S1 open)
S
V
QZ
r
z
0.6 0.8 V IQ = 1.6 A; VI < VIL;
300 µA VQ= 6 V; VI > V
1.4 1.8 V IQ= – 2.0 A
34 36 40 V IQ = 0.1 A
–2–0 A < IQ < 2 A
0.5
2.5
5 10
µs µs
T
= 25 °C
j
IH
see Timing Diagram;
I
= 1 A
Q
Semiconductor Group 9
Page 10
TLE 4211
Test Circuit
Timing Diagram
Semiconductor Group 10
Page 11
TLE 4211
Application Circuit
C* is to be dimensioned such that e.g. in case of a battery voltage failure the maximum
ratings of the IC are not exceeded by the recirculation energy
L
, L2.
1
Semiconductor Group 11
Page 12
TLE 4211
Output Voltage V
Q
versus Output Current I
Shorted Load Current I
Q
versus Output Voltage V
Q0
Q
Status Signal Threshold versus Chip Temperature
T
Maximum Load Current I
j
versus Load Inductance L
L
Semiconductor Group 12
Page 13
Package Outlines
P-TO220-7-1
(Plastic Transistor Single Outline)
TLE 4211
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”.
SMD = Surface Mounted Device
GPT05108
Dimensions in mm
Semiconductor Group 13
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