Datasheet TL7705ACP Specification

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

SOIC (D)

7702AC

SOIC (D)

7705AC

SOIC (D)

7709AC

SOIC (D)

7712AC

SOIC (D)

7702AI

40°C to 85°C

SOIC (D)

7705AI

SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

D

Power-On Reset Generator

D

Automatic Reset Generation After Voltage
Drop

D

Wide Supply-Voltage Range

D

Precision V oltage Sensor

D

T emperature-Compensated Voltage
Reference

D

True and Complement Reset Outputs

D

Externally Adjustable Pulse Duration

description/ordering information

T

A

PDIP (P) Tube of 50 TL7702ACP TL7702ACP

PDIP (P) Tube of 50 TL7705ACP TL7705ACP

SOP (PS) Reel of 2000 TL7705ACPSR T7705A

0°C to 70°C

–

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.

PDIP (P) Tube of 50 TL7709ACP TL7709ACP

PDIP (P) Tube of 50 TL7712ACP TL7709ACP

PDIP (P) Tube of 50 TL7715ACP TL7715ACP
SOIC (D) Tube of 75 TL7715ACD 7715AC
PDIP (P) Tube of 50 TL7702AIP TL7702AIP

PDIP (P) Tube of 50 TL7705AIP TL7705AIP

TL7702A, TL7709A, TL7712A, TL7715A ...D OR P PACKAGE

ORDERING INFORMATION

PACKAGE

†

Tube of 75 TL7702ACD
Reel of 2500 TL7702ACDR

Tube of 75 TL7705ACD
Reel of 2500 TL7705ACDR

Tube of 75 TL7709ACD
Reel of 2500 TL7709ACDR

Tube of 75 TL7712ACD
Reel of 2500 TL7712ACDR

Tube of 75 TL7702AID
Reel of 2500 TL7702AIDR

Tube of 75 TL7705AID
Reel of 2500 TL7705AIDR

TL7705A . . . D, P, OR PS PACKAGE,

RESIN

ORDERABLE

PART NUMBER

REF

CT

GND

(TOP VIEW)

1
2
3
4

8
7
6
5

TOP-SIDE
MARKING

V

CC

SENSE
RESET
RESET

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2003, Texas Instruments Incorporated

1

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

description/ordering information (continued)

The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply
for undervoltage conditions at the SENSE input. During power up, the RESET
when V
function activates a time delay , after which outputs RESET
When an undervoltage condition occurs during normal operation, RESET

attains a value approaching 3.6 V . At this point (assuming that SENSE is above V

CC

and RESET go inactive (high and low, respectively).

and RESET go active. T o ensure that
a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor
C

: td = 1.3 × 104 × CT, where CT is in farads (F) and td is in seconds (s).

T

During power down and when SENSE is below V

, the outputs remain active until VCC falls below 2 V . After

IT–

this, the outputs are undefined.
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in

the supply voltage.

functional block diagram

The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.

output becomes active (low)

), the delay timer

IT+

8

V

CC

Reference

Voltage

3

CT

SENSE

RESIN

NOTES: A. TL7702A: R1 = 0 Ω, R2 = open

7

R1
(see Note A)

R2
(see Note A)

2

4

GND

TL7705A: R1 = 7.8 kΩ, R2 = 10 kΩ
TL7709A: R1 = 19.7 kΩ, R2 = 10 kΩ
TL7712A: R1 = 32.7 kΩ, R2 = 10 kΩ
TL7715A: R1 = 43.4 kΩ, R2 = 10 kΩ

B. Resistor values shown are nominal.

≈100 µA

6

5

1

RESET

RESET

REF

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

timing diagram

Threshold Voltage

VCC ≈ 3.6 V

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

VCC and SENSE

VCC ≈ 2 V

RESET

Output

Undefined

t

d

t

d

Output
Undefined

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V
Input voltage range, V
Input voltage range, V

High-level output current, I
Low-level output current, I
Package thermal impedance, θ

Operating virtual junction temperature, T

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to GND.

2. For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC – 1 V or 6 V, whichever
is less.

3. Maximum power dissipation is a function of TJ(max),
ambient temperature is PD = (TJ(max) – TA)/

4. The package thermal impedance is calculated in accordance with JESD 51-7.

(see Note 1) 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

, RESIN –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

, SENSE:TL7702A (see Note 2) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

TL7705A –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TL7709A –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TL7712A, TL7715A –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

, RESET –30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OH

, RESET 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OL

(see Notes 3 and 4): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .

PS package 95°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

J

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

θ

, and TA. The maximum allowable power dissipation at any allowable

θ

JA

JA

. Operating at the absolute maximum TJ of 150°C can affect reliability.

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

TAOperating free-air temperature range

°C

†

SENSE

y

y

RESIN

SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

recommended operating conditions

MIN MAX

V
V
V

V

I

OH

I

OL

NOTE 2: For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC – 1 V or 6 V, whichever is less.

Supply voltage 3.5 18 V

CC

High-level input voltage at RESIN 2 V

IH

Low-level input voltage at RESIN 0.6 V

IL

TL7702A 0 See Note 2
TL7705A 0 10

Input voltage, SENSE

I

High-level output current, RESET –16 mA
Low-level output current, RESET 16 mA

p

p

TL7709A
TL7712A 0 20
TL7715A 0 20

TL77xxAC 0 70
TL77xxAI –40 85

0 15

electrical characteristics over recommended operating conditions (unless otherwise noted)

TL77xxAC

PARAMETER

V
V
V

V

V

I

I

I

OH

I

OL

I

CC

†

All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT , and VCC to GND.

High-level output voltage, RESET IOH = –16 mA VCC–1.5 V

OH

Low-level output voltage, RESET IOL = 16 mA 0.4 V

OL

Reference voltage TA = 25°C 2.48 2.53 2.58 V

ref

TL7702A 2.48 2.53 2.58

Negative-going input threshold voltage,

IT–

Hysteresis, SENSE (V

h

s

Input current

High-level output current, RESET VO = 18 V 50 µA
Low-level output current, RESET VO = 0 –50 µA
Supply current All inputs and outputs open 1.8 3 mA

– V

IT+

)

IT–

SENSE TL7702A V

TL7705A 4.5 4.55 4.6
TL7709A
TL7712A 10.6 10.8 11
TL7715A 13.2 13.5 13.8
TL7702A 10
TL7705A 15
TL7709A
TL7712A 35
TL7715A 45

TEST CONDITIONS

TA = 25°C

TA = 25°C

VI = 2.4 V to V
VI = 0.4 V –100

< VI < VCC – 1.5 V 0.5 2

ref

CC

TL77xxAI

MIN TYP MAX

7.5 7.6 7.7

20

UNIT

V

UNIT

V

mV

20

µA

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

†

trRise time

V

5 V

See Note 5

s

tfFall time

V

5 V

See Note 5

s

SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

switching characteristics over recommended operating conditions (unless otherwise noted)

TL77xxAC

PARAMETER

Output pulse duration CT = 0.1 µF 0.65 1.2 2.6 msec
Input pulse duration at RESIN 0.4 µs

t

w(S)

t

pd

†

All switching characteristics are measured with 0.1-µF capacitors connected at REF and VCC to GND.

NOTE 5: The rise and fall times are measured with a 4.7-kΩ load resistor at RESET and RESET

Pulse duration
at SENSE input to switch outputs

Propagation delay time, RESIN to RESET VCC = 5 V 1 µs

RESET
RESET
RESET
RESET

VIH = V

CC

CC

TEST CONDITIONS

+ 200 mV, VIL = V

IT–

,

=

,

=

– 200 mV 2 µs

IT–

.

TL77xxAI

MIN TYP MAX

0.2

3.5

3.5

0.2

UNIT

µ

µ

SENSE

RESIN

RESET

RESET

V

Undefined

IT+

PARAMETER MEASUREMENT INFORMATION

Voltage

Drop

t

w(S)

V

t

f

90%

t

10%

t

r

IT–

t

r

10%

90%

t

f

d

Figure 1. Voltage Waveforms

10%

V

IT+

0.7 V

t

pd

90%

50%

t

d

50%

10%

2 V

0 V

V

IH

V

IL

V

90%

t

d

10%

OH(RESET)

V

OL(RESET

)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

ASSERTION TIME

LOAD RESISTANCE

42

38

34

30

26

t – Assertion Time – ns

22

18

0246

RESET t

RESET t

RL – Load Resistance – kΩ

r

f

Figure 2

vs

TYPICAL CHARACTERISTICS

VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C

810

7

6

sµ

5

4

3

2

t – Deassertion Time –

1

0

0246

†

DEASSERTION TIME

vs

LOAD RESISTANCE

RESET t

RESET t

RL – Load Resistance – kΩ

f

r

Figure 3

VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C

810

ASSERTION TIME

vs

LOAD CAPACITANCE

44

VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ

40

TA = 25°C

36

RESET t

32

28

t – Assertion Time – ns

24

20

0 25 50 75 100 125

r

RESET t

CL – Load Capacitance – pF

f

150 175 200

Figure 4

†

For proper operation, both RESET and RESET
plateauing in either output waveform during switching.

should be terminated with resistors of similar value. Failure to do so may cause unwanted

DEASSERTION TIME

vs

LOAD CAPACITANCE

3.6
VCC = 5 V

CT = 0.1 µF

3.2

RL = 4.7 kΩ
TA = 25°C

2.8

2.4

2

1.6

t – Deassertion Time – sµ

1.2

0.8
0 25 50 75 100 125 150 175 200

RESET t

RESET t

f

r

CL – Load Capacitance – pF

Figure 5

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5 V

12 V

GND

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A

SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

APPLICATION INFORMATION

SENSE
RESIN

TL7705A

CT

8

V

CC

GND

4

RESET

RESET

REF

0.1 µF

10 kΩ

5

6
1

System Reset

10 kΩ

8

V

SENSE
RESIN

TL7712A

CT

CC

GND

4

RESET

RESET

REF

0.1 µF

5

6
1

7
2

3

C

T

22 kΩ

10 kΩ

10 kΩ

7
2

3

C

T

–12 V

8

V

SENSE

RESIN

TL7712A

CT

CC

GND

4

RESET

RESET

REF

5

6
1

10 kΩ

0.1 µF

7
2

3

C

T

(F)

C

T

+

1.3 10

t

)

d(s

4

Figure 6. Multiple Power-Supply System Reset Generation

5 V

8

V

SENSE
RESIN

TL7705A

CT

CC

RESET

RESET

REF

GND

4

7
2

t

)

+

1.3 10

d(s

4

GND

3

C

T

(F)

C

T

10 kΩ

5

6
1

10 kΩ

0.1 µF

RESET

TMS7000

V

CC

V

SS

Figure 7. Reset Controller for TMS7000 System

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS

SLVS028H – APRIL 1983 – REVISED MAY 2003

APPLICATION INFORMATION

5 V

Input

INPUT OUTPUT

C

I

Figure 8. Eliminating Undefined States Using a P-Channel JFET

SENSE Input

µA7805

COMMON

C

7

2

O

SENSE

TL77xxA

RESIN

8

V

SENSE

CT

T

5

6

CC

RESET

TL7705A

RESET

GND

4

REF

0.1 µF

750 Ω

2.7 kΩ

7

3

C

V

CC

10 kΩ

8

V

CC

RESET

RESET

4.7 kΩ

5

6
1

G

4.7 kΩ

2N4036

25 kΩ

System RESET

S

Q1
2N3994

D

Q1

System RESET

3

CT

GND

C

4

T

REF

0.1 µF

1

10 kΩ 1 kΩ

Figure 9. Eliminating Undefined States Using a pnp Transistor

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

5962-88685012A OBSOLETE LCCC FK 20 None Call TI Call TI

TL7702ACD ACTIVE SOIC D 8 75 Pb-Free

TL7702ACDR ACTIVE SOIC D 8 2500 Pb-Free

TL7702ACP ACTIVE PDIP P 8 50 Pb-Free

TL7702AID ACTIVE SOIC D 8 75 Pb-Free

TL7702AIDR ACTIVE SOIC D 8 2500 Pb-Free

TL7702AIP ACTIVE PDIP P 8 50 Pb-Free

TL7702AMFKB OBSOLETE LCCC FK 20 None Call TI Call TI

TL7702AMJG OBSOLETE CDIP JG 8 None Call TI Call TI

TL7702AMJGB OBSOLETE CDIP JG 8 None Call TI Call TI

TL7705ACD ACTIVE SOIC D 8 75 Pb-Free

TL7705ACDR ACTIVE SOIC D 8 2500 Pb-Free

TL7705ACP ACTIVE PDIP P 8 50 Pb-Free

TL7705ACPSLE OBSOLETE SO PS 8 None Call TI Call TI

TL7705ACPSR ACTIVE SO PS 8 2000 Pb-Free

TL7705AID ACTIVE SOIC D 8 75 Pb-Free

TL7705AIDR ACTIVE SOIC D 8 2500 Pb-Free

TL7705AIP ACTIVE PDIP P 8 50 Pb-Free

TL7705AMFKB OBSOLETE LCCC FK 20 None Call TI Call TI

TL7705AMJG OBSOLETE CDIP JG 8 None Call TI Call TI

TL7705AMJGB OBSOLETE CDIP JG 8 None Call TI Call TI

TL7709ACD ACTIVE SOIC D 8 75 Pb-Free

TL7709ACDR ACTIVE SOIC D 8 2500 Pb-Free

TL7709ACP ACTIVE PDIP P 8 50 Pb-Free

TL7709AID OBSOLETE SOIC D 8 None Call TI Call TI
TL7709AIP OBSOLETE PDIP P 8 None Call TI Call TI

TL7712ACD ACTIVE SOIC D 8 75 Pb-Free

TL7712ACDR ACTIVE SOIC D 8 2500 Pb-Free

TL7712ACP ACTIVE PDIP P 8 50 Pb-Free

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-260C-1 YEAR/

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-2-250C-1 YEAR

CU NIPDAU Level-NC-NC-NC

11-Feb-2005

(3)

Level-1-235C-UNLIM

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

11-Feb-2005

(3)

TL7712AID OBSOLETE SOIC D 8 None Call TI Call TI
TL7712AIP OBSOLETE PDIP P 8 None Call TI Call TI

TL7715ACD ACTIVE SOIC D 8 75 Pb-Free

CU NIPDAU Level-2-250C-1 YEAR

(RoHS)

TL7715ACP ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU Level-NC-NC-NC

(RoHS)
TL7715AID OBSOLETE SOIC D 8 None Call TI Call TI
TL7715AIP OBSOLETE PDIP P 8 None Call TI Call TI

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 2

MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE

0.400 (10,16)

0.355 (9,00)

0.063 (1,60)

0.015 (0,38)

0.100 (2,54)

8

1

5

4

0.065 (1,65)

0.045 (1,14)

0.020 (0,51) MIN

0.023 (0,58)

0.015 (0,38)

0.280 (7,11)

0.245 (6,22)

0.310 (7,87)

0.290 (7,37)

0.200 (5,08) MAX
Seating Plane

0.130 (3,30) MIN

0°–15°

0.014 (0,36)

0.008 (0,20)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.

E. Falls within MIL STD 1835 GDIP1-T8

4040107/C 08/96

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A SQ

B SQ

19

20

21

22

23

24

25

12826 27

12

1314151618 17

0.020 (0,51)

0.010 (0,25)

MIN

0.342
(8,69)

0.442

0.640

0.739

0.938

1.141

A

0.358
(9,09)

0.458

(11,63)

0.660

(16,76)

0.761

(19,32)(18,78)

0.962

(24,43)

1.165

(29,59)

(10,31)

(12,58)

(12,58)

NO. OF

TERMINALS

**

11

10

9

8

7

6

5

432

20

28

44

52

68

84

0.020 (0,51)

0.010 (0,25)

(11,23)

(16,26)

(23,83)

(28,99)

MINMAX

0.307
(7,80)

0.406

0.495

0.495

0.850
(21,6)

1.047
(26,6)

0.080 (2,03)

0.064 (1,63)

B

MAX

0.358
(9,09)

0.458

(11,63)

0.560

(14,22)

0.560

(14,22)

0.858
(21,8)

1.063
(27,0)

0.055 (1,40)

0.045 (1,14)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.

E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

4040140/D 10/96

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

4

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.010 (0,25)

Seating Plane

M

0.325 (8,26)

0.300 (7,62)

0.015 (0,38)

Gage Plane

0.010 (0,25) NOM

0.430 (10,92)
MAX

4040082/D 05/98

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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