Datasheet TISP7350H3SL, TISP7400H3SL, TISP7095H3SL, TISP7080H3SL, TISP7290H3SL Datasheet (Power Innovations)

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000Copyright © 2000, Power Innovations Limited, UK

TELECOMMUNICATION SYSTEM 2x100 A 10/1000 OVERVOLTAGE PROTECTORS

● Ion-Implanted Breakdown Region

- Precise DC and Dynamic Voltages

V

DEVICE

‘7070 58 70
‘7080 65 80
‘7095 75 95
‘7125 100 125
‘7135 110 135
‘7145 120 145
‘7180 145 180
‘7210 160 210
‘7250 200 250
‘7290 230 290
‘7350 275 350
‘7400 300 400

DRM

V

● Rated for International Surge Wave Shapes

V

(BO)

V

- Single and Simultaneous Impulses

I

WAVE SHAPE STANDARD

2/10 µs GR-1089-CORE 500
8/20 µs IEC 61000-4-5 350

10/160 µs FCC Part 68 250

10/700 µs

10/560 µs FCC Part 68 130

10/1000 µs GR-1089-CORE 100

FCC Part 68

ITU-T K20/21

TSP

A

200

SL PACKAGE

(TOP VIEW)

T

G

R

1

2

3

device symbol

T

SD7XAB

G

TerminalsT,RandGcorrespondtothe
alternative line designators of A, B and C

● 3-Pin Through-Hole Packaging

- Compatible with TO-220AB pin-out

-LowHeight.....................8.3mm

MDXXAGA

R

description

The TISP7xxxH3SL limits overvoltages between the telephone line Ring and Tip conductors and Ground.
Overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or
conducted on to the telephone line.

Each terminal pair, T-G, R-G and T-R, has a symmetrical voltage-triggered bidirectional thyristor protection
characteristic. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the
breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state
causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar
holding current prevents d.c. latchup as the diverted current subsides.

This TISP7xxxH3SL range consists of twelve voltage variants to meet various maximum system voltage
levels (58 V to 300 V). They are guaranteed to voltage limit and withstand the listed international lightning
surges in both polarities. These high current protection devices are in a 3-pin single-in-line (SL) plastic
package and are supplied in tube pack. For alternative impulse rating, voltage and holding current values in
SL packaged protectors, consult the factory. For lower rated impulse currents in the SL package, the 45 A
10/1000 TISP7xxxF3SL series is available.

These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and
matched breakover control and are virtually transparent to the system in normal operation

PRODUCT INFORMATION

Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.

1

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

absolute maximum ratings, TA= 25°C (unless otherwise noted)

RATING SYMBOL VALUE UNIT

‘7070
‘7080
‘7095
‘7125
‘7135

Repetitive peak off-state voltage, (see Note 1)

Non-repetitive peak on-state pulse current (see Notes 2, and 3)

2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape) 500
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator) 350
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape) 250
4/250 (ITU-T K.20/21, 10/700 voltage wave shape, dual) 225

0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape) 200
5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single) 200
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape) 200
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape) 130
10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape) 100

Non-repetitive peak on-state current (see Notes 2, 3 and 4)

20 ms (50 Hz) full sine wave

16.7 ms (60 Hz) full sine wave

1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A di
Junction temperature T
Storage temperature range T

‘7145
‘7180
‘7210
‘7250
‘7290
‘7350
‘7400

V

DRM

I

TSP

I

TSM

/dt 400 A/µs

T

J

stg

±58
±65

±75
±100
±110
±120
±145
±160
±200
±230
±275
±300

55
60

0.9

-40to+150 °C

-65to+150 °C

V

A

A

NOTES: 1. Derate value at -0.13%/°C for temperatures below 25 °C.

2. Initially the TISP7xxxH3 must be in thermal equilibrium.

3. These non-repetitive rated currents are peak values of either polarity. The rated current values may be applied to any terminal
pair. Additionally, both R and T terminals may have their rated current values applied simultaneously (in this case the G terminal
return current will be the sum of the currents applied to the R and T terminals). The surge may be repeated after the TISP7xxxH3
returns to its initial conditions.

4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. Derate current values at -0.61 %/°C for ambient temperatures above 25 °C

PRODUCT INFORMATION

2

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

electrical characteristics for any terminal pair, TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

I

DRM

V

(BO)

V

(BO)

I

(BO)

V

T

I

H

dv/dt

I

D

C

off

Repetitive peak off­state current

Breakover voltage dv/dt = ±750 V/ms, R

V

D=VDRM

SOURCE

=300Ω

dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
Impulse breakover
voltage

Maximum ramp value = ±500 V

di/dt = ±20 A/µs, Linear current ramp,

Maximum ramp value = ±10 A

Breakover current dv/dt = ±750 V/ms, R

=300Ω ±0.1 ±0.8 A

SOURCE

On-state voltage IT=±5A,tW=100µs ±5 V
Holding current IT= ±5 A, di/dt = +/-30 mA/ms ±0.15 ±0.6 A
Critical rate of rise of
off-state voltage

Linear voltage ramp, Maximum ramp value < 0.85V

DRM

Off-state current VD=±50V TA= 85°C ±10 µA

=1Vrms,VD=0,

d

=1Vrms,VD=-1V

d

=1Vrms,VD=-2V

d

=1Vrms,VD=-50V

d

=1Vrms,VD=-100V

d

Off-state capacitance

f=1MHz, V

f=1MHz, V

f=1MHz, V

f=1MHz, V

f=1MHz, V

(see Note 5)

TA=25°C
T

=85°C

A

‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7180
‘7210
‘7250
‘7290
‘7350
‘7400
‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7180
‘7210
‘7250
‘7290
‘7350
‘7400

‘7070 thru ‘7095
‘7125 thru ‘7210
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7210
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7210
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7210
‘7250 thru ‘7400
‘7125 thru ‘7210
‘7250 thru ‘7400

±5 kV/µs

±5
±10
±70
±80
±95

±125
±135
±145
±180
±210
±250
±290
±350
±400

±78
±88

±103
±134
±144
±154
±189
±220
±261
±302
±362
±414

170

90

84
150

79

67
140

74

62

73

35

28

33

26

µA

V

V

pF

NOTE 5: To avoid possible voltage clipping, the ‘7125 is tested with V

PRODUCT INFORMATION

=-98V.

D

3

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

thermal characteristics

PARAMETER

Junction to free air thermal resistance

R

θJA

NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.

EIA/JESD51-3 PCB, IT=I

T

= 25 °C, (see Note 6)

A

TEST CONDITIONS

TSM(1000)

,

MIN TYP MAX UNIT

50 °C/W

PRODUCT INFORMATION

4

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

PARAMETER MEASUREMENT INFORMATION

-v
I

DRM

I

(BO)

V

Quadrant III

Switching

Characteristic

(BO)

+i

I

TSP

Characteristic

I

TSM

I

T

V

T

I

H

V

DRM

V

D

I

D

I

D

I

H

V

T

I

T

I

TSM

I

TSP

-i

V

D

VD=±50VandID=±10µA
used for reliability release

Quadrant I

Switching

V

DRM

V

(BO)

I

DRM

PM4XAAC

I

(BO)

+v

Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINAL PAIRS

PRODUCT INFORMATION

5

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

TYPICAL CHARACTERISTICS

OFF-STATE CURRENT

vs

JUNCTION TEMPERATURE

10

VD=+50V

1

0·1

0·01

| - Off-State Current - µA

D

|I

0·001

0·0001

0 25 50 75 100 125 150

TJ- Junction Temperature - °C

Figure 2. Figure 3.

TC7AAA

VD=-50V

NORMALISED BREAKOVER VOLTAGE

vs

JUNCTION TEMPERATURE

1.10

'7125 THRU '7210

'7250 THRU '7400

1.05

'7070 THRU '7095

'7250 THRU '7400

1.00

Normalised Breakover Voltage

0.95

-25 0 25 50 75 100 125 150
TJ- Junction Temperature - °C

TC7AAB

NORMALISED BREAKOVER CURRENT

200

4.0

150

TA=25°C
t

3.0

100

W

70
50

40

2.0

30

1.5

20
15

10

1.0

7

0.9

- On-State Current - A
5

T

0.8

I

4

0.7

3

0.6

2

0.5

1.5
1

0.4

Breakover Current Normalised to 25 °C Holding Current

0.7 1.5 2 3 4 5 7110

-25 0 25 50 75 100 125 150

ON-STATE CURRENT

vs

vs

ON-STATE VOLTAGE

JUNCTION TEMPERATURE

+I

,-I

(BO)

= 100 µs

'3125
THRU
'3210

+I

,-I

(BO)

'3250
THRU
'3350

'7250 THRU '7400

(BO)

'3070
THRU
'3095

VT- On-State Voltage - V

TJ- Junction Temperature - °C

(BO)

TC7AAD

'7070 THRU '7210

Normalised Holding Current

NORMALISED HOLDING CURRENT

JUNCTION TEMPERATURE

2.0

1.5

1.0

0.9

0.8

0.7

0.6

0.5

0.4

-25 0 25 50 75 100 125 150
TJ- Junction Temperature - °C

Figure 4. Figure 5.

vs

TC7AAC

PRODUCT INFORMATION

6

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

TYPICAL CHARACTERISTICS

NORMALISED CAPACITANCE

vs

1

0.9

0.8

0.7

=-1V

D

0.6

0.5

0.4

0.3

Capacitance Normalised to V

0.2
1 2 3 5 10 20 30 50 100 150

OFF-STATE VOLTAGE

TJ= 25°C
V

d

'7070 THRU '7095

'7125 THRU '7210

'7250 THRU '7400

VD- Off-state Voltage - V

=1Vrms

Figure 6. Figure 7.

TC7AAI

DIFFERENTIAL OFF-STATE CAPACITANCE

vs

RATED REPETITIVE PEAK OFF-STATE VOLTAGE

80

C - Differential Off-State Capacitance - pF



75

70

65

60

55

50

45

40

35

30

'7070

'7080

'7095

50 60 70 80 150 200 250 300 400100

V

- Repetitive Peak Off-State Voltage - V

DRM

'7125

'7135



C=C

'7145

'7180

off(-2 V)-Coff(-50 V)

'7250

'7210

'7290

'7350

'7400

TC7AAH

PRODUCT INFORMATION

7

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

RATING AND THERMAL INFORMATION

NON-REPETITIVE PEAK ON-STATE CURRENT

vs

CURRENT DURATION

30

V

= 600 V rms, 50/60 Hz

20
15

10

9
8
7

6
5

4
3

2

1.5

- Non-Repetitive Peak On-State Current - A
1

TSM(t)

I

0.9

0.8
0·1 1 10 100 1000

GEN

=1.4*V

R

GEN

EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB, T

SIMULTANEOUS OPERATION
OF R AND T TERMINALS. G
TERMINAL CURRENT = 2xI

t - Current Duration - s

GEN/ITSM(t)

=25°C

A

TI7AB

TSM(t)

V

DERATING FACTOR

DRM

vs

MINIMUM AMBIENT TEMPERATURE

1.00

0.99

0.98

0.97
'7070 THRU '7095

0.96

Derating Factor

0.95

0.94

0.93

'7250 THRU '7400

-35 -25 -15 -5 5 15 25-40 -30 -20 -10 0 10 20
T

-MinimumAmbientTemperature-°C

AMIN

'7125 THRU '7210

Figure 9. Figure 10.

TI7AC

Figure 8.

IMPULSE RATING

vs

AMBIENT TEMPERATURE

700
600

500

400

300
250

200

150

Impulse Current - A

120
100

90
80

70

-40-30-20-100 1020304050607080
TA- Ambient Temperature - °C

TELCORDIA 2/10

IEC 1.2/50, 8/20

FCC 10/160

ITU-T 10/700

FCC 10/560

TELCORDIA 10/1000

TC7HAA

PRODUCT INFORMATION

8

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

APPLICATIONS INFORMATION

deployment

These devices are three terminal overvoltage protectors. They limit the voltage between three points in the
circuit. Typically, this would be the two line conductors and protective ground (Figure 11).

Th3

Th1

Th2

Figure 11. MULTI-POINT PROTECTION

In Figure 11, protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the
±V
±V

of the individual protector. Protector Th1 limits the maximum voltage between the two conductors to its

(BO)

value.

(BO)

Manufacturers are being increasingly required to design in protection coordination. This means that each
protector is operated at its design level and currents are diverted through the appropriate protector e.g. the
primary level current through the primary protector and lower levels of current may be diverted through the
secondary or inherent equipment protection. Without coordination, primary level currents could pass through
the equipment only designed to pass secondary level currents. To ensure coordination happens with fixed
voltage protectors, some resistance is normally used between the primary and secondary protection. The
values given in this data sheet apply to a 400 V (d.c. sparkover) gas discharge tube primary protector and the
appropriate test voltage when the equipment is tested with a primary protector.

impulse testing

To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.

PEAK VOLTAGE

STANDARD

GR-1089-CORE

FCC Part 68
(March 1998)

I 31-24 1500 0.5/700 37.5 0.2/310 200 0 NA

ITU-T K20/K21

† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
NA = Not Applicable, primary protection removed or not specified.

SETTING

V

2500 2/10 500 2/10 500
1000 10/1000 100 10/1000 100
1500 10/160 200 10/160 250

800 10/560 100 10/560 130
1000
1500
1500

1000
1500
4000
4000

VOLTAGE

WAVE FO RM

µs

9/720 †

(SINGLE)

(DUAL)

10/700
(SINGLE)
(SINGLE)

(DUAL)

PEAK CURRENT

VALUE

A

25

37.5

2x27

25

37.5
100

2x72

CURRENT

WAVE FORM

µs

5/320 †
5/320 †

4/250

5/310
5/310
5/310
4/250

TISP7xxxH3

25 °C RATING

A

200
200

2x225

200
200
200

2x225

SERIES

RESISTANCE

Ω

0NA

0NA

0

COORDINATION

RESISTANCE

Ω (MIN).

NA
NA

4.5

6.0

PRODUCT INFORMATION

9

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from Figure 10, the appropriate series resistor value can be calculated for ambient temperatures in the range
of-40°Cto85°C.

a.c. power testing

The protector can withstand the G return currents applied for times not exceeding those shown in Figure 8.
Currents that exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC
(Positive Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can
be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one
ampere. In some cases it may be necessary to add some extra series resistance to prevent the fuse opening
during impulse testing. The current versus time characteristic of the overcurrent protector must be below the
line shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).

capacitance

The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V,

-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the V
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. For example, a printed wiring (PW) trace of 10 cm could create a circuit resonance
with the device capacitance in the region of 50 MHz. In many applications, the typical conductor bias voltages
will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by biasing
one protector at -2 V and the other at -50 V.

= 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is

D

normal system voltage levels

The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition, about 10 V of clipping is normally possible without activating the ring trip circuit.

Figure 9 allows the calculation of the protector V
should not be less than the maximum normal system voltages. The TISP3290H3, with a V
be used for the protection of ring generators producing 105 V rms of ring on a battery voltage of -58 V. The
peak ring voltage will be 58 + 1.414*105 = 206.5 V. However, this is the open circuit voltage and the
connection of the line and its equipment will reduce the peak voltage.

For the extreme case of an unconnected line, the temperature at which clipping begins can be calculated
using the data from Figure 9. To possibly clip, the V
220 V 25 °C V
ambient temperature of -32 °C. In this example, the TISP3290H3 will allow normal equipment operation, even
on an open-circuit line, provided that the minimum expected ambient temperature does not fall below -32 °C.

value by a factor of 206.5/220 = 0.94. Figure 9 shows that a 0.94 reduction will occur at an

DRM

value at temperatures below 25 °C. The calculated value

DRM

value has to be 206.5 V. This is a reduction of the

DRM

of 220 V, can

DRM

JESD51 thermal measurement method

To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the

PRODUCT INFORMATION

10

3

(1 ft3)

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The thermal measurements used the smaller

76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.

PRODUCT INFORMATION

11

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

typical circuits

TIP

WIRE

RING
WIRE

F1a

Th3

Th1

Th2

F1b

TISP7xxxH3

Figure 12. PROTECTION MODULE

R1a

Th3

R1a

R1b

PROTECTED

EQUIPMENT

E.G. LINE CARD

AI7XBK

TIP

WIRE

RING
WIRE

OVER-

CURRENT

PROTECTION

R1a

COORDIN-

ATION

RESISTANCE

R1b

RING/TEST

PROTECTION

Th3

Th1

Th2

TISP7xxxH3

Th1

Th2

R1b

TISP7150H3

D.C.

Figure 13. ISDN PROTECTION

TEST

RELAY

S1a

S1b

RING

RELAY

S2b

AI7XBL

S2a

SIGNAL

SLIC

RELAY

S3a

S3b

SLIC

PROTECTION

Th4

SLIC

Th5

TISP6xxxx,

TISPPBLx,

½TISP6NTP2

TEST

EQUIP-

MENT

Figure 14. LINE CARD RING/TEST PROTECTION

PRODUCT INFORMATION

12

RING

GENERATOR

C1

220 nF

V

BAT

AI7XBJ

TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL

TISP7250H3SL THRU TISP7400H3SL

TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

MECHANICAL DATA

SL003
3-pin plastic single-in-line package

This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic com­pound. The compound will withstand soldering temperature with no deformation, and circuit performance charac­teristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or
processing when used in soldered assembly.

SL003

Index

Notch

1 3

1,854 (0.073)

MAX

0,711 (0.028)
0,559 (0.022)

3Places

9,75 (0.384)
9,25 (0.364)

2

8,31 (0.327)

MAX

4,267 (0.168)

MIN

2,54 (0.100) Typical

(see Note A)

2Places

3,40 (0.134)
3,20 (0.126)

6,60 (0.260)
6,10 (0.240)

12,9 (0.492)

MAX

0,356 (0.014)
0,203 (0.008)

ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES

NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position.

B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.

PRODUCT INFORMATION

MDXXCEA

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TISP7070H3SL THRU TISP7095H3SL, TISP7125H3SL THRU TISP7210H3SL
TISP7250H3SL THRU TISP7400H3SL
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

MARCH 1999 - REVISED MARCH 2000

IMPORTANT NOTICE

Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.

PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.

PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.

PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.

Copyright © 2000, Power Innovations Limited

PRODUCT INFORMATION

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