Datasheet TEA1081T, TEA1081 Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TEA1081
Product specification Supersedes data of February 1988 File under Integrated Circuits, IC03
Philips Semiconductors
September 1994
Page 2
Philips Semiconductors Product specification
Supply circuit with power-down for
TEA1081
telephone set peripherals
FEATURES
High input impedance for audio signals
Low DC series resistance
High output current
Large audio signal handling capability
Low distortion
Two modes of operation:
– output voltage that follows the DC line voltage – regulated output voltage
Power-down input
Low number of external components.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
LN
V
O
V
LN-O
R
S
I
O
operating DC line voltage 2.5 12.0 V DC output voltage 2.0 10.0 V voltage drop from line to output IO=0mA 0.5 V internal series resistance 20 −Ω output current (pin 7) VLN=4V
TEA1081 −−30 mA TEA1081T −−20 mA
V
LN(rms)
I
INT
T
amb
AC line voltage (RMS value) VLN=4V; IO=15mA;
internal supply current VLN=4V; IO= 0 mA;
operating ambient temperature 25 +70 °C
GENERAL DESCRIPTION
The TEA1081 is an integrated circuit for use in line-powered telephone sets to supply peripheral circuits for extended dialling and/or loudspeaker facilities.
The IC uses a part of the surplus line current normally drawn by the voltage regulator of the speech/transmission circuit. A power-down function isolates the IC from its load and reduces the input current.
1.5 V
THD=2%
0.8 1.4 mA
PD = LOW; VSP= V
O
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
TEA1081 DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1
TEA1081T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
September 1994 2
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
BLOCK DIAGRAM
handbook, full pagewidth
LN
IF
AD
VN
R
S
1
0.5 V
5
3
2
A1
A3
1/2 V
TR1
A2
O
TEA1081
TR2
POWER-
DOWN
REFERENCE
CURRENT
TEA1081
7
QS
8
SP
4
PD
6
VA
Fig.1 Block diagram.
PINNING
SYMBOL PIN DESCRIPTION
LN 1 positive line terminal VN 2 negative line terminal AD 3 amplifier decoupling PD 4 power-down input IF 5 low-pass filter input VA 6 output voltage adjustment QS 7 power supply output SP 8 supply input; power-down circuit
MLC166
age
LN VN AD PD
1 2 3 4
TEA1081
Fig.2 Pin configuration.
MLC167
8
SP
7
QS
6
VA
5
IF
September 1994 3
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
FUNCTIONAL DESCRIPTION
The TEA1081 is a supply interface between telephone line and peripheral devices in the telephone set. The high input impedance of the circuit allows direct connection to the telephone line (via a diode bridge). An inductor function is obtained by amplifier A1, resistor RS (see Fig.1) and an external low-pass RC filter.
Under the control of amplifier A2, transistor TR1 supplies peripheral devices and transistor TR2 minimizes line signal distortion by momentarily diverting input current to ground whenever the instantaneous value of the line voltage drops below the output voltage.
Internal circuits are biased by a temperature and line voltage compensated reference current source.
The power-down circuit isolates the supply circuit from external circuitry.
Line terminals: LN and VN (pins 1 and 2)
The input terminals LN and VN can be connected directly to the line. The minimum DC line voltage required at the input is expressed by formula (1); see also Table 1.
V
LNI1RS
× V
LNminVLN P()
V()++=
Table 1 Explanation of formula (1).
SYMBOL DESCRIPTION
I
1
R V
LNmin
S
input current internal series resistance minimum instantaneous line voltage
(1.4 V at IO = 5 mA)
V
LN(P)
The internal current (I
required peak level of AC line voltage
) at IO = 0 mA is typically 0.8 mA
INT
at VLN = 4 V and reaches a maximum of 1.4 mA at VLN=12V.
(1)
TEA1081
The output voltage follows the line voltage and is expressed by formula (2); see also Table 2.
V
V
O
LNI1RS
Table 2 Explanation of formula (2).
SYMBOL DESCRIPTION
V
LN
I
1
R
S
EGULATED OUTPUT VOLTAGE (SEE FIG.4)
R
line voltage input current internal series resistance
The circuit operates in this mode when an external resistor (RV) is connected between QS and VA (see Fig.6).
The output voltage is held constant at VO = 2 × I6× RV (V) as soon as the line voltage VLN>(2×I6×RV+I1×RS+ 0.5) (V)
The control current I6 is typically 20 µA.
10
handbook, halfpage
V
O
(V)
8
6
4
2
0
010
2468
(2)
(1)
0.5+×() V()=
MLC168
(3)
V (V)
LN
(2)
Supply terminals: QS and VA (pins 7 and 6)
Peripheral devices are supplied from QS (pin 7). Two modes of output voltage regulation are available.
OUTPUT VOLTAGE FOLLOWS LINE VOLTAGE (SEE FIG.3) The TEA1081 operates in this mode when there is no
external resistor (RV) between QS and VA (see Fig.6).
September 1994 4
Application without RV. (1) I1 = 5 mA. (2) I1 = 20 mA. (3) I1 = 30 mA; not valid for TEA1081T.
Fig.3 Output voltage as a function of line voltage.
Page 5
Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
75 k
50 k
V (V)
MLC169
LN
handbook, halfpage
6
V
O
(V)
4
2
0
0
RV connected between QS and VA. (1) I1 = 5 mA. (2) I1 = 20 mA. (3) I1 = 30 mA; not valid for TEA1081T.
(1)
(2)
(3)
210
468
R = 100 k
V
Fig.4 Output voltage as a function of line voltage.
TEA1081
Input current at V approximates to:
I1 = I
+2×IO (mA)
INT
The maximum supply current (within the specified output current limits) available for peripheral devices is shown by:
I
Omax
-----------------------------------------------------------
I
LINEminILNmin
=
Where:
I
is the minimum line current of the telephone set;
LINEmin
I
is the specified minimum input current of the
LNmin
speech/transmission circuit.
Input low-pass filter: IF (pin 5)
The input impedance between LN and VN at audio frequencies is determined by the filter elements C (between pins 1 and 5), RL (between pins 5 and 7) and the internal resistor RS(typical value 20 ).
At audio frequencies the TEA1081 behaves as an inductor of the value LI= CL× RL× RS (H). The typical value of LI at CL = 2.2 µF and RL = 100 k is 4.4 H.
= 1 V and without R
LN(rms)
I
INT
2
V
L
Input and output currents I1 and IO (pins 1 and 7)
The maximum available current into pin 1 (I
1
) is
determined by:
The minimum line current (I
) that is available for
LINEmin
the telephone set
The specified minimum input current (I
LNmin
) for the
speech/transmission circuit. That is I At V
LN(rms)
I1=I
INT
1max
= I
LINEmin
I
LNmin
.
< 150 mV, the input current I1is approximately:
+k×IO (mA)
Where:
I
= internal supply current (0.8 mA at VLN= 4 V);
INT
k = correction factor (k < 1.1 for the specified output
current range). With large line signals the instantaneous line voltage may
drop below VO+ 0.4 V. Normally (when VLN>VO+ 0.4 V), instantaneous current flows from LN to QS (pin 1 to pin 7) to the output load.
When VLN<VO+ 0.4 V, the instantaneous current is diverted to pin 2 to prevent distortion of the line signal.
Amplifier decoupling: AD (pin 3)
To ensure stability, a 68 pF decoupling capacitor is required between AD (pin 3) and LN (pin 1).
< 1.5 mA, a 47 pF capacitor has to be added
If I
Omin
between AD (pin 3) and VA (pin 6).
Power-down inputs: PD and SP (pins 4 and 8)
During pulse dialling or register recall, or if the input current to pin 1 is insufficient to maintain the output current, the supply to peripheral devices can be switched off by activating the PD input at pin 4. With PD = HIGH, the input current is reduced to 40 µA (typ.) at V
= 4 V and the
LN
internal circuits are isolated from the load at QS (pin 7). The power-down circuit is supplied via the SP input (pin 8).
SP can be wired to QS in conditions where VO>V during line interruptions. When VO<V
, SP should be
SPmin
SPmin
wired to an external supply point (e.g. to VCC of the TEA1060 family circuit).
When power-down is not required, the PD and SP inputs can be left open-circuit.
September 1994 5
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Philips Semiconductors Product specification
Supply circuit with power-down for
TEA1081
telephone set peripherals
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
LN
V
LN(RM)
V
I
I
1
I
I
P
tot
T
amb
T
stg
T
j
positive line voltage continuous 12 V
during switch-on or line interruptions 12.5 V
repetitive peak line voltage for a
12 resistor in series with pin 1 28 V
1 ms pulse per 5 s input voltage (all other terminals) VVN− 0.5 VLN+ 0.5 V DC input current
TEA1081 120 mA
TEA1081T 80 mA input current (all other terminals) 1+1mA total power dissipation see Fig.5 operating ambient temperature 25 +70 °C storage temperature 40 +125 °C junction temperature +125 °C
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air
TEA1081 120 K/W
TEA1081T (mounted on a printed-circuit board of 50 × 50 × 1.5 mm) 260 K/W
800
handbook, halfpage
P
tot
(mW)
600
400
200
0
0 40 120
(1)
(2)
8020 10060
MLC170
o
T ( C)
amb
(1) TEA1081. (2) TEA1081T.
Fig.5 Power derating curves.
September 1994 6
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Philips Semiconductors Product specification
Supply circuit with power-down for
TEA1081
telephone set peripherals
CHARACTERISTICS
V
= 4 V; V
LN
unless otherwise specified; see Fig.6.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
LN
V
LNmin
V
LNmax
Characteristics with R
I
1
V
O
V
O
I
6
Characteristics without R
I
1
V
LN-O
I
O
R
S
I
INT
THD total harmonic distortion V BRL balance return loss 600 reference 25 −−dB V
LN(2H)
V
LN(3H)
V
ni(rms)
= 100 mV; IO= 5 mA; f = 300 to 3400 Hz; RL= 100 kΩ; CL= 2.2 µF; RV=75kΩ; T
LN(rms)
amb
=25°C;
operating DC line voltage 2.5 12.0 V minimum instantaneous line voltage −−1.4 V maximum instantaneous line voltage 12.0 −−V
=75kΩ connected between pins 6 and 7 and CL=10µF
V
input current (pin 1) V
V
=0V 5.8 mA
LN(rms)
= 1.5 V; IO=15mA 30 mA
LN(rms)
output voltage (pin 7) 3.0 V variation of output voltage over the
ranges of:
line voltage V
temperature T
temperature T
output current I
=4to6V 100 mV
LN
= +25 to 25 °C −−100 mV
amb
= +25 to +75 °C −−100 mV
amb
=5to20mA −−100 mV
O
control current (pin 6) 20 −µA
V
input current (pin 1) V
V
=0V 6.0 mA
LN(rms)
= 1.5 V; IO=15mA 31 mA
LN(rms)
voltage drop from line to output IO=0mA 0.5 V
I
= 15 mA; V
O
= 1.5 V 1.1 V
LN(rms)
output current (pin 7)
TEA1081 −−30 mA
TEA1081T −−20 mA internal series resistance 20 −Ω internal supply current IO= 0 mA; PD = LOW; VSP=VO− 0.8 1.4 mA
I
= 0 mA; PD = HIGH (note 1);
O
40 60 µA
VSP>2V
= 1.5 V −−2%
LN(rms)
second harmonic level of line voltage f = 500 Hz; VLN= 0 dBm;
Z
= 600
line
third harmonic level of line voltage f = 500 Hz; VLN= 0 dBm;
Z
= 600
line
noise voltage on input terminal (RMS value)
V
=0V; RL= 600 Ω;
LN(rms)
P53 curve
−−58 dBm
−−60 dBm
−−83 dBmp
Power-down input (pin 4)
V
IL
V
IH
I
4
LOW level input voltage −−0.3 V HIGH level input voltage 1.5 V input current −−10 µA
September 1994 7
SP
V
Page 8
Philips Semiconductors Product specification
Supply circuit with power-down for
TEA1081
telephone set peripherals
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Power-down input (pin 8)
V
8
I
8
supply voltage for power-down 2 V supply current to power-down circuit V8=3V −−70 µA
Note
1. Power-down circuit supplied via external source.
APPLICATION INFORMATION
handbook, full pagewidth
C =
D
68 pF
TELEPHONE
LINE
SPEECH/
TRANSMISSION
CIRCUIT
V
LN
I
AD PD SP
1
C = 2.2 µF
L
3
TEA1081
4 8
IFLN
51
6
7
2
VN
VA
QS
C =
S
47 pF
R
V
I
O
C
O
R = 100 k
L
PERIPHERAL
V
O
CIRCUITS
LN
V
MLC171
Fig.6 Application diagram.
September 1994 8
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
PACKAGE OUTLINES
9.8
handbook, full pagewidth
seating plane
3.60
3.05
1.15 max
9.2
2.54 (3x)
1.73 max
0.53 max
0.51 min
3.2
max
0.254 M
4.2
max
0.38 max
8.25
7.80
7.62
10.0
8.3
TEA1081
MSA252 - 1
Dimensions in mm.
8
5
6.48
6.20
41
Fig.7 Plastic dual in-line package; 8 leads (300 mil); DIP8; SOT97-1.
September 1994 9
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
8
1
1.27
5.0
4.8
0.1 SS
5
4
0.49
0.36
handbook, full pagewidth
0.7
0.3
pin 1
index
0.25 M (8x)
1.45
1.25
0.25
0.10
4.0
3.8
6.2
5.8
detail A
1.0
0.5
0.7
0.6
A
0.25
0.19
0 to 8
MBC180 - 1
TEA1081
1.75
1.35
o
Dimensions in mm.
Fig.8 Plastic small outline package; 8 leads; body width 3.9 mm (SO8; SOT96-1).
September 1994 10
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
SOLDERING Plastic dual in-line packages
Y DIP OR WAVE
B The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low-voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s.
Plastic small-outline packages
BYWAVE During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing.
TEA1081
Y SOLDER PASTE REFLOW
B Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C.
R
EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE
Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.)
For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
-HEATED SOLDER TOOL)
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C.
A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications.
September 1994 11
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Philips Semiconductors Product specification
Supply circuit with power-down for
TEA1081
telephone set peripherals
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
September 1994 12
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
TEA1081
NOTES
September 1994 13
Page 14
Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
TEA1081
NOTES
September 1994 14
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Philips Semiconductors Product specification
Supply circuit with power-down for telephone set peripherals
TEA1081
NOTES
September 1994 15
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SCD34 © Philips Electronics N.V. 1994
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Printed in The Netherlands
413061/1500/02/pp16 Date of release: September 1994 Document order number: 9397 739 40011
Philips Semiconductors
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