Datasheet TDA6405TS-C2, TDA6405ATS-C1 Datasheet (Philips)

DATA SH EET

Product specification
Supersedes data of 1998 Jan 19
File under Integrated Circuits, IC02

1999 Jan 13

INTEGRATED CIRCUITS

TDA6404; TDA6405; TDA6405A

5 V mixer/oscillator-PLL
synthesizers for hyperband tuners

1999 Jan 13 2

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers
for hyperband tuners

TDA6404; TDA6405;

TDA6405A

FEATURES

• Single chip 5 V mixer/oscillator-PLL synthesizer for
hyperband tuners

• I2C-bus protocol

• 3 PNP band switch buffers (25 mA)

• 33 V tuning voltage output

• In-lock detector

• 5-level Analog-to-Digital Converter (ADC)

• 15-bit programmable divider

• Programmable reference divider ratio

(512, 640 or 1024)

• Programmable charge pump current

• Balanced mixer with a common emitter input for VHF

(single input)

• Balanced mixer with a common base input for UHF
(double input)

• 4-pin common emitter oscillator for VHF

• 4-pin common emitter oscillator for UHF

• IF amplifier with a low output impedance to drive a SAW
filter directly (≈2kΩ load)

• Low power, low radiation, small size

APPLICATIONS

• Hyperband tuners for Europe using a 2-band
mixer/oscillator in a switched concept.

GENERAL DESCRIPTION

The TDA6404, TDA6405 and TDA6405A are
programmable 2-band mixer/oscillator-PLL synthesizers
intended for VHF/UHF and hyperband tuners (see Fig.1).

The devices include two double balanced mixers and two
oscillators for the VHF and UHF band, an IF amplifier and
a PLL synthesizer. With proper oscillator application and
by using a switchable inductor to split the VHF band into
two sub-bands (the full VHF/UHF and hyperband) the TV
bands can be covered.

Two pins are available between the mixer output and the
IF amplifier input to enable IF filtering for improved signal
handling. Three PNP ports are provided for band
switching. Band selection is made according to the band
switch bits VHFL, VHFH and UHF.

The PLL synthesizer consists of a divide-by-eight
prescaler, a 15-bit programmable divider, a 4 MHz crystal
oscillator and its programmable reference divider and a
phase comparator combined with a charge pump which
drives the tuning amplifier, including 33 V output.

Depending on the reference divider ratio (512, 640
or 1024), the phase comparator operates at 7.8125 kHz,

6.25 kHz or 3.90625 kHz.
The devices are controlled according to the I

2

C-bus
format. The in-lock detector bit FL is set to logic 1 when the
loop is locked and is read on the SDA line (status byte)
during a read operation. The ADC input is available for
digital Automatic Frequency Control (AFC). The ADC code
is read during a read operation on the I2C-bus
(see Table 9). In test mode, pin ADC is used as a test
output for f

REF

and1⁄2f

DIV

.

When the charge pump current switch mode is activated
and the loop is phase-locked the charge pump current
value is automatically switched to LOW. This is to improve
carrier-to-noise ratio. The status of this feature can be read
in the ACPS flag during a read operation on the I2C-bus
(see Table 7).

Five serial bytes (including address byte) are required for
the I2C-bus format to address the devices, select the VCO
frequency, program the three PNP ports, set the charge
pump current and to set the reference divider ratio.
The devices have four independent I2C-bus addresses
which can be selected by applying a specific voltage on the
AS input (see Table 4).

1999 Jan 13 3

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

supply voltage operating 4.5 5 5.5 V

I

CC

supply current all PNP ports are ‘OFF’ − 78 − mA

f

XTAL

crystal oscillator frequency R

XTAL

= 25 to 150 Ω 3.2 4.0 4.48 MHz

I

o(PNP)

PNP port output current −−25 mA

T

stg

IC storage temperature −40 − +150 °C

T

amb

operating ambient temperature −20 − +85 °C

f

(i)RF

RF input frequency VHF band 45.25 − 399.25 MHz

UHF band 407.25 − 855.25 MHz

G

V

voltage gain VHF band − 27 − dB

UHF band − 38 − dB

F noise figure VHF band − 8 − dB

UHF band − 8.5 − dB

V

o

output voltage causing 1% cross
modulation in channel

VHF band − 119 − dBµV
UHF band − 118 − dBµV

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA6404TS;
TDA6405TS;
TDA6405ATS

SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1

1999 Jan 13 4

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

BLOCK DIAGRAM

Fig.1 Block diagram.

The pin numbers in parenthesis represent the TDA6405 and TDA6405A.

handbook, full pagewidth

MGK813

XTAL

OSCILLATOR

4 MHz

REFERENCE

DIVIDER

512, 640, 1024

PRESCALER

DIVIDE BY 8

15-BIT

PROGRAMMABLE

DIVIDER

POWER-ON

RESET

DIGITAL

PHASE

COMPARATOR

CHARGE

PUMP

TUNING
AMPLIFIER

UHF

OSCILLATOR

IF

AMPLIFIER

VHF

OSCILLATOR

RF INPUT

UHF

ELECTRONIC

BAND SWITCH

RF INPUT

VHF

UHF

MIXER

VHF

MIXER

IN-LOCK

DETECTOR

15-BIT

FREQUENCY

REGISTER

5-LEVEL A/D

CONVERTER

GATE

7-BIT CONTROL

REGISTER

LOGIC

OS

T2, T1, T0

T2, T1, T0

BS

CHP

T2 T1 T0 RSA RSB OSCHP

3-BIT BAND SWITCH

REGISTER

VHFL VHFH UHF

I2C-BUS

TRANSCEIVER

FL

f

REF

1/2f

DIV

FL

FL

TDA6404
TDA6405

TDA6405A

f

REF

f

DIV

1/2f

DIV

RSA

RSB

AS

SDA

SCL

AS

SDA

SCL

(3) 26
(2) 27
(1) 28

(4) 25

(11) 18

(10) 19

(5) 24
(6) 23
(7) 22

(15) 14

(14) 15

(8) 21

16 (13)

2 (27)

1 (28)

4 (25)

3 (26)

12 (17)
11 (18)
10 (19)

BS

BSVHF

BSUHF

5 (24) 17 (12)

IFFIL1

V

CC

V

CC

6 (23)

IFFIL2

13 (16) 7 (22) 8 (21) 9 (20)

(9) 20

UHFOSCIB1

UHFOSCOC1

VT

GND

CP

UHFOSCOC2

UHFOSCIB2

VHFOSCIB2

IFOUT1

IFOUT2

VHFOSCOC1
VHFOSCOC2

VHFOSCIB1

PVHFL

ADC

PVHFH

PUHF

UHFIN1
UHFIN2

VHFIN

RFGND

XTAL

BSVHF

BSUHF

1999 Jan 13 5

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

PINNING

SYMBOL

PIN

DESCRIPTION

TDA6404

TDA6405;

TDA6405A

UHFIN1 1 28 UHF input 1
UHFIN2 2 27 UHF input 2
VHFIN 3 26 VHF input
RFGND 4 25 RF ground
IFFIL1 5 24 IF filter output 1
IFFIL2 6 23 IF filter output 2
PVHFL 7 22 PNP port output for VHF low band
PVHFH 8 21 PNP port output for VHF high band
PUHF 9 20 PNP port output for UHF band
AS 10 19 address selection input
SDA 11 18 serial data input/output (I

2

C-bus)

SCL 12 17 serial clock input (I

2

C-bus)
ADC 13 16 Analog-to-Digital Converter input/output
CP 14 15 charge pump output
VT 15 14 tuning output
XTAL 16 13 crystal oscillator input
V

CC

17 12 supply voltage
IFOUT1 18 11 IF amplifier output 1
IFOUT2 19 10 IF amplifier output 2
GND 20 9 ground
UHFOSCIB1 21 8 UHF oscillator base input 1
UHFOSCOC1 22 7 UHF oscillator collector output 1
UHFOSCOC2 23 6 UHF oscillator collector output 2
UHFOSCIB2 24 5 UHF oscillator base input 2
VHFOSCIB1 25 4 VHF oscillator base input 1
VHFOSCOC1 26 3 VHF oscillator collector output 1
VHFOSCOC2 27 2 VHF oscillator collector output 2
VHFOSCIB2 28 1 VHF oscillator base input 2

1999 Jan 13 6

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Fig.2 Pin configuration for TDA6404.

handbook, halfpage

UHFIN1
UHFIN2

VHFIN

RFGND

IFFIL1
IFFIL2

PVHFL

PVHFH

PUHF

AS

SDA

SCL

ADC

CP

VHFOSCIB2

GND
IFOUT2
IFOUT1
V

CC

XTAL
VT

1
2
3
4
5
6
7
8

9
10
11
12
13

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

TDA6404

MGK830

UHFOSCIB1

UHFOSCOC1

UHFOSCOC2

UHFOSCIB2

VHFOSCIB1

VHFOSCOC2
VHFOSCOC1

handbook, halfpage

UHFIN1
UHFIN2
VHFIN
RFGND
IFFIL1
IFFIL2
PVHFL
PVHFH
PUHF
AS
SDA
SCL
ADC

VT

VHFOSCIB2

GND
IFOUT2
IFOUT1

V

CC

XTAL

CP

1
2
3
4
5
6
7
8

9
10
11
12
13

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

TDA6405

TDA6405A

MGK831

UHFOSCIB1

UHFOSCOC1

UHFOSCOC2

UHFOSCIB2

VHFOSCIB1

VHFOSCOC2
VHFOSCOC1

Fig.3 Pin configuration for TDA6405(A)

FUNCTIONAL DESCRIPTION

The devices are controlled via the I2C-bus.
For programming, there is one module address (7 bits)
and the R/W bit for selecting the read or write mode.

Write mode

Data bytes can be sent to the devices after the address
transmission (first byte) by setting the R/

W bit to logic 0.
Four data bytes are needed to fully program the devices.
The I2C-bus transceiver has an auto-increment facility
which permits the programming of the devices within one
single transmission (address + 4 data bytes).

The devices can also be partially programmed, providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Tables 1 and 2.

The first bit of the data byte transmitted indicates whether
frequency data (first bit = 0) or control and band switch
data (first bit = 1) will follow. Until an I

2

C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the devices.
The frequency register is loaded after the 8th clock pulse
of the second divider byte (DB2). The control register is
loaded after the 8th clock pulse of the CB. The band switch
register is loaded after the 8th clock pulse of the band
switch byte (BB).

1999 Jan 13 7

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Table 1 I2C-bus mode, write data format for the TDA6404 and TDA6405

Table 2 I

2

C-bus mode, write data format for the TDA6405A

I

2

C-bus address selection

The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several
synthesizers (up to 4) in one system by applying a specific voltage on the AS input. The relationship between MA1 and
MA0 and the input voltage applied to the AS input is given in Table 4.

Table 3 Description of symbols used in Tables 1 and 2

NAME BYTE

BITS

ACK

MSB LSB

Address byte ADB 11000MA1MA0R/

W=0 A
Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A
Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A
Control byte CB 1 CHP T2 T1 T0 RSA RSB OS A
Band-switch byte BB XXXXXUHFVHFH VHFL A

NAME BYTE

BITS

ACK

MSB LSB

Address byte ADB 11000MA1MA0R/

W=0 A
Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A
Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A
Control byte CB 1 CHP T2 T1 T0 RSA RSB OS A
Band-switch byte BB XXXXUHFXVHFH VHFL A

SYMBOL DESCRIPTION

A acknowledge
MA1 and MA0 programmable address bits (see Table 4)
N14 to N0 programmable divider bits; N = N14 × 2

14

+ N13 × 213+ ... + N1 × 21+N0

CHP charge pump current bit:

CHP = 0; ICP=60µA
CHP = 1; I

CP

= 280 µA (default)
T2, T1 and T0 test bits (see Table 5)
RSA and RSB reference divider ratio select bits (see Table 6)
OS tuning amplifier control bit:

OS = 0; normal operation; tuning voltage is ‘ON’
OS = 1; tuning voltage is ‘OFF’ (high-impedance)

UHF, VHFH and VHFL PNP ports control bits:

bit = 0; buffer n is ‘OFF’ (default)
bit = 1; buffer n is ‘ON’

X don’t care bit: may be a logic 0 or a logic 1

1999 Jan 13 8

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Table 4 Address selection I2C-bus

Table 5 Test mode

Notes

1. This is the default mode at Power-on reset.

2. The ADC input cannot be used when these test modes are active.

Table 6 Reference divider ratio select bits

MA1 MA0 VOLTAGE APPLIED ON AS INPUT

0 0 0 to 0.1V

CC

0 1 open or 0.2VCCto 0.3V

CC

1 0 0.4VCCto 0.6V

CC

1 1 0.9VCCto 1.0V

CC

T2 T1 T0 TEST MODES

0 0 0 automatic charge pump off
0 0 1 automatic charge pump on; note 1
0 1 X charge pump is ‘OFF’
1 1 0 charge pump is sinking current
1 1 1 charge pump is sourcing current
100f

REF

is available on pin ADC; note 2

101

1

⁄

2

f

DIV

is available on pin ADC; note 2

RSA RSB REFERENCE DIVIDER RATIO FREQUENCY STEP (kHz)

X 0 640 6.25
0 1 1024 3.90625
1 1 512 7.8125

Read mode

Data can be read from the devices by setting the R/W bit
to logic 1 (see Tables 7 and 8). After the slave address
has been recognized, the devices generate an
acknowledge pulse and the first data byte (status byte) is
transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH-level of the SCL clock signal.
A second data byte can be read from the devices if the
processor generates an acknowledge on the SDA line
(master acknowledge). End of transmission will occur if no
master acknowledge occurs. The devices will then release
the data line to allow the processor to generate a STOP
condition. The POR flag is set to logic 1 at power-on.
The flag is reset when an end-of-data is detected by the
devices (end of a read sequence). Control of the loop is
made possible with the in-lock flag FL which indicates
when the loop is locked (FL = 1).

The ACPS flag is LOW when the automatic charge pump
switch mode is ‘ON’ and the loop is locked. In other
conditions, ACPS = 1. When ACPS = 0, the charge pump
current is forced to the LOW value.

A built-in ADC is available on ADC pin. This converter can
be used to apply AFC information to the controller from the
IF section of the television. The relationship between the
bits A2, A1 and A0 is given in Table 9.

1999 Jan 13 9

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Table 7 Read data format

Note

1. MSB is transmitted first.

Table 8 Description of symbols used in Table 7

Table 9 Analog-to-digital converter levels; note 1

Note

1. Accuracy is ±0.03V

CC

.

NAME BYTE

BITS

ACK

MSB

(1)

LSB

Address byte ADB 1 1000MA1MA0R/

W=1 A

Status byte SB POR FL ACPS 1 1 A2 A1 A0 −

SYMBOL DESCRIPTION

A acknowledge
POR Power-on reset flag (POR = 1 at power-on)
FL in-lock flag (FL = 1 when the loop is locked)
ACPS automatic charge pump switch flag:

ACPS = 0; active
ACPS = 1; not active

A2, A1 and A0 digital outputs of the 5-level ADC (see Table 9)

A2 A1 A0 VOLTAGE APPLIED ON ADC INPUT

1 0 0 0.60V

CC

to 1.00V

CC

0 1 1 0.45VCCto 0.60V

CC

0 1 0 0.30VCCto 0.45V

CC

0 0 1 0.15VCCto 0.30V

CC

0 0 0 0 to 0.15V

CC

Power-on reset

The power-on detection threshold voltage V

POR

is set to
VCC= 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.

At power-on state, the charge pump current is set to
280 µA, the tuning voltage output is disabled, the test
bits T2, T1 and T0 are set to logic 001 (automatic charge
pump switch ‘ON’) and RSB is set to logic 1.

PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator and the VHF mixer are switched on. PVHFL and
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.

1999 Jan 13 10

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Table 10 Default bits at Power-on reset

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134) (note 1).

Note

1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage.

Maximum ratings can not be accumulated.

THERMAL CHARACTERISTICS

NAME BYTE

BITS

MSB LSB

Address byte ADB 11000MA1MA0X
Divider byte 1 DB1 0 XXXXXXX
Divider byte 2 DB2 XXXXXXXX
Control byte CB 11001X10
Band-switch byte BB XXXX0000

SYMBOL PARAMETER MIN. MAX. UNIT

V

CC

supply voltage −0.3 +6 V

V

O(n)

output voltage on pins PVHFL, PVHFH and PUHF −0.3 +6 V

I

O(n)

output current on pins PVHFL, PVHFH and PUHF −1 +30 mA

V

O(CP

) charge pump output voltage −0.3 +6 V

V

O(VT)

tuning output voltage −0.3 +35 V

V

I/O(ADC)

ADC input/output voltage −0.3 +6 V

V

I(SCL)

serial clock input voltage −0.3 +6 V

V

I/O(SDA)

serial data input/output voltage −0.3 +6 V

I

O(SDA)

data output current −1 +10 mA

V

I(AS)

address selection input voltage −0.3 +6 V

V

I(XTAL)

crystal oscillator input voltage −0.3 +6 V

I

O(n)

output current of each pin to ground:

for TDA6404, pins 1 to 6 and 17 to 28 −−10 mA
for TDA6405 and TDA6405A, pins 1 to 12 and 23 to 28 −−10 mA

t

sc(max)

maximum short-circuit time (all pins to VCC and all pins to GND, RFGND) − 10 s

T

stg

IC storage temperature −40 +150 °C

T

amb

operating ambient temperature −20 +85 °C

T

j

junction temperature − 150 °C

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 85 K/W

1999 Jan 13 11

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (T

amb

=25°C)

V

CC

supply voltage 4.5 5 5.5 V

I

CC

supply current at VCC= 5 V all PNP ports are ‘OFF’ − 78 86 mA

one PNP port is ‘ON’, sourcing 25 mA − 110 121 mA

PLL Synthesizer part (V

CC

= 4.5 to 5.5 V; T

amb

= −20 to +85 °C; unless otherwise specified)

F

UNCTIONAL RANGE

V

POR

Power-on reset voltage below this supply voltage Power-on

reset becomes active; see Table 10

1.5 2.0 − V

D/D divider ratio 15-bit frequency word 256 − 32767
f

XTAL

crystal oscillator frequency R

XTAL

= 25 to 150 Ω 3.2 4 4.48 MHz

Z

XTAL

 input impedance f

XTAL

= 4 MHz 600 1200 −Ω
PNP PORTS
I

L(off)

leakage current VCC= 5.5 V; V

PNPn

=0 −10 −−µA

V

O(sat)

output saturation voltage one PNP port is ‘ON’, sourcing 25 mA;

V

PNPn(sat)=VCC

− V

PNPn

− 0.25 0.4 V

ADC INPUT
V

I

ADC input voltage see Table 9 0 − V

CC

V

I

IH

HIGH-level input current V

ADC=VCC

−−10 µA

I

IL

LOW-level input current V

ADC

=0 −10 −−µA
ADDRESS SELECTION INPUT (AS)
V

IL

LOW-level input voltage 0 − 1.5 V

V

IH

HIGH-level input voltage 3 − 5.5 V

I

IH

HIGH-level input current VAS= 5.5 V −−10 µA

I

IL

LOW-level input current VAS=0 −10 −−µA
SCL AND SDA INPUTS
V

IL

LOW-level input voltage 0 − 1.5 V
V

IH

HIGH-level input voltage 3.0 − 5.5 V
I

IH

HIGH-level input current V

bus

= 5.5 V; VCC=0 −−10 µA

V

bus

= 5.5 V; VCC= 5.5 V −−10 µA

I

IL

LOW-level input current V

bus

= 1.5 V; VCC=0 −−10 µA

V

bus

= 0; VCC= 5.5 V −10 −−µA

f

SCL

serial clock frequency − 100 150 kHz
SDA OUTPUT
I

L

leakage current V

SDA

= 5.5 V −−10 µA

V

O

output voltage I

SDA

= 3 mA (sink current) −−0.4 V

1999 Jan 13 12

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

CHARGE PUMP OUTPUT (CP)
I

IH

 HIGH-level input current CHP = 1 − 280 −µA

I

IL

 LOW-level input current CHP = 0 − 60 −µA

V

O

output voltage PLL is locked; T

amb

=25°C − 1.95 − V

I

L(off)

off-state leakage current T2 = 0; T1 = 1 −15 −0.5 +15 nA
TUNING VOLTAGE OUTPUT (VT)
I

L(off)

off-state leakage current OS = 1; tuning supply = 33 V −−10 µA
V

O

output voltage when the

loop is closed

OS = 0; T2 = 0; T1 = 0; T0 = 1;
RL=27kΩ; tuning supply = 33 V

0.2 − 32.7 V

Mixer/oscillator part (V

CC

=5V; T

amb

=25°C; unless otherwise specified); measured in Fig.11

IF

AMPLIFIER

S

22

output reflection coefficient magnitude at 36.15 MHz; Zo=50Ω− −12.5 − dB

phase at 36.15 MHz; Z

o

=50Ω−1.41 − deg

R

s

real part of Zo=Rs+jωLsRs at 36.15 MHz − 81 −Ω
L

s

imaginary part of

Zo=Rs+jωL

s

Ls at 36.15 MHz − 9.5 − nH

VHF MIXER (INCLUDING IF AMPLIFIER)
f

i(RF)

RF input frequency picture carrier frequency 45.25 − 399.25 MHz
F noise figure f

RF

= 50 MHz; see Figs 8 and 9 − 79dB

f

RF

= 150 MHz; see Figs 8 and 9 − 810dB

f

RF

= 300 MHz; − 911dB

g

os

optimum source

conductance for noise

figure

fRF= 50 MHz − 0.7 − mS
f

RF

= 150 MHz − 0.9 − mS

f

RF

= 300 MHz − 1.5 − mS

g

i

input conductance fRF= 45.25 MHz − 0.25 − mS

f

RF

= 399.25 MHz − 0.5 − mS

C

i

input capacitance fRF= 45.25 to 399.25 MHz − 2 − pF
V

o

output voltage causing 1%

cross modulation in

channel

fRF= 45.25 MHz; see Fig.6 116 119 − dBµV
f

RF

= 399.25 MHz; see Fig.6 116 119 − dBµV

V

i

input voltage causing

pulling in channel (750 Hz)

fRF= 399.25 MHz; note 1 − 88 − dBµV

G

V

voltage gain fRF= 45.25 MHz; see Fig.4 24.5 27 29.5 dB

f

RF

= 399.25 MHz; see Fig.4 24.5 27 29.5 dB
VHF OSCILLATOR
f

osc

oscillator frequency 84.15 − 438.15 MHz

∆f

osc(V)

oscillator frequency shift
with supply voltage

∆VCC= 5%; worst case in the frequency
range; note 2

− 100 200 kHz

∆V

CC

= 10%; worst case in the

frequency range; note 2

− 200 − kHz

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1999 Jan 13 13

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

∆f

osc(T)

oscillator frequency drift
with temperature

∆T=25°C with compensation; worst
case in the frequency range; note 3

− 1300 2000 kHz

∆f

osc(t)

oscillator frequency drift
with time

with compensation; worst case in the
frequency range; note 4

− 600 900 kHz

Φ

osc

phase noise, carrier to
noise sideband

±100 kHz frequency offset; worst case
in the frequency range

− 106 − dBc/Hz

RSC

(p-p)

ripple susceptibility of V

CC

(peak-to-peak value)

VCC= 5 V; worst case in the frequency
range; ripple frequency 500 kHz; note 5

15 40 − mV

UHF MIXER (INCLUDING IF AMPLIFIER)
f

i(RF)

RF input frequency picture carrier frequency 407.25 − 855.25 MHz

F noise figure f

RF

= 407.25 MHz; not corrected for

image; see Fig.10

− 810dB

f

RF

= 855.25 MHz; not corrected for

image; see Fig.10

− 911dB

R

s

real part of Zi=Rs+jωLsfRF= 407.25 MHz − 30 −Ω

f

RF

= 855.25 MHz − 38 −Ω
L

s

imaginary part of
Zi=Rs+jωL

s

fRF= 407.25 MHz − 9 − nH
f

RF

= 855.25 MHz − 6 − nH
V

o

output voltage causing 1%
cross modulation in
channel

fRF= 407.25 MHz; see Fig.7 116 119 − dBµV
f

RF

= 855.25 MHz; see Fig.7 114 117 − dBµV

V

i

input voltage causing
pulling in channel (750 Hz)

fRF= 855.25 MHz; note 1 − 78 − dBµV

G

V

voltage gain fRF= 407.25 MHz; see Fig.5 35 38 41 dB

f

RF

= 855.25 MHz; see Fig.5 35 38 41 dB
UHF OSCILLATOR
f

osc

oscillator frequency 446.15 − 894.15 MHz

∆f

osc(V)

oscillator frequency shift
with supply voltage

∆VCC= 5%; worst case in the frequency
range; note 2

− 30 80 kHz

∆V

CC

= 10%; worst case in the

frequency range; note 2

− 80 − kHz

∆f

osc(T)

oscillator frequency drift
with temperature

∆T=25°C; with compensation; worst
case in the frequency range; note 3

− 600 1000 kHz

∆f

osc(t)

oscillator frequency drift
with time

with compensation; worst case in the
frequency range; note 4

− 200 400 kHz

Φ

osc

phase noise, carrier to
noise sideband

±100 kHz frequency offset; worst case
in the frequency range

− 106 − dBc/Hz

RSC

(p-p)

ripple susceptibility of V

CC

(peak-to-peak value)

VCC= 5 V; worst case in the frequency
range; ripple frequency 500 kHz; note 5

15 20 − mV

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1999 Jan 13 14

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Notes

1. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency
deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal.

2. The frequency shift is defined as the change of the oscillator frequency when the supply voltage varies from
VCC= 5 to 4.75 V (4.5 V) or from VCC= 5 to 5.25 V (5.5 V). The oscillator is free-running during this measurement.

3. The frequency drift is defined as the change of the oscillator frequency when the ambient temperature varies from
T

amb

=25to0°C or from T

amb

=25to50°C. The oscillator is free-running during this measurement.

4. The switching on drift is defined as the change of the oscillator frequency between 5 seconds and 15 minutes after
switching on. The oscillator is free-running during this measurement.

5. The ripple susceptibility is measured for a 500 kHz ripple at the IF amplifier output using the measurement circuit;
the level of the ripple signal is increased until a difference of 53.5 dB between the IF carrier set at 100 dBµV and the
sideband components is reached.

6. This is the level of divider interferences close to the IF frequency. For example:
Ch S1: f

osc

= 144.15 MHz and1⁄4f

osc

= 36.0375 MHz.

Ch S2: f

osc

= 151.15 MHz and1⁄4f

osc

= 37.7875 MHz.

Ch S14: f

osc

= 291.15 MHz and1⁄8f

osc

= 36.39375 MHz.
The VHF RF input must be left open (i.e. not connected to any load or cable).
The UHF RF inputs are connected to a hybrid.

7. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator.
The rejection should be >60 dB for an IF output signal of 100 dBµV.

8. The reference frequency rejection is the level of reference frequency sidebands related to the sound subcarrier.
The rejection should be >50 dB for an IF output signal of 100 dBµV, f

REF

= 7.8125 kHz.

9. Channel x beat: picture carrier frequency (69.25 MHz) and sound carrier frequency (74.75 MHz) both at 80 dBµV,
f

osc

at 108.15 MHz. The rejection of the interfering product RF picture carrier frequency + RF sound carrier

frequency − f

osc

at 35.85 MHz should be >60 dB.

10. Channel S02: picture carrier frequency is 76.25 MHz at 80 dBµV, f

osc

= 115.15 MHz.

The rejection of f

osc

− 2 × fIF= 37.35 MHz should be >66 dB.

R

EJECTION AT THE IF AMPLIFIER OUTPUT

INT

DIF

level of divider
interferences in the IF
signal

note 6 − 20 − dBµV

INTR

XTAL

crystal oscillator
interferences rejection

note 7 60 −−dBc

INTRF

REF

reference frequency
rejection

note 8 50 −−dBc

INT

CHX

channel x beat note 9 60 −−dBc

INT

S02

S02 beat note 10 66 −−dBc

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1999 Jan 13 15

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

TEST AND APPLICATION INFORMATION

Fig.4 Voltage gain (Gv) measurement in the VHF band.

(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
Z

i

>> 50 Ω⇒Vi=2×V

meas

; Vi=80dBµV

V

o

=V’

meas

+ 16 dB (transformer ratio and transformer loss)

G

v

=20log

N1
N2

------- -

5=

V

o

V

i

------

handbook, full pagewidth

50 Ω

50 Ω

V

e

V

meas

RMS

voltmeter

spectrum
analyzer

V

i

signal
source

MGK828

D.U.T.

VHFIN IFOUT1

IFOUT2

50 Ω

V

o

V'

meas

C

T

(1)N1(2)

N2

Fig.5 Voltage gain (Gv) measurement in the UHF band.

(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
V

i=Vmeas

; Vi=70dBµV

V

o

=V’

meas

+ 16 dB (transformer ratio and transformer loss)

G

v

= 20 log +1 dB (1 dB = correction for hybrid loss)

N1
N2

------- -

5=

V

o

V

i

------

handbook, full pagewidth

V

i

50 Ω

50 Ω

V

e

V

meas

RMS

voltmeter

signal
source

50 Ω

A

B

C

D

HYBRID

D.U.T.

UHFIN1 IFOUT1

IFOUT2UHFIN2

spectrum
analyzer

MGK829

50 Ω

V

o

V'

meas

C

T

(1)N1(2)

N2

1999 Jan 13 16

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Fig.6 Cross modulation measurement in the VHF band.

(1) N1 is 2 × 5 turns
(2) N2 is 2 turns

Z

i

>> 50 Ω⇒Vi=2×V

meas

; V’

meas=Vo

−16 dB (transformer ratio and transformer loss)

Wanted input signal V

i

=80dBµV at wanted fRF= 45.25 MHz (399.25 MHz).

Measured level of the unwanted output signal V

ou

causing 0,3% AM modulation in the wanted output signal;

unwanted f

RF

= 50.75 MHz (404.75 MHz); Vou=V’

meas

+16dB.

N1
N2

------- -

5=

handbook, full pagewidth

unwanted

signal

source

e

u

e

w

50 Ω

50 Ω

wanted

signal

source

50 Ω

MGL275

D.U.T.

18 dB

attenuator

50 Ω

o

V

FILTER

38.9 MHz

modulation
analyzer

HYBRID

AC

BD

V

RMS

voltmeter

V

i

AM = 30%

meas

V'

VHFIN IFOUT1

IFOUT2

C

T

50 Ω

V

V

meas

RMS

voltmeter

(1)

N1

(2)

N2

Fig.7 Cross modulation measurement in the UHF band.

(1) N1 is 2 × 5 turns
(2) N2 is 2 turns

V

i=Vmeas

; V’

meas=Vo

−16 dB (transformer ratio and transformer loss)

Wanted input signal V

i

=70dBµV at fRF= 407.25 MHz (855.25 MHz).

Measured level of the unwanted output signal V

ou

causing 0,3% AM modulation in the wanted output signal;

unwanted f

RF

= 412.75 MHz (860.75 MHz); Vou=V’

meas

+16dB.

N1
N2

------- -

5=

handbook, full pagewidth

unwanted

signal

source

50 Ω

50

Ω

wanted

signal

source

50

Ω

50 Ω

MGL276

D.U.T.

18 dB

attenuator

50 Ω

o

V

FILTER

38.9 MHz

modulation
analyzer

HYBRID

AC

BD

HYBRID

AC

BD

V

RMS

voltmeter

V

i

AM = 30%

e

u

e

w

(1)

N1

(2)

N2

UHFIN1 IFOUT1

IFOUT2UHFIN2

C

T

50 Ω

V

V

meas

RMS

voltmeter

1999 Jan 13 17

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Fig.8 Input circuit for optimum noise figure in the VHF band.

(a) For fRF= 50 MHz:
VHF mixer frequency response measured = 57 MHz;
loss = 0 dB.
Image suppression = 16 dB.
C1 = 9 pF;C2=

15 pF.
L1 = 7 turns (Ø 5.5 mm; wire Ø = 0.5 mm).
I1 = semi rigid cable (RIM): 5 cm long.
(semi rigid cable (RIM); 33 dB/100 m;

50 Ω; 96 pF/m)

.

(b) For fRF= 150 MHz:
VHF mixer frequency response measured = 150.3 MHz;
loss = 1.3 dB.
Image suppression = 13 dB.
C3 = 5 pF; C4 = 25 pF.
I2 = semi rigid cable (RIM): 30 cm long.
I3 = semi rigid cable (RIM): 5 cm long
(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).

handbook, full pagewidth

MBE286 - 1

L1 C2

C1

PCB

plug plug

BNC BNC

RIM-RIM

I1

C4

C3

PCB

RIM-RIM

I3

I2

(a) (b)

F=F

meas

− loss (of input circuit) (dB).

Fig.9 Noise figure (F) measurement in the VHF band.

handbook, full pagewidth

MGL277

VHFIN

IFOUT1

IFOUT2

D.U.T.

NOISE

SOURCE

NOISE

FIGURE

METER

BNC

RIM

INPUT

CIRCUIT

C

T

1999 Jan 13 18

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Loss (in hybrid) = 1 dB.
F=F

meas

− loss (in hybrid).

Fig.10 Noise figure (F) measurement in the UHF band.

handbook, full pagewidth

MGL278

UHFIN1

UHFIN2

IFOUT1

D.U.T.

NOISE

SOURCE

NOISE

FIGURE

METER

50 Ω

A

B

C

D

HYBRID

IFOUT2

C

T

1999 Jan 13 19

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Fig.11 Measurement circuit.

The pin numbers in parenthesis represent the TDA6405 and TDA6405A.

andbook, full pagewidth

MGK812

1 (28)

2 (27)

3 (26)

4 (25)

UHFIN1

UHFIN2

VHFIN

RFGND

5 (24)

15 pF

15 pF

1
2
3

6

4

7

8

6 (23)

7 (22)

8 (21)

IFFIL1

IFFIL2

PVHFL

PVHFH

9 (20)

10 (19)

11 (18)

12 (17)

13 (16)

PUHF

AS

SDA

SCL

ADC

P5

P9

CP

14 (15)

(14) 15

(13) 16

(12) 17

(11) 18

VT

XTAL

IFOUT1

(10) 19

(9) 20

(8) 21

(7) 22

(6) 23

V

CC

GND

IFOUT2

UHFOSCIB1

UHFOSCOC1

UHFOSCOC2

(5) 24

(4) 25

(3) 26

(2) 27

(1) 28

UHFOSCIB2

VHFOSCIB1

VHFOSCOC2

VHFOSCOC1

TDA6404

(TDA6405)

(TDA6405A)

C1P1

P2

P3

1 nF

C3

1 nF

C6

1 nF

UHF1

UHF2

VHF

UHF

C13

C11

1.2 kΩ

330 Ω

10 µF

(16 V)

10 µF
(16 V)

VHFH

LED-3Y

330 Ω

VHFL

LED-3R

330 Ω

UHF

R10

R8

R11

330 Ω

330 Ω

R12

R13

LED-3G

D6

D5

D7

R17

50 Ω

R22

R18 1 kΩ

R19
330 Ω

C27 C28

for test purpose only

for test purpose only

V

CC

+V

CC

V

CC

TR1

BC847B

V

ripple

SCL

GND

SDA

+5 V

J7

J5

J1

VHFH

J2

VHFL

J3

PLL

J4

123456

VHFOSCIB2

C17

1 pF

1 pF

1 pF

1 pF

C8

2.2 pF

C16

C7

2.2 pF

C14

C4

R21 R2

2.2 pF

C12

C2D1BB149

150 pF

C9
100

pF

D3
BA792

D2

BB152

R9

4.7 kΩ

L2
30 nH

L4
80 nH

L5
16 nH

C18
10 pF

4.7 nF

C5

4.7 nF

C30

4.7 nF

C10

47 pF

C15

R6
22 kΩ

22
kΩ

22
kΩ

L6
30 nH

1 µH

L1

R4 1.5 kΩ
R5 2.7 kΩ

R3 22 kΩ

R1 1.5 kΩ

22 kΩ

R7

D4
BB149

VHFH

VHFL

X1

4 MHz

C25

100 nF

C26

R15 33 kΩ

2.2 nF

C23

18 pF

R20 68 kΩ

+33 V

AGND

+5 V

1234

V

CC

C22

10 nF

C24

10 nF

L8

80 nH

L9

80 nH

C20

1 nF

C19

1 nF

C21
18 pF

1
2
3

6

L7

4

7

8

IF

OUT

P10

f

REF

P4

for test purpose only

L3

TOKO 7 km

L value/C value

R16
22 kΩ

R14
22 kΩ

J6

C29 10 nF

TR2
BC847B

+V

CC

+V

CC

P7

P8

P6

1999 Jan 13 20

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Component values for measurement circuit
Table 11 Capacitors (all SMD and NP0 unless otherwise

specified)

COMPONENT VALUE

C1 1 nF
C2 150 pF
C3 1 nF
C4 2.2 pF (N750)
C5 4.7 nF
C6 1 nF
C7 2.2 pF (N750)
C8 2.2 pF (N750)
C9 100 pF (N750)
C10 4.7 nF
C11 15 pF
C12 1 pF (N750)
C13 15 pF
C14 1 pF (N750)
C15 47 pF
C16 1 pF (N750)
C17 1 pF (N750)
C18 10 pF (N750)
C19 1 nF
C20 1 nF
C21 18 pF
C22 10 nF
C23 18 pF
C24 10 nF
C25 100 nF
C26 2.2 nF
C27 10 µF (16 V; electrolytic)
C28 10 µF (16 V; electrolytic)
C29 10 nF
C30 4.7 nF

Table 12 Resistors (all SMD)

COMPONENT VALUE

R1 1.5 kΩ
R2 22 kΩ
R3 22 kΩ
R4 1.5 kΩ
R5 2.7 kΩ
R6 22 kΩ
R7 22 kΩ
R8 330 Ω
R9 4.7 kΩ
R10 330 Ω
R11 330 Ω
R12 330 Ω
R13 330 Ω
R14 22 kΩ
R15 33 kΩ
R16 22 kΩ
R17 1.2 kΩ
R18 1 kΩ
R19 330 Ω
R20 68 kΩ
R21 22 kΩ
R22 50 Ω

1999 Jan 13 21

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Table 13 Diodes and ICs

Table 14 Coils

COMPONENT VALUE

D1 BB149
D2 BB152
D3 BA792
D4 BB149
D5 LED-3R
D6 LED-3Y
D7 LED-3G
IC TDA6404; TDA6405;

TDA6405A

COMPONENT VALUE

L1 1 µH (inductor)
L2 30 nH
L4 80 nH
L5 16 nH
L6 30 nH
L8 80 nH
L9 80 nH

Table 15 Transformer

Table 16 Crystal

Table 17 Transistors

COMPONENT VALUE

L3 23 turns

(TOKO, wire 0.07 mm)

L7 N1 = 2 × 5 turns

N2 = 2 turns
(TOKO, wire 0.09 mm)

COMPONENT VALUE

X1 4 MHz

COMPONENT VALUE

TR1 BC847B
TR2 BC847B

1999 Jan 13 22

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

INTERNAL PIN CONFIGURATION

SYMBOL

PIN

CONFIGURATION

(1)

A VERAGE DC VOL TAGE

(V)

TDA6404

TDA6405:

TDA6405A

VHF UHF

UHFIN1 1 28 note 2 1.0
UHFIN2 2 27 note 2 1.0

VHFIN 3 26 1.9 note 2

RFGND 4 25 0.0 0.0

IFFIL1 5 24 3.4 3.4
IFFIL2 6 23 3.4 3.4

PVHFL 7 22 0.0 or

(V

CC

− VCE)

0.0

PVHFH 8 21 (V

CC

− VCE)

or 0.0

0.0

PUHF 9 20 0.0 (V

CC

− VCE)

MGE704

1

2

(27)

(28)

MGE705

3

(26)

MGE706

4

(25)

MGD617

65 (23)(24)

MGK814

7

(22)

8

(21)

9

(20)

1999 Jan 13 23

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

AS 10 19 V

AS

V

AS

SDA 11 18 note 2 note 2

SCL 12 17 note 2 note 2

ADC 13 16 1.9 1.9

CP 14 15 1.9 1.9

SYMBOL

PIN

CONFIGURATION

(1)

A VERAGE DC VOL TAGE

(V)

TDA6404

TDA6405:

TDA6405A

VHF UHF

MGK815

10

(19)

MGK816

11

(18)

MGK817

12

(17)

MGK818

13

(16)

MGK819

14

(15)

1999 Jan 13 24

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

VT 15 14 V

VT

V

VT

XTAL 16 13 3.0 3.0

V

CC

17 12 supply voltage 5.0 5.0
IFOUT1 18 11 2.2 2.2
IFOUT2 19 10 2.2 2.2

GND 20 9 0.0 0.0

UHFOSCIB1 21 8 note 2 1.9
UHFOSCOC1 22 7 note 2 2.5
UHFOSCOC2 23 6 note 2 2.5
UHFOSCIB2 24 5 note 2 1.9

SYMBOL

PIN

CONFIGURATION

(1)

A VERAGE DC VOL TAGE

(V)

TDA6404

TDA6405:

TDA6405A

VHF UHF

MGK820

15

(14)

MGK821

16

(13)

MGK822

18

(11)19(10)

MGK823

20
(9)

MGK824

21

22

24

23

(5)

(6)

(7)

(8)

1999 Jan 13 25

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Notes

1. The pin numbers in parenthesis represent the TDA6405 and TDA6405A.

2. Not applicable.

VHFOSCIB1 25 4 2.0 note 2
VHFOSCOC1 26 3 2.7 note 2
VHFOSCOC2 27 2 2.7 note 2
VHFOSCIB2 28 1 2.0 note 2

SYMBOL

PIN

CONFIGURATION

(1)

A VERAGE DC VOL TAGE

(V)

TDA6404

TDA6405:

TDA6405A

VHF UHF

MGK825

25

26

28

27

(1)

(2)

(3)

(4)

1999 Jan 13 26

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

PACKAGE OUTLINE

UNIT A1A2A

3

b

p

cD

(1)E(1) (1)

eHELLpQZywv θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.21

0.05

1.80

1.65

0.38

0.25

0.20

0.09

10.4

10.0

5.4

5.2

0.65 1.25

7.9

7.6

0.9

0.7

1.1

0.7

8
0

o
o

0.13 0.10.2

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

1.03

0.63

SOT341-1 MO-150AH

93-09-08
95-02-04

X

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

(A )

3

A

114

28 15

0.25

y

pin 1 index

0 2.5 5 mm

scale

SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm

SOT341-1

A

max.

2.0

1999 Jan 13 27

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

SOLDERING
Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Jan 13 28

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

PACKAGE

SOLDERING METHOD

WAVE REFLOW

(1)

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO not recommended

(5)

suitable

1999 Jan 13 29

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

2

C COMPONENTS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Purchase of Philips I

2

C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

1999 Jan 13 30

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

NOTES

1999 Jan 13 31

Philips Semiconductors Product specification

5 V mixer/oscillator-PLL synthesizers for
hyperband tuners

TDA6404; TDA6405;

TDA6405A

NOTES

Internet: http://www.semiconductors.philips.com

Philips Semiconductors – a worldwide company

© Philips Electronics N.V. 1999 SCA61
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

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Printed in The Netherlands 545004/750/02/pp32 Date of release: 1999 Jan 13 Document order number: 9397 750 04901