Video IF Amplifier and Demodulator
with Full-SCART
Features
● Multistandard video IF
● Interference suppression circuitry
● Mean/peak value control
● Area of application: TV set with Full-SCART
P-DIP-18
TypeOrdering CodePackage
TDA 5931-65Q67000-A5136P-DIP-18
TDA 5931-65
Bipolar IC
Functional Description
Video IF for all European standards for positive and negative modulation. The video section
contains a Full-SCART interface. An output for the demodulated video signal (pin 9) allows the
insertion of a sound trap into the signal path to the input or the SCART switch and the SCART output
buffer amplifier (pin 7). The analog setting function (delayed AGC threshold) is controlled via a
potentiometer, all other switch functions are controlled via open-collector transistors.
Circuit Description
The component includes a four-stage, capacitively coupled, symmetrically designed and controlled
amplifier, a limiter with selection, and a mixer for quasi-synchronous demodulation of positive and
negative modulated IF signals. In addition a video output amplifier and noise suppression circuitry
are included. This output is used for generating the AGC voltage. The AGC for both modulation
types has been realized as integral AGC with noise free peak and mean value detector (only for
positive modulation). For SCART applications this output is switched a video source switch with two
inputs (for the demodulator signal or SCART socket) and two outputs (SCART- and TV output). The
demodulator output (pin 9) provides a video signal output level 3 dB higher than the level required
for the operation of the TV set or to drive the SCART connector. Therefore it is possible to insert a
sound trap in between this output and the input of the SCART switch (pin 7). The insertion loss of
the sound trap has to attenuate the signal level at pin 9 by a factor 2/3 or 3 dB (AC and DC) to avoid
distortions in the SCART switch.
The delayed tuner AGC is generated by a threshold amplifier driven by the control voltage. The
amplifier response can be controlled by means of an external potentiometer. (The increase of the
tuner AGC voltage shall create a higher tuner gain = positive control).
Semiconductor Group3106.94
Page 2
Pin Functions
Pin No.Function
1Video IF input
2SCART switch A/W
3SCART input
4SCART input/output
TDA 5931-65
5+
6Positive video output
7Video output of the sound trap (2 Vpp)
8Ground
9Video input of the sound trap (3 Vpp)
10Demodulator tank circuit
11Demodulator tank circuit
12TV-standard switch-over (B/G) – (L)
13Low-pass filter (averaging)
14Tuner AGC threshold
15Tuner AGC output
16AGC-time constant
17Ground
18Video IF input
V
supply voltage
S
Semiconductor Group32
Page 3
TDA 5931-65
Block Diagram
Semiconductor Group33
Page 4
TDA 5931-65
Absolute Maximum Ratings
T
= 0 to 70 °C
A
ParameterSymbolLimit ValuesUnit
min.max.
Sound trap input
Demodulator output
Demodulator output
Supply voltage
SCART A/W
Pos. video output
Pos. video output
Demodulator tank circuit
SCART OUT
SCART OUT
Tuner AGC threshold
Tuner AGC output
IF input
IF control
Norm switch-over
Norm switch-over
SCART IN
Junction temperature
Storage temperature
Thermal resistance (system-air)
V
7
V
9
I
9
V
5
V
2
I
6
V
6
V10/V
I
4
V
4
V
14
V
15
V1/V
V
16
V
12
V
13
V
3
T
j
T
stg
T
th SA
18
11
3.38.5V
0V
5
V
– 310mA
013.2V
06V
– 35mA
08.5V
0V
5
V
– 35mA
0V
5
V
06V
010V
06V
08.5V
06V
06V
06V
150˚C
– 40125˚C
70K/W
Operating Range
Supply voltage
Supply voltage delayed tuner AGC
Ambient temperature during operation
Input frequency range – 3 dB
Input frequency range – 0.3 dB
V
5
V
15
T
A
f
IF
f
IF
10.813.2V
1.513.2V
070˚C
10100MHz
3075MHz
All voltage values are referenced to ground, if not stated otherwise.
The current are identified according to the source/sink principle. If the IC considered a sink (the
current flows from the respective pin to ground), it is identified by a negative algebraic sign.
However, if the IC is the source (the current flows from VB via the respective pin to ground), it is
identified by a positive algebraic sign.
Semiconductor Group34
Page 5
TDA 5931-65
Characteristics
T
= 25 ˚C; VS = 12 V
A
ParameterSymbolLimit ValuesUnitTest Condition
min.typ.max.
Static Characteristics
Total current consumption–
I
5
38.55671.5mAV
AGC Voltage
Min. AGC
Max. AGC
V
16
V
16
0
2.6
AGC-Time Constant (by neg. modulation)
I
Charge current (
max
:2)
Discharge current
Charge/discharge ratio
I
16
– I
V
16
16
0.55
13
55
AGC-Time Constant (by pos. modulation)
Charge current
Discharge current
Discharge current
Charge/discharge ratio
I
16
– I
– I
V
16
16
16
1.1
0.15
70
4000
0.1
2.85
0.7
17
82
1.4
0.25
90
5600
0.5
6.0
0.95
23
140
1.7
0.35
110
9000
V
V
mA
µA
mA
µA
µA
= 10 mVrms
1/16
V
= 45 µVrms
1/16
V
= 175 mVrms
1/16
V
= 2 V; V6< 2.2 V
16
V
= 2 V; V6> 2.8 V
16
V
= 2 V; V6≥ 4.1 V
16
V
= 2 V;
16
3.1 V < V6 < 4.1 V
V
= 2 V; V6< 2.3 V
16
Averaging by Pos. Modulation
White level
Zero carrier level
Tuner AGC threshold
I
5
= I
max
:2
V
13
V
13
V
14
I
14
V
16
V
16
4.95.76.5VV
3.33.74.1VV
4.2
650
2.8
0.33
4.5
850
3.1
0.38
4.8
1050
3.4
0.43
V
µA
V
V
= 10 mVrms
1/18
= 0 V; V16 = 3 V
1/18
R
V
R
R
14/17
= 0 V
14
14/17
14/17
= ∞
= 10 kΩ
= 10 Ω
The characteristics data apply to the supply voltage range VS stated or in case of alignment to the
alignment instructions (see page 40). All static voltages are referenced to ground if not stated
otherwise.
The input levels are given as rms values referenced to synchronous peak fPC = 38.9 MHz.
Differential Gain with fPC = 10 mV (staircase signal)
Peak to Peak According to CCIR Rec. 567-1
Staircase signal
Changes via AGC
Changes via detuning
f
= 38.9 MHz;
PC
DG
∆DG / ∆v
∆DG / ∆f
∆f ± 400 kHz
Differential Phase with
f
= 10 mVrms (staircase signal)
PC
Peak to Peak According to CCIR Rec. 567-1
Staircase signal
Changes via AGC
Changes via detuning
f
= 38.9 MHz;
PC
DP
∆DP / ∆v
∆DP / ∆f
∆f ± 400 kHz
Interdemodulation Ratio
With fIM = 1.07 MHz = fTT – f
FT
With BT = 10 mVeff
With sound porch – 13 dB
With sound porch – 13 dB
With sound porch – 13 dB
a
IM
a
IM
a
IM
32
54
51
4.56
± 1
± 1.5
22.5
1
± 1
38
60
57
–
–
–
%
%
%
degree
degree
degree
dB
dB
dB
OFW G 3950
OFW 361D
OFW G 1956
Demodulator Tank Circuit Voltage
f
= 38.9 MHz; C = 47 pF
PC
L = 350 nH
V
10/11
300450600mVpp
100 ≤ Q0≤ 120;Q8≈ 60;
B ≈ 0.8 … 1.0 MHz
Synchron pulse∆
Semiconductor Group40
V
Sync/V6
5%
Page 11
Alignment Instructions
TDA 5931-65
At a video carrier input level of V
of V16 = 1.5 V the tank circuit is aligned that way, that at the positive video output the demodulated
video signal 6 Vpp is at its maximum.
As a modulation every sufficient video test pattern can be used. Then the superimposed AGCcontrol voltage at pin 16 is reduced until the video signal has an amplitude of approx. 2 Vpp. The
video signal is then fine tuned for its maximum.
The adjustment is not critical due to the wide maximum.
The adjustment can also be performed regarding intercarrier signal to noise ratio, differential gain or
2T-pulse response.
= 4 mVrms, fPC = 38.9 MHz and a superimposed AGC voltage
1/18
Semiconductor Group41
Page 12
TDA 5931-65
Test Circuit
Semiconductor Group42
Page 13
TDA 5931-65
Application Circuit
Semiconductor Group43
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