Page 1
DATA SH EET
Preliminary specification
File under Integrated Circuits, IC02
March 1994
INTEGRATED CIRCUITS
Philips Semiconductors
TDA6103Q
Triple video output amplifier
Page 2
March 1994 2
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
FEATURES
• High bandwidth: 7.5 MHz typical; 60 V (peak-to-peak
value)
• High slew rate: 1600 V/µs
• Simple application with a variety of colour decoders
• Only one supply voltage needed
• Internal protection against positive appearing
Cathode-Ray Tube (CRT) flashover discharges
• One non-inverting input with a low minimum input
voltage of 1 V
• Thermal protection
• Controllable switch-off behaviour.
GENERAL DESCRIPTION
The TDA6103Q includes three video output amplifiers in
one single in-line 9-pin medium power (SIL9MP) package
SOT111BE, using high-voltage DMOS technology,
intended to drive the three cathodes of a colour CRT.
ORDERING INFORMATION
BLOCK DIAGRAM
EXTENDED TYPE
NUMBER
PACKAGE
PINS PIN POSITION MATERIAL CODE
TDA6103Q 9 DBS9 plastic SOT111BE
Fig.1 Block diagram (one amplifier shown).
FLASH-
DIODE
MIRROR 3
LEVEL-
SHIFTER 1
DIFFERENTIAL
STAGE
V
DD
1x
THERMAL
PROTECTION
V
DD
V
bias
CURRENT
SOURCES
MIRROR 2
V
DD
MIRROR 1
LEVEL-
SHIFTER 2
9,8,7
1,2,3
V
DD
V
DD
inverting
input
(3x)
V
oc
(3x)
non-inverting
input
V
ip
5
4
6
V
DD
GND
MGA968
3x
TDA6103Q
Page 3
March 1994 3
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
PINNING
SYMBOL PIN DESCRIPTION
V
i1
1 inverting input 1
V
i2
2 inverting input 2
V
i3
3 inverting input 3
GND 4 ground, fin
V
ip
5 non-inverting input
V
DD
6 supply voltage
V
oc3
7 cathode output 3
V
oc2
8 cathode output 2
V
oc1
9 cathode output 1
Fig.2 Pin configuration.
1
2
3
4
5
6
7
8
9
MGA969
V
i1
GND
V
DD
V
oc3
TDA6103Q
V
i2
V
i3
V
oc2
V
oc1
V
ip
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages measured with respect to GND (pin 4);
currents as specified in Fig.1; unless otherwise specified.
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see
“Handling MOS Devices”
).
QUALITY SPECIFICATION
Quality specification
“SNW-FQ-611 part E”
is applicable and can be found in the
“Quality reference pocketbook”
(ordering
number 9398 510 34011).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD
supply voltage 0 250 V
V
i
input voltage 0 12 V
V
idm
differential mode input voltage −6+6V
V
oc
cathode output voltage 0 V
DD
V
I
ocsmL
LOW non-repetitive peak cathode
output current
flashover discharge = 50 µC05A
I
ocsmH
HIGH non-repetitive peak cathode
output current
flashover discharge = 100 nC 0 10 A
T
stg
storage temperature −55 +150 °C
T
j
junction temperature −20 +150 °C
V
es
electrostatic handling
human body model (HBM) − tbf V
machine model (MM) − tbf V
Page 4
March 1994 4
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
THERMAL RESISTANCE
Note
1. An external heatsink is necessary.
SYMBOL PARAMETER THERMAL RESISTANCE
R
th j-fin
from junction to fin; note 1 11 K/W
R
th h-a
from heatsink to ambient 18 K/W
Fig.3 Power derating curves.
(1) Infinite heatsink.
(2) No heatsink.
0 50 100–50
2
0
MGA972
150
P
tot
(W)
4
6
T ( C)
o
amb
(1)
(2)
1
3
5
Thermal protection
The internal thermal protection circuit gives a decrease of
the slew rate at high temperatures: 10% decrease at
130 °C and 30% decrease at 145 °C (typical values on the
spot of the thermal protection circuit).
Fig.4 Equivalent thermal resistance network.
Thermal protection circuit
5 K/W
6 K/W
OUTPUTS
FIN
MGA970
Page 5
March 1994 5
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
CHARACTERISTICS
Operating range: T
j
= −20 to 150 °C; VDD = 180 to 210 V; Vip = 1 to 4 V.
Test conditions (unless otherwise specified): T
amb
= 25 °C; VDD = 200 V; Vip = 1.3 V; V
oc1
= V
oc2
= V
oc3
=1⁄2VDD;
C
L
= 10 pF (CL consists of parasitic and cathode capacitance); R
th h-a
= 18 K/W; measured in test circuit Fig.5.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DD
quiescent supply current 7.0 9.25 11.5 mA
I
bias
input bias current inverting inputs
(pins 1, 2 and 3)
−5 −1+1µA
I
bias
input bias current non-inverting
input (pin 5)
−15 −3+1µA
V
i(offset)
input offset voltage
(pins 1, 2 and 3)
−50 − +50 mV
∆V
i(offset)
differential input offset voltage
temperature drift between pins 1
and 5; 2 and 5; 3 and 5
− tbf − mV/K
C
icm
common-mode input capacitance
(pins 1, 2 and 3)
− 5 − pF
C
icm
common-mode input capacitance
(pin 5)
− 10 − pF
C
idm
differential mode input capacitance
between 1 and 5; 2 and 5; 3 and 5
− 1 − pF
V
oc(min)
minimum output voltage
(pins 7, 8 and 9)
V
1−5
= V
2−5
= V
3−5
= −1V − 510V
V
oc(max)
maximum output voltage
(pins 7, 8 and 9)
V
1−5
= V
2−5
= V
3−5
= 1 V;
note 1
VDD− 10 VDD− 6 − V
GB gain-bandwidth product of
open-loop gain:
V
oc1, 2, 3/Vi1-5, 2-5, 3-5
f = 500 kHz − 0.75 − GHz
B
S
small signal bandwidth
(pins 7, 8 and 9)
V
oc(p-p)
= 60 V 6 7.5 − MHz
B
L
large signal bandwidth
(pins 7, 8 and 9)
V
oc(p-p)
= 100 V 5 7 − MHz
t
pd
cathode output propagation delay
time 50% input to 50% output
(pins 7, 8 and 9)
V
oc(p-p)
= 100 V square
wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8
− 38 − ns
∆t
p
difference in cathode output
propagation time 50% input to
50% output (pins 7 and 8, 7 and 9
and 8 and 9)
V
oc(p-p)
= 100 V square
wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3)
−10 0 +10 ns
t
r
cathode output rise time 10%
output to 90% output
(pins 7, 8 and 9)
Voc = 50 to 150 V square
wave; f < 1 MHz; tf = 40 ns
(pins 1, 2 and 3); see Fig.7
48 60 73 ns
t
f
cathode output fall time 90% output
to 10% output (pins 7, 8 and 9)
Vo = 150 to 50 V square
wave; f < 1 MHz; tr = 40 ns
(pins 1, 2 and 3); see Fig.8
48 60 73 ns
Page 6
March 1994 6
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
Notes
1. See also Fig.6 for the typical low-frequency response of Vi to Voc.
2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.
t
s
settling time 50% input to
(99% < output < 101%)
V
oc(p-p)
= 100 V square
wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8
−−350 ns
SR slew rate between
50Vto(V
DD
− 50 V); (pins 7, 8 and
9)
V
1−5
= V
2−5
= V
3−5
= 2 V
square wave (p-p);
f < 1 MHz; tr =tf =40ns
(pins 1, 2 and 3)
− 1600 − V/µs
O
v
cathode output voltage overshoot
(pins 7, 8 and 9)
V
oc(p-p)
= 100 V square
wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8
− 5 − %
SVRR supply voltage rejection ratio f < 50 kHz; note 2 − 70 − dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Cathode output
The cathode output is protected against peak currents
(caused by positive voltage peaks during high-resistance
flash) of 5 A maximum with a charge content of 50 µC.
The cathode is also protected against peak currents
(caused by positive voltage peaks during low-resistance
flash) of 10 A maximum with a charge content of 100 nC.
The DC voltage of VDD (pin 6) must be within the operating
range of 180 to 210 V during the peak currents.
Flashover protection
The TDA6103Q incorporates protection diodes against
CRT flashover discharges that clamp the cathode output
voltage up to a maximum of V
DD
+ V
diode
. To limit the diode
current, an external 1.5 kΩ carbon high-voltage resistor in
series with the cathode output and a 2 kV spark gap are
needed (for this resistor-value, the CRT has to be
connected to the main PCB). This addition produces an
increase in the rise- and fall times of approximately 5 ns
and a decrease in the overshoot of approximately 3%.
V
DD
to GND must be decoupled:
1. With a capacitor >20 nF with good HF behaviour (e.g.
foil). This capacitance must be placed as close as
possible to pins 6 and 4, but definitely within 5 mm.
2. With a capacitor >10 µF on the picture tube base print.
Switch-off behaviour
The switch-off behaviour of the TDA6103Q is controllable.
This is due to the fact that the output pins of the
TDA6103Q are still under control of the input pins for
relative low-power supply voltages (approximately 30 V
and higher).
Page 7
March 1994 7
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
Test circuit
C
par
=70fF.
100 kΩ
R5
C13
6.8
pF
2 MΩ
R7
TDA6103Q
22 µF
C1
667 Ω
R1
C7
22 nF
C2
V
in1
0.987
mA
8.2 pF
V
i1
100 kΩ
R8
C
par
C14
136
pF
C12
3.2
pF
probe 1
V
oc1
C16
6.8
pF
R9
R10
C17
136
pF
C15
3.2
pF
probe 2
V
oc2
C19
6.8
pF
R11
R12
C20
136
pF
C18
3.2
pF
probe 3
V
oc3
22 µF
C3
R2
C8
22 nF
C4
V
in2
0.987
mA
8.2 pF
V
i2
22 µF
C5
667 Ω
R3
C9
22 nF
C6
V
in3
0.987
mA
8.2 pF
V
i3
1
2
3
100 kΩ
R4
C
par
1
6
9
8
7
5
3
2
C11
100 nF
R6
C
par
4
100 kΩ
C10
100
nF
1.3 V
V
DD
MGA976
2 MΩ
100 kΩ
2 MΩ
100 kΩ
667 Ω
Fig.5 Test circuit with feedback factor1⁄
150
.
Page 8
March 1994 8
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
Fig.6 Typical low-frequency (f < 1 MHz) response of ∆V
i1, 2,3
to V
oc1, 2,3
.
MGA973
0
5
100
200
194
188
1.2 0.633
0
0.583 1.1 1.2
V
oc
∆V
i
Fig.7 Output voltage (pins 7, 8 and 9) rising edge as a function of the AC input signal.
150
140
100
60
50
151
149
s
t
overshoot (in %)
t
t
0
x
x
t
r
pd
t
V
oc
V
i
MGA974
Page 9
March 1994 9
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
Fig.8 Output voltage (pins 7, 8 and 9) falling edge as a function of the AC input signal.
150
140
100
60
50
51
49
s
t
overshoot (in %)
t
t
0
x
x
t
f
pd
t
V
oc
V
i
MGA975
Page 10
March 1994 10
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
TEST AND APPLICATION INFORMATION
MGA977
1.5 kΩ
g1 g2 g3
kR
kG
kB
R21
1.5 kΩ
R22
1.5 kΩ
R23
EHT
A51EAL . . X02
C7
2.7 nF
(500 V)
C8
2.7 nF
(500 V)
optional
1.5 kΩ
R26
C9
1 nF
(2000 V)
V
g2 AQUA
X4X2
1
2
3
4
AQUA
V
ff
V (GND)
ff
185 V
1
2
3
4
R
G
B
GND
220 ΩR53.3 kΩ
R9
C3
680 Ω
R10
470 Ω
R13
TDA6103Q
123456789
100
nF
C5
220
kΩ
R19
R20
100 kΩ
R17
R16
47 Ω
R24
C6
10 µF
(250 V)
X1
1.2 Ω
R25
100 kΩ
R18
C4
220 nF
R6
3.3 kΩ
R7
C1
680 Ω
R12
470 Ω
R15
3.3 kΩ
R8
C2
R11
470 Ω
R14
470 Ω
R4
X3
100 kΩ
1.5
kΩ
470 Ω
680 Ω
Fig.9 Application diagram.
Page 11
March 1994 11
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
Dissipation
Regarding dissipation, distinction must first be made between static dissipation (independent of frequency) and dynamic
dissipation (proportional to frequency).
The static dissipation of the TDA6103Q is due to voltage supply currents and load currents in the feedback network and
CRT.
The static dissipation equals:
P
stat
= VDD× IDD− 3 × Voc× (Voc/Rfb− IOC)
Rfb = value of feedback resistor.
IOC = DC-value of cathode current.
The dynamic dissipation equals:
P
dyn
= 3 × VDD× (CL + Cfb + C
int
) × fi× V
o(p-p)
×δ
CL = load capacitance.
Cfb = feedback capacitance.
C
int
= internal load capacitance (≈4 pF).
fi = input frequency.
V
o(p-p)
= output voltage (peak-to-peak value).
δ = non-blanking duty-cycle.
The IC must be mounted on the picture tube base print to minimize the load capacitance (CL).
(1) All pins have an energy protection for positive or negative overstress situations.
Fig.10 Internal pin configuration.
MGA971
from
input
circuit
V
bias
7,8,9
5
to
differential
stage
to
differential
stage
to
differential
stage
from
input
circuit
1,2,3
to
differential
stage
TDA6103Q
46
V
DD
GND
(1)
Page 12
March 1994 12
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
PACKAGE OUTLINE
Fig.11 Plastic SIL-bent-to-DIL, medium power with fin, 9-pin (SOT111BE).
Dimensions in mm.
MBC376 - 1
0.25
M
(9x)
(8x)
2.54
4.4
4.2
5.9
5.7
8.7
8.0
18.5
17.8
6.48
6.14
1.0
0.3
1.40
1.14
1.0
0.7
0.76
3.9
3.4
seating plane
0.45
0.25
0.67
0.50
1.40
1.14
1.75
1.55
3.85
3.45
3.4
3.2
15.1
14.9
21.4
20.7
22.00
21.35
12 3 4
5
6789
2.75
2.50
(2x)
1.1
0.7
2.54
65
55
o
o
0.47
0.38
fin
Page 13
March 1994 13
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
SOLDERING
Plastic single in-line packages
B
Y DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply the soldering iron below the seating plane (or not
more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Page 14
March 1994 14
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
NOTES
Page 15
March 1994 15
Philips Semiconductors Preliminary specification
Triple video output amplifier TDA6103Q
NOTES
Page 16
Philips Semiconductors
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Tel. (071)436 41 44, Fax. (071)323 03 42
United States:INTEGRATED CIRCUITS:
811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd.,
P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404,
Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300
Uruguay: Coronel Mora 433, MONTEVIDEO,
Tel. (02)70-4044, Fax. (02)92 0601
For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BAF-1,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-724825
SCD29 © Philips Electronics N.V. 1994
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other industrial or intellectual property rights.
Printed in The Netherlands 9397 730 00011
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